US20020070463A1 - Composite bump bonding - Google Patents

Composite bump bonding Download PDF

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Publication number
US20020070463A1
US20020070463A1 US10/061,023 US6102302A US2002070463A1 US 20020070463 A1 US20020070463 A1 US 20020070463A1 US 6102302 A US6102302 A US 6102302A US 2002070463 A1 US2002070463 A1 US 2002070463A1
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United States
Prior art keywords
integrated circuit
input
substrate
output pads
circuit element
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Abandoned
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US10/061,023
Inventor
Shyh-Ming Chang
Jwo-huei Jou
Yu-Chi Lee
Dyi-chung Hu
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Industrial Technology Research Institute ITRI
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Industrial Technology Research Institute ITRI
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Priority to US10/061,023 priority Critical patent/US20020070463A1/en
Publication of US20020070463A1 publication Critical patent/US20020070463A1/en
Abandoned legal-status Critical Current

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    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F41—WEAPONS
    • F41J—TARGETS; TARGET RANGES; BULLET CATCHERS
    • F41J3/00—Targets for arrows or darts, e.g. for sporting or amusement purposes
    • F41J3/0004—Archery targets
    • F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
    • F41—WEAPONS
    • F41J—TARGETS; TARGET RANGES; BULLET CATCHERS
    • F41J1/00—Targets; Target stands; Target holders
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector

Definitions

  • the invention relates to the joining of integrated circuit elements to the next level of integration, or that level of integration to the following level, and more particularly to the formation of the bonded structure which comprises the physical and electrical connection between the integrated circuit element and the next level of integration.
  • a method for achieving increased interconnection density was patented by K. Hatada in U.S. Pat. No. 4,749,120.
  • This method employs a metal bump as the electrical interconnection between the integrated circuit chip and the substrate while holding the integrated circuit chip in place with a resin coating on the substrate acting as an adhesive between chip and substrate.
  • This method has the disadvantage of a relatively high Young's Modulus for metals. As a result of the high Young's Modulus a very large bonding force is required between the integrated circuit chip and the substrate during the micro-bump bonding process while the resin is undergoing its curing cycle.
  • U.S. Pat. No. 4,916,523 issued to Sokolovsky et al shows a unidirectional conductive adhesive to bond the integrated circuit chip to the substrate.
  • U.S. Pat. No. 5,134,460 issued to Brady et al shows conductive metal bumps coated with a gold layer.
  • a bonded structure comprising the integrated circuit element input/output pads, composite bumps comprised of a single polymer body with a Young's Modulus which is low compared to metals and a conductive metal coating covering the polymer body, and the substrate input/output pads.
  • the conductive metal coating covering the polymer body must be chosen to provide good adhesion to the polymer body and may include an adhesive layer and a barrier layer in addition to a conductor layer.
  • the low Young's Modulus of the polymer about 0.4 ⁇ 10 6 to 0.5 ⁇ 10 6 psi, allows the bond to be made with very low bonding force and greatly reduces or eliminates the force tending to separate the connections after the bonding force is removed. This results in extremely reliable physical and electrical connections between the integrated circuit element and substrate.
  • This object is achieved by forming a bonded structure comprising the integrated circuit element input/output pads, composite bumps comprised of a single polymer body with a Young's Modulus which is low compared to metals and a conductive metal coating covering the polymer body, and the substrate input/output pads.
  • the conductive metal coating covering the polymer body must be chosen to provide good adhesion to the polymer body and may include an adhesive layer and a barrier layer in addition to a conductor layer.
  • the composite bump will be deformed during the bonding process and the low Young's Modulus of the polymer, about 0.4 ⁇ 10 6 to 0.5 ⁇ 10 6 psi, allows the bond to be made with very low bonding force and greatly reduces or eliminates the force tending to separate the connections after the bonding force is removed.
  • the polymer body and the conductive metal coating must be chosen to be compatible with the temperatures used during the bonding process.
  • FIG. 1 is a cross sectional representation of the composite bump formed on the integrated circuit element showing the polymer interior and conductive metal coating of the composite bump.
  • FIG. 2 is a cross sectional representation of the bonded structure with the composite bumps formed on the integrated circuit element prior to bonding.
  • FIG. 3 is a cross sectional representation of the composite bump formed on the substrate showing the polymer interior and conductive metal coating of the composite bump.
  • FIG. 4 is a cross sectional representation of the bonded structure with the composite bumps formed on the substrate prior to bonding.
  • FIG. 5 is a cross sectional representation of the composite bump formed on both the integrated circuit element and the substrate showing the polymer interior and conductive metal coating of the composite bumps.
  • FIG. 6 is a cross sectional representation of the bonded structure with the composite bumps are formed on both the integrated circuit element and the substrate prior to bonding.
  • FIG. 7 is a cross sectional representation of the bonded structure wherein a conducting adhesive bonds the conducting metal coating of the composite bump to the substrate input/output pad.
  • FIG. 8 is a cross sectional representation of the bonded structure wherein a conducting adhesive bonds the conducting metal coating of the composite bump to the integrated circuit element input/output pad.
  • FIG. 9 is a cross sectional representation of the bonded structure wherein a conducting adhesive bonds the conducting metal coating of the integrated circuit element composite bump to the substrate composite bump.
  • FIG. 10 is a cross sectional representation of the bonded structure wherein a non conducting adhesive bonds the integrated circuit element to the substrate.
  • Composite bumps are formed on the integrated circuit element 30 input/output pads 26 .
  • the input/output pads are formed of a metal such as aluminum with a diameter of about 90 microns.
  • Each composite bump comprises a single polymer body 32 and a conductive metal coating 36 covering the polymer body.
  • the polymer body must withstand temperatures encountered during bonding and can be polyamic acid polyimide such as PROBIMIDE 7010 or PROBIMIDE 514 produced by OCG Microelectronic Materials, Inc., Tempe, Ariz.
  • the polymer body has a thickness of between about 5 and 25 microns.
  • Input/output pads 24 are formed on the substrate 20 using a metal such as aluminum.
  • the conductive metal coating 36 must adhere to the polymer body and can be a metal such as aluminum or nickel; or a composite such as nickel/gold, chrome/gold, chrome/silver, or titanium/platinum.
  • the conductive metal coating can be a composite which includes an adhesion layer/a barrier layer/a conductor layer such as chrome/copper/gold, chrome/nickel/gold, chrome/silver/gold, titanium/platinum/gold, titanium/palladium/gold, or titanium/tungsten/silver.
  • the composite bumps When the bonded structure is formed the composite bumps will contact the substrate input/output pads and will be deformed as shown in FIG. 2 so that each composite bump will contact a substrate input/output pad. Due to the low Young's Modulus of the polymer body a very small force, about one tenth that required by the traditional gold bump, is required for this deformation and there is little tendency to separate the bonded structure after it has been formed.
  • FIGS. 3 and 4 there is shown another embodiment of the bonded structure.
  • the composite bumps are formed on the substrate input/output pads 24 .
  • the composite bump and the structure after the bond is formed is as described above.
  • FIGS. 5 and 6 Another embodiment is shown in FIGS. 5 and 6. in this embodiment the composite bumps are formed on both the integrated circuit element input/output pads 26 and the substrate input/output pads 24 .
  • the substrate composite bumps are brought together with the integrated circuit element composite bumps.
  • the composite bumps are deformed and due to the low Young's Modulus of the polymer body a very small force is required for this deformation and there is little tendency to separate the bonded structure after it has been formed.
  • the integrated circuit element 30 and the substrate 20 are brought together so that the conductive metal coating 36 on each composite bump contacts a substrate input/output pad 24 as shown in FIG. 2, an integrated circuit element input/output pad 26 as shown in FIG. 4 or a corresponding composite bump as shown in FIG. 6.
  • the bond is then formed using a bonding process such as thermocompression bonding, ultrasonic bonding, tape automated bonding, application of heat energy, or application of light energy.
  • the bonding may also be accomplished using a conductive adhesive 38 between the conductive metal coating 36 of each composite bump and the corresponding substrate pad 24 shown in FIG. 7, the corresponding integrated circuit element input/output pad 26 shown in FIG. 8, or the corresponding composite bump shown in FIG. 9.
  • the bonding may also be accomplished using a nonconductive adhesive 22 between the integrated circuit element 30 and substrate 20 .
  • the conductive and nonconductive adhesives may require the application of heat energy or light energy.
  • the polymer body in each composite bump is deformed as electrical connection is formed. This deformation is important in forming a good electrical contact. Due to the low Young's Modulus of the polymer body this deformation requires a very small bonding force and produces little or no tendency to separate the connection after it has been made.

Abstract

A bonded structure comprising the physical and electrical connections between an integrated circuit element and substrate using a composite bump comprised of a single polymer body of low Young's Modulus and a conductive metal coating. When the bonded structure is formed the composite bump is deformed and the low Young's Modulus of the polymer body allows a very reliable bonded structure with very low bonding force. Due to the low Young's Modulus there is little tendency to separate the connections after the bonded structure is formed. The bond can be formed using thermocompression bonding, ultrasonic bonding, application of heat or application of light. The bond can also be formed using a non conductive adhesive between the integrated circuit element and the substrate. The bond can also be formed with a conductive adhesive coating on the composite bump.

Description

    RELATED PATENT APPLICATIONS
  • (1) (E83-0003), Ser. No. ______, filed ______, entitled Composite Bump Structure and Methods of Fabrication assigned to the same assignee. [0001]
  • (2) (E83-0004), Ser. No. ______, filed ______, entitled Composite Bump Flip Chip Bonding assigned to the same assignee.[0002]
    • BACKGROUND OF THE INVENTION
  • (1) Field of the Invention [0003]
  • The invention relates to the joining of integrated circuit elements to the next level of integration, or that level of integration to the following level, and more particularly to the formation of the bonded structure which comprises the physical and electrical connection between the integrated circuit element and the next level of integration. [0004]
  • (2) Description of the Related Art [0005]
  • In the manufacture of highly dense integrated circuits the formation of an inexpensive and highly reliable mechanical bond and electrical interconnection between the integrated circuit element and substrate has long been recognized to be of key importance. Some time ago a solution to this need was patented by L. F. Miller et al in U.S. Pat. No. 3,401,126. This method worked well for many years but increasing levels of integration and circuit density have made the need for interconnections on an increasingly fine pitch of key importance. [0006]
  • A method for achieving increased interconnection density was patented by K. Hatada in U.S. Pat. No. 4,749,120. This method employs a metal bump as the electrical interconnection between the integrated circuit chip and the substrate while holding the integrated circuit chip in place with a resin coating on the substrate acting as an adhesive between chip and substrate. This method has the disadvantage of a relatively high Young's Modulus for metals. As a result of the high Young's Modulus a very large bonding force is required between the integrated circuit chip and the substrate during the micro-bump bonding process while the resin is undergoing its curing cycle. After the bonding process the gold micro-bump will tend to return to its original shape and the recoil forces will disengage some of the micro-bumps from the electrodes on the substrate. Another method patented by Y. Tagusa et al in U.S. Pat. No. 4,963,002 employs nickel plated plastic beads or silver particles to achieve the electrical connection, but the former suffers from small contact surface area and the latter suffers the disadvantage of a relatively high Young's Modulus for silver. [0007]
  • U.S. Pat. No. 4,916,523 issued to Sokolovsky et al shows a unidirectional conductive adhesive to bond the integrated circuit chip to the substrate. U.S. Pat. No. 5,134,460 issued to Brady et al shows conductive metal bumps coated with a gold layer. [0008]
    • SUMMARY OF THE INVENTION
  • It is the principal object of the invention to provide a bonded structure comprising the electrical and physical connections between integrated circuit elements and the corresponding substrate wherein very dense wiring patterns can be accommodated economically and the resulting connections are extremely reliable. [0009]
  • This object is achieved with a bonded structure comprising the integrated circuit element input/output pads, composite bumps comprised of a single polymer body with a Young's Modulus which is low compared to metals and a conductive metal coating covering the polymer body, and the substrate input/output pads. The conductive metal coating covering the polymer body must be chosen to provide good adhesion to the polymer body and may include an adhesive layer and a barrier layer in addition to a conductor layer. The low Young's Modulus of the polymer, about 0.4×10[0010] 6 to 0.5×106 psi, allows the bond to be made with very low bonding force and greatly reduces or eliminates the force tending to separate the connections after the bonding force is removed. This results in extremely reliable physical and electrical connections between the integrated circuit element and substrate.
  • It is a further object of the invention to provide a method of forming a bonded structure comprising the electrical and physical connections between integrated circuit elements and the corresponding substrate wherein very dense wiring patterns can be accommodated economically and the resulting connections are extremely reliable. [0011]
  • This object is achieved by forming a bonded structure comprising the integrated circuit element input/output pads, composite bumps comprised of a single polymer body with a Young's Modulus which is low compared to metals and a conductive metal coating covering the polymer body, and the substrate input/output pads. The conductive metal coating covering the polymer body must be chosen to provide good adhesion to the polymer body and may include an adhesive layer and a barrier layer in addition to a conductor layer. The composite bump will be deformed during the bonding process and the low Young's Modulus of the polymer, about 0.4×10[0012] 6 to 0.5×106 psi, allows the bond to be made with very low bonding force and greatly reduces or eliminates the force tending to separate the connections after the bonding force is removed. The polymer body and the conductive metal coating must be chosen to be compatible with the temperatures used during the bonding process.
    • BRIEF DESCRIPTION OF DRAWINGS
  • FIG. 1 is a cross sectional representation of the composite bump formed on the integrated circuit element showing the polymer interior and conductive metal coating of the composite bump. [0013]
  • FIG. 2 is a cross sectional representation of the bonded structure with the composite bumps formed on the integrated circuit element prior to bonding. [0014]
  • FIG. 3 is a cross sectional representation of the composite bump formed on the substrate showing the polymer interior and conductive metal coating of the composite bump. [0015]
  • FIG. 4 is a cross sectional representation of the bonded structure with the composite bumps formed on the substrate prior to bonding. [0016]
  • FIG. 5 is a cross sectional representation of the composite bump formed on both the integrated circuit element and the substrate showing the polymer interior and conductive metal coating of the composite bumps. [0017]
  • FIG. 6 is a cross sectional representation of the bonded structure with the composite bumps are formed on both the integrated circuit element and the substrate prior to bonding. [0018]
  • FIG. 7 is a cross sectional representation of the bonded structure wherein a conducting adhesive bonds the conducting metal coating of the composite bump to the substrate input/output pad. [0019]
  • FIG. 8 is a cross sectional representation of the bonded structure wherein a conducting adhesive bonds the conducting metal coating of the composite bump to the integrated circuit element input/output pad. [0020]
  • FIG. 9 is a cross sectional representation of the bonded structure wherein a conducting adhesive bonds the conducting metal coating of the integrated circuit element composite bump to the substrate composite bump. [0021]
  • FIG. 10 is a cross sectional representation of the bonded structure wherein a non conducting adhesive bonds the integrated circuit element to the substrate. [0022]
    • DESCRIPTION OF THE PREFERRED EMBODIMENTS
  • Refer now more particularly to FIGS. 1 and 2, there is shown an embodiment for the bonded structure of the current invention. Composite bumps are formed on the [0023] integrated circuit element 30 input/output pads 26. The input/output pads are formed of a metal such as aluminum with a diameter of about 90 microns. Each composite bump comprises a single polymer body 32 and a conductive metal coating 36 covering the polymer body. The polymer body must withstand temperatures encountered during bonding and can be polyamic acid polyimide such as PROBIMIDE 7010 or PROBIMIDE 514 produced by OCG Microelectronic Materials, Inc., Tempe, Ariz. The polymer body has a thickness of between about 5 and 25 microns. Input/output pads 24 are formed on the substrate 20 using a metal such as aluminum.
  • The [0024] conductive metal coating 36 must adhere to the polymer body and can be a metal such as aluminum or nickel; or a composite such as nickel/gold, chrome/gold, chrome/silver, or titanium/platinum. The conductive metal coating can be a composite which includes an adhesion layer/a barrier layer/a conductor layer such as chrome/copper/gold, chrome/nickel/gold, chrome/silver/gold, titanium/platinum/gold, titanium/palladium/gold, or titanium/tungsten/silver.
  • When the bonded structure is formed the composite bumps will contact the substrate input/output pads and will be deformed as shown in FIG. 2 so that each composite bump will contact a substrate input/output pad. Due to the low Young's Modulus of the polymer body a very small force, about one tenth that required by the traditional gold bump, is required for this deformation and there is little tendency to separate the bonded structure after it has been formed. [0025]
  • Refer now to FIGS. 3 and 4, there is shown another embodiment of the bonded structure. In this embodiment the composite bumps are formed on the substrate input/[0026] output pads 24. The composite bump and the structure after the bond is formed is as described above.
  • Another embodiment is shown in FIGS. 5 and 6. in this embodiment the composite bumps are formed on both the integrated circuit element input/[0027] output pads 26 and the substrate input/output pads 24. When the bonded structure is formed the substrate composite bumps are brought together with the integrated circuit element composite bumps. The composite bumps are deformed and due to the low Young's Modulus of the polymer body a very small force is required for this deformation and there is little tendency to separate the bonded structure after it has been formed.
  • The integrated [0028] circuit element 30 and the substrate 20 are brought together so that the conductive metal coating 36 on each composite bump contacts a substrate input/output pad 24 as shown in FIG. 2, an integrated circuit element input/output pad 26 as shown in FIG. 4 or a corresponding composite bump as shown in FIG. 6. The bond is then formed using a bonding process such as thermocompression bonding, ultrasonic bonding, tape automated bonding, application of heat energy, or application of light energy.
  • As shown in FIGS. 7, 8, and [0029] 9 the bonding may also be accomplished using a conductive adhesive 38 between the conductive metal coating 36 of each composite bump and the corresponding substrate pad 24 shown in FIG. 7, the corresponding integrated circuit element input/output pad 26 shown in FIG. 8, or the corresponding composite bump shown in FIG. 9. As shown in FIG. 10, the bonding may also be accomplished using a nonconductive adhesive 22 between the integrated circuit element 30 and substrate 20. The conductive and nonconductive adhesives may require the application of heat energy or light energy. During the bonding process the polymer body in each composite bump is deformed as electrical connection is formed. This deformation is important in forming a good electrical contact. Due to the low Young's Modulus of the polymer body this deformation requires a very small bonding force and produces little or no tendency to separate the connection after it has been made.
  • While the invention has been particularly shown and described with reference to the preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made without departing from the spirit and scope of the invention.[0030]

Claims (20)

What is claimed is:
1. A bonded structure, comprising:
an integrated circuit element having input/output pads;
a substrate having input/output pads; and
a plurality of physical and electrical connections between said integrated circuit element input/output pads and said substrate input/output pads wherein each said connection includes a composite bump comprised of a polymer body and a conductive metal coating covering said polymer body, and wherein said composite bump is deformed when said connection is formed.
2. The bonded structure of claim 1 wherein said polymer is polyamic acid polyimide.
3. The bonded structure of claim 1 wherein said conductive metal coating is comprised of an adhesion layer, a barrier layer and a conductor layer.
4. The bonded structure of claim 1 wherein said composite bumps are formed on said integrated circuit element input/output pads prior to formation of said connection.
5. The bonded structure of claim 1 wherein said composite bumps are formed on said substrate input/output pads prior to formation of said connection.
6. The bonded structure of claim 1 wherein said composite bumps are formed on both said integrated circuit element input/output pads and substrate input/output pads prior to formation of said connection.
7. A method of forming a bonded structure, comprising:
providing an integrated circuit element with input/output pads;
providing a substrate with input/output pads;
providing composite bumps comprised of a polymer body and a conductive metal coating covering said polymer body formed on said integrated circuit input/output pads;
bringing together said integrated circuit element and said substrate so that said composite bumps contact said substrate input/output pads and are deformed during said contact; and
bonding said composite bumps to said substrate input/output pads.
8. A method of forming a bonded structure, comprising:
providing an integrated circuit element with input/output pads;
providing a substrate with input/output pads;
providing composite bumps comprised of a polymer body and a conductive metal coating covering said polymer body formed on said substrate input/output pads;
bringing together said integrated circuit element and said substrate so that said composite bumps contact said integrated circuit element input/output pads and are deformed during said contact; and
bonding said composite bumps to said integrated circuit element input/output pads.
9. A method of forming a bonded structure, comprising:
providing an integrated circuit element with input/output pads;
providing a substrate with input/output pads;
providing composite bumps comprised of a polymer body and a conductive metal coating covering said polymer body formed on said integrated circuit input/output pads and on said substrate input/output pads;
bringing together said integrated circuit element and said substrate so that said integrated circuit element composite bumps contact said substrate composite bumps and said integrated circuit element composite bumps and said substrate composite bumps are deformed during said contact; and
bonding said integrated circuit element composite bumps to said substrate composite bumps.
10. The method of claim 7 wherein said polymer is polyamic acid polyimide.
11. The method of claim 7 wherein said conductive metal coating is comprised of an adhesion layer, a barrier layer and a conductor layer.
12. The method of claim 7 wherein said bonding is provided by a conductive adhesive between said composite bumps and said substrate input/output pads.
13. The method of claim 8 wherein said bonding is provided by a conductive adhesive between said composite bumps and said integrated circuit input/output pads.
14. The method of claim 9 wherein said bonding is provided by a conductive adhesive between said substrate composite bumps and said integrated circuit composite bumps.
15. The method of claim 7 wherein said bonding is provided by a nonconductive adhesive between said integrated circuit element and said substrate.
16. The method of claim 7 wherein said bonding is provided by thermocompression bonding.
17. The method of claim 7 wherein said bonding is provided by application of heat energy.
18. The method of claim 7 wherein said bonding is provided by application of light energy.
19. The method of claim 7 wherein said bonding is provided by ultrasonic bonding.
20. The method of claim 7 wherein said bonding is provided by tape automated bonding.
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Cited By (49)

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US20040256737A1 (en) * 2003-06-20 2004-12-23 Min-Lung Huang [flip-chip package substrate and flip-chip bonding process thereof]
US20050003664A1 (en) * 2003-07-02 2005-01-06 Shriram Ramanathan Method and apparatus for low temperature copper to copper bonding
US20050003650A1 (en) * 2003-07-02 2005-01-06 Shriram Ramanathan Three-dimensional stacked substrate arrangements
US20050087885A1 (en) * 2003-10-22 2005-04-28 Jeong Se-Young Semiconductor chip, mounting structure thereof, and methods for forming a semiconductor chip and printed circuit board for the mounting structure thereof
US20050230773A1 (en) * 2004-04-16 2005-10-20 Atsushi Saito Electronic component, mounted structure, electro-optical device, and electronic device
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US9899286B2 (en) 2003-11-10 2018-02-20 STATS ChipPAC Pte. Ltd. Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask
US9064858B2 (en) * 2003-11-10 2015-06-23 Stats Chippac, Ltd. Semiconductor device and method of forming bump-on-lead interconnection
US9379084B2 (en) 2003-11-10 2016-06-28 STATS ChipPAC Pte. Ltd. Semiconductor device and method of self-confinement of conductive bump material during reflow without solder mask
US20140008792A1 (en) * 2003-11-10 2014-01-09 Stats Chippac, Ltd. Semiconductor Device and Method of Forming Bump-on-Lead Interconnection
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US7615833B2 (en) * 2004-07-13 2009-11-10 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. Film bulk acoustic resonator package and method of fabricating same
US20060012021A1 (en) * 2004-07-13 2006-01-19 Larson John D Iii Film bulk acoustic resonator package and method of fabricating same
US7714684B2 (en) 2004-10-01 2010-05-11 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. Acoustic resonator performance enhancement using alternating frame structure
US8981876B2 (en) 2004-11-15 2015-03-17 Avago Technologies General Ip (Singapore) Pte. Ltd. Piezoelectric resonator structures and electrical filters having frame elements
US8143082B2 (en) 2004-12-15 2012-03-27 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. Wafer bonding of micro-electro mechanical systems to active circuitry
US7791434B2 (en) 2004-12-22 2010-09-07 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. Acoustic resonator performance enhancement using selective metal etch and having a trench in the piezoelectric
US8188810B2 (en) 2004-12-22 2012-05-29 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. Acoustic resonator performance enhancement using selective metal etch
US8230562B2 (en) 2005-04-06 2012-07-31 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. Method of fabricating an acoustic resonator comprising a filled recessed region
US7737807B2 (en) 2005-10-18 2010-06-15 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. Acoustic galvanic isolator incorporating series-connected decoupled stacked bulk acoustic resonators
US20070086080A1 (en) * 2005-10-18 2007-04-19 Larson John D Iii Acoustic galvanic isolator incorporating series-connected decoupled stacked bulk acoustic resonators
US7746677B2 (en) 2006-03-09 2010-06-29 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. AC-DC converter circuit and power supply
US8238129B2 (en) 2006-03-09 2012-08-07 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. AC-DC converter circuit and power supply
US20070211504A1 (en) * 2006-03-09 2007-09-13 Mark Unkrich AC-DC converter circuit and power supply
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US8080854B2 (en) 2006-03-10 2011-12-20 Avago Technologies General Ip (Singapore) Pte. Ltd. Electronic device on substrate with cavity and mitigated parasitic leakage path
US20070216003A1 (en) * 2006-03-15 2007-09-20 Advanced Semiconductor Engineering. Inc. Semiconductor package with enhancing layer and method for manufacturing the same
US20090275192A1 (en) * 2006-12-22 2009-11-05 Palo Alto Research Center Incorporated Molded dielectric layer in print-patterned electronic circuits
US7855618B2 (en) 2008-04-30 2010-12-21 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. Bulk acoustic resonator electrical impedance transformers
US7732977B2 (en) 2008-04-30 2010-06-08 Avago Technologies Wireless Ip (Singapore) Transceiver circuit for film bulk acoustic resonator (FBAR) transducers
US8902023B2 (en) 2009-06-24 2014-12-02 Avago Technologies General Ip (Singapore) Pte. Ltd. Acoustic resonator structure having an electrode with a cantilevered portion
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US20120193783A1 (en) * 2011-02-01 2012-08-02 Samsung Electronics Co., Ltd. Package on package
US9083302B2 (en) 2011-02-28 2015-07-14 Avago Technologies General Ip (Singapore) Pte. Ltd. Stacked bulk acoustic resonator comprising a bridge and an acoustic reflector along a perimeter of the resonator
US9148117B2 (en) 2011-02-28 2015-09-29 Avago Technologies General Ip (Singapore) Pte. Ltd. Coupled resonator filter comprising a bridge and frame elements
US9154112B2 (en) 2011-02-28 2015-10-06 Avago Technologies General Ip (Singapore) Pte. Ltd. Coupled resonator filter comprising a bridge
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US9048812B2 (en) 2011-02-28 2015-06-02 Avago Technologies General Ip (Singapore) Pte. Ltd. Bulk acoustic wave resonator comprising bridge formed within piezoelectric layer
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US8575820B2 (en) 2011-03-29 2013-11-05 Avago Technologies General Ip (Singapore) Pte. Ltd. Stacked bulk acoustic resonator
US8350445B1 (en) 2011-06-16 2013-01-08 Avago Technologies Wireless Ip (Singapore) Pte. Ltd. Bulk acoustic resonator comprising non-piezoelectric layer and bridge
US8922302B2 (en) 2011-08-24 2014-12-30 Avago Technologies General Ip (Singapore) Pte. Ltd. Acoustic resonator formed on a pedestal
US8796904B2 (en) 2011-10-31 2014-08-05 Avago Technologies General Ip (Singapore) Pte. Ltd. Bulk acoustic resonator comprising piezoelectric layer and inverse piezoelectric layer
US20130256913A1 (en) * 2012-03-30 2013-10-03 Bryan Black Die stacking with coupled electrical interconnects to align proximity interconnects
US20140097542A1 (en) * 2012-10-10 2014-04-10 Silergy Semiconductor Technology (Hangzhou) Ltd Flip packaging device
US9425764B2 (en) 2012-10-25 2016-08-23 Avago Technologies General Ip (Singapore) Pte. Ltd. Accoustic resonator having composite electrodes with integrated lateral features
US9444426B2 (en) 2012-10-25 2016-09-13 Avago Technologies General Ip (Singapore) Pte. Ltd. Accoustic resonator having integrated lateral feature and temperature compensation feature
US11817422B2 (en) * 2018-11-13 2023-11-14 Shinko Electric Industries Co., Ltd. Semiconductor device
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