US20010019847A1 - Method of forming thin copper film - Google Patents
Method of forming thin copper film Download PDFInfo
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- US20010019847A1 US20010019847A1 US09/038,117 US3811798A US2001019847A1 US 20010019847 A1 US20010019847 A1 US 20010019847A1 US 3811798 A US3811798 A US 3811798A US 2001019847 A1 US2001019847 A1 US 2001019847A1
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- film
- thin copper
- copper film
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- 239000010949 copper Substances 0.000 title claims abstract description 165
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 title claims abstract description 160
- 229910052802 copper Inorganic materials 0.000 title claims abstract description 160
- 238000000034 method Methods 0.000 title claims description 31
- 239000000463 material Substances 0.000 claims abstract description 55
- 239000000758 substrate Substances 0.000 claims abstract description 44
- 238000002844 melting Methods 0.000 claims abstract description 8
- 230000008018 melting Effects 0.000 claims abstract description 8
- 229910052751 metal Inorganic materials 0.000 claims abstract description 8
- 239000002184 metal Substances 0.000 claims abstract description 8
- 150000004767 nitrides Chemical class 0.000 claims abstract description 8
- 238000009413 insulation Methods 0.000 claims description 19
- 239000004065 semiconductor Substances 0.000 claims description 13
- 238000007669 thermal treatment Methods 0.000 claims description 7
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 abstract description 44
- 229910052710 silicon Inorganic materials 0.000 abstract description 19
- 239000010703 silicon Substances 0.000 abstract description 19
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 18
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 abstract description 5
- 229910052814 silicon oxide Inorganic materials 0.000 abstract description 5
- 238000011282 treatment Methods 0.000 description 28
- 230000015572 biosynthetic process Effects 0.000 description 16
- 239000011229 interlayer Substances 0.000 description 11
- 238000005229 chemical vapour deposition Methods 0.000 description 8
- 239000010410 layer Substances 0.000 description 7
- 239000002131 composite material Substances 0.000 description 6
- 230000008569 process Effects 0.000 description 6
- 238000009792 diffusion process Methods 0.000 description 5
- 238000010438 heat treatment Methods 0.000 description 5
- 238000007796 conventional method Methods 0.000 description 3
- 238000001816 cooling Methods 0.000 description 3
- 238000011156 evaluation Methods 0.000 description 3
- 239000012535 impurity Substances 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 230000003746 surface roughness Effects 0.000 description 3
- 239000002390 adhesive tape Substances 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 150000001879 copper Chemical class 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- GCSJLQSCSDMKTP-UHFFFAOYSA-N ethenyl(trimethyl)silane Chemical compound C[Si](C)(C)C=C GCSJLQSCSDMKTP-UHFFFAOYSA-N 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000001465 metallisation Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/02—Pretreatment of the material to be coated
- C23C16/0272—Deposition of sub-layers, e.g. to promote the adhesion of the main coating
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/06—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material
- C23C16/18—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of metallic material from metallo-organic compounds
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/32051—Deposition of metallic or metal-silicide layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76853—Barrier, adhesion or liner layers characterized by particular after-treatment steps
- H01L21/76855—After-treatment introducing at least one additional element into the layer
- H01L21/76858—After-treatment introducing at least one additional element into the layer by diffusing alloying elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
- H01L21/76876—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for deposition from the gas phase, e.g. CVD
Definitions
- the present invention relates to methods of forming thin copper films and semiconductor devices with thin copper films, and particularly to a method of forming a thin copper film on an underlying film including metal with high melting point or nitride thereof by means of CVD (Chemical Vapor Deposition), and a semiconductor device with the thin copper film.
- CVD Chemical Vapor Deposition
- interconnection material material of Al with copper added thereto having high resistance or electromigration resistance has generally been used as interconnection material for an LSI (Large Scale Integration).
- LSIs Large Scale Integration
- LSIs are increasingly reduced in size to achieve as small an interconnection width as about 0.15 ⁇ m or less, a problem associated with resistance or the like becomes inevitable even if material of Al with copper added is employed for interconnection.
- FIGS. 10 and 11 are cross sectional views showing first and second steps of the conventional method of forming the thin copper film on the TiN film.
- FIGS. 10 and 11 show a thin copper film 4 formed on a TiN film 3 , which has been formed on a silicon substrate 1 with a silicon oxide film 2 interposed.
- silicon oxide film 2 and TiN film 3 are sequentially deposited on silicon substrate 1 by means of CVD, for example. Then, as shown in FIG. 11, thin copper film 4 is formed on the TiN film by means of CVD using for example Cu (hfac) (tmvs) without any particular pretreatment.
- hfac and tmvs are abbreviations of hexafluoroacetylacetonate and trimethylvinylsilane, respectively.
- An object of the present invention is to provide a method of forming a thin copper film on an underlying film including metal with high melting point or nitride thereof with high adhesion by means of CVD, and a semiconductor device with the thin copper film.
- the thin copper film is formed on the underlying film including metal with high melting point or nitride thereof.
- copper material is kept in close contact with or exposed to the surface of the underlying film.
- the exposure of copper material is followed by film formation of the thin copper film on the underlying film.
- “exposure” is defined as a treatment for applying material such as copper material on the underlying film while avoiding reaction therewith.
- film formation is defined as a process for forming a film such as the thin copper film by reaction of material with the underlying film.
- the above mentioned underlying film is formed on a substrate and the step of exposing copper material is performed controlling variation in temperature of the surface of the substrate within ⁇ 4° C.
- the step of exposing copper material is preferably performed at a temperature which is lower than that at which the thin copper film is formed.
- the step of exposing copper material preferably includes a step of heat-treating the underlying film at a temperature which is higher than that at which the thin copper film is formed.
- the step of exposing copper material is preferably repeated several times.
- the method of forming the thin copper film in accordance with the present invention exposure treatment of copper material is performed before formation of the thin copper film.
- the underlying film is exposed to copper material in vapor phase at a prescribed temperature, so that copper material can be applied on the entire surface of the underlying film with almost uniform thickness.
- nucleus of copper material can almost uniformly be produced on the entire surface of the underlying film.
- the thin copper film can be formed on the surface of the underlying film with almost uniform thickness and high adhesion.
- the thin copper film can be formed on the substrate (a semiconductor wafer 6 in FIG. 6) with almost uniform thickness. As a result, the thin copper film with reduced surface roughness is obtained.
- the semiconductor device with the thin copper film in accordance with the present invention includes an insulation film formed on the semiconductor substrate, a thin copper film formed in the insulation film and an underlying film.
- the underlying film is formed between the thin copper film and the insulation film in tight contact with the surface of the thin copper film, and includes metal with high melting point or nitride thereof.
- the thin copper film is formed by the above mentioned method, nucleus density in forming the thin copper film can be increased. Thus, any space between the underlying film and the thin copper film is prevented. As a result, electromigration life time for the thin copper film is increased to provide interconnection with enhanced reliability.
- FIGS. 1 to 4 are cross sectional views showing first to fourth steps in a method of forming a thin copper film in accordance with a first embodiment of the present invention.
- FIG. 5 is a cross sectional view related to the problem when copper material is unevenly applied on the surface of an underlying TiN film.
- FIG. 6 is a diagram showing thickness distribution of a thin copper film when it is formed on the surface of a semiconductor wafer as a substrate in accordance with a method described in conjunction with a second embodiment of the present invention.
- FIGS. 7 and 8 are cross sectional views showing characteristic first and second steps in a method of forming a thin copper film in accordance with a fourth embodiment of the present invention.
- FIG. 9 is a cross sectional view showing an exemplary semiconductor device (DRAM) to which the method of forming the thin copper film in accordance with the present invention can be applied.
- DRAM semiconductor device
- FIGS. 10 and 11 are cross sectional views showing first and second steps in a conventional method of forming a thin copper film.
- FIGS. 1 to 9 embodiments of the present invention will be described.
- FIGS. 1 to 4 an embodiment of the present invention will be described.
- a silicon oxide film 2 and a TiN film 3 are sequentially formed on a surface of a silicon substrate 1 by means of CVD or the like. Silicon oxide film 2 and TiN film 3 have thickness of for example about 500 nm and 10 nm, respectively.
- copper material 4 a is exposed to the surface of TiN film 3 as shown in FIG. 2.
- copper material 4 a is applied on the surface of TiN film 3 while avoiding reaction therewith.
- the condition required at the time is specified in the following Table 1. TABLE 1 temperature of substrate 30° C. pressure 18 Torr material flow rate Cu (hfac) (tmvs) 0.5 g/min carrier flow rate (H 2 ) 500 sccm exposure time more than two minutes
- the required temperature of the substrate is about 30° C. according to the above Table 1, any other temperature may be employed so long as it allows copper material 4 a to be applied on an underlying film such as TiN film 3 while avoiding reaction therewith.
- copper material 4 a can be applied on the surface of TiN film 3 while avoiding reaction therewith at a temperature which is lower than that of the substrate, which allows formation of the thin copper film as will be later described.
- the temperature of silicon substrate 1 is increased, for example, to about 180° C.
- a nucleus 4 b including copper material 4 a is formed on the surface of TiN film 3 as shown in FIG. 3.
- thin copper film 4 is formed under the condition shown in the following Table 2. TABLE 2 temperature of substrate 180° C. pressure 18 Torr material flow rate Cu (hfac) (tmvs) 0.2 g/min carrier flow rate (H 2 ) 500 sccm
- the temperature of the substrate is maintained at a temperature which is higher than that at which copper material 4 a is exposed.
- the temperature of the substrate is shown as maintained at about 180° C. Other temperatures may also be employed as long as it allows production and growth of nucleus 4 b by reaction of copper material 4 a .
- flow rate of copper material 4 a in forming thin copper film 4 shown in Table 2, is lower than that in exposing copper material 4 a .
- thin copper film 4 is formed in a manner as described above.
- silicon substrate 1 is cooled down to a prescribed temperature. Then, silicon substrate 1 is removed from a CVD furnace. Through the process hereinbefore, thin copper film 4 is formed on silicon substrate 1 with TiN film 3 interposed.
- the inventor of the present invention evaluated adhesion strength between thin copper film 4 and TiN film 3 after thin copper film 4 was formed in accordance with the above described method.
- the evaluation result is shown in the following Table 3. It is noted that in the evaluation, two types of thin copper films 4 , which had been formed on TiN films 3 with or without the exposure treatment in accordance with the present invention, were prepared, and adhesive tapes were attached to each of thin copper films 4 . Then, by taking off the tapes, evaluation was made as to if thin copper film also came off from TiN film 3 . TABLE 3 exposure treatment test with tape performed ⁇ not performed X
- FIG. 5 is a cross sectional view showing a problem concerned when variation in temperature of the surface of the substrate is significant during exposure treatment.
- the resulting thin copper film 4 has portions respectively having relatively small and large thicknesses t 1 and t 2 , whereby surface roughness of thin copper film 4 is increased. As a result, characteristics of the thin copper film when used as interconnection or the like may deteriorate.
- silicon substrate 1 is controlled so that variation in temperature of the surface thereof is within the prescribed range. More specifically, a heater for heating a substrate, for example of a hot plate type, is prepared and silicon substrate 1 is pressed against the hot plate for heating (cooling). Here, heating (cooling) for middle and periphery portions of the hot plate can be independently controlled, and a contact portion between the hot plate and silicon substrate 1 is provided with increased heat uniformity by employing an aluminum member. In addition, gas is introduced into the back surface of silicon substrate 1 for heating by heat conduction. It is noted that cooling is performed by circulating cooled He using a chiller.
- FIG. 6 shows thickness distribution of the thin copper film obtained for exposure treatment with the temperature of silicon substrate 1 maintained within such temperature range, subsequently followed by formation of thin copper film 4 . It is noted that FIG. 6 is related to thin copper film 4 formed on the surface of semiconductor wafer 6 of six inches, which is used as the above mentioned silicon substrate 1 .
- thin copper film 4 had average thickness d av of 4190.5 ⁇ and uniformity ( ⁇ /d av ) of 6.6%. It is apparent that controlling variation in temperature of the surface of the substrate, i.e., of semiconductor wafer 6 in FIG. 6, within the range of about ⁇ 4° C. for exposure treatment not only provides enhanced adhesion with the underlying film but also enables formation of thin copper film 4 with reduced surface roughness. Consequently, interconnection with enhanced characteristics is obtained if thin copper film 4 thus formed is used as interconnection.
- temperature of the substrate is set at 30° C. in the above first embodiment, there may be a suitable range for temperature of the substrate. Then, the preferred range for temperature of the substrate during exposure treatment is discussed in the present third embodiment.
- exposure treatment in accordance with the present invention, copper material 4 a is applied on the surface of the underlying film while avoiding reaction therewith as described above.
- exposure treatment is preferably performed within the range of the temperature at which copper material 4 a stably exists without liquefying and reaction between copper material 4 a and the underlying film (for example, TiN film 3 ) is avoided. Therefore, exposure treatment is preferably performed within the range of temperature of the substrate between about 5° C. and about 30° C. Most preferably, it is performed within the range between about 5° C. and about 20° C.
- copper material 4 a can most effectively be applied on the surface of the underlying film.
- FIGS. 7 and 8 are cross sectional views showing the characteristic first and second steps in a method of forming thin copper film 4 in accordance with the fourth embodiment of the present invention.
- a process for copper material 4 a proceeds up to the exposure treatment in a similar manner as in the above described first embodiment. Then, thermal treatment at the temperature for example of about 200° C. to about 450° C. is performed for copper material 4 a and TiN film 3 after exposure treatment. It is noted that the thermal treatment needs to be performed at a temperature which is higher than that for forming the thin copper film 4 (for example of about 180° C.), which will be later described. As shown in FIG. 7, the thermal treatment under such temperature forms nucleus 4 b including copper material 4 a , and a composite layer 5 of copper and TiN is formed between nucleus 4 b and TiN film 3 . Composite layer 5 , where copper atoms exist between grain boundaries of TiN, can provide enhanced adhesion strength between TiN film 3 and thin copper film 4 , which will be later formed.
- a fifth embodiment of the present invention will now be described.
- the fifth embodiment is characterized in that the exposure treatment in accordance with the present invention is repeated several times. By repeating exposure treatment several times, copper material 4 a can be more closely applied on the surface of TiN film 3 .
- nucleus 4 b is closely produced, thereby allowing efficient formation of thin copper film 4 .
- copper material 4 a can be applied on the surface of underlying TiN film 3 more uniformly, so that nucleus 4 b is more uniformly produced.
- efficient formation of thin copper film 4 as well as enhanced adhesion strength between thin copper film 4 and TiN film 3 is achieved.
- exposure treatment may be repeated several times either under the same or different conditions.
- thermal treatment is performed after exposure treatment as in the above described fourth embodiment, both treatments may be repeated several times. After thus repeating exposure treatment several times, thin copper film 4 is formed in a similar manner as described in each of the above embodiments.
- FIG. 9 is a cross sectional view showing a DRAM (Dynamic Random Access Memory) to which the method of forming thin copper film 4 in accordance with the present invention is applicable.
- DRAM Dynamic Random Access Memory
- impurity diffusion regions 14 a and 14 b are formed spaced apart in the main surface of a silicon substrate 10 .
- a gate electrode 16 is formed on a channel region defined by impurity diffusion regions 14 a and 14 b with a gate insulation film 15 interposed.
- Trenches 11 a and 11 b for insulation of elements are formed in the main surface of silicon substrate 10 .
- Polysilicon films 13 a and 13 b are formed in trenches 11 a and 11 b with insulation films 12 a and 12 b interposed, respectively.
- interlayer insulation film 18 a Formed to cover the main surface of silicon substrate 10 is an interlayer insulation film 18 a , in which contact holes 11 c and 11 d are formed which are respectively continuous to impurity diffusion regions 14 a and 14 b . Plug electrodes 17 a and 17 c of for example W are formed in contact holes 11 c and 11 d , respectively.
- An interlayer insulation film 18 b is formed to cover interlayer insulation film 18 a , and a via hole 11 e is formed in interlayer insulation film 18 b .
- a TiN film 19 a is formed in via hole 11 c which functions as a barrier.
- a copper interconnection 20 a is formed on TiN film 19 a .
- nucleus density in forming copper interconnection 20 a is increased, so that any space between underlying TiN film 19 a and copper interconnection 20 a can be prevented. As a result, reliability (electromigration life time) of copper interconnection 20 a is increased.
- An interlayer insulation film 18 c is formed to cover interlayer insulation film 18 b , and a trench 11 f is formed in interlayer insulation film 18 c .
- a copper interconnection 20 b is formed in trench 11 f with a TiN film 19 b interposed.
- An interlayer insulation film 18 d is further formed to cover interlayer insulation film 18 c , and a trench 11 d is also formed in interlayer insulating film 18 d .
- a copper interconnection 20 c is formed in trench 11 g with a TiN film 19 c interposed.
- the passivation film 21 is formed to cover copper interconnection 20 c and interlayer insulation film 18 d .
- the method of forming the thin copper film in accordance with the present invention may also be applicable to formation of the above mentioned copper interconnections 20 c and 20 b.
Abstract
Description
- 1. Field of the Invention
- The present invention relates to methods of forming thin copper films and semiconductor devices with thin copper films, and particularly to a method of forming a thin copper film on an underlying film including metal with high melting point or nitride thereof by means of CVD (Chemical Vapor Deposition), and a semiconductor device with the thin copper film.
- 2. Description of the Background Art
- Conventionally, material of Al with copper added thereto having high resistance or electromigration resistance has generally been used as interconnection material for an LSI (Large Scale Integration). However, as LSIs are increasingly reduced in size to achieve as small an interconnection width as about 0.15 μm or less, a problem associated with resistance or the like becomes inevitable even if material of Al with copper added is employed for interconnection.
- Then, to cope with the interconnection width of about 0.15 μm or less, which will be expected in future, employment of a copper interconnection is considered. Copper is relatively easily diffused, so that it might disadvantageously be diffused in the underlying film by thermal treatment commonly performed in a manufacturing process of the LSI. To avoid such diffusion, a common practice would be to form a diffusion barrier film such as a TiN film under the copper interconnection.
- In view of the foregoing, a conventional method of forming a thin copper film on a TiN film will now be described with reference to FIGS. 10 and 11. FIGS. 10 and 11 are cross sectional views showing first and second steps of the conventional method of forming the thin copper film on the TiN film. FIGS. 10 and 11 show a
thin copper film 4 formed on aTiN film 3, which has been formed on asilicon substrate 1 with asilicon oxide film 2 interposed. - Referring now to FIG. 10,
silicon oxide film 2 andTiN film 3 are sequentially deposited onsilicon substrate 1 by means of CVD, for example. Then, as shown in FIG. 11,thin copper film 4 is formed on the TiN film by means of CVD using for example Cu (hfac) (tmvs) without any particular pretreatment. Here, hfac and tmvs are abbreviations of hexafluoroacetylacetonate and trimethylvinylsilane, respectively. - When thin copper film is formed on
TiN film 3 using Cu (hfac) (tmvs) by means of CVD without any pretreatment as mentioned above, however, sufficient adhesion is not ensured betweenthin copper film 4 andunderlying TiN film 3 as pointed out in Advanced Metalization for ULSI Applications, pp. 79-86, 1994. - The present invention is made to solve the aforementioned problem. An object of the present invention is to provide a method of forming a thin copper film on an underlying film including metal with high melting point or nitride thereof with high adhesion by means of CVD, and a semiconductor device with the thin copper film.
- In the method of forming the thin copper film in accordance with the present invention, the thin copper film is formed on the underlying film including metal with high melting point or nitride thereof. To start with, copper material is kept in close contact with or exposed to the surface of the underlying film. The exposure of copper material is followed by film formation of the thin copper film on the underlying film. It is noted that in the present description, “exposure” is defined as a treatment for applying material such as copper material on the underlying film while avoiding reaction therewith. In addition, the above mentioned “film formation” is defined as a process for forming a film such as the thin copper film by reaction of material with the underlying film.
- It is noted that, preferably, the above mentioned underlying film is formed on a substrate and the step of exposing copper material is performed controlling variation in temperature of the surface of the substrate within ±4° C.
- In addition, the step of exposing copper material is preferably performed at a temperature which is lower than that at which the thin copper film is formed.
- Further, the step of exposing copper material preferably includes a step of heat-treating the underlying film at a temperature which is higher than that at which the thin copper film is formed.
- The step of exposing copper material is preferably repeated several times.
- As described above, in the method of forming the thin copper film in accordance with the present invention, exposure treatment of copper material is performed before formation of the thin copper film. In the exposure treatment, the underlying film is exposed to copper material in vapor phase at a prescribed temperature, so that copper material can be applied on the entire surface of the underlying film with almost uniform thickness. Thus, in forming the thin copper film, nucleus of copper material can almost uniformly be produced on the entire surface of the underlying film. As a result, the thin copper film can be formed on the surface of the underlying film with almost uniform thickness and high adhesion.
- In addition, when the above mentioned exposure treatment is performed with the underlying film formed on the substrate and with variation in temperature of the surface of the substrate maintained within the range of about ±4° C., copper material can more uniformly be applied on the surface of the underlying film. Thus, in addition to the above described effects, as shown in FIG. 6, the thin copper film can be formed on the substrate (a semiconductor wafer6 in FIG. 6) with almost uniform thickness. As a result, the thin copper film with reduced surface roughness is obtained.
- In addition, when the above mentioned exposure treatment is performed at a temperature which is lower than that at which the thin copper film is formed, copper material can be applied on the underlying film while avoiding reaction therewith. Thus, as described above, the thin copper film can be formed on the underlying film with high adhesion.
- Further, when heat treatment is performed at a temperature which is higher than that at which the thin copper film is formed after the exposure treatment, a composite layer which is formed of the material for the underlying film and copper can be obtained between the above mentioned nucleus and the underlying film. When the underlying film is formed, for example of TiN, in the composite layer, copper exists between grain boundaries of TiN. The composite layer still remains after formation of the thin copper film, thereby further increasing adhesion between the thin copper film and the underlying film after film formation.
- When the exposure treatment is repeated several times, copper material can be applied on the surface of the underlying film more uniformly and closely. Thus, the nucleus is produced more uniformly and closely on the surface of the underlying film after application of copper material. This enables formation of the thin copper film on the underlying film with high adhesion and uniform thickness.
- The semiconductor device with the thin copper film in accordance with the present invention includes an insulation film formed on the semiconductor substrate, a thin copper film formed in the insulation film and an underlying film. The underlying film is formed between the thin copper film and the insulation film in tight contact with the surface of the thin copper film, and includes metal with high melting point or nitride thereof.
- If the thin copper film is formed by the above mentioned method, nucleus density in forming the thin copper film can be increased. Thus, any space between the underlying film and the thin copper film is prevented. As a result, electromigration life time for the thin copper film is increased to provide interconnection with enhanced reliability.
- The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.
- FIGS.1 to 4 are cross sectional views showing first to fourth steps in a method of forming a thin copper film in accordance with a first embodiment of the present invention.
- FIG. 5 is a cross sectional view related to the problem when copper material is unevenly applied on the surface of an underlying TiN film.
- FIG. 6 is a diagram showing thickness distribution of a thin copper film when it is formed on the surface of a semiconductor wafer as a substrate in accordance with a method described in conjunction with a second embodiment of the present invention.
- FIGS. 7 and 8 are cross sectional views showing characteristic first and second steps in a method of forming a thin copper film in accordance with a fourth embodiment of the present invention.
- FIG. 9 is a cross sectional view showing an exemplary semiconductor device (DRAM) to which the method of forming the thin copper film in accordance with the present invention can be applied.
- FIGS. 10 and 11 are cross sectional views showing first and second steps in a conventional method of forming a thin copper film.
- Referring to FIGS.1 to 9, embodiments of the present invention will be described.
- First Embodiment
- Referring now to FIGS.1 to 4, an embodiment of the present invention will be described.
- Referring to FIG. 1, a
silicon oxide film 2 and aTiN film 3 are sequentially formed on a surface of asilicon substrate 1 by means of CVD or the like.Silicon oxide film 2 andTiN film 3 have thickness of for example about 500 nm and 10 nm, respectively. - Then,
copper material 4 a is exposed to the surface ofTiN film 3 as shown in FIG. 2. In other words,copper material 4 a is applied on the surface ofTiN film 3 while avoiding reaction therewith. The condition required at the time is specified in the following Table 1.TABLE 1 temperature of substrate 30° C. pressure 18 Torr material flow rate Cu (hfac) (tmvs) 0.5 g/min carrier flow rate (H2) 500 sccm exposure time more than two minutes - It is noted that while the required temperature of the substrate is about 30° C. according to the above Table 1, any other temperature may be employed so long as it allows
copper material 4 a to be applied on an underlying film such asTiN film 3 while avoiding reaction therewith. For example,copper material 4 a can be applied on the surface ofTiN film 3 while avoiding reaction therewith at a temperature which is lower than that of the substrate, which allows formation of the thin copper film as will be later described. - Then, the temperature of
silicon substrate 1 is increased, for example, to about 180° C. Thus, anucleus 4 b includingcopper material 4 a is formed on the surface ofTiN film 3 as shown in FIG. 3. After the formation ofnucleus 4 b,thin copper film 4 is formed under the condition shown in the following Table 2.TABLE 2 temperature of substrate 180° C. pressure 18 Torr material flow rate Cu (hfac) (tmvs) 0.2 g/min carrier flow rate (H2) 500 sccm - As shown in Table 2 above, the temperature of the substrate is maintained at a temperature which is higher than that at which
copper material 4 a is exposed. In this example, the temperature of the substrate is shown as maintained at about 180° C. Other temperatures may also be employed as long as it allows production and growth ofnucleus 4 b by reaction ofcopper material 4 a. In addition, flow rate ofcopper material 4 a in formingthin copper film 4, shown in Table 2, is lower than that in exposingcopper material 4 a. Thus, by suitably controlling flow rate ofcopper material 4 a in accordance with the treatment, larger amount ofcopper material 4 a can be applied on the surface ofunderlying TiN film 3 to promote production ofnucleus 4 b, thereby facilitating growth ofthin copper film 4. - After forming
thin copper film 4 in a manner as described above,silicon substrate 1 is cooled down to a prescribed temperature. Then,silicon substrate 1 is removed from a CVD furnace. Through the process hereinbefore,thin copper film 4 is formed onsilicon substrate 1 withTiN film 3 interposed. - The inventor of the present invention evaluated adhesion strength between
thin copper film 4 andTiN film 3 afterthin copper film 4 was formed in accordance with the above described method. The evaluation result is shown in the following Table 3. It is noted that in the evaluation, two types ofthin copper films 4, which had been formed onTiN films 3 with or without the exposure treatment in accordance with the present invention, were prepared, and adhesive tapes were attached to each ofthin copper films 4. Then, by taking off the tapes, evaluation was made as to if thin copper film also came off fromTiN film 3.TABLE 3 exposure treatment test with tape performed ◯ not performed X - As shown in Table 3, it was verified that
thin copper film 4 remained onTiN film 3 after the adhesive tape was removed fromthin copper film 4 with the exposure treatment performed in accordance with the present invention. This means that formation ofthin copper film 4 by the above described method can increase adhesion strength betweenthin copper film 4 andTiN film 3. - It is noted that a similar result would be obtained even if other kind of metal with high melting point, including W, Ta, Ti, Cr, Mo, or nitride thereof is employed instead of the above mentioned
TiN film 3. In addition, the above or later described film formation method may also be applicable in forming a conductive layer other thancopper film 4. - Second Embodiment
- Referring to FIGS. 5 and 6, a second embodiment of the present invention will now be described. FIG. 5 is a cross sectional view showing a problem concerned when variation in temperature of the surface of the substrate is significant during exposure treatment.
- Referring to FIG. 5,
copper material 4 a is not uniformly applied when there is a variation in temperature of the surface of the substrate which is beyond the prescribed range during the exposure treatment. Thus,nucleus 4 b will also unevenly be formed on the surface ofTiN film 3 after application ofcopper material 4 a. Referring to FIG. 5, the resultingthin copper film 4 has portions respectively having relatively small and large thicknesses t1 and t2, whereby surface roughness ofthin copper film 4 is increased. As a result, characteristics of the thin copper film when used as interconnection or the like may deteriorate. - Accordingly,
silicon substrate 1 is controlled so that variation in temperature of the surface thereof is within the prescribed range. More specifically, a heater for heating a substrate, for example of a hot plate type, is prepared andsilicon substrate 1 is pressed against the hot plate for heating (cooling). Here, heating (cooling) for middle and periphery portions of the hot plate can be independently controlled, and a contact portion between the hot plate andsilicon substrate 1 is provided with increased heat uniformity by employing an aluminum member. In addition, gas is introduced into the back surface ofsilicon substrate 1 for heating by heat conduction. It is noted that cooling is performed by circulating cooled He using a chiller. - In accordance with the above described method of controlling temperature of
silicon substrate 1, for example, variation in temperature of the surface ofsilicon substrate 1 is maintained within the range of about ±4° C. FIG. 6 shows thickness distribution of the thin copper film obtained for exposure treatment with the temperature ofsilicon substrate 1 maintained within such temperature range, subsequently followed by formation ofthin copper film 4. It is noted that FIG. 6 is related tothin copper film 4 formed on the surface of semiconductor wafer 6 of six inches, which is used as the above mentionedsilicon substrate 1. - As a result,
thin copper film 4 had average thickness dav of 4190.5 Å and uniformity (σ/dav) of 6.6%. It is apparent that controlling variation in temperature of the surface of the substrate, i.e., of semiconductor wafer 6 in FIG. 6, within the range of about ±4° C. for exposure treatment not only provides enhanced adhesion with the underlying film but also enables formation ofthin copper film 4 with reduced surface roughness. Consequently, interconnection with enhanced characteristics is obtained ifthin copper film 4 thus formed is used as interconnection. - Third Embodiment
- Now, a third embodiment of the present invention will be described. While temperature of the substrate is set at 30° C. in the above first embodiment, there may be a suitable range for temperature of the substrate. Then, the preferred range for temperature of the substrate during exposure treatment is discussed in the present third embodiment.
- In the exposure treatment in accordance with the present invention,
copper material 4 a is applied on the surface of the underlying film while avoiding reaction therewith as described above. Thus, exposure treatment is preferably performed within the range of the temperature at whichcopper material 4 a stably exists without liquefying and reaction betweencopper material 4 a and the underlying film (for example, TiN film 3) is avoided. Therefore, exposure treatment is preferably performed within the range of temperature of the substrate between about 5° C. and about 30° C. Most preferably, it is performed within the range between about 5° C. and about 20° C. Thus,copper material 4 a can most effectively be applied on the surface of the underlying film. - It is noted that the condition for exposure treatment in the present third embodiment is shown in the following Table 4.
TABLE 4 temperature of substrate more than 5° C. and less than 20° C. pressure 18 Torr material flow rate Cu (hfac) (tmvs) 0.5 g/min carrier flow rate (H2) 500 sccm exposure time more than two minutes - Fourth Embodiment
- Referring now to FIGS. 7 and 8, a fourth embodiment of the present invention will be described. FIGS. 7 and 8 are cross sectional views showing the characteristic first and second steps in a method of forming
thin copper film 4 in accordance with the fourth embodiment of the present invention. - According to the fourth embodiment, a process for
copper material 4 a proceeds up to the exposure treatment in a similar manner as in the above described first embodiment. Then, thermal treatment at the temperature for example of about 200° C. to about 450° C. is performed forcopper material 4 a andTiN film 3 after exposure treatment. It is noted that the thermal treatment needs to be performed at a temperature which is higher than that for forming the thin copper film 4 (for example of about 180° C.), which will be later described. As shown in FIG. 7, the thermal treatment under suchtemperature forms nucleus 4 b includingcopper material 4 a, and acomposite layer 5 of copper and TiN is formed betweennucleus 4 b andTiN film 3.Composite layer 5, where copper atoms exist between grain boundaries of TiN, can provide enhanced adhesion strength betweenTiN film 3 andthin copper film 4, which will be later formed. - After thermal treatment for forming
composite layer 5 as described above,thin copper film 4 is formed under a similar condition as in the first embodiment. As a result, a structure shown in FIG. 8 is obtained. - Fifth Embodiment
- A fifth embodiment of the present invention will now be described. The fifth embodiment is characterized in that the exposure treatment in accordance with the present invention is repeated several times. By repeating exposure treatment several times,
copper material 4 a can be more closely applied on the surface ofTiN film 3. - Thus,
nucleus 4 b is closely produced, thereby allowing efficient formation ofthin copper film 4. In addition,copper material 4 a can be applied on the surface ofunderlying TiN film 3 more uniformly, so thatnucleus 4 b is more uniformly produced. As a result, efficient formation ofthin copper film 4 as well as enhanced adhesion strength betweenthin copper film 4 andTiN film 3 is achieved. - It is noted that exposure treatment may be repeated several times either under the same or different conditions. In addition, when thermal treatment is performed after exposure treatment as in the above described fourth embodiment, both treatments may be repeated several times. After thus repeating exposure treatment several times,
thin copper film 4 is formed in a similar manner as described in each of the above embodiments. - Referring now to FIG. 9, an application of the present invention will be described. FIG. 9 is a cross sectional view showing a DRAM (Dynamic Random Access Memory) to which the method of forming
thin copper film 4 in accordance with the present invention is applicable. - Referring to FIG. 9,
impurity diffusion regions silicon substrate 10. Agate electrode 16 is formed on a channel region defined byimpurity diffusion regions gate insulation film 15 interposed.Trenches silicon substrate 10.Polysilicon films trenches insulation films - Formed to cover the main surface of
silicon substrate 10 is aninterlayer insulation film 18 a, in which contact holes 11 c and 11 d are formed which are respectively continuous toimpurity diffusion regions Plug electrodes 17 a and 17 c of for example W are formed in contact holes 11 c and 11 d, respectively. - An
interlayer insulation film 18 b is formed to coverinterlayer insulation film 18 a, and a viahole 11 e is formed ininterlayer insulation film 18 b. ATiN film 19 a is formed in viahole 11 c which functions as a barrier. Acopper interconnection 20 a is formed onTiN film 19 a. Thus, the method of forming the thin copper film in accordance with the present invention can be applied in formingcopper interconnection 20 a onTiN film 19 a. - Thus, nucleus density in forming
copper interconnection 20 a is increased, so that any space betweenunderlying TiN film 19 a andcopper interconnection 20 a can be prevented. As a result, reliability (electromigration life time) ofcopper interconnection 20 a is increased. - An
interlayer insulation film 18 c is formed to coverinterlayer insulation film 18 b, and atrench 11 f is formed ininterlayer insulation film 18 c. Acopper interconnection 20 b is formed intrench 11 f with aTiN film 19 b interposed. Aninterlayer insulation film 18 d is further formed to coverinterlayer insulation film 18 c, and atrench 11 d is also formed ininterlayer insulating film 18 d. In addition, acopper interconnection 20 c is formed intrench 11 g with aTiN film 19 c interposed. Thepassivation film 21 is formed to covercopper interconnection 20 c andinterlayer insulation film 18 d. The method of forming the thin copper film in accordance with the present invention may also be applicable to formation of the above mentionedcopper interconnections - It is noted that in FIG. 9, while
copper interconnections - As in the foregoing, although the embodiments or application of the present invention has been described, it is considered that the present invention may be applied to formation of a conductive film other than the thin copper film. In addition, the embodiment disclosed herein are all by way of illustration and example only and is not to be taken by way of limitation. The scope of the present invention is limited only by the terms of the appended claims, and any alteration in the meaning and scope equivalent to the appended claims is included.
Claims (6)
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JP9-059279(P) | 1997-03-13 | ||
JP05927997A JP3304807B2 (en) | 1997-03-13 | 1997-03-13 | Copper thin film deposition method |
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US20010019847A1 true US20010019847A1 (en) | 2001-09-06 |
US6303495B2 US6303495B2 (en) | 2001-10-16 |
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US09/038,117 Expired - Fee Related US6303495B2 (en) | 1997-03-13 | 1998-03-11 | Method of forming thin copper film and semiconductor device with thin copper film |
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US (1) | US6303495B2 (en) |
JP (1) | JP3304807B2 (en) |
KR (1) | KR100280933B1 (en) |
TW (1) | TW579575B (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
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US20030028246A1 (en) * | 1999-11-19 | 2003-02-06 | Palmaz Julio C. | Compliant implantable medical devices and methods of making same |
US6733513B2 (en) | 1999-11-04 | 2004-05-11 | Advanced Bioprosthetic Surfaces, Ltd. | Balloon catheter having metal balloon and method of making same |
US7704274B2 (en) | 2002-09-26 | 2010-04-27 | Advanced Bio Prothestic Surfaces, Ltd. | Implantable graft and methods of making same |
US8458879B2 (en) | 2001-07-03 | 2013-06-11 | Advanced Bio Prosthetic Surfaces, Ltd., A Wholly Owned Subsidiary Of Palmaz Scientific, Inc. | Method of fabricating an implantable medical device |
Families Citing this family (3)
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JP2001044202A (en) * | 1999-07-30 | 2001-02-16 | Nec Corp | Semiconductor device and manufacture thereof |
US6777327B2 (en) * | 2001-03-28 | 2004-08-17 | Sharp Laboratories Of America, Inc. | Method of barrier metal surface treatment prior to Cu deposition to improve adhesion and trench filling characteristics |
US8518818B2 (en) | 2011-09-16 | 2013-08-27 | Taiwan Semiconductor Manufacturing Co., Ltd. | Reverse damascene process |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
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WO1991017284A1 (en) * | 1990-04-30 | 1991-11-14 | International Business Machines Corporation | Apparatus for low temperature cvd of metals |
TW226478B (en) | 1992-12-04 | 1994-07-11 | Semiconductor Energy Res Co Ltd | Semiconductor device and method for manufacturing the same |
KR970001883B1 (en) * | 1992-12-30 | 1997-02-18 | 삼성전자 주식회사 | Semiconductor device and method for manufacturing the same |
US5391517A (en) * | 1993-09-13 | 1995-02-21 | Motorola Inc. | Process for forming copper interconnect structure |
JP3417751B2 (en) * | 1995-02-13 | 2003-06-16 | 株式会社東芝 | Method for manufacturing semiconductor device |
KR0179797B1 (en) * | 1995-12-29 | 1999-04-15 | 문정환 | Method of forming cu thin film with bias voltage supplied |
US5851367A (en) * | 1996-10-11 | 1998-12-22 | Sharp Microelectronics Technology, Inc. | Differential copper deposition on integrated circuit surfaces and method for same |
US5886864A (en) * | 1996-12-02 | 1999-03-23 | Applied Materials, Inc. | Substrate support member for uniform heating of a substrate |
US6139697A (en) * | 1997-01-31 | 2000-10-31 | Applied Materials, Inc. | Low temperature integrated via and trench fill process and apparatus |
-
1997
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- 1998-02-23 TW TW087102518A patent/TW579575B/en not_active IP Right Cessation
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Cited By (12)
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US6733513B2 (en) | 1999-11-04 | 2004-05-11 | Advanced Bioprosthetic Surfaces, Ltd. | Balloon catheter having metal balloon and method of making same |
US20030028246A1 (en) * | 1999-11-19 | 2003-02-06 | Palmaz Julio C. | Compliant implantable medical devices and methods of making same |
US8460333B2 (en) | 1999-11-19 | 2013-06-11 | Advanced Bio Prosthetic Surfaces, Ltd. | Balloon catheter having metal balloon and method of making same |
US8910363B2 (en) * | 1999-11-19 | 2014-12-16 | Advanced Bio Prosthetic Surfaces, Ltd. | Compliant implantable medical devices and methods of making same |
US9284637B2 (en) | 1999-11-19 | 2016-03-15 | Advanced Bio Prosthetic Surfaces, Ltd., A Wholly Owned Subsidiary Of Palmaz Scientific, Inc. | Implantable graft and methods of making same |
US9463305B2 (en) | 1999-11-19 | 2016-10-11 | Advanced Bio Prosthetic Surfaces, Ltd., A Wholly Owned Subsidiary Of Palmaz Scientific, Inc. | Balloon catheter having metal balloon and method of making same |
US10106884B2 (en) | 1999-11-19 | 2018-10-23 | Vactronix Scientific, Llc | Compliant implantable medical devices and methods of making same |
US10292849B2 (en) | 1999-11-19 | 2019-05-21 | Vactronix Scientific, Llc | Balloon catheter having metal balloon and method of making same |
US10745799B2 (en) | 1999-11-19 | 2020-08-18 | Vactronix Scientific, Llc | Compliant implantable medical devices and methods of making same |
US8458879B2 (en) | 2001-07-03 | 2013-06-11 | Advanced Bio Prosthetic Surfaces, Ltd., A Wholly Owned Subsidiary Of Palmaz Scientific, Inc. | Method of fabricating an implantable medical device |
US7704274B2 (en) | 2002-09-26 | 2010-04-27 | Advanced Bio Prothestic Surfaces, Ltd. | Implantable graft and methods of making same |
US10465274B2 (en) | 2002-09-26 | 2019-11-05 | Vactronix Scientific, Llc | Implantable graft and methods of making same |
Also Published As
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JP3304807B2 (en) | 2002-07-22 |
KR19980079827A (en) | 1998-11-25 |
JPH10256252A (en) | 1998-09-25 |
TW579575B (en) | 2004-03-11 |
US6303495B2 (en) | 2001-10-16 |
KR100280933B1 (en) | 2001-03-02 |
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