TWM647748U - Multilayer circuit board with heat dissipation performance - Google Patents
Multilayer circuit board with heat dissipation performance Download PDFInfo
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- TWM647748U TWM647748U TW112204801U TW112204801U TWM647748U TW M647748 U TWM647748 U TW M647748U TW 112204801 U TW112204801 U TW 112204801U TW 112204801 U TW112204801 U TW 112204801U TW M647748 U TWM647748 U TW M647748U
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- 239000002184 metal Substances 0.000 claims abstract description 141
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- 239000011799 hole material Substances 0.000 description 23
- 229910052802 copper Inorganic materials 0.000 description 13
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
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Abstract
Description
本新型是有關於一種多層板電路板,特別是指一種具有散熱功能的多層板電路板。The present invention relates to a multi-layer circuit board, in particular to a multi-layer circuit board with a heat dissipation function.
在電子設備朝向(例如手機與平板電腦)輕薄化發展的趨勢下,必須在有限的空間中裝設相當多數量的電子元件。隨著電子設備內的電子元件的數量不斷增加,電子設備的散熱需求也隨之提升。With the development trend of electronic devices (such as mobile phones and tablets) becoming thinner and lighter, a considerable number of electronic components must be installed in a limited space. As the number of electronic components in electronic devices continues to increase, the heat dissipation requirements of electronic devices also increase.
一般而言,在電路板中設置一整塊作為熱傳導媒介的銅塊,並且藉由銅塊本身具備的高熱傳導速率,將電路板中元件所產生的熱能快速傳導至電路板外部。然而,由於此銅塊的形狀通常是圓柱狀,而且銅塊必須筆直地貫穿整個電路板而設置,當電路板為多層板時,銅塊必須通過各層中相同的區域,即上述銅塊必須貫穿各層完全重疊的區域。如此一來,不僅壓縮了佈線的空間,亦大幅降低佈線的自由度,進而影響電路板的電性表現。Generally speaking, a whole copper block is placed in the circuit board as a heat transfer medium, and the heat energy generated by the components in the circuit board is quickly conducted to the outside of the circuit board by virtue of the high thermal conductivity of the copper block itself. However, since the shape of this copper block is usually cylindrical, and the copper block must be arranged straight through the entire circuit board, when the circuit board is a multi-layer board, the copper block must pass through the same area in each layer, that is, the above copper block must penetrate The area where the layers completely overlap. This not only compresses the wiring space, but also greatly reduces the freedom of wiring, thereby affecting the electrical performance of the circuit board.
因此,本新型一實施例提供一種同時兼具佈線自由度以及散熱功能的多層板電路板。Therefore, an embodiment of the present invention provides a multi-layer circuit board that has both wiring freedom and heat dissipation functions.
本新型一實施例所提供的多層板電路板包含第一線路基板;第一金屬塊,嵌設於第一線路基板中,並且具有兩個第一端面,第一端面分別曝露於第一線路基板相對兩側的兩個第一表面;第二線路基板,設置於第一線路基板上;以及一第二金屬塊,嵌設於第二線路基板中,並且具有兩個第二端面,第二端面分別暴露於第二線路基板相對兩側的兩個第二表面,其中第一端面其中一者直接接觸第二端面其中一者而形成一界面;其中互相面對的第一端面以及第二端面不完全重疊。A multilayer circuit board provided by an embodiment of the present invention includes a first circuit substrate; a first metal block embedded in the first circuit substrate and having two first end surfaces, the first end surfaces being respectively exposed to the first circuit substrate Two first surfaces on opposite sides; a second circuit substrate, disposed on the first circuit substrate; and a second metal block, embedded in the second circuit substrate, and having two second end surfaces, the second end surface Two second surfaces respectively exposed on opposite sides of the second circuit substrate, wherein one of the first end surfaces directly contacts one of the second end surfaces to form an interface; wherein the first end surfaces and the second end surfaces facing each other are not Total overlap.
在本新型一實施例中,多層板電路板還包含第一接合層,位於第一線路基板以及第二線路基板之間。第一接合層覆蓋第一金屬塊的其中一個第一端面的一部分,並且覆蓋第二金屬塊的其中一個第二端面的一部分。In an embodiment of the present invention, the multilayer circuit board further includes a first bonding layer located between the first circuit substrate and the second circuit substrate. The first bonding layer covers a portion of one of the first end surfaces of the first metal block and covers a portion of one of the second end surfaces of the second metal block.
在本新型一實施例中,其中第一金屬塊與第一線路基板之間存有第一接合材料,且第二金屬塊與第二線路基板之間存有第二接合材料,其中第一接合層分別連接第一接合材料以及第二接合材料。In an embodiment of the present invention, a first joining material is present between the first metal block and the first circuit substrate, and a second joining material is present between the second metal block and the second circuit substrate, wherein the first joining material The layers connect the first joining material and the second joining material respectively.
在本新型一實施例中,多層板電路板還包含多個導電材料,位於第一接合層中,其中第一線路基板透過導電材料電性連接第二線路基板。In an embodiment of the present invention, the multilayer circuit board further includes a plurality of conductive materials located in the first bonding layer, wherein the first circuit substrate is electrically connected to the second circuit substrate through the conductive materials.
在本新型一實施例中,多層板電路板還包含第三線路基板,其中第二線路基板位於第一線路基板以及第三線路基板之間;第三金屬塊,嵌設於第三線路基板中,並且具有兩個第三端面,第三端面分別曝露於第三線路基板相對兩側的兩個第三表面。第三端面其中一者直接接觸第二端面其中一者。In an embodiment of the present invention, the multilayer circuit board further includes a third circuit substrate, wherein the second circuit substrate is located between the first circuit substrate and the third circuit substrate; a third metal block is embedded in the third circuit substrate , and has two third end surfaces, and the third end surfaces are respectively exposed to two third surfaces on opposite sides of the third circuit substrate. One of the third end faces directly contacts one of the second end faces.
在本新型一實施例中,其中互相面對的第三端面以及第二端面完全重疊。In an embodiment of the present invention, the third end surface and the second end surface facing each other completely overlap.
在本新型一實施例中,多層板電路板還包含第二接合層,位於第二線路基板以及第三線路基板之間。第二接合層覆蓋第二金屬塊的其中一個第二端面的一部分,並且覆蓋第三金屬塊的其中一個第三端面的一部分。In an embodiment of the present invention, the multilayer circuit board further includes a second bonding layer located between the second circuit substrate and the third circuit substrate. The second bonding layer covers a portion of one of the second end surfaces of the second metal block, and covers a portion of one of the third end surfaces of the third metal block.
在本新型一實施例中,其中第三金屬塊與第三線路基板之間存有第三接合材料,而第三接合材料連接第二接合層。In an embodiment of the present invention, a third bonding material is present between the third metal block and the third circuit substrate, and the third bonding material is connected to the second bonding layer.
在本新型一實施例中,其中第一金屬塊還包含多個凸點結構。這些凸點結構位於第一金屬塊的側表面,並且直接接觸於第一線路基板。In an embodiment of the present invention, the first metal block further includes a plurality of bump structures. These bump structures are located on the side surface of the first metal block and are in direct contact with the first circuit substrate.
在本新型一實施例中,其中第一接合材料圍繞於第一金屬塊的凸點結構。In an embodiment of the present invention, the first bonding material surrounds the bump structure of the first metal block.
在本新型一實施例中,多層板電路板還包含多個導電材料,位於第二接合層中,其中第二線路基板以導電材料電性連接第三線路基板。In an embodiment of the present invention, the multilayer circuit board further includes a plurality of conductive materials located in the second bonding layer, wherein the second circuit substrate is electrically connected to the third circuit substrate using the conductive materials.
基於上述,本新型將金屬塊分別設置在多層板電路板各層中的不同區域,且令相鄰兩層中的金屬塊能互相接觸。透過低溫共融的方式將互相接觸的金屬塊共融為一體,以作為電路板中的散熱媒介。如此一來,得以在不影響散熱效率的情況下提高佈線自由度。Based on the above, in the present invention, the metal blocks are respectively arranged in different areas of each layer of the multi-layer circuit board, and the metal blocks in two adjacent layers can contact each other. Through low-temperature fusion, metal blocks that are in contact with each other are fused together to serve as a heat dissipation medium in the circuit board. This improves wiring freedom without affecting heat dissipation efficiency.
在以下的內文中,為了清楚呈現本案的技術特徵,圖式中的元件(例如層、膜、基板以及區域等)的尺寸(例如長度、寬度、厚度與深度)會以不等比例的方式放大,且有的元件數量會減少。因此,下文實施例的說明與解釋不受限於圖式中的元件數量以及元件所呈現的尺寸與形狀,而應涵蓋如實際製程及/或公差所導致的尺寸、形狀以及兩者的偏差。所以,本案圖式所呈示的元件主要是用於示意,並非旨在精準地描繪出元件的實際形狀,也非用於限制本案的申請專利範圍。In the following text, in order to clearly present the technical features of this case, the dimensions (such as length, width, thickness and depth) of the components (such as layers, films, substrates, regions, etc.) in the drawings will be exaggerated in varying proportions. , and the number of some components will be reduced. Therefore, the description and explanation of the embodiments below are not limited to the number of components and the sizes and shapes of the components in the drawings, but should cover the size, shape, and deviations in both caused by actual manufacturing processes and/or tolerances. Therefore, the components shown in the drawings of this case are mainly for illustration and are not intended to accurately depict the actual shapes of the components, nor are they intended to limit the patent scope of this case.
其次,本案內容中所出現的「約」、「近似」或「實質上」等這類用字不僅涵蓋明確記載的數值與數值範圍,而且也涵蓋新型所屬技術領域中具有通常知識者所能理解的可允許偏差範圍,其中此偏差範圍可由測量時所產生的誤差來決定,而此誤差例如是起因於測量系統或製程條件兩者的限制。此外,「約」可表示在上述數值的一個或多個標準偏差內,例如±5%、±3%或±1%內。本案文中所出現的「約」、「近似」或「實質上」等這類用字可依光學性質、蝕刻性質、機械性質或其他性質來選擇可以接受的偏差範圍或標準偏差,並非單以一個標準偏差來套用以上光學性質、蝕刻性質、機械性質以及其他性質等所有性質。Secondly, the words "approximately", "approximately" or "substantially" that appear in the content of this case not only cover the clearly recorded numerical values and numerical ranges, but also cover what can be understood by a person with ordinary knowledge in the technical field to which the new invention belongs. The allowable deviation range, where the deviation range can be determined by the error generated during measurement, and this error is caused, for example, by limitations of the measurement system or process conditions. In addition, "about" may mean within one or more standard deviations of the above numerical value, such as within ±5%, ±3%, or ±1%. Words such as "approximately", "approximately" or "substantially" appearing in this text can be used to select acceptable deviation ranges or standard deviations based on optical properties, etching properties, mechanical properties or other properties, and are not solely based on one The standard deviation applies to all the above optical properties, etching properties, mechanical properties and other properties.
請參閱圖1所示,多層板電路板10包含線路基板100、線路基板200、金屬塊180以及金屬塊280。金屬塊180嵌設於線路基板100中,但不電性連接線路基板100。此外,金屬塊180具有端面180t以及端面180b,且端面180t以及端面180b分別暴露於線路基板100相對兩側的表面100s。在本新型的各種實施例中,金屬塊180的材料可以包含導熱性較高的金屬,例如銅、銀等或者類似的合金材料。Referring to FIG. 1 , the
線路基板100包含絕緣層102以及位於絕緣層102相對兩側的金屬層104a以及金屬層104b。線路基板100還包含位於金屬層104a上的線路層105a以及位於金屬層104b上的線路層105b,其中絕緣層102、金屬層104a與金屬層104b位於線路層105a以及線路層105b之間。此外,線路基板100包含多個導電通孔107,這些導電通孔107電性連接線路層105a以及線路層105b,且每一個導電通孔107還包含塞孔材料107p。The
線路基板200設置於線路基板100的表面100s上(請參考圖1,即線路基板200位於線路基板100下方),而金屬塊280嵌設於線路基板200中,但不電性連接線路基板200。由於線路基板200的結構大致相同於線路基板100,故不在此重複贅述。如圖1所示,金屬塊280具有端面280t以及端面280b,其中端面280t以及端面280b分別暴露於線路基板200相對兩側的表面200s。此外,金屬塊280與金屬塊180可利用低溫共融的方式而彼此連接。The
值得一提的是,端面180b直接接觸端面280t而形成界面170a。但實質上,此界面170a並非肉眼可見的一個面,而是由於金屬塊中包含不同微結構所呈現出的界面(boundary),這些微結構的差異造成的界面可在電子顯微鏡下觀察而得。舉例而言,在本實施例中,在經過低溫共融之後,界面170a是由金屬塊(例如金屬銅)的再結晶結構所構成。這些再結晶是由於端面180b與端面280t發生金屬原子(例如銅原子)擴散而造成。It is worth mentioning that the
多層板電路板10還包含線路基板300以及金屬塊380,其中線路基板200位於線路基板100以及線路基板300之間。由於線路基板300的結構大致相同於線路基板100,故不在此重複贅述。金屬塊380嵌設於線路基板300中,但不電性連接線路基板300。如圖1所示,金屬塊380具有端面380t以及端面380b,其中端面380t以及端面380b分別暴露於線路基板300相對兩側的表面300s。端面380t直接接觸端面280b而形成界面170b。The
此外,須說明的是,金屬塊180、金屬塊280與金屬塊380可以分別連接線路基板100、線路基板200與線路基板300的接地層,以接地金屬塊180、金屬塊280與金屬塊380。In addition, it should be noted that the
在本實施例中,金屬塊180的端面180b與金屬塊280的端面280t不完全重疊,且金屬塊280的端面280b與金屬塊380的端面380t亦不完全重疊。換言之,互相面對的端面之間不完全重疊。然而,本新型不限於此,在其他實施例中,金屬塊180的端面180b與金屬塊280的端面280t不完全重疊,但金屬塊280的端面280b與金屬塊380的端面380t則可以完全重疊。In this embodiment, the
多層板電路板10還包含接合層110a以及接合層110b。接合層110a位於線路基板100以及線路基板200之間,並且覆蓋金屬塊180的端面180b的一部分。此外,接合層110a還覆蓋金屬塊280的端面280t的一部分。另一方面, 接合層110b位於線路基板200以及線路基板300之間,並且覆蓋金屬塊280的端面280b的一部分。此外,接合層110b還覆蓋金屬塊380的端面380t的一部分。The
在金屬塊180與線路基板100之間存有接合材料120,且在金屬塊280與線路基板200之間存有接合材料220。接合層110a分別連接接合材料120以及接合材料220。除此之外,在金屬塊380與線路基板300之間存有接合材料320,而接合材料320連接接合層110b。在本實施例中,接合層110b可以連接接合材料220。換句話而言,接合層110a以及接合層110b之間透過接合材料220而彼此相連接,其中接合層110a(及接合層110b)與接合材料120(及接合材料220、接合材料320)可以是例如樹脂。There is a
多層板電路板10還包含多個導電材料160,位於接合層110a以及接合層110b中。這些導電材料160設置於各個線路基板的線路層上(例如線路基板100的線路層105b)。如此一來,線路基板100可以透過這些導電材料160電性連接線路基板200,而線路基板200可以透過這些導電材料160電性連接線路基板300。The
請一併參閱圖1及圖4,金屬塊180還包含多個凸點結構182,這些凸點結構182位於金屬塊180的側表面180s,並且直接接觸於線路基板100。接合材料120可以圍繞於凸點結構182。值得一提的是,在其他實施例中,凸點結構182也可以被接合材料120完全圍繞。Please refer to FIG. 1 and FIG. 4 together. The
須特別注意的是,金屬塊180的凸點結構182的位置可以任意分布。舉例而言,雖然圖1所繪示的凸點結構182是接觸於線路層105a以及線路層105b。然而,實際上凸點結構182也可以接觸於金屬層104a以及金屬層104b。It should be noted that the positions of the
本新型中多層板電路板的製造方法可以包含如圖2A至圖2G所示的數個步驟,其中圖2A至圖2G所揭示的製造方法是以圖1中的多層板電路板10作為舉例說明。在本實施例中,先提供初始線路基板100’。請參閱圖2A,初始線路基板100’ 可以是一般的銅箔基板(Copper Clad Laminate,CCL)。The manufacturing method of the multi-layer circuit board in the present invention may include several steps as shown in Figures 2A to 2G. The manufacturing method disclosed in Figures 2A to 2G takes the
初始線路基板100’包含絕緣層102以及位於絕緣層102相對兩側的金屬層104a以及金屬層104b。絕緣層102可以是由樹脂所製成,而金屬層104a以及金屬層104b可沉積於絕緣層102上。此外,金屬層104a以及金屬層104b的材料可以包含銅。The initial circuit substrate 100' includes an insulating
接著,請參閱圖2B,對初始線路基板100’進行鑽孔(drilling)或外型切割(routing),以形成多個連通初始線路基板100’兩側的通孔106v以及通孔106h。在形成通孔106v以及通孔106h之後,在通孔106v以及通孔106h的內壁分別形成多個導電層103。各個導電層103位於初始線路基板100’兩側的金屬層104a與金屬層104b之間,並且電性連接金屬層104a以及金屬層104b。在本實施例中,形成導電層103的方法可以是電鍍(electroplating),且導電層103的材料可以包含例如銅等導電材料。Next, referring to FIG. 2B , drilling or routing is performed on the initial circuit substrate 100' to form a plurality of through
請參閱圖2C,將塞孔(plugging)材料107p填入通孔106v內側,並且藉由機械研磨的方式,使塞孔材料107p的兩端面107e分別與初始線路基板100’的兩表面100’s切齊。塞孔材料107p可以包含油墨樹脂,並且可藉由如網印印刷(screen printing)或者滾輪印刷(roller printing)的方式填入通孔106v的內側。接著,透過加熱或者照射UV的方式,對油墨樹脂進行烘烤,以形成固化狀態的塞孔材料107p。Referring to Figure 2C, the plugging
請參閱圖2D,在初始線路基板100’兩側的金屬層104a與金屬層104b上,分別形成線路層105a以及線路層105b。形成線路層105a以及線路層105b的方式包含:在金屬層104a與金屬層104b上各形成一層金屬層(未標示),並且對這兩層金屬層以及金屬層104a與金屬層104b進行圖案化,以形成線路層105a以及線路層105b。此外,線路層105a以及線路層105b分別暴露出絕緣層102的表面102a的一部分與表面102b的一部分。至此,已基本上完成線路基板100的製作。Referring to FIG. 2D, a
值得一提的是,線路層105a(及線路層105b)還可以包含多個覆蓋於塞孔材料107p的兩端面107e的接墊109。具體而言,位於線路層105a的其中一個接墊109可以透過導電層103,電性連接位於線路層105b的另一接墊109,而這兩個接墊109分別位於同一個塞孔材料107p的兩端面107e。It is worth mentioning that the
請參閱圖2E,在形成線路層105a以及線路層105b之後,在其中一層線路層(例如線路層105b)上,設置接合材料120。如圖2E所示,接合材料120完全覆蓋線路層105b以及絕緣層102的表面102b,但並未覆蓋通孔106h。進一步而言,接合材料120的其中一側表面120e與位於通孔106h內側的導電層103的表面103s齊平。接合材料120可以包含例如聚丙烯(Polypropylene;PP)等高分子材料,並且可以透過假貼(pre-lamination)的方式設置於線路層105b上。Referring to FIG. 2E, after the
接著,在接合材料120上貼合一層離型膜140,使接合材料120位於絕緣層102以及離型膜140之間。此離型膜140完全覆蓋接合材料120,並且亦完全覆蓋通孔106h的其中一端。離型膜140可以包含塗佈離型劑的高分子材料,例如塗佈矽離型劑的PET膜。Next, a
除此之外,在其他實施例中,還可以在另一層線路層(例如線路層105a)上設置另一層接合材料(未繪示),並且在此接合材料上貼合另一離型膜(未繪示)。換句話而言,在線路基板100的兩側皆設有接合材料以及離型膜。In addition, in other embodiments, another layer of bonding material (not shown) can also be provided on another circuit layer (such as the
請參閱圖2F,在貼合離型膜140之後,對接合材料120以及離型膜140進行鑽孔或外型切割。在此過程中,會移除接合材料120的一部分及離型膜140的一部分,以形成多個開口130。這些開口130暴露線路層105b的一部分。在本實施例中,各個開口130是暴露線路層105b中的接墊109的一部分。然而,本新型不限於此,在其他實施例中,開口130也可以暴露線路層105b中不是接墊109的部分。Referring to FIG. 2F , after the
請參閱圖2G,形成開口130(未標示於圖2G,請參閱圖2F)之後,可以藉由例如網印印刷或者滾輪印刷的方式在這些開口130內設置導電材料160,且導電材料160可以包含例如銅膏(Cu-paste)等導電膏材料。導電材料160電性連接線路層105b中的接墊109,且導電材料160的端面160e凸出於接合材料120的表面120s。須特別一提的是,在其他實施例中,開口130內也可以不設置導電材料160。在設置導電材料160之後,移除離型膜140,並且曝露出接合材料120的表面120s。Please refer to Figure 2G. After forming the openings 130 (not marked in Figure 2G, please refer to Figure 2F),
在經過圖2A至圖2G的步驟之後,形成線路基板100,且在線路基板100上還設有接合材料120以及導電材料160。圖3中包含經由圖2A至圖2G的步驟而形成的線路基板100、線路基板200以及線路基板300。After the steps of FIG. 2A to FIG. 2G , a
如圖3所示,在線路基板100、線路基板200以及線路基板300中分別裝設金屬塊180、金屬塊280以及金屬塊380。值得一提的是,金屬塊180、金屬塊280以及金屬塊380分別具有多個凸點結構182、凸點結構282以及凸點結構382。如圖4所示,凸點結構182是位於金屬塊180的側表面180s上。雖然本實施例中的金屬塊180包含四個凸點結構182,但本新型不限於此,在其他實施例中,金屬塊180可以包含三個以上(例如三個)的凸點結構182。As shown in FIG. 3 , a
請回到圖3,金屬塊180的寬度W1略小於通孔106h(未標示於圖3,請參閱圖2E)的寬度W2。因此,可以透過這些凸點結構182接觸通孔106h內側的導電層103的表面103s,進而將金屬塊180固定於線路基板100的通孔106h內側,且其中金屬塊180的側表面180s不直接接觸通孔106h內側的導電層103的表面103s。除此之外,金屬塊280以及金屬塊380也分別藉由凸點結構282以及凸點結構382,固定於線路基板200以及線路基板300。Please return to Figure 3. The width W1 of the
值得一提的是,在本實施例中,金屬塊180的端面180b是凸出於接合材料120的表面120s,而金屬塊380的端面380t則凸出於接合材料320的表面320s。另一方面,兩層接合材料220分別位於線路基板200的相對兩側,金屬塊280的端面280t以及端面280b則分別凸出於這兩層接合材料220的表面220s。It is worth mentioning that in this embodiment, the
在線路基板100、線路基板200以及線路基板300中分別裝設金屬塊180、金屬塊280以及金屬塊380之後,將上述三層線路基板壓合在一起,使三者在法線方向N1上互相重疊。壓合的過程還包含對線路基板100、線路基板200以及線路基板300進行加熱,其中加熱的溫度落在180°C至220°C的範圍內,以使金屬塊180、金屬塊280以及金屬塊380得以進行低溫共融。After installing the
由於線路基板100上的接合材料120面對線路基板200上的其中一層接合材料220。因此,當溫度達到接合材料120的加工溫度(例如玻璃轉換溫度)時,接合材料120會呈流體狀態,並且與上述的其中一層接合材料220互相融合,形成一個連接線路基板100以及線路基板200的接合層110a(未標示於圖3,請參閱圖1)。線路基板300上的接合材料320也是藉由相同的方式,形成一個連接線路基板200以及線路基板300的接合層110b(未標示於圖3,請參閱圖1)。Because the
須特別一提的是,當接合材料120呈流體狀態時,會流入並且填補通孔106h與金屬塊180之間的空隙,使金屬塊180固定於線路基板100的通孔106h中。另一方面,藉由壓合線路基板100以及線路基板200,導電材料160會接觸於線路基板200上的接墊209,進而電性連接線路基板100以及線路基板200。It should be noted that when the
除此之外,在加熱的情況下,相互接觸的金屬塊之間會發生共融的情形。具體而言,金屬塊180的端面180b與金屬塊280的端面280t重疊處具有一界面170a(未標示於圖3,請參閱圖1)。由於金屬塊180的端面180b直接接觸於金屬塊280的端面280t,當受熱時,界面170a會發生金屬原子擴散。如此一來,會在界面170a的周圍形成再結晶的微結構。在圖3繪示的壓合步驟完成之後,已基本上完成圖1中的多層板電路板10的製作。In addition, when heated, fusion occurs between metal blocks that are in contact with each other. Specifically, there is an
除此之外,雖然在圖2B至圖2G所繪示的通孔106h數量為一個,但本新型不限於此。在其他實施例中,通孔106h的數量可以是一個以上。換言之,在多層板電路板的其中一層線路基板(例如線路基板100)中,金屬塊(例如金屬塊180)的數量可以是一個以上。In addition, although the number of through
綜上所述,本新型將金屬塊分別設置在各層線路基板的不同區域,並且令相鄰兩層線路基板中的金屬塊能互相接觸。透過低溫共融的方式將互相接觸的金屬塊共融為一體,以作為電路板中的散熱媒介。如此一來,不限於在不同線路基板的相同區域上設置金屬塊,故不須為了繞過金屬塊而改變佈線設計,進而提高佈線自由度。To sum up, in the present invention, the metal blocks are respectively arranged in different areas of each layer of circuit substrates, and the metal blocks in two adjacent layers of circuit substrates can contact each other. Through low-temperature fusion, metal blocks that are in contact with each other are fused together to serve as a heat dissipation medium in the circuit board. In this way, the metal blocks are not limited to being arranged on the same area of different circuit substrates, so there is no need to change the wiring design in order to bypass the metal blocks, thereby improving the wiring freedom.
雖然本新型已以實施例揭露如上,然其並非用以限定本新型,本新型所屬技術領域中具有通常知識者,在不脫離本新型精神和範圍內,當可作些許更動與潤飾,因此本新型保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed above through embodiments, they are not intended to limit the present invention. Those with ordinary knowledge in the technical field to which the present invention belongs can make some modifications and modifications without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of new type protection shall be determined by the appended patent application scope.
10:多層板電路板
100, 200, 300:線路基板
100’:初始線路基板
100s, 102a, 102b, 103s, 100’s, 120s, 200s, 220s, 300s, 320s:表面
102:絕緣層
103:導電層
104a, 104b:金屬層
105a, 105b:線路層
106v, 106h:通孔
107:導電通孔
107p:塞孔材料
107e, 160e, 180b, 180t, 280b, 280t, 380b, 380t:端面
109, 209:接墊
110a, 110b:接合層
120, 220, 320:接合材料
130:開口
140:離型膜
160:導電材料
170a, 170b:界面
180, 280, 380:金屬塊
120e, 180s:側表面
182, 282, 382:凸點結構
W1, W2:寬度
N1:法線方向
10:
從以下詳細敘述並搭配圖式檢閱,可理解本新型的態樣。應注意,多種特徵並未以產業上實務標準的比例繪製。事實上,為了討論上的清楚易懂,各種特徵的尺寸可以任意地增加或減少。 圖1繪示本新型一實施例的多層板電路板的剖視圖。 圖2A至圖2G繪示本新型一實施例的多層板電路板製造方法的剖視圖。 圖3繪示本新型一實施例的多層板電路板製造方法的剖視圖。 圖4繪示本新型一實施例的金屬塊的上視圖。 The aspect of the present invention can be understood from the following detailed description and review with diagrams. It should be noted that various features are not drawn to scale that is standard practice in the industry. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of discussion. Figure 1 shows a cross-sectional view of a multilayer circuit board according to an embodiment of the present invention. 2A to 2G are cross-sectional views of a multilayer circuit board manufacturing method according to an embodiment of the present invention. 3 is a cross-sectional view of a multilayer circuit board manufacturing method according to an embodiment of the present invention. Figure 4 shows a top view of a metal block according to an embodiment of the present invention.
10:多層板電路板 10:Multilayer circuit board
100,200,300:線路基板 100,200,300: Circuit substrate
100s,200s,300s:表面 100s, 200s, 300s: surface
102:絕緣層 102:Insulation layer
104a,104b:金屬層 104a,104b: metal layer
105a,105b:線路層 105a,105b: line layer
107:導電通孔 107:Conductive via
107p:塞孔材料 107p: Plug material
180b,180t,280b,280t,380b,380t:端面 180b, 180t, 280b, 280t, 380b, 380t: end face
110a,110b:接合層 110a, 110b: bonding layer
120,220,320:接合材料 120,220,320:Joining materials
160:導電材料 160: Conductive materials
170a,170b:界面 170a,170b:Interface
180,280,380:金屬塊 180,280,380: Metal block
180s:側表面 180s: Side surface
182:凸點結構 182:Bump structure
Claims (11)
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