TWM641059U - Chip testing device - Google Patents

Abstract

本創作係為一種晶片測試裝置，其係用以檢測一晶片，該晶片一側設有複數個晶片接腳，該晶片檢測裝置包含一基座及一上蓋，該基座包含一本體，該本體設有一限位框，該限位框設有一第一容置槽，該連接器對應該些個晶片接腳設置於該第一容置槽內，該卡扣部設置於該本體上，並與該第一容置槽相鄰，該上蓋係樞接於該基座之一側，該上蓋之一壓合部凸設於一蓋體，該壓合部對應設置於該第一容置槽，該蓋體設有一穿孔，該穿孔內設有一卡固部，該卡固部與該卡扣部相適配。The present invention is a wafer testing device, which is used to detect a wafer. A plurality of wafer pins are arranged on one side of the wafer. The wafer testing device includes a base and an upper cover. The base includes a body, and the body A limiting frame is provided, and the limiting frame is provided with a first accommodating groove, the connector is arranged in the first accommodating groove corresponding to the chip pins, the buckle part is arranged on the body, and is connected with the The first accommodating groove is adjacent, the upper cover is pivotally connected to one side of the base, a pressing portion of the upper cover protrudes from a cover body, and the pressing portion is correspondingly arranged in the first accommodating groove, The cover body is provided with a through hole, and a fastening part is arranged in the through hole, and the fastening part is adapted to the buckle part.

Description

晶片測試裝置Wafer tester

本創作係關於一種裝置，特別是一種晶片測試裝置。The invention relates to a device, especially a wafer testing device.

BGA封裝技術是從插針網格陣列（pin grid array; PGA）改良而來，是一種將某個表面以格狀排列的方式覆滿（或部分覆滿）引腳的封裝法，在運作時即可將電子訊號從積體電路上傳導至其所在的印刷電路板（PCB）。BGA packaging technology is improved from pin grid array (PGA). It is a packaging method that covers (or partially covers) pins on a certain surface in a grid-like arrangement. The electronic signal can be conducted from the integrated circuit to the printed circuit board (PCB) where it is located.

在BGA封裝下，在封裝底部處引腳是由錫球所取代，每個原本都是一粒小小的錫球固定其上，這些錫球可以手動或透過自動化機器配置，並透過助焊劑將它們定位。Under the BGA package, the pins at the bottom of the package are replaced by solder balls, each of which is originally a small solder ball fixed on it. They are positioned.

裝置以表面貼焊技術固定在PCB上時，底部錫球的排列恰好對應到板子上銅箔的位置，產線接著會將其加熱，無論是放入廻焊爐 (reflow oven) 或紅外線爐，以將錫球熔化，表面張力會使得融化的錫球撐住封裝點並對齊到電路板上，在正確的間隔距離下，當錫球冷卻並固定後，形成的焊接接點即可連接裝置與PCB。When the device is fixed on the PCB by surface mount soldering technology, the arrangement of the solder balls on the bottom corresponds exactly to the position of the copper foil on the board. The production line will then heat it, whether it is placed in a reflow oven or an infrared oven, In order to melt the solder balls, the surface tension will make the melted solder balls support the package point and align to the circuit board. Under the correct spacing distance, when the solder balls are cooled and fixed, the solder joints formed can connect the device and PCB.

BGA封裝技術是在生產具有數百根引腳的積體電路時，針對封裝必須縮小的難題所衍生出的解決方案，插針網格陣列和雙列直插封裝（Dual in-line package）的表面貼焊（小型塑封積體電路，SOIC）封裝生產時，由於必須加入越來越多引腳且彼此的間隙必須減少，這樣卻導致了焊接過程時的困難。當封裝引腳彼此越來越近時，焊錫時意外地橋接到相鄰的引腳風險就因此增加。BGA packaging technology is a solution derived from the problem that the package must be reduced when producing integrated circuits with hundreds of pins. Pin grid array and dual in-line package (Dual in-line package) Surface Mount (Small Outline Plastic Integrated Circuit, SOIC) packages are produced, as more and more pins must be added and the gap between each other must be reduced, which leads to difficulties in the soldering process. As package leads get closer to each other, the risk of solder accidentally bridging to adjacent leads increases.

BGA封裝的其中一個缺點，就是錫球無法像長引腳那樣可以伸展，因此他們在物理特性上是不具材料剛度的，所有的表面貼焊裝置，因PCB基板和BGA封裝在熱膨脹係數的差異而彎曲（熱應力），或延展並振動（機械應力）下，就可能導致焊點斷裂。One of the disadvantages of the BGA package is that the solder balls cannot be stretched like long pins, so they do not have material rigidity in physical properties. All surface mount soldering devices are due to the difference in thermal expansion coefficient between the PCB substrate and the BGA package. Bending (thermal stress), or stretching and vibrating (mechanical stress), can cause solder joints to break.

再者，BGA封裝常會產生空洞、脫焊焊點、錫橋和短路、不對準、開路(冷焊點)、移位、橋連、焊點邊緣模糊、吹孔、結晶破裂、濺錫之缺點，Furthermore, BGA packages often produce voids, desoldering solder joints, tin bridges and short circuits, misalignment, open circuits (cold solder joints), displacement, bridging, blurred solder joint edges, blow holes, crystal cracking, and tin spattering. ,

而當BGA封裝貼焊至定位後，此時，要找到焊接時的缺陷就變得困難，為了要檢測焊接封裝的底部，目前所使用的檢測裝置包含X光機、工業電腦斷層掃描機、特殊顯微鏡、和內視鏡等裝置，用以檢測BGA封裝缺陷之問題。When the BGA package is soldered to the position, it becomes difficult to find the defects during soldering. In order to detect the bottom of the soldered package, the currently used detection devices include X-ray machines, industrial computer tomography machines, special Devices such as microscopes and endoscopes are used to detect defects in BGA packages.

而使用人工X射線檢測設備，需要逐個檢查焊點並確定其是否合格。該設備配有手動或電腦輔助裝置，以便更好地進行檢測和攝像，詳細定義的標準或目視檢測圖表可指導評估檢測結果，而目視檢測要求培訓操作人員，並且容易出錯，且人工設備並不適合對全部焊點進行檢測，只適合製程鑑定和製程故障分析。While using manual X-ray inspection equipment, it is necessary to check the solder joints one by one and determine whether they are qualified. The equipment is equipped with manual or computer-aided devices for better inspection and videography. Detailed defined standards or visual inspection charts can guide the evaluation of inspection results. Visual inspection requires training of operators and is prone to errors, and manual equipment is not suitable Testing all solder joints is only suitable for process identification and process failure analysis.

若使用自動X光檢測系統，則需要透過設置正確的檢測參數才得子正確的檢測，雖然大多數新系統的軟體中都定義了檢測指標，但根據不同的元件必須制訂不同的參數，且需要定義所要檢查焊點的面積和高度或把焊點剖成不同的截面，以適應生產工藝中所特有的因素，否則可能得到錯誤的信息且降低系統可靠性。If you use an automatic X-ray detection system, you need to set the correct detection parameters to get the correct detection. Although most of the new system software has defined detection indicators, different parameters must be formulated according to different components, and need Define the area and height of the solder joints to be inspected or cut the solder joints into different sections to adapt to the unique factors in the production process, otherwise wrong information may be obtained and system reliability will be reduced.

另外，習知檢測方式中，也有利用限位框來容置晶片，在進一步檢測晶片是否有缺陷的問題，而不同種類之晶片則需不同尺寸之限位框，一般限位框為利用鎖固元件鎖附於測試治具，而於更換限位框時，皆必須利用器械拆除鎖固元件，而使得測試過程較為繁瑣，易影響整體測試效率。In addition, in the conventional detection method, there is also the problem of using the limit frame to accommodate the wafer, and further inspecting whether the chip is defective. However, different types of chips require different size limit frames. Generally, the limit frame is used to lock The components are locked to the test fixture, and when replacing the limit frame, the locking components must be removed by using an instrument, which makes the testing process more cumbersome and easily affects the overall testing efficiency.

因此，如何製作一種可以快速檢測封裝之晶片是否存在缺陷之晶片檢測裝置，為本領域技術人員所欲解決的問題。Therefore, how to make a chip inspection device that can quickly detect whether a packaged chip has defects is a problem that those skilled in the art want to solve.

本創作之一目的，在於提供一種晶片測試裝置，該晶片測試裝置係用以測試晶片是否能正常運作之裝置，其係設置有基座、限位框以及上蓋，其中透過與晶片接腳對應設置之連接器進行測試，連接器表面露出於基座，上蓋樞接於基座一側，透過上蓋開合(掀開與向下蓋合)於基座上，使上蓋的壓合部進入限位框並壓合晶片，且上蓋設置有穿孔，穿孔內設有卡固部，當上蓋蓋合後，基座上之卡扣部穿設穿孔後與卡固部相適配，透過上述之結構可使晶片被快速檢測。One purpose of this creation is to provide a chip testing device, which is a device for testing whether the chip can operate normally. It is equipped with a base, a limit frame and an upper cover. The connector is tested, the surface of the connector is exposed on the base, the upper cover is pivotally connected to one side of the base, and the upper cover is opened and closed (opened and closed) on the base, so that the pressing part of the upper cover enters the limit Frame and press the wafer, and the upper cover is provided with a perforation, and a fastening part is provided in the perforation. When the upper cover is closed, the buckle part on the base is matched with the fastening part after passing through the perforation. Through the above structure, Allows wafers to be inspected quickly.

針對上述之目的，本創作提供一種晶片測試裝置，其係用以檢測一晶片，其一側設有複數個晶片接腳，其包含：一基座，其係包含一本體，該本體設有一限位框，該限位框設有一第一容置槽，一連接器對應該些個晶片接腳設置於該第一容置槽內，一卡扣部設置於該本體上，並與該第一容置槽相鄰；以及一上蓋，其係樞接於該基座之一側，該上蓋包含一蓋體及一壓合部，該壓合部凸設於該蓋體之一第一面，該壓合部對應設置於該第一容置槽，該蓋體設有一穿孔，該穿孔內設有一卡固部，該卡固部與該卡扣部相適配，其中，該連接器電性連接該些個晶片接腳。For the above purpose, the present invention provides a chip testing device, which is used to detect a chip, and a plurality of chip pins are provided on one side, and it includes: a base, which includes a body, and the body is provided with a limiter. A position frame, the limit frame is provided with a first accommodating groove, a connector is arranged in the first accommodating groove corresponding to the chip pins, a buckle part is arranged on the body, and is connected with the first accommodating groove. The accommodating grooves are adjacent; and an upper cover, which is pivotally connected to one side of the base, the upper cover includes a cover body and a pressing part, and the pressing part is protruded on a first surface of the cover body, The pressing part is correspondingly arranged in the first accommodating groove, the cover body is provided with a through hole, and a fastening part is arranged in the through hole, and the fastening part is matched with the buckle part, wherein the connector is electrically Connect the chip pins.

本創作提供一實施例，其中該上蓋更包含一連接部，該連接部係固設於該本體之一側，且該連接部之一側樞接於該蓋體之一側。The invention provides an embodiment, wherein the upper cover further includes a connecting portion, the connecting portion is fixed on one side of the main body, and one side of the connecting portion is pivotally connected to one side of the cover.

本創作提供一實施例，其中該晶片放置於該連接器之上方，該上蓋蓋合於該基座，使該卡扣部穿設該穿孔並卡固於該卡固部，同時使該壓合部壓合於該晶片。This creation provides an embodiment, wherein the chip is placed above the connector, the upper cover is closed on the base, the buckle part passes through the through hole and is fastened to the fastening part, and the press fit pressed to the wafer.

本創作提供一實施例，其中該本體更包含一第二容置槽，該第二容置槽設置於該第一容置槽之一側，該卡扣部設置於該第二容置槽內。The invention provides an embodiment, wherein the body further includes a second accommodation groove, the second accommodation groove is arranged on one side of the first accommodation groove, and the buckle part is arranged in the second accommodation groove .

本創作提供一實施例，其中該卡扣部包含一固定件及二彈性件，該二彈性件延伸設置於該固定件之兩側，該二彈性件與該固定件之間分別具有一間隙，其中，該二彈性件經由一擠壓力向該間隙內縮後回彈卡固於該卡固部。This creation provides an embodiment, wherein the buckle part includes a fixing part and two elastic parts, the two elastic parts are extended on both sides of the fixing part, there is a gap between the two elastic parts and the fixing part, Wherein, the two elastic parts are retracted into the gap through a pressing force, and then snap back and be fixed on the fastening portion.

本創作提供一實施例，其中該壓合部面向該第一容置槽之一面設有一溝槽，該溝槽係用以分散給予該晶片之一應力。The invention provides an embodiment, wherein a groove is provided on a surface of the pressing part facing the first accommodation groove, and the groove is used for distributing a stress to the chip.

本創作提供一實施例，其中該連接器設有一第一檢測部及一第二檢測部，該第一檢測部及該第二檢測部分別設有複數個第一接腳及複數個第二接腳。This creation provides an embodiment, wherein the connector is provided with a first detection part and a second detection part, and the first detection part and the second detection part are respectively provided with a plurality of first pins and a plurality of second pins foot.

本創作提供一實施例，其中該第一檢測部及該第二檢測部之間設有一間隔部。The invention provides an embodiment, wherein a spacer is provided between the first detection part and the second detection part.

本創作提供一實施例，其中該些個第一接腳與該些個第二接腳係用以與該晶片上之該些個晶片接腳電性連接。The invention provides an embodiment, wherein the first pins and the second pins are used to electrically connect with the chip pins on the chip.

為使　貴審查委員對本創作之特徵及所達成之功效有更進一步之瞭解與認識，謹佐以較佳之實施例及配合詳細之說明，說明如後：In order to enable your review committee to have a better understanding and understanding of the characteristics of this creation and the functions achieved, I would like to provide a better embodiment and a detailed description, as follows:

習知檢測裝置昂貴且設定繁雜，再者，透過限位框來容置晶片，在進一步檢測晶片是否有缺陷的問題，因為不同種類之晶片繁多，而需要不同尺寸之限位框，且習知限位框為利用鎖固元件鎖附於測試治具，而於更換限位框時，皆必須利用器械拆除鎖固元件，而使得測試過程較為繁瑣，易影響整體測試效率，使檢測效率低落。The known detection device is expensive and complicated to set up. Moreover, the chip is accommodated through the limit frame to further detect whether the chip is defective. Because there are many different types of chips, limit frames of different sizes are required, and the conventional The limit frame is locked to the test fixture by means of a locking element, and when replacing the limit frame, the locking element must be removed with an instrument, which makes the testing process more cumbersome, easily affects the overall test efficiency, and lowers the detection efficiency.

本創作係透過於基座上設置限位框，再藉由上蓋蓋合卡固後，使晶片接腳與連接器上方之第一階、限位框以及上蓋，其中透過與晶片接腳對應設置之連接部內之第一檢測部及該第二檢測部進行測試，透過上述之結構可使晶片被快速檢測。In this creation, a limit frame is set on the base, and then the upper cover is locked and locked, so that the chip pins and the first level above the connector, the limit frame and the upper cover are set through correspondingly with the chip pins The first detection part and the second detection part in the connecting part are tested, and the chip can be quickly detected through the above structure.

在下文中，將藉由圖式來說明本創作之各種實施例來詳細描述本創作。然而本創作之概念可能以許多不同型式來體現，且不應解釋為限於本文中所闡述之例示性實施例。Hereinafter, the invention will be described in detail by illustrating various embodiments of the invention by means of the drawings. The inventive concepts may, however, be embodied in many different forms and should not be construed as limited to the illustrative embodiments set forth herein.

首先，請參閱第1圖，其為本創作之一實施例之晶片測試裝置之結構示意圖，如圖所示，本實施例之晶片測試裝置係用於檢測一晶片10，該晶片10之一側設有複數個晶片接腳11，本實施例之晶片測試裝置包含一基座20以及一上蓋30。At first, please refer to Fig. 1, which is a schematic structural view of a wafer testing device of an embodiment of the present invention, as shown in the figure, the wafer testing device of this embodiment is used to detect a wafer 10, one side of the wafer 10 A plurality of chip pins 11 are provided, and the chip testing device of this embodiment includes a base 20 and a cover 30 .

於本實施例中，該基座20，其係包含一本體22、一限位框24、一連接器26以及一卡扣部28，該本體22設有該限位框24，該限位框24設有一第一容置槽21，該連接器26對應該些個晶片接腳11設置於該第一容置槽21內，該卡扣部28設置於該本體22上，並與該第一容置槽21相鄰，其中，該連接器26之表面露出於該本體22。In this embodiment, the base 20 includes a main body 22, a limiting frame 24, a connector 26 and a buckle portion 28, the main body 22 is provided with the limiting frame 24, the limiting frame 24 is provided with a first accommodating groove 21, and the connector 26 is arranged in the first accommodating groove 21 corresponding to the chip pins 11. The accommodating grooves 21 are adjacent to each other, wherein the surface of the connector 26 is exposed from the body 22 .

於本實施例中，該上蓋30係樞接於該基座20之一側，該上蓋30包含一蓋體32及一壓合部34，該壓合部34凸設於該蓋體32之一第一面P1，該壓合部34對應設置於該第一容置槽21，該蓋體32設有一穿孔36，該穿孔36內設有一卡固部361，該卡固部361與該卡扣部28相適配。In this embodiment, the upper cover 30 is pivotally connected to one side of the base 20 , the upper cover 30 includes a cover body 32 and a pressing portion 34 , and the pressing portion 34 protrudes from one of the cover body 32 On the first surface P1, the pressing portion 34 is correspondingly disposed in the first receiving groove 21, the cover body 32 is provided with a through hole 36, and a fastening portion 361 is disposed in the through hole 36, and the fastening portion 361 is connected with the buckle. Part 28 is compatible.

於本實施例中，請參考第2圖，其為本創作之一實施例之卡扣部及卡固部之卡固狀態示意圖，並請一併參考第3圖，其為本創作之一實施例之晶片測試裝置之使用狀態示意圖，如圖所示，該晶片10放置於該連接器26之上方，且該上蓋30向下蓋合於該基座20時，並使該壓合部34壓合於該晶片10，以便檢測該晶片10之該晶片接腳11是否有缺陷或毀損。In this embodiment, please refer to Figure 2, which is a schematic diagram of the fastening state of the buckle part and the fastening part in one embodiment of this creation, and please also refer to Figure 3, which is an implementation of this creation The schematic diagram of the use state of the wafer testing device of the example, as shown in the figure, the wafer 10 is placed on the top of the connector 26, and when the upper cover 30 is closed on the base 20, the pressing part 34 is pressed It is combined with the chip 10 so as to detect whether the chip pins 11 of the chip 10 are defective or damaged.

由於習知透過該限位框24來容置該晶片10並進行檢測時，會因為要利用鎖固元件將該限位框24鎖附於測試治具，而於更換該限位框24時，皆必須利用器械拆除鎖固元件，而使得測試過程較為繁瑣，易影響整體測試效率，使檢測效率低落，且習知之晶片檢測裝置會透過卡固之結構，將該上蓋30及該基座20卡合，然而此類檢測裝置之結構，多將卡固之結構設置裝置外側，使用者在操作過程中會因為操作不順，不符合使用者之檢測習慣，使置入欲檢測之該晶片10時之速度較慢，而使檢測速率降低，增加檢測人工之成本。Since it is known that the wafer 10 is accommodated and detected through the limiting frame 24, the limiting frame 24 will be locked to the test fixture by using a locking element, and when the limiting frame 24 is replaced, It is necessary to use an instrument to remove the locking element, which makes the testing process more cumbersome, easily affects the overall testing efficiency, and makes the testing efficiency low, and the known chip testing device will lock the upper cover 30 and the base 20 through the clamping structure. However, the structure of this type of detection device usually sets the clamping structure outside the device. During the operation, the user may not be able to operate smoothly and does not conform to the user's detection habits, so that when the chip 10 to be detected is inserted into the chip 10 The speed is slow, which reduces the detection rate and increases the cost of detection labor.

本創作之優點在於，可以透過該上蓋30之該卡固部361卡固該基座20上之該卡扣部28，使本創作之晶片檢測裝置可以快速且有效率的開啟以及蓋合整體之裝置，解決過往以磁吸或卡扣方式之設計容易脫落或因為開合方向而不符合使用者操作方向之設計，導致因操作不方便而使置入該晶片10之效率較慢之缺點，達到快速卡扣，且可本創作可透過不同之該晶片10之大小對應置換具有不同該第一容置槽21之該限位框24，達到提升檢測效率且具有靈活運用本創作之晶片檢測裝置之優點。The advantage of this invention is that the buckle portion 28 on the base 20 can be fastened through the fastening portion 361 of the upper cover 30, so that the wafer detection device of this invention can be opened and closed quickly and efficiently. The device solves the disadvantages of the previous magnetic attraction or buckle design that is easy to fall off or that the direction of opening and closing does not conform to the direction of the user's operation, resulting in the disadvantage of slow insertion of the chip 10 due to inconvenient operation. Fast buckle, and this invention can replace the limit frame 24 with different first accommodating grooves 21 through different sizes of the wafer 10, so as to improve the detection efficiency and have the flexibility to use the wafer detection device of this invention advantage.

另外，於本實施例中，請一併參考第4圖，其為本創作之一實施例之晶片測試裝置之結構示意圖，如圖所示，該本體22更包含一第二容置槽23，該第二容置槽23設置於該第一容置槽21之一側，該卡扣部28設置於該第二容置槽23內。In addition, in this embodiment, please also refer to FIG. 4, which is a schematic structural diagram of a wafer testing device in an embodiment of the present invention. As shown in the figure, the body 22 further includes a second accommodating groove 23, The second accommodating groove 23 is disposed on one side of the first accommodating groove 21 , and the locking portion 28 is disposed in the second accommodating groove 23 .

進一步，該卡扣部28包含一固定件281及二彈性件283，該二彈性件283延伸設置於該固定件281之兩側，該二彈性件283與該固定件281之間分別具有一間隙285，其中，該二彈性件283可經由一擠壓力(未圖式)向該間隙285內縮。Further, the buckle part 28 includes a fixing part 281 and two elastic parts 283, the two elastic parts 283 are extended on both sides of the fixing part 281, there is a gap between the two elastic parts 283 and the fixing part 281 285, wherein, the two elastic members 283 can shrink toward the gap 285 through a pressing force (not shown).

也就是說，當該基座20上之該卡扣部28穿設該穿孔36，並藉由穿設之該擠壓力，使該二彈性件283向該間隙285(往該固定件281之方向)內縮後，回彈並卡固於該卡固部361上。That is to say, when the buckle portion 28 on the base 20 passes through the through hole 36, and by the pressing force of the piercing, the two elastic members 283 move toward the gap 285 (towards the fixing member 281). direction) after being retracted, it rebounds and is fastened on the fastening portion 361 .

接著，請復參閱第4圖，於本實施例中，於該基座20之該連接器26進一步設有一第一檢測部261及一第二檢測部263，該第一檢測部261及該第二檢測部263之間設有一間隔部262，該間隔部262係用於分隔該第一檢測部261及該第二檢測部263，且該第一檢測部261及該第二檢測部263分別設有複數個第一接腳2611及複數個第二接腳2631，其中，該些個第一接腳2611與該些個第二接腳2631係用以與該晶片10上之該些個晶片接腳11對接，以進行該晶片10之檢測。Then, please refer to Fig. 4 again, in this embodiment, the connector 26 of the base 20 is further provided with a first detection portion 261 and a second detection portion 263, the first detection portion 261 and the second detection portion A spacer 262 is provided between the two detection parts 263, and the spacer 262 is used to separate the first detection part 261 and the second detection part 263, and the first detection part 261 and the second detection part 263 are respectively set There are a plurality of first pins 2611 and a plurality of second pins 2631, wherein the first pins 2611 and the second pins 2631 are used to connect with the chips on the chip 10 The feet 11 are butted together for inspection of the wafer 10 .

接續上述，於本實施例中，該上蓋30之該壓合部34面向該第一容置槽21之一面設有一溝槽341，該溝槽341係用以分散給予該晶片10之一應力(未圖式)，進一步於本實施例中，該上蓋30更包含一連接部38，該連接部38係固設於該本體22之一側，且該連接部38之一側樞接於該蓋體32之一側。Continuing the above, in this embodiment, the pressing portion 34 of the upper cover 30 is provided with a groove 341 on a surface facing the first receiving groove 21, and the groove 341 is used to disperse a stress given to the wafer 10 ( Not shown), further in this embodiment, the upper cover 30 further includes a connecting portion 38, the connecting portion 38 is fixed on one side of the body 22, and one side of the connecting portion 38 is pivotally connected to the cover One side of the body 32.

以上所述之實施例，本創作係為一種晶片檢測裝置，其係透過於基座上設置限位框，再藉由上蓋蓋合卡固後，使晶片接腳與連接器上方之第一階、限位框以及上蓋，其中透過與晶片接腳對應設置之連接部內之第一檢測部及該第二檢測部進行測試，透過上述之結構可使晶片被快速檢測。In the above-mentioned embodiment, the present invention is a chip inspection device, which is through setting a limit frame on the base, and after the upper cover is closed and locked, the chip pins and the first step above the connector , the limit frame and the upper cover, wherein the test is performed through the first detection part and the second detection part in the connection part corresponding to the chip pins, and the chip can be quickly detected through the above structure.

惟以上所述者，僅為本創作之較佳實施例而已，並非用來限定本創作實施之範圍，舉凡依本創作申請專利範圍所述之形狀、構造、特徵及精神所為之均等變化與修飾，均應包括於本創作之申請專利範圍內。However, the above is only a preferred embodiment of this creation, and it is not used to limit the scope of implementation of this creation. For example, all equal changes and modifications are made according to the shape, structure, characteristics and spirit described in the patent scope of this creation. , should be included in the scope of the patent application for this creation.

10:晶片 11:晶片接腳 20:基座 21:第一容置槽 22:本體 23:第二容置槽 24:限位框 26:連接器 261:第一檢測部 2611:第一接腳 262:間隔部 263:第二檢測部 2631:第二接腳 28:卡扣部 281:固定件 283:彈性件 285:間隙 30:上蓋 32:蓋體 34:壓合部 341:溝槽 36:穿孔 361:卡固部 38:連接部 P1:第一面 10: Wafer 11: chip pin 20: base 21: The first storage tank 22: Ontology 23: The second storage tank 24: limit frame 26: Connector 261: The first detection department 2611: The first pin 262: Partition 263:Second detection department 2631: The second pin 28: buckle part 281:Fixer 283: Elastic parts 285: Gap 30: top cover 32: cover body 34: Pressing part 341: Groove 36: perforation 361:Clamping Department 38: Connecting part P1: the first side

第1圖：其為本創作之一實施例之晶片測試裝置之結構示意圖； 第2圖：其為本創作之一實施例之卡扣部及卡固部之卡固狀態示意圖； 第3圖：其為本創作之一實施例之晶片測試裝置之使用狀態示意圖；以及 第4圖：其為本創作之一實施例之晶片測試裝置之結構示意圖。 Figure 1: It is a schematic structural view of a wafer testing device according to an embodiment of the invention; Figure 2: It is a schematic diagram of the fastening state of the buckle part and the fastening part of an embodiment of the invention; Figure 3: It is a schematic diagram of the usage state of the wafer testing device of one embodiment of the present invention; and Fig. 4: It is a schematic structural view of a wafer testing device of an embodiment of the invention.

10:晶片 10: Wafer

11:晶片接腳 11: chip pin

20:基座 20: base

21:第一容置槽 21: The first storage tank

22:本體 22: Ontology

24:限位框 24: limit frame

26:連接器 26: Connector

28:卡扣部 28: buckle part

30:上蓋 30: top cover

32:蓋體 32: cover body

34:壓合部 34: Pressing part

36:穿孔 36: perforation

361:卡固部 361:Clamping Department

P1:第一面 P1: the first side

Claims (9)

一種晶片測試裝置，其係用以檢測一晶片，其一側設有複數個晶片接腳，其包含： 一基座，其係包含一本體，該本體設有一限位框，該限位框設有一第一容置槽，一連接器對應該些個晶片接腳設置於該第一容置槽內，一卡扣部設置於該本體上，並與該第一容置槽相鄰；以及 一上蓋，其係樞接於該基座之一側，該上蓋包含一蓋體及一壓合部，該壓合部凸設於該蓋體之一第一面，該壓合部對應設置於該第一容置槽，該蓋體設有一穿孔，該穿孔內設有一卡固部，該卡固部與該卡扣部相適配。 其中，該連接器電性連接該些個晶片接腳。 A chip testing device is used to test a chip, one side of which is provided with a plurality of chip pins, which includes: A base, which includes a body, the body is provided with a limit frame, the limit frame is provided with a first accommodating groove, and a connector is arranged in the first accommodating groove corresponding to the chip pins, a buckle part is disposed on the body and adjacent to the first receiving groove; and An upper cover, which is pivotally connected to one side of the base, the upper cover includes a cover body and a pressing portion, the pressing portion protrudes from a first surface of the cover body, and the pressing portion is correspondingly arranged on The first accommodating groove, the cover body is provided with a through hole, and a fastening part is arranged in the through hole, and the fastening part is matched with the buckle part. Wherein, the connector is electrically connected to the chip pins. 如請求項1所述之晶片測試裝置，其中該上蓋更包含一連接部，該連接部係固設於該本體之一側，且該連接部之一側樞接於該蓋體之一側。The wafer testing device as claimed in claim 1, wherein the upper cover further includes a connecting portion, the connecting portion is fixed on one side of the main body, and one side of the connecting portion is pivotally connected to one side of the cover. 如請求項1所述之晶片測試裝置，其中該晶片放置於該連接器之上方，該上蓋蓋合於該基座，使該卡扣部穿設該穿孔並卡固於該卡固部，同時使該壓合部壓合於該晶片。The chip testing device as described in claim 1, wherein the chip is placed above the connector, the upper cover is closed on the base, so that the buckle part passes through the through hole and is fastened to the fastening part, and at the same time Pressing the pressing part to the wafer. 如請求項1所述之晶片測試裝置，其中該本體更包含一第二容置槽，該第二容置槽設置於該第一容置槽之一側，該卡扣部設置於該第二容置槽內。The wafer testing device as described in claim 1, wherein the body further includes a second accommodating groove, the second accommodating groove is arranged on one side of the first accommodating groove, and the buckle part is arranged on the second accommodating groove in the storage tank. 如請求項1所述之晶片測試裝置，其中該卡扣部包含一固定件及二彈性件，該二彈性件延伸設置於該固定件之兩側，該二彈性件與該固定件之間分別具有一間隙，其中，該二彈性件經由一擠壓力向該間隙內縮後回彈卡固於該卡固部。The chip testing device as described in claim 1, wherein the buckle part includes a fixing part and two elastic parts, the two elastic parts are extended on both sides of the fixing part, and the two elastic parts and the fixing part are respectively There is a gap, wherein the two elastic parts are retracted into the gap through a pressing force, and then snap back and be fixed on the fastening portion. 如請求項1所述之晶片測試裝置，其中該壓合部面向該第一容置槽之一面設有一溝槽，該溝槽係用以分散給予該晶片之一應力。The wafer testing device as claimed in claim 1, wherein a groove is provided on a surface of the pressing portion facing the first receiving groove, and the groove is used to disperse a stress applied to the wafer. 如請求項1所述之晶片測試裝置，其中該連接器設有一第一檢測部及一第二檢測部，該第一檢測部及該第二檢測部分別設有複數個第一接腳及複數個第二接腳。The chip testing device as described in claim 1, wherein the connector is provided with a first detection part and a second detection part, and the first detection part and the second detection part are respectively provided with a plurality of first pins and a plurality of a second pin. 如請求項7所述之晶片測試裝置，其中該第一檢測部及該第二檢測部之間設有一間隔部。The wafer testing device according to claim 7, wherein a spacer is provided between the first detection part and the second detection part. 如請求項7所述之晶片測試裝置，其中該些個第一接腳與該些個第二接腳係用以與該晶片上之該些個晶片接腳電性連接。The chip testing device as claimed in claim 7, wherein the first pins and the second pins are used to electrically connect with the chip pins on the chip.

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