TWM601197U

TWM601197U - Load dump protection device

Info

Publication number: TWM601197U
Application number: TW109208489U
Authority: TW
Inventors: 柯恩典
Original assignee: 穩得實業股份有限公司
Priority date: 2020-07-03
Filing date: 2020-07-03
Publication date: 2020-09-11

Abstract

本創作提供一種拋負載保護裝置，包括一電源輸入埠、一電源輸出埠、一共模扼流線圈、以及至少一突波保護單元。該共模扼流線圈設置於該電源輸入埠及該電源輸出埠之間，並包括一第一扼流單元以及一第二扼流單元。該第一扼流單元與該電源輸入埠的第一輸入端子、及該電源輸出埠的第一輸出端子構成第一突波抑制迴路，該第二扼流單元與該電源輸入埠的第二輸入端子、及該電源輸出埠的第二輸出端子構成第二突波抑制迴路。該突波保護單元設置於該電源輸入埠及該共模扼流線圈之間，兩端分別連接該第一輸入端子、以及該第二輸入端子構成突波回流迴路。This invention provides a load dump protection device, which includes a power input port, a power output port, a common mode choke coil, and at least one surge protection unit. The common mode choke coil is arranged between the power input port and the power output port, and includes a first choke unit and a second choke unit. The first choke unit, the first input terminal of the power input port, and the first output terminal of the power output port form a first surge suppression loop, and the second choke unit and the second input of the power input port The terminal and the second output terminal of the power output port form a second surge suppression loop. The surge protection unit is arranged between the power input port and the common mode choke coil, and two ends are respectively connected to the first input terminal and the second input terminal to form a surge return loop.

Description

拋負載保護裝置Load dump protection device

本創作有關於一種拋負載保護裝置，特別是指一種可以有效導引、抑制突波並保護內部裝置的拋負載保護裝置。This creation is about a load dump protection device, especially a load dump protection device that can effectively guide, suppress surges and protect internal devices.

拋負載（Load Dump）顧名思義，指的是功率負載在突然斷開瞬間導致後端電器損毀的問題。負載切換瞬變是需要高度重視的電氣危害，因為突然斷開負載很有可能造成電源或主線上其他設備故障，也可能使發電機電壓突增進而產生高壓脈衝波。Load Dump, as the name implies, refers to the problem that the back-end electrical appliances are damaged when the power load is suddenly disconnected. Load switching transients are an electrical hazard that requires great attention, because a sudden disconnection of the load is likely to cause the power supply or other equipment on the main line to malfunction, and it may also cause the generator voltage to increase suddenly and generate high-voltage pulse waves.

如「圖1」所示，在汽車電子設備中，各種電子控制裝置A3-A5和發電機A1之間，會有一個蓄電池A2。正常情況下發電機A1給蓄電池A2充電，但是當線束老化或者接觸不良時，就會碰到蓄電池與電路斷開的情況(如斷路節點X1)。這時候發電機A1輸出端會產生一個脈衝電壓，由於這個脈衝電壓的電壓非常高，持續時間非常長，很有可能會對終端的各種電子控制裝置A3-A5造成很大的損害，這種情況稱之為拋負載。一般脈衝的峰值電壓可以達到120V，最長可以持續400毫秒。As shown in "Figure 1", in automotive electronic equipment, there is a battery A2 between various electronic control devices A3-A5 and generator A1. Under normal circumstances, the generator A1 charges the battery A2, but when the wiring harness is aging or the contact is poor, the battery will be disconnected from the circuit (such as the open node X1). At this time, the output terminal of generator A1 will generate a pulse voltage. Because the voltage of this pulse voltage is very high and the duration is very long, it is likely to cause great damage to the various electronic control devices A3-A5 of the terminal. This is called load dump. Generally, the peak voltage of the pulse can reach 120V and the longest can last for 400 milliseconds.

本創作的目的在於解決電子控制裝置在因應拋負載的情況下提供保護內部電器元件的保護方案。The purpose of this creation is to solve the problem that the electronic control device provides a protection scheme to protect the internal electrical components in the case of load dump.

為達到上述目的，在於提供一種拋負載保護裝置，包括一電源輸入埠、一電源輸出埠、一共模扼流線圈、以及至少一突波保護單元。該電源輸入埠包括一第一輸入端子、以及一第二輸入端子。該電源輸出埠包括一第一輸出端子、以及一第二輸出端子。該共模扼流線圈設置於該電源輸入埠及該電源輸出埠之間。該共模扼流線圈包括一第一扼流單元以及一第二扼流單元，該第一扼流單元的第一輸入端及第一輸出端分別連接至該第一輸入端子、及第一輸出端子以構成第一突波抑制迴路；該第二扼流單元的第二輸入端及第二輸出端分別連接至該第二輸入端子、及第二輸出端子以構成第二突波抑制迴路。該突波保護單元設置於該電源輸入埠及該共模扼流線圈之間，該突波保護單元的兩端分別連接至該第一輸入端子、以及該第二輸入端子以構成突波回流迴路。To achieve the above object, a load dump protection device is provided, which includes a power input port, a power output port, a common mode choke coil, and at least one surge protection unit. The power input port includes a first input terminal and a second input terminal. The power output port includes a first output terminal and a second output terminal. The common mode choke coil is arranged between the power input port and the power output port. The common mode choke coil includes a first choke unit and a second choke unit. The first input end and the first output end of the first choke unit are respectively connected to the first input terminal and the first output The terminal forms a first surge suppression circuit; the second input terminal and the second output end of the second choke unit are respectively connected to the second input terminal and the second output terminal to form a second surge suppression circuit. The surge protection unit is disposed between the power input port and the common mode choke coil, and two ends of the surge protection unit are respectively connected to the first input terminal and the second input terminal to form a surge return loop .

是以，本創作係比起習知技術具有以下的優勢功效：Therefore, this creative department has the following advantages over conventional technology:

1. 本創作透過扼流及回流的設計，可以有效的抑制突波進入內部電路，避免突波造成電子器件的損毀。1. Through the design of choke and return flow, this creation can effectively restrain the surge from entering the internal circuit and avoid the damage of electronic devices caused by the surge.

2. 本創作經由共模扼流線圈的配置分離輸入埠及輸出埠，可以有效的抑制擊穿電流。2. This creation separates the input port and output port through the configuration of the common mode choke coil, which can effectively suppress the breakdown current.

有關本創作之詳細說明及技術內容，現就配合圖式說明如下。The detailed description and technical content of this creation are described below with the drawings.

以下針對本創作舉一具體實施態樣進行說明，請參閱「圖2」，係為本創作拋負載保護裝置的方塊示意圖以及電路圖，如圖所示：The following is a description of a specific implementation of this creation. Please refer to "Figure 2", which is a block diagram and circuit diagram of the load dump protection device for this creation, as shown in the figure:

於本實施例中，提供一種拋負載保護裝置100，該拋負載保護裝置主要100主要係配置於電子控制裝置A3的輸入端，用以抑制由前端發電機A1因蓄電池A2斷路時(如節點X1)所生成的拋負載突波訊號，藉此保護電子控制裝置A3的內部電路。In this embodiment, a load dump protection device 100 is provided. The load dump protection device 100 is mainly configured at the input end of the electronic control device A3 to prevent the front-end generator A1 from being disconnected by the battery A2 (such as node X1). ) The generated load dump surge signal, thereby protecting the internal circuit of the electronic control device A3.

於一可行的實施例中，該拋負載保護裝置100可以設計為單晶片或是直接集成於電路板上而外加設置在電子控制裝置A3的電源前端；於另一可行的實施例中，該拋負載保護裝置100可以與該電子控制裝置A3的電源供應器整合為單晶片或電路板，以保護該電子控制裝置A3的內部電路，該等配置的變化非屬本創作所欲限制的範圍。In a feasible embodiment, the load dump protection device 100 can be designed as a single chip or directly integrated on a circuit board and additionally disposed at the power front end of the electronic control device A3; in another feasible embodiment, the dump The load protection device 100 can be integrated with the power supply of the electronic control device A3 into a single chip or a circuit board to protect the internal circuit of the electronic control device A3. The configuration changes are beyond the scope of the present invention.

接續，以下針對本創作拋負載保護裝置100的詳細電路架構進行說明。請一併參閱「圖3」及「圖4」，係為本創作拋負載保護裝置的方塊示意圖以及電路圖，如圖所示：Continuing, the following describes the detailed circuit architecture of the load dump protection device 100 of the present invention. Please refer to "Figure 3" and "Figure 4", which are the block diagrams and circuit diagrams of the load dump protection device for this creation, as shown in the figure:

本實施例的拋負載保護裝置100於電路的配置上，由輸入端至輸出端之間依序包括一電源輸入埠10、至少一突波保護單元20、一共模扼流線圈30、一低頻濾波電容40、以及一電源輸出埠50。The load dump protection device 100 of this embodiment includes a power input port 10, at least one surge protection unit 20, a common mode choke coil 30, and a low frequency filter in order from the input end to the output end in the circuit configuration. A capacitor 40 and a power output port 50.

所述的電源輸入埠10係用以連接至前端的發電機A1的電源輸出埠、以及蓄電池A2的電源輸入埠，用以接收該發電機A1電源輸出埠所輸出的直流電源。該電源輸入埠10主要包括一第一輸入端子11、以及一第二輸入端子12，該第一輸入端子11於本實施例中係為正電源輸入埠、該第二輸入端子12於本實施例中係為負電源輸入埠(亦可以為接地線連接埠)。The power input port 10 is used to connect to the power output port of the front-end generator A1 and the power input port of the battery A2 to receive the DC power output from the power output port of the generator A1. The power input port 10 mainly includes a first input terminal 11 and a second input terminal 12. The first input terminal 11 is a positive power input port in this embodiment, and the second input terminal 12 is used in this embodiment. The middle system is the negative power input port (it can also be the ground wire connection port).

所述的電源輸出埠50係連接至後端的電子控制裝置A3的輸入埠。該電源輸出埠50包括第一輸出端子51、以及第二輸出端子52，該第一輸出端子51於本實施例中係為正電源輸出埠、該第二輸出端子52於本實施例中係為負電源輸出埠(亦可以為接地線連接埠)。其中，該電源輸出埠50的第一輸出端子51係經由其電路延伸節點通過該共模扼流線圈30耦接至該電源輸入埠10第一輸入端子11的電路延伸節點，通過上述的配置將端子分隔為正端輸入(

)路徑；該電源輸出埠50的第二輸出端子52係經由其電路延伸節點通過該共模扼流線圈30耦接至該電源輸入埠10第二輸入端子12的電路延伸節點，通過上述的配置將端子分隔為負端輸入(

)路徑。 The power output port 50 is connected to the input port of the back-end electronic control device A3. The power output port 50 includes a first output terminal 51 and a second output terminal 52. The first output terminal 51 is a positive power output port in this embodiment, and the second output terminal 52 is in this embodiment. Negative power output port (can also be a ground wire connection port). Wherein, the first output terminal 51 of the power output port 50 is coupled to the circuit extension node of the first input terminal 11 of the power input port 10 through the common mode choke coil 30 through its circuit extension node. The terminals are separated as positive input (

) Path; the second output terminal 52 of the power output port 50 is coupled to the circuit extension node of the second input terminal 12 of the power input port 10 through the common mode choke coil 30 through its circuit extension node, through the above configuration Separate the terminals into negative input (

)path.

所述的突波保護單元20設置於該電源輸入埠10及該共模扼流線圈30之間，該突波保護元件20的二端分別電性連接至該第一輸入端子11所延伸的電路節點、及第二輸入端子12所延伸的電路節點，由該第一輸入端子11、突波保護單元20、及第二輸入端子12構成突波回流迴路。為了更快的反應因拋負載所產生的高壓脈衝，該突波保護單元20較佳應選用瞬態電壓抑制二極體(Transient Voltage Supressor, TVS)，反應速度可以低於1皮秒(pico second)，足以快速的觸發並抑制突波電壓。於一可行的實施例中，可以選用耐受瓦數介於6600至13200瓦特之間的瞬態電壓抑制二極體，該等瞬態電壓抑制二極體所選擇的型號於本創作中不予以限制。於另一可行的實施例中，該瞬態電壓抑制二極體的數量亦可以為二或二以上，以構成初級保護電路及次級保護電路。The surge protection unit 20 is arranged between the power input port 10 and the common mode choke coil 30, and the two ends of the surge protection element 20 are respectively electrically connected to the circuit extended by the first input terminal 11 The node and the circuit node where the second input terminal 12 extends, the first input terminal 11, the surge protection unit 20, and the second input terminal 12 constitute a surge return loop. In order to respond faster to the high voltage pulses generated by load dump, the surge protection unit 20 should preferably use a transient voltage suppressor (TVS), and the response speed can be less than 1 pico second (pico second). ), enough to trigger quickly and suppress the surge voltage. In a feasible embodiment, transient voltage suppression diodes with a withstand wattage between 6600 and 13,200 watts can be selected. The selected models of these transient voltage suppression diodes are not included in this creation. limit. In another feasible embodiment, the number of the transient voltage suppression diodes can also be two or more to form a primary protection circuit and a secondary protection circuit.

所述的共模扼流線圈30係設置於該突波保護單元20的後端，用以抑制瞬間產生的突波進入後端的電源輸出埠50及該電子控制裝置A3。該共模扼流線圈30包括一第一扼流單元31以及一第二扼流單元32，該第一扼流單元31及該第二扼流單元32為匝數及相位互為相同的電感線圈，電流在同相位繞制的電感線圈中產生反向的磁場而相互抵消，以產生第一輸入端子11及第一輸出端子51(第二輸入端子12及第二輸出端子52)之間的電動勢抵抗瞬間的突波電流。該第一扼流單元31的第一輸入端P1及第一輸出端P2分別連接至該電源輸入埠10第一輸入端子11的延伸節點上以及該電源輸出埠50第一輸出端子51的延伸節點上以構成第一突波抑制迴路L1；該第二扼流單元32的第二輸入端P3及第二輸出端P4分別連接至該電源輸入埠10第二輸入端子12的延伸節點上以及該電源輸出埠50第二輸出端子52的延伸節點上以構成第二突波抑制迴路L2。於一可行的實施例中，該共模扼流線圈30的充電時間應高於突波保護單元20的反應時間，可進一步有效的抑制高壓脈衝進入後端的電子控制裝置A3。The common mode choke coil 30 is arranged at the back end of the surge protection unit 20 to suppress the surge that is generated instantaneously from entering the back end power output port 50 and the electronic control device A3. The common mode choke coil 30 includes a first choke unit 31 and a second choke unit 32. The first choke unit 31 and the second choke unit 32 are inductors with the same number of turns and phases. , The currents generate opposite magnetic fields in the inductance coils wound in the same phase and cancel each other to generate the electromotive force between the first input terminal 11 and the first output terminal 51 (the second input terminal 12 and the second output terminal 52) Resist momentary surge current. The first input terminal P1 and the first output terminal P2 of the first choke unit 31 are respectively connected to the extension node of the first input terminal 11 of the power input port 10 and the extension node of the first output terminal 51 of the power output port 50 The above constitutes a first surge suppression loop L1; the second input terminal P3 and the second output terminal P4 of the second choke unit 32 are respectively connected to the extension node of the second input terminal 12 of the power input port 10 and the power supply The extension node of the second output terminal 52 of the output port 50 forms a second surge suppression loop L2. In a feasible embodiment, the charging time of the common mode choke coil 30 should be higher than the response time of the surge protection unit 20, which can further effectively inhibit the high voltage pulse from entering the back-end electronic control device A3.

所述的低頻濾波電容40係設置於該共模扼流線圈30與該電源輸出埠50之間，該低頻濾波電容40的二端分別連接至該電源輸出埠50第一輸出端子51延伸的電路節點上、以及該電源輸出埠50第二輸出端子52延伸的電路節點上，用以消弭第一輸出端子51延伸電路節點及第二輸出端子52延伸電路節點的低頻雜訊。於一可行的實施例中，該低頻濾波電容40的數量可以為一或複數個，於本創作中不予以限制。於一可行的實施例中，該低頻濾波電容40的電容容量係介於0.1至100微法拉，於本創作中不予以限制。The low-frequency filter capacitor 40 is arranged between the common mode choke coil 30 and the power output port 50. Two ends of the low-frequency filter capacitor 40 are respectively connected to the power output port 50 and the first output terminal 51 extends the circuit The node and the circuit node where the second output terminal 52 of the power output port 50 extends are used to eliminate low-frequency noise from the first output terminal 51 extension circuit node and the second output terminal 52 extension circuit node. In a feasible embodiment, the number of the low-frequency filter capacitor 40 can be one or more, which is not limited in this creation. In a feasible embodiment, the capacitance of the low-frequency filter capacitor 40 is between 0.1 and 100 microfarads, which is not limited in this creation.

以下請一併參閱「圖5」，係為本創作中脈衝引流的電流流向示意圖，如圖所示：Please refer to "Figure 5" below, which is a schematic diagram of the current flow of pulse drainage in this creation, as shown in the figure:

於拋負載發生時，此時由該第一輸入端子11將饋入高於額定工作電壓的高壓脈衝，此時高壓脈衝在於第一輸入端子11的電路延伸節點上將產生一相對高壓區；由於共模扼流線圈30的設置，大電流S1於進入時將對共模扼流線圈30的電感線圈進行充電，經由第一突波抑制迴路L1抑制了大電流S1進入第一輸出端子51的速度，藉此增加了進入第一輸出端子51所需的時間；此時突波保護單元20將快速導通，使大電流S1通過突波回流迴路進入第二輸入端子12的電性延伸節點，通過該第二輸入端子12的電性延伸節點回流並釋放高壓脈衝。When a load dump occurs, the first input terminal 11 will feed a high-voltage pulse higher than the rated operating voltage at this time. At this time, the high-voltage pulse will generate a relatively high-voltage area on the circuit extension node of the first input terminal 11; The arrangement of the common mode choke coil 30, the large current S1 will charge the inductance coil of the common mode choke coil 30 when entering, and the speed of the large current S1 entering the first output terminal 51 through the first surge suppression loop L1 is suppressed , Thereby increasing the time required to enter the first output terminal 51; at this time, the surge protection unit 20 will quickly turn on, so that the large current S1 enters the electrical extension node of the second input terminal 12 through the surge return circuit, and passes through the The electrical extension node of the second input terminal 12 returns and releases the high voltage pulse.

綜上所述，本創作透過扼流及回流的設計，可以有效的抑制突波進入內部電路，避免突波造成電子器件的損毀。此外，本創作經由共模扼流線圈的配置分離輸入埠及輸出埠，可以有效的抑制擊穿電流。In summary, this creation can effectively suppress the surge into the internal circuit through the choke and return design, and avoid the damage of electronic devices caused by the surge. In addition, this creation separates the input port and output port through the configuration of the common mode choke coil, which can effectively suppress the breakdown current.

以上已將本創作做一詳細說明，惟以上所述者，僅為本創作之一較佳實施例而已，當不能以此限定本創作實施之範圍，即凡依本創作申請專利範圍所作之均等變化與修飾，皆應仍屬本創作之專利涵蓋範圍內。The above has given a detailed description of this creation, but the above is only a preferred embodiment of this creation, and should not be used to limit the scope of implementation of this creation, that is, everything made in accordance with the scope of the patent application for this creation is equal Changes and modifications should still fall within the scope of the patent for this creation.

A1:發電機 A2:蓄電池 A3:電子控制裝置 A4:電子控制裝置 A5:電子控制裝置 X1:節點 100:拋負載保護裝置 10:電源輸入埠 11:第一輸入端子 12:第二輸入端子 20:突波保護單元 30:共模扼流線圈 31:第一扼流單元 32:第二扼流單元 P1:第一輸入端 P2:第一輸出端 L1:第一突波抑制迴路 P3:第二輸入端 P4:第二輸出端 L2:第二突波抑制迴路 40:低頻濾波電容 50:電源輸出埠 51:第一輸出端子 52:第二輸出端子 S1:大電流A1: Generator A2: Battery A3: Electronic control device A4: Electronic control device A5: Electronic control device X1: Node 100: Load dump protection device 10: Power input port 11: The first input terminal 12: The second input terminal 20: Surge protection unit 30: Common mode choke coil 31: The first choke unit 32: The second choke unit P1: The first input P2: The first output L1: The first surge suppression circuit P3: second input P4: second output L2: The second surge suppression circuit 40: low frequency filter capacitor 50: Power output port 51: The first output terminal 52: second output terminal S1: high current

圖1，習知拋負載電路的方塊示意圖。Figure 1. Block diagram of a conventional load dump circuit.

圖2，係為本創作中拋負載保護裝置的配置示意圖。Figure 2 is a schematic diagram of the configuration of the load dump protection device in this creation.

圖3，係為本創作拋負載保護裝置的方塊示意圖。Figure 3 is a block diagram of this creative load dump protection device.

圖4，係為本創作拋負載保護裝置的電路圖。Figure 4 is the circuit diagram of this creative load dump protection device.

圖5，係為本創作中脈衝引流的電流流向示意圖。Figure 5 is a schematic diagram of the current flow of pulse drainage in this creation.

100:拋負載保護裝置 100: Load dump protection device

10:電源輸入埠 10: Power input port

20:突波保護單元 20: Surge protection unit

30:共模扼流線圈 30: Common mode choke coil

P1:第一輸入端 P1: The first input

P2:第一輸出端 P2: The first output

P3:第二輸入端 P3: second input

P4:第二輸出端 P4: second output

40:低頻濾波電容 40: low frequency filter capacitor

50:電源輸出埠 50: Power output port

Claims

一種拋負載保護裝置，包括：一電源輸入埠，包括一第一輸入端子、以及一第二輸入端子；一電源輸出埠，包括一第一輸出端子、以及一第二輸出端子；一共模扼流線圈，設置於該電源輸入埠及該電源輸出埠之間，該共模扼流線圈包括一第一扼流單元以及一第二扼流單元，該第一扼流單元的第一輸入端及第一輸出端分別連接至該第一輸入端子、及第一輸出端子以構成第一突波抑制迴路，該第二扼流單元的第二輸入端及第二輸出端分別連接至該第二輸入端子、及第二輸出端子以構成第二突波抑制迴路；以及至少一突波保護單元，設置於該電源輸入埠及該共模扼流線圈之間，該突波保護單元的兩端分別連接至該第一輸入端子、以及該第二輸入端子以構成突波回流迴路。 A load dump protection device includes: A power input port including a first input terminal and a second input terminal; A power output port including a first output terminal and a second output terminal; A common mode choke coil is arranged between the power input port and the power output port. The common mode choke coil includes a first choke unit and a second choke unit. The first choke unit The input terminal and the first output terminal are respectively connected to the first input terminal and the first output terminal to form a first surge suppression circuit, and the second input terminal and the second output terminal of the second choke unit are respectively connected to the The second input terminal and the second output terminal form a second surge suppression circuit; and At least one surge protection unit is arranged between the power input port and the common mode choke coil, and both ends of the surge protection unit are respectively connected to the first input terminal and the second input terminal to form a surge Return circuit.

如申請專利範圍第1項所述的拋負載保護裝置，其中，該共模扼流線圈與該電源輸出埠之間設置有一或複數個低頻濾波電容，該低頻濾波電容的二端分別連接至該第一輸出端子、以及該第二輸出端子。For the load dump protection device described in item 1 of the scope of patent application, wherein one or more low-frequency filter capacitors are arranged between the common mode choke coil and the power output port, and two ends of the low-frequency filter capacitor are respectively connected to the The first output terminal and the second output terminal.

如申請專利範圍第2項所述的拋負載保護裝置，其中，該低頻濾波電容的電容容量係介於0.1至100微法拉。For the load dump protection device described in item 2 of the scope of patent application, the capacitance of the low-frequency filter capacitor is between 0.1 and 100 microfarads.

如申請專利範圍第1項所述的拋負載保護裝置，其中，該突波保護單元係為瞬態電壓抑制二極體。The load dump protection device described in item 1 of the scope of patent application, wherein the surge protection unit is a transient voltage suppression diode.

如申請專利範圍第4項所述的拋負載保護裝置，其中，該瞬態電壓抑制二極體的耐受瓦數係介於6600至13200瓦特之間。For the load dump protection device described in item 4 of the scope of patent application, the withstand wattage of the transient voltage suppression diode is between 6600 and 13200 watts.

如申請專利範圍第4項所述的拋負載保護裝置，其中，該瞬態電壓抑制二極體的數量為二。The load dump protection device described in item 4 of the scope of patent application, wherein the number of the transient voltage suppression diode is two.