TWM597551U - Component carrier with electrically reliable bridge with sufficiently thick vertical thickness in through hole of thin dielectric - Google Patents

Component carrier with electrically reliable bridge with sufficiently thick vertical thickness in through hole of thin dielectric Download PDF

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TWM597551U
TWM597551U TW109201179U TW109201179U TWM597551U TW M597551 U TWM597551 U TW M597551U TW 109201179 U TW109201179 U TW 109201179U TW 109201179 U TW109201179 U TW 109201179U TW M597551 U TWM597551 U TW M597551U
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component carrier
layer structure
conductive
hole
electrically insulating
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TW109201179U
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Chinese (zh)
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伊斯迪 艾斯梅
永琴 鐘
竇玉村
惜金 鄭
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奧地利商奧特斯奧地利科技與系統技術有限公司
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Publication of TWM597551U publication Critical patent/TWM597551U/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/486—Via connections through the substrate with or without pins
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
    • H—ELECTRICITY
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/032—Materials
    • H05K2201/0323—Carbon
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09563—Metal filled via
    • H—ELECTRICITY
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09727—Varying width along a single conductor; Conductors or pads having different widths
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    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09736—Varying thickness of a single conductor; Conductors in the same plane having different thicknesses
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09827—Tapered, e.g. tapered hole, via or groove
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09854—Hole or via having special cross-section, e.g. elliptical
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
    • H05K2203/0703—Plating
    • H05K2203/0723—Electroplating, e.g. finish plating
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/10—Using electric, magnetic and electromagnetic fields; Using laser light
    • H05K2203/107—Using laser light
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15—Position of the PCB during processing
    • H05K2203/1572—Processing both sides of a PCB by the same process; Providing a similar arrangement of components on both sides; Making interlayer connections from two sides
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0029—Etching of the substrate by chemical or physical means by laser ablation of inorganic insulating material
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0017—Etching of the substrate by chemical or physical means
    • H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
    • H05K3/0032—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material
    • H05K3/0038—Etching of the substrate by chemical or physical means by laser ablation of organic insulating material combined with laser drilling through a metal layer
    • H—ELECTRICITY
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/422—Plated through-holes or plated via connections characterised by electroless plating method; pretreatment therefor

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Optics & Photonics (AREA)
  • Geometry (AREA)
  • Ceramic Engineering (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

部件承載件(100)，其中，部件承載件(100)包括具有第一主表面(104)和第二主表面(106)的電絕緣層結構(102)、在第一主表面(104)與第二主表面(106)之間延伸穿過電絕緣層結構(102)的通孔(108)、以及連接電絕緣層結構(102)的對通孔(108)進行限界的相對的側壁(116)的導電橋結構(114)，其中，電絕緣層結構(102)的豎向厚度(d)不超過200 µm，並且橋結構(114)的最窄豎向厚度(D)為至少20 µm。A component carrier (100), wherein the component carrier (100) includes an electrically insulating layer structure (102) having a first main surface (104) and a second main surface (106), and the first main surface (104) and A through hole (108) extending through the electrically insulating layer structure (102) between the second main surface (106) and an opposite side wall (116) connecting the electrically insulating layer structure (102) and delimiting the through hole (108) )'S conductive bridge structure (114), wherein the vertical thickness (d) of the electrically insulating layer structure (102) does not exceed 200 µm, and the narrowest vertical thickness (D) of the bridge structure (114) is at least 20 µm.

Description

薄介電質通孔中足夠厚豎向厚度的電可靠橋的部件承載件Component carrier of an electrically reliable bridge with a sufficiently thick vertical thickness in a thin dielectric through hole

本新型涉及一種部件承載件以及一種製造部件承載件的方法。The invention relates to a component carrier and a method for manufacturing the component carrier.

在配備有一個或多個電子部件的部件承載件的產品功能增多、並且這樣的部件的小型化程度提高以及安裝在部件承載件(諸如印刷電路板)上的部件的數量增加的情況下，越來越多地採用具有若干部件的更強大的陣列狀部件或封裝件，這些部件或封裝件具有多個觸點或連接，這些觸點之間的空間甚至更小。操作期間去除這樣的部件和部件承載件自身生成的熱逐漸成為問題。同時，部件承載件應具有機械魯棒性和電可靠性，以甚至能在惡劣條件下運行。所有這些要求均與部件承載件及其組成部分的持續小型化密切相關。 此外，可能有利的是以適當的品質有效地接觸導電層結構和/或嵌入部件承載件中的部件。對於該目的和其他目的，可能有利的是形成可以用銅填充的機械過孔和激光過孔。 可能需要製造具有適當電可靠性的部件承載件。 As product functions of component carriers equipped with one or more electronic components increase, and the degree of miniaturization of such components increases and the number of components mounted on component carriers such as printed circuit boards increases, the more More and more powerful array-like components or packages with several components are used, which have multiple contacts or connections, and the space between these contacts is even smaller. The removal of heat generated by such components and the component carrier itself during operation is gradually becoming a problem. At the same time, the component carrier should have mechanical robustness and electrical reliability to operate even under harsh conditions. All these requirements are closely related to the continued miniaturization of component carriers and their components. Furthermore, it may be advantageous to effectively contact the conductive layer structure and/or the components embedded in the component carrier with appropriate quality. For this and other purposes, it may be advantageous to form mechanical vias and laser vias that can be filled with copper. It may be necessary to manufacture component carriers with proper electrical reliability.

根據本新型的示例實施方式，提供了一種部件承載件，其包括具有第一主表面和第二主表面的電絕緣層結構、在第一主表面與第二主表面之間延伸穿過電絕緣層結構的通孔(特別地為激光通孔)、以及連接電絕緣層結構的對通孔進行限界的相對的側壁的導電橋結構，其中，電絕緣層結構的豎向厚度不超過200 µm，並且橋結構的最窄豎向厚度為至少20 µm。 根據本新型的另一示例實施方式，提供了一種製造部件承載件的方法，其中，方法包括：形成在電絕緣層結構的第一主表面與第二主表面之間延伸的通孔；以及形成連接電絕緣層結構的對通孔進行限界的相對的側壁的導電橋結構；其中，電絕緣層結構的豎向厚度不超過200 µm，並且橋結構的最窄豎向厚度為至少20 µm。 在本申請的上下文中，術語“部件承載件”可以特別地指能在其上和/或其中容納一個或多個部件以提供機械支撐和/或電連接的任何支撐結構。換言之，部件承載件可以構造為部件的機械和/或電子承載件。特別地，部件承載件可以是印刷電路板、有機***件和IC(集成電路)基板中的一種。部件承載件還可以是結合了上述類型的部件承載件中的不同部件承載件的混合板。 在本申請的上下文中，術語“層結構”可以特別地指連續層、圖案化層或公共平面內的多個非連續島狀物。 在本申請的上下文中，術語“通孔”可以特別地指完全延伸穿過整個電絕緣層結構的孔，並且通孔可以特別地且優選地通過激光加工形成。因此，通孔可以是激光通孔。這種通孔可以具有例如從電絕緣層結構的兩個相對的主表面延伸的兩個相反的漸縮部分。可以例如通過結合來自電絕緣層結構的前側和後側即來自其兩個相對的主表面的激光照射來製造通孔。可以從這些側中的每側進行一次或多次激光照射。還可以僅從一個主表面通過激光加工形成通孔。此外，還可以通過除了激光加工以外的方法例如通過等離子處理進行通孔的形成。 在本申請的上下文中，術語“橋結構”可以特別地指在電絕緣層結構的對通孔進行限界的相對的側壁之間大致水平地延伸的導電結構，特別地在通孔的最窄部分處或附近延伸。例如，可以在通孔形成後通過鍍覆形成這種橋結構。在這種鍍覆程序後，之前形成的通孔僅部分地用構成橋結構的導電材料填充，使得橋結構可以在向上方向上由第一分界表面來限界，並且在下側由第二分界表面來限界。第一分界表面和第二分界表面均具有凹形形狀。 根據本新型的示例實施方式，提供了一種用於製造部件承載件的方法，其中，至少部分地用導電材料填充的通孔可以製造為使得部件承載件具有高可靠性。這種可靠性以電可靠性的方式出現，使得可以防止沿著用導電材料填充的通孔延伸的電路徑出現任何不期望的中斷。可靠性還涉及機械可靠性，因為提到的製造通孔——包括其導電填充物——的設計規則不會造成乾擾部件承載件的性能的裂縫。此外，還可以使用所製造的部件承載件來實現適當的熱可靠性，因為即使存在顯著的溫度變化，也將保持通孔的可靠的導電填充。已發現特別是在200 µm厚或更薄的薄型電絕緣層結構中存在通孔的部件承載件特別容易出現可靠性問題。這似乎是由於完全延伸穿過這種薄型電絕緣層結構(諸如薄芯)的通孔的形狀。然而，已經驚人地發現，當連接電絕緣層結構的對通孔進行限界的相對的側壁的橋結構的最窄豎向厚度為20 µm或更大時，則不再出現這種可靠性問題，即使是在厚度不大於200 µm的薄型電絕緣層結構中形成通孔的情況下。因此，上述設計規則顯著提高了薄芯中用銅填充的激光過孔的可靠性。 下面將解釋部件承載件和方法的其他示例實施方式。 在一實施方式中，部件承載件可以包括位於第一主表面上的第一導電層結構以及位於第二主表面上的第二導電層結構。例如，導電層結構可以是圖案化的導電層結構。可以相應地調整該方法。 在另一實施方式中，該方法包括：在電絕緣層結構的主表面中的一個主表面或兩個主表面未用導電層結構覆蓋時在電絕緣層結構中形成通孔。在這種實施方式中(其中電絕緣層結構的相對的主表面中的一個主表面或兩個主表面上的導電層結構可能不是必須的)，通孔可以僅鑽透電絕緣層結構。 在一實施方式中，電絕緣層結構的豎向厚度可以不超過140 µm，特別地不超過110 µm。甚至還可以的是，電絕緣層結構的豎向厚度在介於40 µm至60 µm之間的範圍內。因此，即使在通孔豎向延伸所穿過的電絕緣層結構的厚度非常小，正如在現代部件承載件應用中一樣時，遵循導電橋結構的最小豎向厚度在20 µm或以上的設計規則仍然可以確保部件承載件的可靠性。 在一實施方式中，橋結構的最窄豎向厚度為至少25 µm。已經發現當橋結構的豎向厚度為25 µm或以上時，可以得到甚至更好的可靠性性能。因此，優選但非絕對必要的是25 µm的最小豎向厚度。 在一實施方式中，橋結構的最窄豎向厚度不超過40 µm。還已經驚人地發現，當橋結構的豎向厚度變得太大時，作為上分界表面和下分界表面來對橋結構的窩形或凹形表面進行限界可能變得過淺。在後續通過鍍覆來用導電材料(諸如銅)填充一個或兩個窩形部時可能會出現問題，因為可能有使銅填充的激光過孔形成不期望形狀的傾向。因此，優選的是橋結構的最窄豎向厚度的上限不超過40 µm。 在一實施方式中，通孔的最窄水平寬度不低於30 µm，特別地不低於45 µm。已經驚人地發現，對於得到具有至少部分地用導電填充介質填充的通孔的部件承載件的適當可靠性來說，通孔的最小水平寬度也是重要的設計參數。此外，特別是對於厚度不超過200 µm的薄芯，使通孔的最窄部分(並且因此橋結構的最窄寬度存在於通孔的該最窄部分中)保持在30 µm或以上優選地保持在45 µm或以上對可靠性可能有進一步的積極影響。這樣就可以保證甚至完全填充通孔的該最窄部分。這對所製造的部件承載件的電可靠性以及機械可靠性均有積極的影響。當遵循上述設計規則時，可以顯著降低裂縫的風險。 在一實施方式中，通孔的最窄水平寬度不超過100 µm，特別地不超過75 µm。還已經發現，對於厚度不超過200 µm的薄型電絕緣層結構來說，通孔的最窄水平寬度並且因此通常在通孔的最窄部分處填充通孔的橋結構不應超過100 µm。甚至更優選的是通孔的最窄水平寬度的上限為75 µm。已經發現當明顯超過上述值時，在鍍覆程序期間可能妨礙橋的形成。 在一實施方式中，部件承載件包括填充導電橋結構與第一主表面之間的至少部分容積的第一導電塊體結構。在形成橋結構後(優選地通過繼之前形成種子層之後進行鍍覆來形成)，橋結構的上分界表面上方的保留窩形部或凹部可以部分或全部用另外的導電材料(諸如銅)填充，從而在橋結構的上分界表面上方形成第一導電塊體結構。技術人員已知的是，在部件承載件的截面中，可以適當地看見橋結構與第一塊體結構之間的第一分界表面。用第一導電塊體結構至少部分地填充通孔在橋結構的上分界表面上方的容積可以進一步提高所製造部件承載件的電可靠性。例如，可以在之前用於形成橋結構的鍍覆程序後，通過在該鍍覆程序之後且與其分開的獨立鍍覆程序形成第一導電塊體結構。 在一實施方式中，第一導電塊體結構具有第一沉降部，第一沉降部可以大致位於第一主表面的高度水平上。例如，第一沉降部可以具有小於15 µm的深度。當用第一導電塊體結構僅部分地填充橋結構的第一分界表面上方的凹部時，可以保留沉降部或窩形部。已發現在上述薄芯小於200 µm的情況下，該第一沉降部的最大深度不應超過15 µm。可以顯著提高具有深度低於15 µm的第一沉降部的銅填充的激光過孔抵抗裂縫形成以及降低可靠性的其他現象的魯棒性。 在一實施方式中，第一導電塊體結構由在後續的第一鍍覆階段中形成的多個第一鍍覆層構成。可以通過進行多次後續鍍覆程序來實現形成第一導電塊體結構，使得用導電材料填充橋結構的上分界表面上方的大部分窩形部。技術人員將理解，當分析部件承載件的截面時，可以適當地在視覺上辨別出一起構成第一導電塊體結構的各鍍層。因此，實現一系列的多個鍍覆結構是提高所獲得的部件承載件的可靠性的另一措施。 在一實施方式中，部件承載件包括填充導電橋結構與第二主表面之間的至少部分容積的第二導電塊體結構。此外，第二導電塊體結構可以具有第二沉降部，第二沉降部可以大致位於第二主表面的高度水平上。例如，第二沉降部可以具有小於15 µm的深度。第二導電塊體結構可以由在後續的第二鍍覆階段中形成的多個第二鍍層構成。如上文關於第一導電塊體結構所述，第二導電塊體結構也可以服從所描述的設計規則，以進一步提高所製造部件承載件的可靠性。用第二導電塊體結構的材料至少部分地填充限定橋結構的底端的第二分界表面下方的窩形部是非常有利的，特別是在底側保留的第二沉降部也低於15 µm時。調整用於填充橋結構的第二分界表面下方的窩形部的鍍覆結構的數量是提高可靠性的另外的措施。 在一實施方式中，橋結構的最窄豎向厚度與電絕緣層結構的豎向厚度之間的比率在介於20%至80%之間的範圍內，特別地在介於30%至50%之間的範圍內。利用與上述比對應的設計規則，一方面可以確保橋結構的中間部分被可靠地連接而不包括空隙，並且同時確保橋結構的形狀適合在隨後用導電塊體結構大致完全填充橋結構上方和下方的窩形部。 在一實施方式中，導電橋結構由面朝第一主表面的第一分界界面以及面朝第二主表面的第二分界表面來限界。兩個分界表面均優選地為凹形的，並且可以限定橋結構與導電塊體結構之間的邊界。 在一實施方式中，第一導電層結構的厚度和/或第二導電層結構的厚度小於5 µm，特別地在介於2 µm至4 µm之間的範圍內。特別地，在這種小厚度的情況下，部件承載件的可靠性問題可能特別明顯。然而，當也用相對薄的導電層結構來實行上述關於橋結構的最小厚度的設計規則時，也可以實現高電可靠性。 在一實施方式中，通孔大致為X形。例如，參照部件承載件或其預製件的截面圖，這種大致的X形可以由對應於兩個相對的豎向弓形(其頂點在通孔的中心部分中面向彼此)的側壁線條限定。因此，通孔的形狀也可以表示為豎向蝴蝶結的形狀或鏡像的截錐結構的形狀。如下文將參照圖1和圖2進一步詳細描述的，可以通過結合從電絕緣層結構的前側或上主表面開始的第一激光照射然後從電絕緣層結構的後側或第二主表面開始的單次第二照射得到大致X形的通孔。在許多情況下，隨後形成的橋結構位於大致X形的通孔的最窄部分中。可以不費力地製造這種X形通孔，因為僅兩次激光照射就已足夠。 在另一實施方式中，通孔具有從第一主表面延伸的第一漸縮部分、從第二主表面延伸的第二漸縮部分、以及連接第一漸縮部分與第二漸縮部分的中心連接部分。特別地，中心連接部分可以是通孔的大致柱形的部分。如下文將參照圖3描述的，可以通過從電絕緣層結構的前側或第一主表面開始的第一激光照射然後從電絕緣層結構的後側或第二主表面開始的兩次激光照射實現通孔(其中具有兩個相反的漸縮部分由例如大致圓柱形中心連接部分連接)。因此，通孔的最窄部分可以加寬，這對部件承載件的可靠性來說有進一步積極的影響。 在一實施方式中，電絕緣層結構是完全固化的芯。因此，電絕緣層結構的材料可以使得其樹脂不能再進行交聯。換言之，電絕緣層結構在層壓工藝期間將無法再融或變得可流動，通過層壓工藝可以將外部導電層結構和/或電絕緣層結構層壓在具有通孔的中心層疊置件上。例如，電絕緣層結構可以包括具有增強顆粒(諸如玻璃纖維或玻璃球)的樹脂(諸如環氧樹脂)，例如可以是FR4。 在一實施方式中，橋結構以成一體的方式與覆蓋電絕緣層結構的對通孔進行限界的側壁的鍍層相連接(特別地同時形成)。特別地，這種橋結構可以與鍍層一起形成在種子層上。優選地，首先通過由無電沉積進行的種子層形成來形成橋結構。因此，薄層的導電材料可以覆蓋通孔的側壁。隨後，可以進行鍍覆程序(例如水鍍覆)，使得種子層被厚層的導電材料覆蓋，該厚層的導電材料可以以成一體的方式與大致水平的橋結構相連接。因此，在製造橋結構時，其可以形成連接相對的側壁的大致水平的部分，並可以以成一體的方式與覆蓋電絕緣層結構的對通孔進行限界的側壁的層部件相連接。這樣，具有相連的鍍層的橋結構就可以具有大致為H的形狀。 在一實施方式中，第一導電層結構和第二導電層結構中的至少一個超出電絕緣層結構的對通孔進行限界的至少一個側壁的側向懸伸不超過20 µm，特別地不超過10 µm。這提高了電可靠性，並使形成裂縫和空隙的風險保持較小。在本申請的上下文中，術語“懸伸”可以特別地指導電層結構中緊鄰相應窗口的相應一個導電層結構的局部長度，導電層結構沿著該局部長度側向延伸超出(或以懸臂方式自由懸置)電絕緣層結構。因此，由於在懸伸的導電層結構下方的袋區中存在激光通孔的一部分，相應導電層結構的懸伸材料在懸伸的延伸方向上可能局部不由電絕緣層結構的材料支撐。關於上文所述的懸伸材料可能局部不受支撐，應該說懸伸可能涉及相應導電層結構下方基本不含樹脂的區域。然而，本領域技術人員將理解，在與懸伸相關的間隙內甚至可能存在一些殘留樹脂。為了定量地確定或測量懸伸的值，可以測量在懸伸的導電層結構正下方的基本不含樹脂(其中，樹脂可以指電絕緣層結構)的底切(特別地，即使其不是懸伸的導電層結構(例如銅層)下方回退得最深的點或完全去除)的長度。換言之，為了測量懸伸，可以測量導電層結構正下方的底切。 在一實施方式中，通孔的不同部分以不同陡度漸縮。兩側的每側上相應的較淺或較緩傾斜的外部部分後面可以是相應的較陡的內部部分，其中，外部和內部將被理解為相對於電絕緣層結構的相應主表面。對應形成的延伸穿過電絕緣層結構的通孔可以用導電材料(諸如鍍銅)高效地填充，從而建立穿過電絕緣層結構的電可靠性高的豎向互連件。 在一實施方式中，第一導電塊體結構和第二導電塊體結構中的至少一者是鍍覆結構。在之前描述的用於以成一體的方式連接的鍍層一起形成橋結構的鍍覆程序後，就可以用另外的導電材料(優選地銅)至少部分地填充橋結構上方和下方的一個或兩個窩形部，形成第一導電塊體結構和/或第二導電塊體結構。這可以在之前完成的用於形成包括鍍層的橋結構的鍍覆程序後通過單獨的鍍覆程序完成。因此，第一導電塊體結構和/或第二導電塊體結構可以由一個或多個另外的鍍層構成，通過目視檢查來分析部件承載件的截面圖可以辨別出這些鍍層。限定用於形成導電塊體結構的鍍覆程序的數量使得可以用另外的導電材料填充大部分窩形部，簡單且可靠。 在一實施方案中，部件承載件包括由至少一個電絕緣層結構和至少一個導電層結構構成的疊置件。例如，部件承載件可以是上述一個或多個電絕緣層結構和一個或多個導電層結構構成的層壓體，特別地通過施加機械壓力和/或熱能形成。上述疊置件可以提供能夠為另外的部件提供大安裝表面但仍然非常薄且緊湊的板狀部件承載件。 在一實施方式中，部件承載件成形為板。這有助於緊湊設計，不過其中部件承載件提供用於在其上安裝部件的大基底。此外，特別是作為嵌入式電子部件的示例的裸晶片由於其厚度小而可以方便地嵌入到薄板(諸如印刷電路板)中。 在一實施方式中，部件承載件被構造成由印刷電路板和基板(特別是IC基板)組成的組中的一者。 在本申請的上下文中，術語“印刷電路板”(PCB)可以特別地指板狀部件承載件，其通過將若干導電層結構與若干電絕緣層結構進行層壓——例如通過施加壓力和/或通過供應熱能——而形成。關於PCB技術的優選材料，導電層結構由銅製成(或由另一導電材料製成)，而電絕緣層結構可以包括樹脂和/或玻璃纖維、所謂的預浸材料(諸如FR4材料)。可以形成通過層壓體的通孔——例如通過激光打孔或機械鑽孔形成——並通過用導電材料(特別是銅)填充這些通孔來以期望的方式將各個導電層結構彼此連接，從而形成作為通孔連接的過孔。除了可以嵌入印刷電路板的一個或多個部件中之外，印刷電路板通常被構造成在板狀印刷電路板的一個或兩個相對的表面上容納一個或多個部件。部件可以通過焊接連接至相應的主表面。 PCB的介電質部分可以由具有增強纖維(諸如玻璃纖維)的樹脂構成。 在本申請的上下文中，術語“基板”可以特別地指與待安裝在其上的部件(特別地電子部件)具有大致相同的大小的小型部件承載件。更具體地，基板可以理解為用於電連接或電網絡的承載件以及與印刷電路板(PCB)相當的部件承載件，但側向和/或豎向佈置的連接的密度高得多。側向連接例如為傳導路徑，而豎向連接可以為例如鑽孔。這些側向和/或豎向連接佈置在基板內，並可以用於提供容置部件或未容置部件(諸如裸晶片)(特別是IC芯片)與印刷電路板或中間印刷電路板的電和/或機械連接。因此，術語“基板”還包括“IC基板”。基板的介電質部分可以包括具有增強顆粒(諸如增強球體，特別地玻璃球)的樹脂。 在一實施方式中，該至少一個電絕緣層結構包括由樹脂(諸如增強或非增強樹脂，例如環氧樹脂或雙馬來酰亞胺三嗪樹脂、氰酸酯)、聚亞苯基衍生物、玻璃(特別地玻璃纖維、多層玻璃、玻璃狀材料)、預浸材料(諸如FR-4或FR-5)、聚酰亞胺、聚酰胺、液晶聚合物(LCP)、環氧基增強膜、聚四氟乙烯(Teflon)、陶瓷和金屬氧化物組成的組中的至少一者。也可以使用增強材料，諸如幅材、纖維或球體，例如由玻璃(多層玻璃)製成。雖然剛性PCB通常優選使用預浸材料，特別是FR4，但基板也可以使用其他材料，特別是環氧基增強膜。對於高頻應用，可以在部件承載件中實施高頻材料諸如聚四氟乙烯，液晶聚合物和/或氰酸酯樹脂，低溫共燒陶瓷(LTCC)或其他低、非常低或超低DK材料作為電絕緣層結構。 在一實施方式中，導電層結構中的至少一者包含由銅、鋁、鎳、銀、金、鈀和鎢組成的組中的至少一者。雖然通常優選的是銅，但其他材料或其塗覆形式也是可能的，特別是塗覆有諸如石墨烯之類的超導電材料。 在一實施方式中，部件承載件包括可以表面安裝在部件承載件上和/或可以嵌入其內部的至少一個部件。該至少一個部件可以選自由非導電嵌體、導電嵌體(諸如金屬嵌體，優選地包括銅或鋁)、傳熱單元(例如熱管)、光導元件(例如光波導或光導管連接、電子部件或其組合)組成的組。例如，部件可以是有源電子部件、無源電子部件、電子芯片、存儲裝置(例如DRAM或另一數據存儲器)、濾波器、集成電路、信號處理部件、功率管理部件、光電接口元件、發光二極管、光電耦合器、電壓轉換器(例如DC/ DC轉換器或AC/DC轉換器)、密碼部件、發射器和/或接收器、機電換能器、傳感器、致動器、微機電系統(MEMS)、微處理器、電容器、電阻器、電感、電池、開關、攝像機、天線、邏輯芯片和能量採集單元。然而，可以在部件承載件中嵌入其他部件。例如，可以將磁性元件用作部件。這種磁性元件可以是永磁元件(諸如鐵磁元件、反鐵磁元件、多鐵性元件或鐵淦氧磁元件例如鐵氧體芯)、或者可以是順磁性元件。然而，部件還可以是基板、***件或另外的部件承載件，例如板中板構造。 在一實施方式中，部件承載件是層壓型部件承載件。在這種實施方式中，部件承載件是通過施加壓力和/或熱堆疊並連接在一起的多層結構的複合體。 基板或***件可以由至少一層玻璃、矽(Si)、或者可光成像或可干法蝕刻的有機材料(如環氧基增強膜)、或高分子化合物(如聚酰亞胺、聚苯並噁唑或苯並環丁)組成。 根據下文描述的實施方式的實例將理解本新型的上述方面和其他方面，參考這些實施方式的實例對這些方面進行解釋。 According to an example embodiment of the present invention, there is provided a component carrier including an electrically insulating layer structure having a first major surface and a second major surface, extending through the electrical insulation between the first major surface and the second major surface Layer structure through-holes (particularly laser through-holes), and a conductive bridge structure connected to opposite sidewalls of the electrically insulating layer structure that delimit the through-holes, wherein the vertical thickness of the electrically insulating layer structure does not exceed 200 µm, And the narrowest vertical thickness of the bridge structure is at least 20 µm. According to another example embodiment of the present invention, there is provided a method of manufacturing a component carrier, wherein the method includes: forming a through hole extending between a first main surface and a second main surface of the electrically insulating layer structure; and forming A conductive bridge structure that connects the opposite sidewalls of the electrically insulating layer structure that delimit the through holes; where the vertical thickness of the electrically insulating layer structure does not exceed 200 µm, and the narrowest vertical thickness of the bridge structure is at least 20 µm. In the context of this application, the term "component carrier" may particularly refer to any support structure capable of receiving one or more components thereon and/or therein to provide mechanical support and/or electrical connection. In other words, the component carrier can be configured as a mechanical and/or electronic carrier of the component. In particular, the component carrier may be one of a printed circuit board, an organic interposer, and an IC (integrated circuit) substrate. The component carrier may also be a hybrid plate that combines different component carriers of the component carriers of the above-mentioned type. In the context of this application, the term "layer structure" may specifically refer to a continuous layer, a patterned layer, or a plurality of non-continuous islands in a common plane. In the context of the present application, the term “through hole” may particularly refer to a hole that extends completely through the entire electrically insulating layer structure, and the through hole may be formed particularly and preferably by laser processing. Therefore, the through hole may be a laser through hole. Such a through hole may have, for example, two opposite tapered portions extending from two opposing main surfaces of the electrically insulating layer structure. The through hole can be manufactured, for example, by combining laser irradiation from the front and back sides of the electrically insulating layer structure, that is, from its two opposing main surfaces. One or more laser irradiations can be performed from each of these sides. It is also possible to form a through hole by laser processing from only one main surface. In addition, the formation of the through hole may be performed by a method other than laser processing, for example, by plasma treatment. In the context of the present application, the term "bridge structure" may particularly refer to a conductive structure that extends substantially horizontally between opposite sidewalls of the electrically insulating layer structure that delimit the via, particularly at the narrowest part of the via Extending at or near. For example, such a bridge structure may be formed by plating after the through hole is formed. After this plating process, the previously formed vias are only partially filled with the conductive material constituting the bridge structure, so that the bridge structure can be bounded by the first boundary surface in the upward direction and by the second boundary surface on the lower side Limit. Both the first boundary surface and the second boundary surface have a concave shape. According to an example embodiment of the present invention, there is provided a method for manufacturing a component carrier, wherein a through hole filled at least partially with a conductive material can be manufactured so that the component carrier has high reliability. This reliability occurs in an electrical reliability manner, making it possible to prevent any undesirable interruption of the electrical path extending along the via filled with the conductive material. Reliability also relates to mechanical reliability, because the design rules mentioned for manufacturing vias, including their conductive fillers, do not cause cracks that interfere with the performance of component carriers. In addition, the manufactured component carrier can also be used to achieve proper thermal reliability, because even if there is a significant temperature change, a reliable conductive filling of the via hole will be maintained. It has been found that component carriers with through holes, especially in thin electrical insulation layer structures of 200 µm thick or thinner, are particularly prone to reliability problems. This seems to be due to the shape of the through hole that extends completely through such a thin electrical insulation layer structure, such as a thin core. However, it has been surprisingly found that this reliability problem no longer occurs when the narrowest vertical thickness of the bridge structure connecting the opposite sidewalls of the electrically insulating layer structure that delimit the through holes is 20 µm or more, Even in the case where through holes are formed in a thin electrically insulating layer structure with a thickness not greater than 200 µm. Therefore, the above design rules significantly increase the reliability of laser vias filled with copper in the thin core. Other example embodiments of component carriers and methods will be explained below. In an embodiment, the component carrier may include a first conductive layer structure on the first main surface and a second conductive layer structure on the second main surface. For example, the conductive layer structure may be a patterned conductive layer structure. The method can be adjusted accordingly. In another embodiment, the method includes forming a through hole in the electrically insulating layer structure when one or both of the major surfaces of the electrically insulating layer structure are not covered with the conductive layer structure. In such an embodiment (where the conductive layer structure on one or both of the opposing main surfaces of the electrically insulating layer structure may not be necessary), the through hole may be drilled through the electrically insulating layer structure only. In one embodiment, the vertical thickness of the electrically insulating layer structure may not exceed 140 µm, in particular not more than 110 µm. It is even possible that the vertical thickness of the electrically insulating layer structure is in the range between 40 µm and 60 µm. Therefore, even when the thickness of the electrically insulating layer structure through which the through hole extends vertically is very small, as in the modern component carrier application, the design rule of the minimum vertical thickness of the conductive bridge structure is 20 µm or more The reliability of the component carrier can still be ensured. In one embodiment, the narrowest vertical thickness of the bridge structure is at least 25 µm. It has been found that when the vertical thickness of the bridge structure is 25 µm or more, even better reliability performance can be obtained. Therefore, the preferred but not absolutely necessary is a minimum vertical thickness of 25 µm. In one embodiment, the narrowest vertical thickness of the bridge structure does not exceed 40 µm. It has also been surprisingly found that when the vertical thickness of the bridge structure becomes too large, it may become too shallow to delimit the concave or concave surface of the bridge structure as an upper boundary surface and a lower boundary surface. A problem may arise when subsequently filling one or two dimples with conductive material (such as copper) by plating, because there may be a tendency for the copper-filled laser via to form an undesirable shape. Therefore, it is preferable that the upper limit of the narrowest vertical thickness of the bridge structure does not exceed 40 µm. In one embodiment, the narrowest horizontal width of the through hole is not less than 30 µm, especially not less than 45 µm. It has surprisingly been found that the minimum horizontal width of the through-hole is also an important design parameter for obtaining proper reliability of the component carrier with the through-hole filled at least partially with a conductive filling medium. In addition, especially for thin cores with a thickness not exceeding 200 µm, keeping the narrowest part of the through hole (and therefore the narrowest width of the bridge structure present in this narrowest part of the through hole) at 30 µm or more is preferably maintained At 45 µm or more, there may be a further positive effect on reliability. This ensures that the narrowest part of the through hole is even completely filled. This has a positive effect on the electrical and mechanical reliability of the manufactured component carrier. When following the above design rules, the risk of cracks can be significantly reduced. In one embodiment, the narrowest horizontal width of the through hole does not exceed 100 µm, in particular does not exceed 75 µm. It has also been found that for thin electrically insulating layer structures with a thickness not exceeding 200 µm, the narrowest horizontal width of the via hole and therefore the bridge structure that normally fills the via hole at the narrowest part of the via hole should not exceed 100 µm. Even more preferably, the upper limit of the narrowest horizontal width of the through hole is 75 µm. It has been found that when the above values are significantly exceeded, the formation of bridges may be hindered during the plating procedure. In one embodiment, the component carrier includes a first conductive bulk structure that fills at least a portion of the volume between the conductive bridge structure and the first major surface. After the bridge structure is formed (preferably by plating after forming the seed layer before), the remaining dimples or recesses above the upper boundary surface of the bridge structure may be partially or fully filled with another conductive material (such as copper) , Thereby forming a first conductive bulk structure above the upper boundary surface of the bridge structure. It is known to the skilled person that in the section of the component carrier, the first boundary surface between the bridge structure and the first block structure can be properly seen. At least partially filling the volume of the via hole above the upper boundary surface of the bridge structure with the first conductive bulk structure can further improve the electrical reliability of the manufactured component carrier. For example, the first conductive bulk structure may be formed by an independent plating process after and separately from the plating process used to form the bridge structure. In one embodiment, the first conductive block structure has a first settling portion, and the first settling portion may be located approximately at the height level of the first main surface. For example, the first settlement may have a depth of less than 15 µm. When the concave portion above the first boundary surface of the bridge structure is only partially filled with the first conductive bulk structure, the settlement portion or the dimple portion may remain. It has been found that in the case where the above thin core is less than 200 µm, the maximum depth of the first settlement should not exceed 15 µm. The robustness of copper-filled laser vias with a first settling depth of less than 15 µm against crack formation and other phenomena that reduce reliability can be significantly improved. In one embodiment, the first conductive bulk structure is composed of a plurality of first plating layers formed in the subsequent first plating stage. The formation of the first conductive bulk structure can be achieved by performing multiple subsequent plating procedures so that most of the dimples above the upper boundary surface of the bridge structure are filled with conductive material. The skilled person will understand that when analyzing the cross section of the component carrier, it is possible to appropriately visually discern the respective plating layers that together constitute the first conductive bulk structure. Therefore, realizing a series of multiple plating structures is another measure to improve the reliability of the obtained component carrier. In one embodiment, the component carrier includes a second conductive bulk structure that fills at least a portion of the volume between the conductive bridge structure and the second major surface. In addition, the second conductive block structure may have a second settling portion, and the second settling portion may be located substantially at the height level of the second main surface. For example, the second settlement may have a depth of less than 15 µm. The second conductive bulk structure may be composed of multiple second plating layers formed in the subsequent second plating stage. As described above with respect to the first conductive bulk structure, the second conductive bulk structure can also obey the described design rules to further improve the reliability of the manufactured component carrier. It is very advantageous to at least partially fill the dimples below the second boundary surface defining the bottom end of the bridge structure with the material of the second conductive bulk structure, especially when the second settlement remaining on the bottom side is also below 15 µm . Adjusting the number of plated structures used to fill the dimples below the second boundary surface of the bridge structure is an additional measure to improve reliability. In one embodiment, the ratio between the narrowest vertical thickness of the bridge structure and the vertical thickness of the electrically insulating layer structure is in the range between 20% and 80%, in particular between 30% and 50 Within the range between %. Using the design rules corresponding to the above ratios, on the one hand, it can be ensured that the middle part of the bridge structure is reliably connected without including voids, and at the same time, the shape of the bridge structure is suitable for subsequently filling the bridge structure with conductive block structure substantially completely above and below Of the dimple. In one embodiment, the conductive bridge structure is bounded by a first boundary interface facing the first major surface and a second boundary surface facing the second major surface. Both boundary surfaces are preferably concave and may define the boundary between the bridge structure and the conductive bulk structure. In one embodiment, the thickness of the first conductive layer structure and/or the thickness of the second conductive layer structure is less than 5 µm, in particular in the range between 2 µm and 4 µm. In particular, in the case of such a small thickness, the reliability problem of the component carrier may be particularly obvious. However, when the above-mentioned design rules regarding the minimum thickness of the bridge structure are also implemented with a relatively thin conductive layer structure, high electrical reliability can also be achieved. In one embodiment, the through hole is substantially X-shaped. For example, referring to the cross-sectional view of the component carrier or its preform, such a general X shape may be defined by the side wall lines corresponding to two opposing vertical arches whose vertices face each other in the central portion of the through hole. Therefore, the shape of the through hole can also be expressed as the shape of a vertical bow or the shape of a truncated cone with a mirror image. As will be described in further detail below with reference to FIGS. 1 and 2, the first laser irradiation from the front side or upper main surface of the electrically insulating layer structure may be combined and then from the rear side or second main surface of the electrically insulating layer structure. A single second irradiation results in a substantially X-shaped through hole. In many cases, the subsequently formed bridge structure is located in the narrowest part of the substantially X-shaped through hole. Such X-shaped through-holes can be manufactured effortlessly, because only two laser irradiations are sufficient. In another embodiment, the through hole has a first tapered portion extending from the first main surface, a second tapered portion extending from the second main surface, and a portion connecting the first tapered portion and the second tapered portion The central connection part. In particular, the central connection portion may be a substantially cylindrical portion of the through hole. As will be described below with reference to FIG. 3, it can be achieved by first laser irradiation from the front side or first main surface of the electrically insulating layer structure and then two laser irradiations from the rear side or second main surface of the electrically insulating layer structure A through hole (where two opposite tapered portions are connected by, for example, a substantially cylindrical central connecting portion). Therefore, the narrowest part of the through hole can be widened, which has a further positive effect on the reliability of the component carrier. In one embodiment, the electrically insulating layer structure is a fully cured core. Therefore, the material of the electrically insulating layer structure can prevent the resin from being crosslinked. In other words, the electrically insulating layer structure will no longer melt or become flowable during the lamination process, and the outer conductive layer structure and/or the electrically insulating layer structure can be laminated on the central laminate with through holes through the lamination process . For example, the electrically insulating layer structure may include a resin (such as epoxy resin) with reinforcing particles (such as glass fiber or glass balls), which may be FR4, for example. In one embodiment, the bridge structure is connected in an integrated manner to a plating layer covering the side wall delimiting the through hole of the electrically insulating layer structure (in particular, simultaneously formed). In particular, this bridge structure can be formed on the seed layer together with the plating layer. Preferably, the bridge structure is first formed by seed layer formation by electroless deposition. Therefore, a thin layer of conductive material can cover the sidewall of the through hole. Subsequently, a plating process (for example, water plating) may be performed so that the seed layer is covered with a thick layer of conductive material, which may be connected to the substantially horizontal bridge structure in an integrated manner. Therefore, when manufacturing the bridge structure, it can form a substantially horizontal portion connecting the opposite side walls, and can be connected in an integrated manner to the layer member covering the side walls delimiting the through holes of the electrically insulating layer structure. In this way, the bridge structure with connected plating layers can have a substantially H shape. In an embodiment, at least one of the first conductive layer structure and the second conductive layer structure exceeds the lateral overhang of at least one side wall delimiting the through hole of the electrically insulating layer structure by no more than 20 µm, in particular no more than 10 µm. This improves electrical reliability and keeps the risk of cracks and voids small. In the context of the present application, the term "cantilever" may specifically guide the local length of a corresponding one of the conductive layer structures in the electrical layer structure immediately adjacent to the corresponding window, the conductive layer structure extending laterally beyond this partial length (or in a cantilever manner) Freely suspended) electrically insulating layer structure. Therefore, since a part of the laser through hole exists in the pocket area under the overhanging conductive layer structure, the overhanging material of the corresponding conductive layer structure may not be partially supported by the material of the electrically insulating layer structure in the overhanging extension direction. Regarding the above-mentioned overhang material may be partially unsupported, it should be said that the overhang may involve an area substantially free of resin under the corresponding conductive layer structure. However, those skilled in the art will understand that there may even be some residual resin in the gap associated with the overhang. In order to quantitatively determine or measure the value of overhang, the undercut (in particular, even if it is not overhang) that is substantially free of resin (wherein resin can refer to an electrically insulating layer structure) directly under the overhanging conductive layer structure can be measured The length of the deepest point under the conductive layer structure (such as the copper layer) that recedes or is completely removed). In other words, in order to measure the overhang, the undercut directly below the conductive layer structure can be measured. In one embodiment, different parts of the through hole taper with different steepness. The corresponding shallower or more gently inclined outer parts on each of the two sides can be followed by correspondingly steeper inner parts, where the outer and inner parts will be understood relative to the respective main surfaces of the electrically insulating layer structure. Correspondingly formed through holes extending through the electrically insulating layer structure can be efficiently filled with a conductive material, such as copper plating, thereby establishing a highly reliable vertical interconnection through the electrically insulating layer structure. In one embodiment, at least one of the first conductive bulk structure and the second conductive bulk structure is a plated structure. After the previously described plating procedure for connecting the plating layers in an integrated manner to form the bridge structure together, one or both of the bridge structure above and below can be at least partially filled with additional conductive material, preferably copper The dimples form a first conductive block structure and/or a second conductive block structure. This can be done by a separate plating process after the plating process that was previously completed for forming the bridge structure including the plating layer. Therefore, the first conductive bulk structure and/or the second conductive bulk structure may be composed of one or more additional plating layers, which can be identified by visual inspection to analyze the cross-sectional view of the component carrier. Limiting the number of plating procedures used to form the conductive bulk structure makes it possible to fill most of the dimples with additional conductive material, which is simple and reliable. In one embodiment, the component carrier includes a stack of at least one electrically insulating layer structure and at least one conductive layer structure. For example, the component carrier may be a laminate of one or more electrically insulating layer structures and one or more conductive layer structures described above, especially formed by applying mechanical pressure and/or thermal energy. The stack described above can provide a plate-shaped component carrier that can provide a large mounting surface for additional components but is still very thin and compact. In one embodiment, the component carrier is shaped as a plate. This facilitates a compact design, but where the component carrier provides a large base for mounting components on it. In addition, a bare wafer, which is an example of an embedded electronic component, can be easily embedded in a thin board (such as a printed circuit board) because of its small thickness. In an embodiment, the component carrier is configured as one of the group consisting of a printed circuit board and a substrate (especially an IC substrate). In the context of this application, the term "printed circuit board" (PCB) may particularly refer to a plate-shaped component carrier, which is formed by laminating several conductive layer structures with several electrically insulating layer structures-for example by applying pressure and/or Or by supplying thermal energy. Regarding the preferred material for PCB technology, the conductive layer structure is made of copper (or made of another conductive material), while the electrically insulating layer structure may include resin and/or fiberglass, so-called prepreg material (such as FR4 material). It is possible to form through-holes through the laminate-for example by laser drilling or mechanical drilling-and to connect the respective conductive layer structures to each other in a desired manner by filling these through-holes with conductive materials, especially copper, Thus, a via hole connected as a via hole is formed. In addition to being embedded in one or more components of the printed circuit board, the printed circuit board is generally configured to receive one or more components on one or two opposing surfaces of the plate-shaped printed circuit board. Components can be connected to the corresponding main surface by welding. The dielectric portion of the PCB may be composed of resin with reinforcing fibers, such as glass fibers. In the context of the present application, the term "substrate" may particularly refer to a small component carrier having approximately the same size as the components to be mounted thereon (particularly electronic components). More specifically, a substrate can be understood as a carrier for electrical connections or electrical networks and a component carrier equivalent to a printed circuit board (PCB), but the density of connections arranged laterally and/or vertically is much higher. The lateral connection is, for example, a conduction path, and the vertical connection may be, for example, a drilled hole. These lateral and/or vertical connections are arranged in the substrate, and can be used to provide electrical and electrical power between the housed or unaccommodated parts (such as bare wafers) (especially IC chips) and the printed circuit board or the intermediate printed circuit board /Or mechanical connection. Therefore, the term "substrate" also includes "IC substrate". The dielectric portion of the substrate may include resin with reinforcing particles, such as reinforcing spheres, especially glass spheres. In one embodiment, the at least one electrically insulating layer structure includes a resin (such as reinforced or non-reinforced resin, such as epoxy resin or bismaleimide triazine resin, cyanate ester), polyphenylene derivatives , Glass (especially glass fiber, multilayer glass, glass-like materials), prepreg materials (such as FR-4 or FR-5), polyimide, polyamide, liquid crystal polymer (LCP), epoxy-based reinforced film , Polytetrafluoroethylene (Teflon), ceramics and metal oxides at least one of the group. Reinforcing materials such as webs, fibers or spheres can also be used, for example made of glass (multilayer glass). Although rigid PCBs are generally preferred to use prepreg materials, especially FR4, other materials can also be used for the substrate, especially epoxy-based reinforced films. For high frequency applications, high frequency materials such as polytetrafluoroethylene, liquid crystal polymers and/or cyanate resins, low temperature co-fired ceramics (LTCC) or other low, very low or ultra low DK materials can be implemented in the component carrier As an electrically insulating layer structure. In one embodiment, at least one of the conductive layer structures includes at least one of the group consisting of copper, aluminum, nickel, silver, gold, palladium, and tungsten. Although copper is generally preferred, other materials or their coating forms are also possible, especially coated with superconducting materials such as graphene. In an embodiment, the component carrier includes at least one component that can be surface mounted on the component carrier and/or can be embedded therein. The at least one component may be selected from a non-conductive inlay, a conductive inlay (such as a metal inlay, preferably including copper or aluminum), a heat transfer unit (such as a heat pipe), a light guide element (such as an optical waveguide or light pipe connection, an electronic component Or a combination thereof). For example, the components may be active electronic components, passive electronic components, electronic chips, storage devices (such as DRAM or another data memory), filters, integrated circuits, signal processing components, power management components, optoelectronic interface components, light emitting diodes , Optocouplers, voltage converters (such as DC/DC converters or AC/DC converters), cryptographic components, transmitters and/or receivers, electromechanical transducers, sensors, actuators, microelectromechanical systems (MEMS ), microprocessors, capacitors, resistors, inductors, batteries, switches, cameras, antennas, logic chips and energy harvesting units. However, other components can be embedded in the component carrier. For example, a magnetic element can be used as a component. Such a magnetic element may be a permanent magnetic element (such as a ferromagnetic element, an antiferromagnetic element, a multiferroic element, or a ferromagnetic element such as a ferrite core), or may be a paramagnetic element. However, the component may also be a base plate, an insert or another component carrier, such as a board-in-board configuration. In one embodiment, the component carrier is a laminated component carrier. In this embodiment, the component carrier is a multi-layer structure composite body stacked and connected together by applying pressure and/or heat. The substrate or interposer can be made of at least one layer of glass, silicon (Si), or photo-imageable or dry-etchable organic materials (such as epoxy-based enhancement films), or high molecular compounds (such as polyimide, polybenzo Oxazole or benzocyclobutadiene). The above-mentioned aspects and other aspects of the present invention will be understood from examples of embodiments described below, and these aspects are explained with reference to examples of these embodiments.

在參考附圖更詳細地描述示例實施方式之前，將總結一些基本考量，基於這些考量展開了本新型的示例實施方式。 根據本新型的示例實施方式，提供了具有用導電材料填充的通孔的部件承載件，其中，連接薄型電絕緣層結構的對通孔進行限界的相對的側壁且豎向厚度不超過100 µm的水平橋結構優選地形成有20 µm優選地25 µm或以上的最小橋厚度。實驗證明，得到的部件承載件的可靠性會較高。 根據優選實施方式，在通孔激光打孔後可以維持最大和最小中間直徑標準，並且在鍍覆特別是衝擊鍍或閃鍍後可以調整最小橋厚度，以確保可靠的通孔橋接和良好的鍍覆可靠性。在過孔填充之前的可靠(優選地100%可靠)橋接證明對於確保鍍覆可靠性是非常有利的。在優選實施方式中，通孔的中間直徑不應大於75 µm。還證明優選的是通孔的中間直徑不應小於25 µm。還可以適當地規定最小橋接厚度，特別地為至少20 µm或優選地至少25 µm，以確保適當的(優選地100%)橋接。描述性來說，可以調節充足的橋接厚度，以確保完全橋接，即，由連接電絕緣層結構的對通孔進行限界的相對的側壁的導電材料來形成橋。 因此，可以得到按照通孔技術製造的適合的部件承載件。這種部件承載件可以特別有利地用於特別是在中心芯構造中嵌入一個或多個部件(諸如半導體芯片)。 當中間直徑在介於45 µm至75 µm之間且最小橋厚度為至少25 µm時，在所製造的部件承載件的可靠性方面可以得到非常良好的結果。這可以確保通過鍍覆可靠完整地形成橋結構，其中，橋結構連接電絕緣層結構的對通孔進行限界的相對的側壁，特別是在通孔的最窄部分。通過確保完全橋接，可以使內含物和/或空隙的風險以及部件承載件出現可靠性失效的風險非常小。 圖1至圖3示出了根據本新型的示例實施方式的在進行通過從相對的側開始的多次激光照射處理製造具有圖2和圖3所示通孔108的部件承載件100的方法期間得到的結構的截面圖。 如圖1所示，製造方法的起點是疊置件159，疊置件包括在電絕緣層結構102的第一主表面104上的第一導電層結構110。疊置件159還包括位於電絕緣層結構102的第二主表面106上的第二導電層結構112。 例如，電絕緣層結構102可以包括樹脂(諸如環氧樹脂)，樹脂可選地還包括增強顆粒，諸如玻璃纖維、玻璃顆粒或其他填充顆粒。例如，電絕緣層結構102的材料可以是預浸材料。導電層結​​構110、112可以是銅層，特別地為銅箔。例如，電絕緣層結構102的厚度可以低於60 µm，導電層結構110、112的厚度d1、d2各自可以小於5 µm。 為了得到圖1所示的層結構，可以對被第一導電層結構110覆蓋的電絕緣層結構102的前側或第一主表面104進行第一激光處理。為此，可以進行第一激光照射111，以在第一導電層結構110中形成通孔或窗口，並在電絕緣層結構102中形成盲孔113。盲孔113由電絕緣層結構102的側壁116和底壁161來限界。 應注意，第一照射111期間激光能量和持續時間不能過度，使得盲孔113不會達到第二導電層結構112。否則，可能出現不期望的效果，諸如激光反射等。描述性來說，盲孔113隨後可以形成通孔108的第一漸縮部分130，如圖2或圖3所示。 參照圖2，可以通過在根據圖1用一次激光照射從第一主表面104開始進行第一激光打孔後用一次激光照射從第二主表面106進行第二激光打孔來完成通孔108的形成。由於這種後側激光打孔，在第二導電層結構112中形成了通孔或窗口，並且使盲孔113延伸，直到其形成在電絕緣層結構102的第一主表面104與第二主表面106之間延伸的通孔108。如圖2所示，通孔108具有從第一主表面104延伸的第一漸縮部分130以及從第二主表面106延伸的第二漸縮部分132。第一漸縮部分130和第二漸縮部分132在通孔108的中心的最窄部分處彼此會合。 為了得到圖2所示的結構，可以對在進行參照圖1描述的程序後所得到的結構進行從電絕緣層結構102的後側或第二主表面106開始的第二激光照射115。因此，形成了通過第二導電層結構112的通孔，並通過激光能量移除了電絕緣層結構102的額外的材料，直到使之前形成的盲孔113從底側延伸進入通孔108。根據圖2的該通孔108具有大致為X的形狀，並可以在隨後直接進行用導電填充介質(諸如銅)填充的程序(參見圖6)。形成根據圖2的通孔108是非常高效的，並且因此特別適合在工業規模上加工，因為僅使用兩次激光照射就足以形成通孔。 可替代地，可以在用導電填充介質(諸如銅)填充通孔108之前從後側進行另外的激光打孔程序。現在將參照圖3描述後面提到的實施方式。 參照圖3，通過在用根據圖1的一次激光照射從第一主表面104進行第一激光打孔以及在進行根據圖2的從第二主表面106開始的第二激光打孔後從後側進行第三激光照射117來修整通孔108的形狀，特別地修整通孔的中心部分的形狀。 因此，替代參照圖2描述的程序，還可以從電絕緣層結構102的後側或第二主表面106進行額外的第三激光照射117，以精修通孔108的形狀。這種第三激光照射117可以移除特別是在電絕緣層結構102的中心部分中的材料，以形成夾在兩個漸縮部分130、132之間的大致柱形的中心部分134。雖然用於形成具有根據3的形狀的通孔108的製造程序相比於圖2需要額外的第三激光照射117，但該形狀可以進一步提高所製造部件承載件100的可靠性。 圖4示出了與圖2類似的結構，並示出了通孔108的最窄部分的有利尺寸。如圖4所示，參照圖1和圖2描述的製造程序的結果是這樣的通孔108：具有大致為X形，並且在通孔108的兩個相對的側壁116之間具有最窄寬度w。當然，從每側開始的開口的V形錐體或截錐的大小、深度值可以不同。 圖5示出了與圖3類似的結構，並示出了通孔108的最窄部分的有利尺寸。如圖5所示，參照圖1、圖2和圖3描述的製造程序形成這樣的通孔108：具有大致圓柱形中心部分134，大致圓柱形中心部分具有最窄寬度w。 圖6示出了根據本新型的示例實施方式的基於與圖4類似的結構形成的並在用導電填充材料填充通孔108後得到的部件承載件100(由各種部分構成，如下所述)。還將解釋通孔108及其導電填充物的各種結構參數的有利尺寸。 為了得到圖6所示的部件承載件100，對根據圖2和圖4的通孔108進行用導電填充介質(諸如銅)填充通孔的第一程序。為了完成這一點，優選的是首先進行無電沉積程序，從而形成直接覆蓋電絕緣層結構102的對通孔108進行限界的介電質側壁116的銅質薄型種子層140。這可以在圖6的細節圖119中看見。種子層140的厚度可以例如為0.5 µm。然而，還可能的是，種子層具有1 µm以上的厚度和/或設置若干累積種子層。例如，種子層的厚度或多個種子層的累積厚度可以在介於0.5 µm至5 µm之間的範圍內。當設置多個種子層時，其可以包括有機(例如聚合物)層、鈀層和/或銅層。 隨後，可以通過鍍覆程序特別是通過水鍍覆在種子層140上沉積另外的導電材料(諸如銅)。因此，可以用由導電填充介質(諸如銅)製成的較厚鍍層142覆蓋側壁116和導電層結構110、112。例如，鍍層142可以具有10 µm的厚度。 繼續鍍覆程序，以形成具有連接電絕緣層結構102的對通孔108進行限界的相對的側壁116的大致水平部分的導電橋結構114。鍍層142和橋結構114可以形成大致H形的一體式結構。如所示出的，導電橋結構114形成為由向上定向或面朝第一主表面104的上第一分界表面136和由向下定向或面朝第二主表面106的下第二分界表面138進行限界。可以通過水鍍覆優選地隨後形成上文所述的種子層140來形成導電橋結構114。橋結構114在電絕緣層結構102的對通孔108進行限界的相對的側壁116之間形成大致水平的橋。 因此，通過繼續鍍覆程序，在通孔108的最窄部分形成了大致水平的連接相對的側壁116的橋結構114。橋結構114的凹形上限製表面對應於第一分界表面136，而橋結構的下凹形限製表面對應於第二分界表面138。 因此，用大致H形的導電結構填充通孔108，該導電結構由結合有四個臂的橋結構114形成，在圖6的截面圖中，所述四個臂從橋結構114延伸，對應於鍍層142。 仍然參照圖6，形成填充第一分界表面136與第一主表面104之間的大部分的第一導電塊體結構118以及填充第二分界表面138與第二主表面106之間的大部分的第二導電塊體結構120。可以通過在之前的形成橋結構114的鍍覆程序後進行一次或多次另外的水鍍覆程序來完成這一點。如細節圖121所示，第一導電塊體結構118由在之後的第一鍍覆階段中形成的多個第一鍍層126構成。如細節圖123對應所示，第二導電塊體結構120由在後續的第二鍍覆階段中形成的多個第二鍍層128構成。因此，通過進行一次或多次另外的鍍覆程序可以得到根據圖6的部件承載件100。從而可以得到塊體結構118、120，塊體結構可以例如由銅組成。 在所示實施方式中，分別在所示部件承載件100的上側或下側保留小的沉降部122、124。在其他實施方式中，塊體結構118、120幾乎完全填充在第一分界表面136上方以及第二分界表面138下方的保留凹部。應該說，技術人員熟知的是，當對部件承載件100的截面進行作圖時可以清楚地看見分界表面136、138。 所描述的製造程序的結果是得到了根據本新型的示例實施方式的具有高電可靠性的部件承載件100。高可靠性特別地是由於圖1至圖6所示的參數組合的具體選擇。參數選擇非常有利的方面是電絕緣層結構102的豎向厚度小，不超過200 µm，例如甚至低於60 µm，並且橋結構114的最窄豎向厚度D為至少20 µm，優選地至少25 µm。同時，有利的是橋結構114的豎向厚度D不超過40 µm。通孔108的最窄水平寬度w優選地不應超過75 µm。此外還發現有利的是通孔108的最窄水平寬度w不小於45 µm。在第一導電塊體結構118具有大致在第一主表面104的高度水平上的第一沉降部122的情況下，有利的是第一沉降部122具有小於15 µm的深度l。這也適用於第二導電塊體結構120的第二沉降部124的深度L。 在下文中，將進一步詳細描述提到的若干設計參數，這些設計參數可能促成圖6所示部件承載件100的高可靠性。這種高可靠性相當於通孔108內部中形成裂縫的傾向小的事實。填充通孔108的大部分的導電填充介質的內部形成空隙的傾向也小，這對於使電信號或功率可靠地傳導通過銅填充的通孔108有積極影響。應說明的是，厚度小的電絕緣層結構102——其可以例如是完全固化的FR4材料芯——的可靠性問題特別顯著。由於在所示實施方式中，厚度d不超過200 µm，因此可靠性問題顯著。然而，可以採取以下措施來克服可靠性問題，即使是用厚度d≤ 100µm的薄芯。 參照圖6，優選的是橋結構114的最小豎向厚度D為至少20 µm。如果不符合該設計規則，則存在橋結構114的中間部分無法適當連接的風險，並且存在該區域中有空隙的風險。同時，橋結構114的最小豎向厚度D不應超過40 µm。否則，分界表面136上方和分界表面138下方的窩形部可能太淺，使得在形成導電塊體結構118、120期間通過鍍覆填充這些窩形部的後續程序可能產生不期望或不良的形狀。 此外，現在特別參照圖4和圖5，最窄水平寬度w應在30 µm至100 µm之間的範圍內，優選地在介於45 µm至75 µm之間的範圍內。如果寬度w過大，則橋的形成可能會引起問題。如果寬度w的值過小，則可能存在過大的裂縫風險。雖然確切的值可能有點取決於電絕緣層結構102的厚度d，因為鍍銅必須移動較長距離來到達其目的地，但是這可以通過適當地選擇化學過程來調整。因此，如果電絕緣層結構102是薄芯，則所述範圍因此是有效的，基本不受電絕緣層結構的厚度d影響。 總之，利用上述設計規則和參數，可以得到適當的部件承載件100的可靠性。 圖2A示出了根據與圖2相關的另一示例實施方式的部件承載件100的預製件的截面圖，不同之處在於，在形成通孔108時，電絕緣層結構102的相對的主表面上未設置導電層結構110、112。 圖1至圖6的實施方式與圖2A的實施方式之間的主要區別在於，根據圖2A，在形成通孔108時，電絕緣層結構102的主表面104、106未用導電層結構110、 112覆蓋。因此，與圖2A的實施方式相關的製造方法包括：在電絕緣層結構102的主表面104、106未用導電層結構110、112(諸如銅箔)覆蓋時在電絕緣層結構102中形成通孔108。 關於後續用導電填充介質填充通孔108並覆蓋主表面104、106，可以通過這樣進行：形成可選的種子層140，隨後可選地形成覆蓋主表面104、106和通孔108的側壁112的至少部分的鍍層(未示出)，隨後形成橋接相對的側壁116並具有例如大致的H形的橋結構114，並用一個或多個塊體結構118、120(其可以是另外的鍍覆結構或一系列鍍覆結構)可選地填充橋結構114上方和/或下方的一個或兩個容積。參照圖6對應的描述。 除了這一差異之外，上文關於圖1至圖6的公開內容也適用於圖2A。也可以在電絕緣層結構102上沒有銅箔的情況下形成根據圖3的通孔。 應注意，術語“包括”不排除其他元件或步驟，並且“一”或“一種”不排除複數。另外，可以將結合不同實施方式描述的元件進行組合。 還應注意，申請專利範圍中的附圖標記不應理解為限制申請專利範圍的範圍。 本新型的實現不限於在附圖中示出的和以上所描述的優選實施方式。相反，即使在根本不同的實施方式中，使用所示出的方案和根據本新型和原理的各種變型也是可能的。 Before describing the example embodiments in more detail with reference to the accompanying drawings, some basic considerations will be summarized, and the example embodiments of the present invention will be developed based on these considerations. According to an example embodiment of the present invention, there is provided a component carrier having a through-hole filled with a conductive material, in which a thin electrical insulating layer structure is connected to opposite side walls delimiting the through-hole and has a vertical thickness not exceeding 100 µm The horizontal bridge structure is preferably formed with a minimum bridge thickness of 20 µm, preferably 25 µm or more. Experiments show that the reliability of the obtained component carrier will be higher. According to a preferred embodiment, the maximum and minimum intermediate diameter standards can be maintained after through-hole laser drilling, and the minimum bridge thickness can be adjusted after plating, especially impact plating or flash plating, to ensure reliable through-hole bridging and good plating Cover reliability. Reliable (preferably 100% reliable) bridging before via filling proves to be very advantageous for ensuring plating reliability. In a preferred embodiment, the middle diameter of the through hole should not be greater than 75 µm. It also proved preferable that the middle diameter of the through hole should not be less than 25 µm. The minimum bridging thickness can also be appropriately specified, in particular at least 20 µm or preferably at least 25 µm to ensure proper (preferably 100%) bridging. Descriptively, a sufficient bridging thickness can be adjusted to ensure complete bridging, that is, the bridge is formed by a conductive material that connects the opposite sidewalls of the electrically insulating layer structure that delimit the vias. Therefore, a suitable component carrier manufactured according to the through-hole technology can be obtained. Such a component carrier can be used particularly advantageously for embedding one or more components, such as semiconductor chips, in particular in a central core configuration. When the intermediate diameter is between 45 µm and 75 µm and the minimum bridge thickness is at least 25 µm, very good results can be obtained in terms of the reliability of the manufactured component carrier. This can ensure that the bridge structure is reliably and completely formed by plating, wherein the bridge structure connects the opposite side walls of the electrically insulating layer structure that delimit the through holes, especially at the narrowest part of the through holes. By ensuring complete bridging, the risk of inclusions and/or voids and the risk of reliability failure of the component carrier can be very small. FIGS. 1 to 3 illustrate during a method of manufacturing a component carrier 100 having through holes 108 shown in FIGS. 2 and 3 according to an exemplary embodiment of the present invention by performing multiple laser irradiation processes from opposite sides A cross-sectional view of the resulting structure. As shown in FIG. 1, the starting point of the manufacturing method is the stack 159, which includes the first conductive layer structure 110 on the first main surface 104 of the electrically insulating layer structure 102. The stack 159 also includes a second conductive layer structure 112 on the second major surface 106 of the electrically insulating layer structure 102. For example, the electrically insulating layer structure 102 may include resin (such as epoxy resin), and the resin may optionally include reinforcing particles, such as glass fibers, glass particles, or other filler particles. For example, the material of the electrically insulating layer structure 102 may be a prepreg material. The conductive layer structure 110, 112 may be a copper layer, in particular a copper foil. For example, the thickness of the electrically insulating layer structure 102 may be less than 60 μm, and the thicknesses d1 and d2 of the conductive layer structures 110 and 112 may be less than 5 μm. In order to obtain the layer structure shown in FIG. 1, the front side of the electrically insulating layer structure 102 covered by the first conductive layer structure 110 or the first main surface 104 may be subjected to a first laser treatment. For this, the first laser irradiation 111 may be performed to form a through hole or window in the first conductive layer structure 110 and a blind hole 113 in the electrically insulating layer structure 102. The blind hole 113 is bounded by the side wall 116 and the bottom wall 161 of the electrically insulating layer structure 102. It should be noted that the laser energy and duration during the first irradiation 111 cannot be excessive, so that the blind hole 113 does not reach the second conductive layer structure 112. Otherwise, undesirable effects such as laser reflection may occur. Descriptively, the blind hole 113 may then form the first tapered portion 130 of the through hole 108 as shown in FIG. 2 or FIG. 3. Referring to FIG. 2, the through hole 108 may be completed by performing first laser drilling from the first main surface 104 with one laser irradiation according to FIG. 1 and performing second laser drilling from the second main surface 106 with one laser irradiation form. Due to this rear-side laser drilling, a through hole or window is formed in the second conductive layer structure 112, and the blind hole 113 is extended until it is formed on the first main surface 104 and the second main surface of the electrically insulating layer structure 102 Through holes 108 extending between the surfaces 106. As shown in FIG. 2, the through hole 108 has a first tapered portion 130 extending from the first main surface 104 and a second tapered portion 132 extending from the second main surface 106. The first tapered portion 130 and the second tapered portion 132 meet each other at the narrowest portion in the center of the through hole 108. In order to obtain the structure shown in FIG. 2, the structure obtained after performing the procedure described with reference to FIG. 1 may be subjected to second laser irradiation 115 from the rear side of the electrically insulating layer structure 102 or the second main surface 106. Therefore, a through hole through the second conductive layer structure 112 is formed, and additional material of the electrically insulating layer structure 102 is removed by laser energy until the blind hole 113 formed previously extends into the through hole 108 from the bottom side. The through-hole 108 according to FIG. 2 has a substantially X shape, and the procedure of filling with a conductive filling medium such as copper can be directly performed later (see FIG. 6 ). The formation of the through-hole 108 according to FIG. 2 is very efficient, and is therefore particularly suitable for processing on an industrial scale, because only two laser irradiations are sufficient to form the through-hole. Alternatively, an additional laser drilling process may be performed from the rear side before filling the through-hole 108 with a conductive filling medium such as copper. The later-mentioned embodiment will now be described with reference to FIG. 3. Referring to FIG. 3, by performing first laser drilling from the first main surface 104 with one laser irradiation according to FIG. 1 and after performing second laser drilling from the second main surface 106 according to FIG. 2 from the rear side The third laser irradiation 117 is performed to modify the shape of the through hole 108, particularly the shape of the central portion of the through hole. Therefore, instead of the procedure described with reference to FIG. 2, an additional third laser irradiation 117 may also be performed from the rear side of the electrically insulating layer structure 102 or the second main surface 106 to refine the shape of the through hole 108. This third laser irradiation 117 may remove material, especially in the central portion of the electrically insulating layer structure 102, to form a substantially cylindrical central portion 134 sandwiched between the two tapered portions 130, 132. Although the manufacturing process for forming the through hole 108 having a shape according to 3 requires an additional third laser irradiation 117 compared to FIG. 2, this shape can further improve the reliability of the manufactured component carrier 100. FIG. 4 shows a structure similar to FIG. 2 and shows the advantageous size of the narrowest part of the through hole 108. As shown in FIG. 4, the result of the manufacturing procedure described with reference to FIGS. 1 and 2 is such a through hole 108 having a substantially X shape and having the narrowest width w between two opposing side walls 116 of the through hole 108 . Of course, the size and depth of the opening V-shaped cone or truncated cone starting from each side may be different. FIG. 5 shows a structure similar to FIG. 3 and shows the advantageous size of the narrowest part of the through hole 108. As shown in FIG. 5, the manufacturing procedure described with reference to FIGS. 1, 2, and 3 forms such a through-hole 108 having a substantially cylindrical center portion 134 having the narrowest width w. FIG. 6 shows a component carrier 100 (consisting of various parts, as described below) formed based on a structure similar to FIG. 4 and obtained after filling the through-hole 108 with a conductive filler material according to an exemplary embodiment of the present invention. The advantageous dimensions of various structural parameters of the via 108 and its conductive filler will also be explained. In order to obtain the component carrier 100 shown in FIG. 6, the through hole 108 according to FIGS. 2 and 4 is subjected to the first procedure of filling the through hole with a conductive filling medium such as copper. To accomplish this, it is preferable to first perform an electroless deposition process to form a thin copper seed layer 140 that directly covers the dielectric sidewall 116 of the electrically insulating layer structure 102 that delimits the via 108. This can be seen in the detail view 119 of FIG. 6. The thickness of the seed layer 140 may be 0.5 μm, for example. However, it is also possible that the seed layer has a thickness of 1 µm or more and/or several accumulated seed layers are provided. For example, the thickness of the seed layer or the cumulative thickness of multiple seed layers may be in the range of 0.5 µm to 5 µm. When a plurality of seed layers are provided, it may include an organic (eg, polymer) layer, a palladium layer, and/or a copper layer. Subsequently, additional conductive material (such as copper) may be deposited on the seed layer 140 through a plating procedure, particularly through water plating. Therefore, the side wall 116 and the conductive layer structure 110, 112 may be covered with a thicker plating layer 142 made of a conductive filling medium such as copper. For example, the plating layer 142 may have a thickness of 10 µm. The plating process continues to form a conductive bridge structure 114 having a substantially horizontal portion of the opposite side wall 116 connecting the electrically insulating layer structure 102 that delimits the via 108. The plating layer 142 and the bridge structure 114 may form a substantially H-shaped integrated structure. As shown, the conductive bridge structure 114 is formed by an upper first boundary surface 136 oriented upward or facing the first major surface 104 and a lower second boundary surface 138 oriented downward or facing the second major surface 106 Be bounded. The conductive bridge structure 114 may be formed by water plating, preferably followed by forming the seed layer 140 described above. The bridge structure 114 forms a substantially horizontal bridge between the opposing side walls 116 of the electrically insulating layer structure 102 that delimit the vias 108. Therefore, by continuing the plating process, a substantially horizontal bridge structure 114 connecting the opposite side walls 116 is formed at the narrowest part of the through hole 108. The concave upper limiting surface of the bridge structure 114 corresponds to the first boundary surface 136, and the lower concave limiting surface of the bridge structure corresponds to the second boundary surface 138. Therefore, the via 108 is filled with a substantially H-shaped conductive structure formed by a bridge structure 114 combined with four arms, which in the cross-sectional view of FIG. 6 extend from the bridge structure 114, corresponding to Plating layer 142. Still referring to FIG. 6, a first conductive bulk structure 118 filling most of the first boundary surface 136 and the first main surface 104 and a large portion of the second boundary surface 138 and the second main surface 106 are formed Second conductive bulk structure 120. This can be accomplished by performing one or more additional water plating procedures after the previous plating procedure to form the bridge structure 114. As shown in detail 121, the first conductive bulk structure 118 is composed of a plurality of first plating layers 126 formed in the first plating stage afterwards. As correspondingly shown in the detail diagram 123, the second conductive bulk structure 120 is composed of a plurality of second plating layers 128 formed in the subsequent second plating stage. Therefore, the component carrier 100 according to FIG. 6 can be obtained by performing one or more additional plating procedures. Thereby, bulk structures 118, 120 can be obtained, which can be composed of copper, for example. In the illustrated embodiment, small settlements 122, 124 are retained on the upper or lower side of the component carrier 100 shown, respectively. In other embodiments, the bulk structures 118, 120 almost completely fill the remaining recesses above the first boundary surface 136 and below the second boundary surface 138. It should be said that the skilled person is well aware that the demarcation surfaces 136, 138 can be clearly seen when the cross section of the component carrier 100 is plotted. As a result of the described manufacturing procedure, a component carrier 100 with high electrical reliability according to an exemplary embodiment of the present invention is obtained. The high reliability is due in particular to the specific choice of parameter combinations shown in FIGS. 1 to 6. A very advantageous aspect of parameter selection is that the vertical thickness of the electrically insulating layer structure 102 is small, not exceeding 200 µm, for example even below 60 µm, and the narrowest vertical thickness D of the bridge structure 114 is at least 20 µm, preferably at least 25 µm. At the same time, it is advantageous that the vertical thickness D of the bridge structure 114 does not exceed 40 µm. The narrowest horizontal width w of the through hole 108 should preferably not exceed 75 µm. In addition, it has been found advantageous that the narrowest horizontal width w of the through-hole 108 is not less than 45 µm. In the case where the first conductive bulk structure 118 has the first settlement 122 substantially at the level of the height of the first main surface 104, it is advantageous that the first settlement 122 has a depth l of less than 15 µm. This also applies to the depth L of the second settling portion 124 of the second conductive bulk structure 120. In the following, several design parameters mentioned will be described in further detail, which may contribute to the high reliability of the component carrier 100 shown in FIG. 6. This high reliability corresponds to the fact that there is little tendency for cracks to form inside the through hole 108. The tendency for voids to form inside most of the conductive filling medium that fills the via 108 is also small, which has a positive effect on reliably conducting electrical signals or power through the copper filled via 108. It should be noted that the reliability problem of the electrically insulating layer structure 102 with a small thickness, which can be, for example, a completely cured core of FR4 material, is particularly significant. Since in the illustrated embodiment, the thickness d does not exceed 200 µm, the reliability problem is significant. However, the following measures can be taken to overcome reliability problems, even with thin cores with a thickness d ≤ 100µm. Referring to FIG. 6, it is preferable that the minimum vertical thickness D of the bridge structure 114 is at least 20 μm. If the design rules are not met, there is a risk that the middle portion of the bridge structure 114 cannot be properly connected, and there is a risk of voids in this area. At the same time, the minimum vertical thickness D of the bridge structure 114 should not exceed 40 µm. Otherwise, the dimples above the boundary surface 136 and below the boundary surface 138 may be too shallow, so that subsequent processes of filling these dimples by plating during the formation of the conductive bulk structures 118, 120 may produce undesirable or undesirable shapes. In addition, referring now to FIGS. 4 and 5 in particular, the narrowest horizontal width w should be in the range of 30 μm to 100 μm, preferably in the range of 45 μm to 75 μm. If the width w is too large, the formation of the bridge may cause problems. If the value of the width w is too small, there may be an excessive risk of cracking. Although the exact value may somewhat depend on the thickness d of the electrically insulating layer structure 102 because copper plating must move a long distance to reach its destination, this can be adjusted by appropriately selecting the chemical process. Therefore, if the electrically insulating layer structure 102 is a thin core, the range is therefore effective, being substantially unaffected by the thickness d of the electrically insulating layer structure. In short, using the above design rules and parameters, the reliability of the appropriate component carrier 100 can be obtained. 2A shows a cross-sectional view of a preform of a component carrier 100 according to another example embodiment related to FIG. 2, except that, when forming the through-hole 108, the opposite main surface of the electrically insulating layer structure 102 The conductive layer structures 110, 112 are not provided thereon. The main difference between the embodiment of FIGS. 1 to 6 and the embodiment of FIG. 2A is that, according to FIG. 2A, when forming the via 108, the main surfaces 104 and 106 of the electrically insulating layer structure 102 do not use the conductive layer structure 110, 112 coverage. Therefore, the manufacturing method related to the embodiment of FIG. 2A includes forming a pass in the electrically insulating layer structure 102 when the main surfaces 104, 106 of the electrically insulating layer structure 102 are not covered with the conductive layer structures 110, 112 (such as copper foil)孔108. Regarding the subsequent filling of the via hole 108 with a conductive filling medium and covering the main surfaces 104, 106, it can be done by forming an optional seed layer 140, and then optionally forming a sidewall 112 covering the main surfaces 104, 106 and the side walls 112 of the through hole 108 At least part of the plating layer (not shown), which is then formed to bridge the opposite side walls 116 and has, for example, a substantially H-shaped bridge structure 114, and one or more block structures 118, 120 (which may be another plating structure or A series of plated structures) optionally fill one or both volumes above and/or below the bridge structure 114. Refer to the corresponding description in FIG. 6. In addition to this difference, the above disclosure regarding FIGS. 1 to 6 also applies to FIG. 2A. The through hole according to FIG. 3 can also be formed without copper foil on the electrically insulating layer structure 102. It should be noted that the term "comprising" does not exclude other elements or steps, and "a" or "an" does not exclude a plurality. In addition, elements described in conjunction with different embodiments may be combined. It should also be noted that the reference signs in the patent application scope should not be construed as limiting the scope of the patent application scope. The implementation of the present invention is not limited to the preferred embodiments shown in the drawings and described above. On the contrary, even in fundamentally different embodiments, it is possible to use the solution shown and various modifications according to the new type and principle.

100:部件承載件 102:電絕緣層結構 104:第一主表面 106:第二主表面 108:通孔 110:第一導電層結構 111:第一激光照射 112:第二導電層結構 113:盲孔 114:橋結構 115:第二激光照射 116:側壁 117:第三激光照射 118:第一導電塊體結構 119:細節圖 120:第二導電塊體結構 122:沉降部 124:沉降部 128:第二鍍層 130:第一漸縮部分 132:第二漸縮部分 134:中心部分 136:上第一分界表面 138:下第二分界表面 140:種子層 142:鍍層 159:疊置件 161:底壁 100: component carrier 102: Electrical insulation layer structure 104: First main surface 106: Second main surface 108: through hole 110: first conductive layer structure 111: First laser irradiation 112: Second conductive layer structure 113: Blind hole 114: Bridge structure 115: Second laser irradiation 116: Side wall 117: Third laser irradiation 118: The first conductive block structure 119: Detail picture 120: Second conductive block structure 122: Settlement 124: Settlement 128: second coating 130: The first tapered part 132: The second tapered part 134: Center part 136: Upper first boundary surface 138: Lower second boundary surface 140: Seed layer 142: coating 159: Stacking 161: bottom wall

[圖1]、[圖2]和[圖3]示出了根據本新型的示例實施方式的在通過從相對的側開始的多個激光照射處理進行製造具有圖2和圖3中所示的通孔的部件承載件的方法期間得到的結構的截面圖。 [圖2A]示出了根據與圖2相關的另一示例實施方式的部件承載件的預製件的截面圖，不同之處在於，在形成通孔時，電絕緣層結構的相對的主表面上未設置導電層結​​構。 [圖4]示出了與圖2類似的示出通孔的最窄部分的有利尺寸的結構。 [圖5]示出了與圖3類似的示出通孔的最窄部分的有利尺寸的結構。 [圖6]示出了與圖4類似但是在用導電填充材料填充通孔後的結構，並示出了通孔的各種結構參數的有利尺寸。 附圖中的圖示是示意性的。在不同的附圖中，類似或相同的元件設置有相同的附圖標記。 [FIG. 1], [FIG. 2], and [FIG. 3] show that manufacturing according to an example embodiment of the present invention by a plurality of laser irradiation processes from opposite sides has shown in FIGS. 2 and 3. A cross-sectional view of the structure obtained during the method of the through-hole component carrier. [FIG. 2A] A cross-sectional view showing a preform of a component carrier according to another example embodiment related to FIG. 2, except that, when forming a through hole, on opposite main surfaces of an electrically insulating layer structure No conductive layer structure is provided. [FIG. 4] A structure similar to FIG. 2 showing the advantageous size of the narrowest part of the through hole is shown. [FIG. 5] A structure similar to FIG. 3 showing the advantageous size of the narrowest part of the through hole is shown. [FIG. 6] shows a structure similar to FIG. 4 but after filling the through hole with a conductive filler material, and shows advantageous sizes of various structural parameters of the through hole. The illustration in the drawings is schematic. In different drawings, similar or identical elements are provided with the same reference signs.

102:電絕緣層結構 102: Electrical insulation layer structure

104:第一主表面 104: First main surface

106:第二主表面 106: Second main surface

110:第一導電層結構 110: first conductive layer structure

111:第一激光照射 111: First laser irradiation

112:第二導電層結構 112: Second conductive layer structure

113:盲孔 113: Blind hole

116:側壁 116: Side wall

159:疊置件 159: Stacking

161:底壁 161: bottom wall

Claims (23)

一種部件承載件(100)，其中，所述部件承載件(100)包括： 電絕緣層結構(102)，所述電絕緣層結構(102)具有第一主表面(104)和第二主表面(106)； 通孔(108)，所述通孔(108)在所述第一主表面(104)與所述第二主表面(106)之間延伸穿過所述電絕緣層結構(102)； 導電橋結構(114)，所述導電橋結構(114)連接所述電絕緣層結構(102)的對所述通孔(108)進行限界的相對的側壁(116)； 其中，所述電絕緣層結構(102)的豎向厚度(d)不超過200 µm，並且所述橋結構(114)的最窄豎向厚度(D)為至少20 µm。 A component carrier (100), wherein the component carrier (100) includes: An electrically insulating layer structure (102) having a first main surface (104) and a second main surface (106); A through hole (108) that extends through the electrically insulating layer structure (102) between the first main surface (104) and the second main surface (106); A conductive bridge structure (114) connected to opposite side walls (116) of the electrically insulating layer structure (102) that delimit the through holes (108); Wherein, the vertical thickness (d) of the electrically insulating layer structure (102) does not exceed 200 µm, and the narrowest vertical thickness (D) of the bridge structure (114) is at least 20 µm. 根據請求項1所述的部件承載件(100)，包括： 位於所述第一主表面(104)上的第一導電層結構(110)； 位於所述第二主表面(106)上的第二導電層結構(112)。 The component carrier (100) according to claim 1, comprising: A first conductive layer structure (110) on the first main surface (104); A second conductive layer structure (112) on the second main surface (106). 根據請求項1所述的部件承載件(100)，其中，所述電絕緣層結構(102)的所述豎向厚度(d)不超過140 µm，特別地不超過110 µm，更特別地在介於40 µm至60 µm之間的範圍內。The component carrier (100) according to claim 1, wherein the vertical thickness (d) of the electrically insulating layer structure (102) does not exceed 140 µm, in particular does not exceed 110 µm, more particularly In the range between 40 µm and 60 µm. 根據請求項1所述的部件承載件(100)，其中，所述橋結構(114)的所述最窄豎向厚度(D)為至少25 µm。The component carrier (100) according to claim 1, wherein the narrowest vertical thickness (D) of the bridge structure (114) is at least 25 µm. 根據請求項1所述的部件承載件(100)，其中，所述橋結構(114)的所述最窄豎向厚度(D)不超過40 µm。The component carrier (100) according to claim 1, wherein the narrowest vertical thickness (D) of the bridge structure (114) does not exceed 40 µm. 根據請求項1所述的部件承載件(100)，其中，所述通孔(108)的最窄水平寬度(w)不超過100 µm，特別地不超過75 µm。The component carrier (100) according to claim 1, wherein the narrowest horizontal width (w) of the through hole (108) does not exceed 100 µm, in particular does not exceed 75 µm. 根據請求項1所述的部件承載件(100)，其中，所述通孔(108)的最窄水平寬度(w)不小於30 µm，特別地不小於45 µm。The component carrier (100) according to claim 1, wherein the narrowest horizontal width (w) of the through hole (108) is not less than 30 µm, particularly not less than 45 µm. 根據請求項1所述的部件承載件(100)，包括填充所述導電橋結構(114)上方的至少部分容積的第一導電塊體結構(118)。The component carrier (100) according to claim 1, comprising a first conductive block structure (118) filling at least part of the volume above the conductive bridge structure (114). 根據請求項8所述的部件承載件(100)，其中，所述第一導電塊體結構(118)在所述第一主表面(104)的高度水平處具有第一沉降部(122)，其中特別地，所述第一沉降部(122)具有小於15 µm的深度(l)。The component carrier (100) according to claim 8, wherein the first conductive block structure (118) has a first settling portion (122) at a height level of the first main surface (104), In particular, the first settling part (122) has a depth (1) of less than 15 µm. 根據請求項8所述的部件承載件(100)，其中，所述第一導電塊體結構(118)由在後續的第一鍍覆階段中形成的多個第一鍍層(126)構成。The component carrier (100) according to claim 8, wherein the first conductive bulk structure (118) is composed of a plurality of first plating layers (126) formed in a subsequent first plating stage. 根據請求項1所述的部件承載件(100)，包括填充所述導電橋結構(114)下方的至少部分容積的第二導電塊體結構(120)。The component carrier (100) according to claim 1, comprising a second conductive block structure (120) filling at least part of the volume under the conductive bridge structure (114). 根據請求項11所述的部件承載件(100)，其中，所述第二導電塊體結構(120)在所述第二主表面(106)的高度水平上具有第二沉降部(124)，其中特別地，所述第二沉降部(124)具有小於15 µm的深度(L)。The component carrier (100) according to claim 11, wherein the second conductive block structure (120) has a second settling portion (124) at a height level of the second main surface (106), In particular, the second settling portion (124) has a depth (L) of less than 15 µm. 根據請求項11所述的部件承載件(100)，其中，所述第二導電塊體結構(120)由在後續的第二鍍覆階段中形成的多個第二鍍層(128)構成。The component carrier (100) according to claim 11, wherein the second conductive bulk structure (120) is composed of a plurality of second plating layers (128) formed in a subsequent second plating stage. 根據請求項1所述的部件承載件(100)，其中，所述橋結構(114)的所述最窄豎向厚度(D)與所述電絕緣層結構(102)的所述豎向厚度(d)之間的比率在介於20%至80%之間的範圍內，特別地在介於30%至50%之間的範圍內。The component carrier (100) according to claim 1, wherein the narrowest vertical thickness (D) of the bridge structure (114) and the vertical thickness of the electrically insulating layer structure (102) The ratio between (d) is in the range between 20% and 80%, in particular in the range between 30% and 50%. 根據請求項1所述的部件承載件(100)，其中，所述導電橋結構(114)由面朝所述第一主表面(104)的第一分界表面(136)和麵朝所述第二主表面(106)的第二分界表面(138)來限界，特別地所述第一分界表面為凹形的，且特別地所述第二分界表面為凹形的。The component carrier (100) according to claim 1, wherein the conductive bridge structure (114) is composed of a first boundary surface (136) facing the first main surface (104) and a surface facing the first The second boundary surface (138) of the two main surfaces (106) is bounded, in particular the first boundary surface is concave, and in particular the second boundary surface is concave. 根據請求項2所述的部件承載件(100)，其中，所述第一導電層結構(110)的厚度(d1)和/或所述第二導電層結構(112)的厚度(d2)小於5 µm，特別地在介於2 µm至4 µm之間的範圍內。The component carrier (100) according to claim 2, wherein the thickness (d1) of the first conductive layer structure (110) and/or the thickness (d2) of the second conductive layer structure (112) is less than 5 µm, especially in the range between 2 µm and 4 µm. 根據請求項1所述的部件承載件(100)，其中，所述通孔(108)具有從所述第一主表面(104)延伸的第一漸縮部分(130)、從所述第二主表面(106)延伸的第二漸縮部分(132)、以及連接所述第一漸縮部分(130)和所述第二漸縮部分(132)的中心連接部分(134)，特別地所述中心連接部分是大致圓形的。The component carrier (100) according to claim 1, wherein the through hole (108) has a first tapered portion (130) extending from the first main surface (104), from the second A second tapered portion (132) extending from the main surface (106), and a central connecting portion (134) connecting the first tapered portion (130) and the second tapered portion (132), in particular The central connecting portion is substantially circular. 根據請求項1所述的部件承載件(100)，其中，所述通孔(108)大致為X形。The component carrier (100) according to claim 1, wherein the through hole (108) is substantially X-shaped. 根據請求項1所述的部件承載件(100)，其中，所述電絕緣層結構(102)為完全固化的芯。The component carrier (100) according to claim 1, wherein the electrically insulating layer structure (102) is a fully cured core. 根據請求項1所述的部件承載件(100)，其中，所述橋結構(114)以成一體的方式與覆蓋所述側壁(116)的鍍層(142)相連接。The component carrier (100) according to claim 1, wherein the bridge structure (114) is connected to the plating layer (142) covering the side wall (116) in an integrated manner. 根據請求項2所述的部件承載件(100)，其中，所述第一導電層結構(110)和所述第二導電層結構(112)中的至少一者超出所述電絕緣層結構(102)的對所述通孔(108)進行限界的至少一個側壁(116)的側向懸伸不超過20 µm，特別地不超過10 µm。The component carrier (100) according to claim 2, wherein at least one of the first conductive layer structure (110) and the second conductive layer structure (112) exceeds the electrically insulating layer structure ( 102) The lateral overhang of at least one side wall (116) that delimits the through hole (108) does not exceed 20 µm, in particular does not exceed 10 µm. 根據請求項1所述的部件承載件(100)，其中，所述通孔(108)的不同部分以不同陡度漸縮。The component carrier (100) according to claim 1, wherein different parts of the through hole (108) are tapered with different steepness. 根據請求項1所述的部件承載件(100)，包括以下特徵中的至少一者： 所述部件承載件(100)包括嵌入所述部件承載件(100)中和/或表面安裝在所述部件承載件(100)上的至少一個部件，其中，所述至少一個部件特別地選自由電子部件、非導電和/或導電嵌體、傳熱單元、光導元件、能量收集單元、有源電子部件、無源電子部件、電子芯片、存儲裝置、濾波器、集成電路、信號處理部件、功率管理部件、光電接口元件、電壓轉換器、密碼部件、發射器和/或接收器、機電換能器、致動器、微機電系統、微處理器、電容器、電阻器、電感、蓄電池、開關、攝像機、天線、磁性元件、另外的部件承載件和邏輯芯片組成的組； 其中，所述導電層結構(110、112)中的至少一者包括由銅、鋁、鎳、銀、金、鈀和鎢組成的組中的至少一者，所提及材料中的任何一種均可選地塗覆有諸如石墨烯之類的超導材料； 其中，所述電絕緣層結構(102)包括由樹脂，特別是增強樹脂或非增強樹脂例如環氧樹脂或雙馬來酰亞胺-三嗪樹脂；FR-4；FR-5；氰酸酯；聚亞苯基衍生物；玻璃；預浸材料；聚酰亞胺；聚酰胺；液晶聚合物；環氧基增強材料；聚四氟乙烯；陶瓷以及金屬氧化物組成的組中的至少一者； 其中，所述部件承載件(100)成型為板； 其中，所述部件承載件(100)構造為由印刷電路板和基板組成的組中的至少一者； 其中，所述部件承載件(100)構造為層壓型部件承載件。 The component carrier (100) according to claim 1, including at least one of the following features: The component carrier (100) includes at least one component embedded in the component carrier (100) and/or surface mounted on the component carrier (100), wherein the at least one component is specifically selected from Electronic components, non-conductive and/or conductive inlays, heat transfer units, light guide elements, energy collection units, active electronic components, passive electronic components, electronic chips, storage devices, filters, integrated circuits, signal processing components, power Management components, photoelectric interface components, voltage converters, cryptographic components, transmitters and/or receivers, electromechanical transducers, actuators, microelectromechanical systems, microprocessors, capacitors, resistors, inductances, batteries, switches, Cameras, antennas, magnetic components, additional component carriers and logic chips; Wherein, at least one of the conductive layer structures (110, 112) includes at least one of the group consisting of copper, aluminum, nickel, silver, gold, palladium, and tungsten, and any of the mentioned materials are Optionally coated with superconducting materials such as graphene; Wherein, the electrically insulating layer structure (102) includes resin, especially reinforced resin or non-reinforced resin such as epoxy resin or bismaleimide-triazine resin; FR-4; FR-5; cyanate Polyphenylene derivatives; glass; prepreg; polyimide; polyamide; liquid crystal polymer; epoxy-based reinforcing material; polytetrafluoroethylene; at least one of the group consisting of ceramics and metal oxides ; Wherein, the component carrier (100) is formed into a plate; Wherein, the component carrier (100) is configured as at least one of the group consisting of a printed circuit board and a substrate; Here, the component carrier (100) is configured as a laminated component carrier.
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