TWM588348U - Display device having LED wafers with different levels which are mixed and matched - Google Patents
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Abstract
本創作公開一種混搭不同等級LED晶片的顯示裝置，其包括：一電路基板、多個第一LED晶片以及多個第二LED晶片。多個第一LED晶片分別設置在該電路基板上。多個第二LED晶片分別設置在該電路基板上。該些第一LED晶片具有相同的晶片等級，該些第二LED晶片具有相同的晶片等級，該第一LED晶片與該第二LED晶片具有不同的晶片等級。藉此，本創作能達到混搭不同等級LED晶片的功效。This creation discloses a display device for mixing and matching LED chips of different levels, which includes: a circuit substrate, a plurality of first LED chips, and a plurality of second LED chips. A plurality of first LED chips are respectively disposed on the circuit substrate. A plurality of second LED chips are respectively disposed on the circuit substrate. The first LED wafers have the same wafer level, the second LED wafers have the same wafer level, and the first LED wafer and the second LED wafer have different wafer levels. In this way, this creation can achieve the effect of mixing and matching different levels of LED chips.
Description
本創作涉及一種顯示裝置，特別是涉及一種混搭不同等級LED晶片的顯示裝置。This creation relates to a display device, and more particularly to a display device that mixes and distributes LED chips of different levels.
一般LED晶片的製程大致為：首先通過金屬有機化學氣相沉積（Metal Organic Chemical Vapor Phase Deposition，簡稱MOCVD）在基板上製作氮化鎵（GaN）基底的晶圓，常用的基板主要有藍寶石、碳化矽和矽襯底，還有GaAs、AlN、ZnO等材料。然後，對LED PN接面的兩個電極進行加工，電極加工也是製作LED晶片的關鍵製程，其包括清洗、蒸鍍、黃光、化學蝕刻、熔合、研磨。最後，通過雷射切割機對晶圓進行切割，並將切割後所形成的晶片進行測試和分選，以區分各晶片的等級差異。Generally, the manufacturing process of LED wafers is as follows: First, a gallium nitride (GaN) -based wafer is fabricated on a substrate by Metal Organic Chemical Vapor Phase Deposition (MOCVD). The commonly used substrates are mainly sapphire and carbonized. Silicon and silicon substrates, as well as GaAs, AlN, ZnO and other materials. Then, the two electrodes on the LED PN junction are processed. Electrode processing is also a key process for manufacturing LED wafers, which includes cleaning, evaporation, yellow light, chemical etching, fusion, and polishing. Finally, the wafer is cut by a laser dicing machine, and the wafers formed after the dicing are tested and sorted to distinguish the grade difference of each wafer.
然而，習知的顯示裝置的製造技術，皆是使用等級較佳的晶片作為材料之一，等級中等或略劣的晶片則被排除而不使用，進而造成資源的浪費。However, in the conventional display device manufacturing technology, wafers with better grades are used as one of the materials, and wafers with medium or slightly lower grades are excluded from use, thereby causing waste of resources.
本創作所要解決的技術問題在於，針對現有技術的不足提供一種混搭不同等級LED晶片的顯示裝置。The technical problem to be solved by this creation is to provide a display device that mixes and distributes LED chips of different levels in response to the shortcomings of the prior art.
為了解決上述的技術問題，本創作所採用的其中一技術方案是，提供一種混搭不同等級LED晶片的顯示裝置，其包括：一電路基板、多個第一LED晶片以及多個第二LED晶片。多個第一LED晶片分別設置在該電路基板上。多個第二LED晶片分別設置在該電路基板上。其中，該些第一LED晶片具有相同的晶片等級，該些第二LED晶片具有相同的晶片等級，該第一LED晶片與該第二LED晶片具有不同的晶片等級。In order to solve the above technical problems, one of the technical solutions adopted in this creation is to provide a display device that mixes and distributes LED chips of different levels, which includes: a circuit substrate, a plurality of first LED chips, and a plurality of second LED chips. A plurality of first LED chips are respectively disposed on the circuit substrate. A plurality of second LED chips are respectively disposed on the circuit substrate. The first LED wafers have the same wafer level, the second LED wafers have the same wafer level, and the first LED wafer and the second LED wafer have different wafer levels.
本創作的其中一有益效果在於，本創作所提供的混搭不同等級LED晶片的顯示裝置，其能通過“多個第一LED晶片分別設置在該電路基板上”、“多個第二LED晶片分別設置在該電路基板上”以及“該些第一LED晶片具有相同的晶片等級，該些第二LED晶片具有相同的晶片等級，第一LED晶片與第二LED晶片具有不同的晶片等級”的技術方案，以達到混搭不同等級LED晶片的功效。One of the beneficial effects of this creation is that the display device provided by this creation that mixes and distributes different levels of LED chips can pass "a plurality of first LED chips respectively disposed on the circuit substrate" and "a plurality of second LED chips, respectively" Provided on the circuit board "and" the first LED wafers have the same wafer level, the second LED wafers have the same wafer level, and the first LED wafer and the second LED wafer have different wafer levels "technologies Solution to achieve the effect of mixing and matching different grades of LED chips.
為使能更進一步瞭解本創作的特徵及技術內容，請參閱以下有關本創作的詳細說明與圖式，然而所提供的圖式僅用於提供參考與說明，並非用來對本創作加以限制。In order to better understand the features and technical contents of this creation, please refer to the following detailed description and drawings about this creation. However, the drawings provided are only for reference and explanation, and are not intended to limit this creation.
以下是通過特定的具體實施例來說明本創作所公開有關“混搭不同等級LED晶片的布局方法及混搭不同等級LED晶片的顯示裝置”的實施方式，本領域技術人員可由本說明書所公開的內容瞭解本創作的優點與效果。本創作可通過其他不同的具體實施例加以施行或應用，本說明書中的各項細節也可基於不同觀點與應用，在不悖離本創作的構思下進行各種修改與變更。另外，本創作的圖式僅為簡單示意說明，並非依實際尺寸的描繪，事先聲明。以下的實施方式將進一步詳細說明本創作的相關技術內容，但所公開的內容並非用以限制本創作的保護範圍。The following is a specific embodiment to explain the implementation of the “layout method for mashing different levels of LED chips and display devices for mashing different levels of LED chips” disclosed in this creation. Those skilled in the art can understand from the content disclosed in this specification. The advantages and effects of this creation. This creation can be implemented or applied through other different specific embodiments, and various details in this specification can also be based on different viewpoints and applications, and various modifications and changes can be made without departing from the concept of this creation. In addition, the drawings in this creation are only for simple illustration, and are not drawn according to actual dimensions, so they are stated in advance. The following embodiments will further describe the technical content of this creation in detail, but the disclosed content is not intended to limit the scope of protection of this creation.
應當可以理解的是，雖然本文中可能會使用到“第一”、“第二”、“第三”等術語來描述各種元件，但這些元件不應受這些術語的限制。這些術語主要是用以區分一元件與另一元件。另外，本文中所使用的術語“或”，應視實際情況可能包括相關聯的列出項目中的任一個或者多個的組合。It should be understood that although the terms "first", "second", "third" and the like may be used herein to describe various elements, these elements should not be limited by these terms. These terms are mainly used to distinguish one element from another. In addition, the term "or" as used herein should, depending on the actual situation, include any one or more of the associated listed items.
[第一實施例][First embodiment]
參閱圖1至圖4所示，本創作第一實施例提供一種混搭不同等級LED晶片的布局方法，其至少包括下列幾個步驟：Referring to FIG. 1 to FIG. 4, the first embodiment of the present invention provides a layout method of mixing and matching LED chips of different levels, which includes at least the following steps:
首先，配合圖1及圖2所示，本創作的混搭不同等級LED晶片的布局方法提供多個第一LED晶片1以及多個第二LED晶片2，第一LED晶片1與第二LED晶片2具有不同的晶片等級（步驟S104(a)）。舉例來說，第一LED晶片1與第二LED晶片2可根據光學特性、電學特性、壽命和可靠性來區分晶片等級，且第一LED晶片1與第二LED晶片2的晶片等級不同。然而，本創作不以上述所舉的例子為限。First, as shown in FIG. 1 and FIG. 2, the layout method of mixing and grading LED wafers of different levels provided in the present invention provides a plurality of first LED wafers 1 and a plurality of second LED wafers 2, and the first LED wafer 1 and the second LED wafer 2 Have different wafer levels (step S104 (a)). For example, the first LED wafer 1 and the second LED wafer 2 can be classified into wafer grades according to optical characteristics, electrical characteristics, lifetime, and reliability, and the wafer grades of the first LED wafer 1 and the second LED wafer 2 are different. However, this creation is not limited to the examples given above.
進一步來說，配合圖1及圖2所示，本創作的混搭不同等級LED晶片的布局方法，在提供該些第一LED晶片1與該些第二LED晶片2的步驟S104(a)前，布局方法還進一步包括下列幾個步驟：Further, as shown in FIG. 1 and FIG. 2, the layout method of mixing and grading LED chips of different levels in the present invention, before providing step S104 (a) of the first LED chips 1 and the second LED chips 2, The layout method further includes the following steps:
先由同一個晶圓W，製作出多個LED晶片（步驟S101(a)）。舉例來說，配合圖1及圖2所示，可將一個晶圓W進行切割，以形成多個LED晶片，該些LED晶片具有不同的晶片等級。First, a plurality of LED chips are produced from the same wafer W (step S101 (a)). For example, as shown in FIG. 1 and FIG. 2, one wafer W may be diced to form a plurality of LED wafers, and the LED wafers have different wafer levels.
接著，通過電氣特性測試或者光學特性測試，以決定該些LED晶片的晶片等級是屬於A級或B級（步驟S102(a)）。舉例來說，配合圖1及圖2所示，將上述多個LED晶片進行性能或特性的測試，以進行區分晶片的等級，進而決定哪些晶片等級是屬於A級，而又有哪些晶片等級是屬於B級。其中，LED晶片的測試可包括電氣特性測試、光學特性測試以及可靠性等，而電氣特性測試可包括電壓、電流、漏電、抗靜電能力、工作電壓、反向擊穿電壓、消耗功率、運行速度和耐壓度等。光學特性測試可包括亮度、發光光譜分布、發光中心波長、色溫和發光強度等。可靠性測試可包括靜電敏感度特性、壽命和環境特性等。然而，本創作不以上述所舉的例子為限。Next, it is determined whether the wafer level of the LED wafers belongs to the A level or the B level through an electrical characteristic test or an optical characteristic test (step S102 (a)). For example, as shown in FIG. 1 and FIG. 2, the above-mentioned LED chips are tested for performance or characteristics to distinguish the grades of the wafers, and then determine which wafer grades belong to A grade, and which wafer grades are Belongs to B. Among them, the test of the LED chip may include electrical characteristic test, optical characteristic test and reliability, etc., and the electrical characteristic test may include voltage, current, leakage, antistatic ability, working voltage, reverse breakdown voltage, power consumption, running speed And pressure resistance. The optical characteristic test may include brightness, emission spectrum distribution, emission center wavelength, color temperature, emission intensity, and the like. Reliability tests can include static sensitivity characteristics, life and environmental characteristics. However, this creation is not limited to the examples given above.
接下來，配合圖1及圖2所示，將屬於A級晶片等級的LED晶片與屬於B級晶片等級的LED晶片，分別定義為第一LED晶片1與第二LED晶片2（步驟S103(a)）。舉例來說，晶圓W切割後所形成的多個LED晶片在通過上述LED晶片的特性測試後，可將判別為屬於A級晶片等級的LED晶片定義為第一LED晶片1，並可將判別為屬於B級晶片等級的LED晶片定義為第二LED晶片2。然而，本創作不以上述所舉的例子為限。Next, as shown in FIG. 1 and FIG. 2, the LED wafers belonging to the A-level wafer class and the LED wafers belonging to the B-level wafer class are respectively defined as the first LED wafer 1 and the second LED wafer 2 (step S103 (a )). For example, after a plurality of LED wafers formed after the wafer W is cut, after passing the above-mentioned characteristic test of the LED wafers, the LED wafers determined as belonging to the A-level wafer class can be defined as the first LED wafers 1, and the determination can be made. An LED wafer belonging to a B-chip wafer class is defined as a second LED wafer 2. However, this creation is not limited to the examples given above.
此外，配合圖1所示，本創作的混搭不同等級LED晶片的布局方法，在提供該些第一LED晶片1與該些第二LED晶片2的步驟S104(a)前，也可進一步包括下列幾個步驟：由兩個以上不同的晶圓，分別製作多個LED晶片（步驟S101(b)）；通過電氣特性測試或者光學特性測試，以決定該些LED晶片的晶片等級是屬於A級或B級（步驟S102(a)）；以及將屬於A級晶片等級的LED晶片與屬於B級晶片等級的LED晶片，分別定義為第一LED晶片1與第二LED晶片2（步驟S103(a)）。舉例來說，配合圖1所示，本創作的混搭不同等級LED晶片的布局方法在步驟S104(a)前，進一步還可通過切割兩個以上不同的晶圓（圖中未繪示），以製作出多個LED晶片；其中，兩個以上晶圓可為大小不同，但不以此為限。接著，將該些LED晶片依據晶片等級而定義為第一LED晶片1或第二LED晶片2。然而，本創作不以上述所舉的例子為限。In addition, as shown in FIG. 1, the layout method of mixing and grading LED chips of different levels in the present invention may further include the following before providing step S104 (a) of the first LED chips 1 and the second LED chips 2. Several steps: Make multiple LED wafers from two or more different wafers (step S101 (b)); determine whether the wafer grade of these LED wafers belongs to Class A or through electrical characteristic test or optical characteristic test. Class B (step S102 (a)); and define the LED chip belonging to the class A wafer class and the LED chip belonging to the class B wafer class as the first LED wafer 1 and the second LED wafer 2 respectively (step S103 (a) ). For example, as shown in FIG. 1, before this step S104 (a), the layout method of mixing and matching LED wafers of different grades can be further cut by cutting more than two different wafers (not shown in the figure) to A plurality of LED wafers were produced; among them, two or more wafers may be different in size, but not limited thereto. Then, the LED chips are defined as the first LED chip 1 or the second LED chip 2 according to the wafer level. However, this creation is not limited to the examples given above.
最後，配合圖1至圖3所示，將該些第一LED晶片1與該些第二LED晶片2交替設置在一電路基板B上（步驟S105(a)）。Finally, in accordance with FIGS. 1 to 3, the first LED chips 1 and the second LED chips 2 are alternately disposed on a circuit substrate B (step S105 (a)).
舉例來說，配合圖1至圖3所示，在該些LED晶片依據晶片等級分別定義為第一LED晶片1與第二LED晶片2後，可按照交替方式設置在電路基板B上，如圖3所示。其中，該些第一LED晶片1與該些第二LED晶片2可通過焊接、膠黏等方式設置於電路基板B上，但不以此為限。並且，本創作不以上述所舉的例子為限。For example, as shown in FIG. 1 to FIG. 3, after these LED chips are respectively defined as the first LED chip 1 and the second LED chip 2 according to the wafer level, they can be arranged on the circuit substrate B in an alternating manner, as shown in FIG. 3 shown. Wherein, the first LED chips 1 and the second LED chips 2 can be disposed on the circuit substrate B by means of welding, gluing, or the like, but not limited thereto. Moreover, this creation is not limited to the examples given above.
藉此，本創作的混搭不同等級LED晶片的布局方法可通過上述技術方案，將不同等級LED晶片以混搭方式設置在電路基板B上，而可利用屬於A級晶片等級的第一LED晶片1彌補屬於B級晶片等級的第二LED晶片2的效能或性能不足，進而達到均勻效能的功效，並能避免資源浪費的問題。更進一步來說，本創作的混搭不同等級LED晶片的布局方法能通過上述技術方案，而根據市場或使用者的特定需求（例如特定的電氣特性或特定的光學特性，但不以此為限），以混搭的方式將該些第一LED晶片1與該些第二LED晶片2布局在電路基板B上，以產生符合該特定需求的顯示裝置D。In this way, the layout method of mixing and grading LED chips of different grades can be arranged on the circuit substrate B in a mashup manner through the above technical solution, and can be compensated by using the first LED chip 1 belonging to the level A chip grade. The efficiency or performance of the second LED chip 2 belonging to the B-level chip level is insufficient, thereby achieving uniform efficiency and avoiding the problem of wasted resources. Furthermore, the layout method of mixing and matching different grades of LED chips in this creation can pass the above technical solutions, and according to the specific needs of the market or users (such as specific electrical characteristics or specific optical characteristics, but not limited to this) The first LED chips 1 and the second LED chips 2 are arranged on the circuit substrate B in a mash-up manner to generate a display device D that meets the specific requirements.
另外，配合圖1、圖2至圖4所示，本創作的混搭不同等級LED晶片的布局方法也可以交替方式將該些第一LED晶片1與該些第二LED晶片2設置在電路基板B上，如圖4所示。通過此設置方式，可使屬於B級晶片等級的第二LED晶片2的周邊圍繞屬於A級晶片等級的第一LED晶片1，進而達到均勻效能的功效。In addition, as shown in FIG. 1, FIG. 2 to FIG. 4, the layout method of mixing and grading LED wafers of different levels in the present invention can also alternately arrange the first LED wafers 1 and the second LED wafers 2 on the circuit substrate B. Up, as shown in Figure 4. Through this setting method, the periphery of the second LED chip 2 belonging to the B-level wafer level can surround the first LED chip 1 belonging to the A-level wafer level, thereby achieving uniform efficiency.
更進一步來說，配合圖1至圖4所示，本創作還提供一種混搭不同等級LED晶片的顯示裝置D，其包括：一電路基板B、多個第一LED晶片1以及多個第二LED晶片2。多個第一LED晶片1分別設置在電路基板B上。多個第二LED晶片2分別設置在電路基板B上。其中，該些第一LED晶片1具有相同的晶片等級，該些第二LED晶片2具有相同的晶片等級，第一LED晶片1與第二LED晶片2具有不同的晶片等級。然而，本創作不以上述所舉的例子為限。Furthermore, with reference to FIGS. 1 to 4, the present invention also provides a display device D for mixing and matching LED chips of different levels, which includes: a circuit substrate B, a plurality of first LED chips 1, and a plurality of second LEDs. Wafer 2. The plurality of first LED wafers 1 are respectively disposed on a circuit substrate B. The plurality of second LED wafers 2 are provided on the circuit substrate B, respectively. The first LED wafers 1 have the same wafer level, the second LED wafers 2 have the same wafer level, and the first LED wafer 1 and the second LED wafer 2 have different wafer levels. However, this creation is not limited to the examples given above.
此外，配合圖1至圖4所示，並根據上述第一實施例所提供的技術方案，本創作還可進一步提供一種混搭不同等級LED晶片的布局方法，其包括下列步驟：首先，由同一個晶圓W或者不同晶圓W，製作出多個LED晶片。接著，通過電氣特性測試或者光學特性測試，將該些LED晶片至少區分為具有相同晶片等級的多個第一LED晶片1以及具有相同晶片等級的多個第二LED晶片2，第一LED晶片1與第二LED晶片2具有不同的晶片等級。最後，將該些第一LED晶片1與該些第二LED晶片2設置在同一電路基板B上。而本創作的混搭不同等級LED晶片的布局方法的具體實施方式已包含在上述第一實施例中，因此，相似的流程不再贅述。In addition, as shown in FIG. 1 to FIG. 4 and according to the technical solution provided by the first embodiment, the author can further provide a layout method of mixing and matching LED chips of different levels, which includes the following steps: First, the same Wafer W or different wafers W, a plurality of LED chips are produced. Then, through the electrical characteristic test or the optical characteristic test, the LED wafers are at least divided into a plurality of first LED wafers 1 having the same wafer level and a plurality of second LED wafers 2 and the first LED wafer 1 having the same wafer level. It has a different wafer level from the second LED wafer 2. Finally, the first LED wafers 1 and the second LED wafers 2 are disposed on the same circuit substrate B. The specific implementation method of the layout method of mixing and grading LED chips of different levels has been included in the above-mentioned first embodiment. Therefore, similar processes are not described again.
[第二實施例][Second embodiment]
參閱圖5至圖8所示，並請一併配合圖1至圖4，本創作第二實施例所提供的混搭不同等級LED晶片的布局方法，與第一實施例的混搭不同等級LED晶片的布局方法略為相近，因此，相似的流程不再贅述。進一步來說，根據圖5至圖8與圖1至圖4比較所示，本創作第二實施例與第一實施例的差異在於，在提供該些第一LED晶片1與該些第二LED晶片2的步驟S104(a)中，布局方法還進一步包括下列步驟：Referring to FIGS. 5 to 8, and in conjunction with FIG. 1 to FIG. 4, the layout method of mixing and grading LED chips of different levels provided in the second embodiment of the present invention is different from that of mixing and grading LED chips of the first embodiment. The layout methods are slightly similar, so similar processes are not repeated here. Further, according to a comparison between FIGS. 5 to 8 and FIGS. 1 to 4, the difference between the second embodiment of the present invention and the first embodiment lies in the provision of the first LED chips 1 and the second LEDs. In step S104 (a) of the wafer 2, the layout method further includes the following steps:
提供多個第三LED晶片3，第一LED晶片1、第二LED晶片2與第三LED晶片3具有不同的晶片等級，該些第一LED晶片1具有相同的晶片等級，該些第二LED晶片2具有相同的晶片等級，該些第三LED晶片3具有相同的晶片等級（步驟S104(b)）。舉例來說，本創作的混搭不同等級LED晶片的布局方法進一步還可提供多個第三LED晶片3，且第三LED晶片3的晶片等級與第一LED晶片1及第二LED晶片2的晶片等級不同。A plurality of third LED wafers 3 are provided. The first LED wafer 1, the second LED wafer 2 and the third LED wafer 3 have different wafer levels. The first LED wafers 1 have the same wafer level, and the second LEDs. The wafers 2 have the same wafer level, and the third LED wafers 3 have the same wafer level (step S104 (b)). For example, the layout method of mixing and grading different levels of LED chips in this creation can further provide multiple third LED chips 3, and the chip levels of the third LED chip 3 and the chips of the first LED chip 1 and the second LED chip 2 Different levels.
更進一步來說，配合圖5及圖6所示，本創作的混搭不同等級LED晶片的布局方法，在提供該些第一LED晶片1、該些第二LED晶片2與該些第三LED晶片3的步驟S104(b)前，布局方法還進一步包括下列幾個步驟：Furthermore, with reference to FIG. 5 and FIG. 6, the layout method of mixing and grading LED chips of different levels in the present invention provides the first LED chips 1, the second LED chips 2, and the third LED chips. Before step S104 (b) of 3, the layout method further includes the following steps:
首先，由同一個晶圓W，製作出多個LED晶片（步驟S101(c)）。舉例來說，配合圖6所示，可將一個晶圓W進行切割，以形成多個LED晶片，該些LED晶片中具有多種晶片等級。First, a plurality of LED wafers are produced from the same wafer W (step S101 (c)). For example, as shown in FIG. 6, one wafer W may be diced to form a plurality of LED wafers, and the LED wafers have multiple wafer levels.
接著，通過電氣特性測試或者光學特性測試，以決定該些LED晶片的晶片等級是屬於A級、B級或C級（步驟S102(b)）。舉例來說，配合圖5及圖6所示，將上述多個LED晶片進行性能或特性的測試，以進行區分晶片的等級，進而決定哪些晶片等級是屬於A級，哪些晶片等級是屬於B級，而哪些晶片等級是屬於C級。其中，LED晶片的測試可包括電氣特性測試、光學特性測試和可靠性，而電氣特性測試可包括電壓、電流、漏電、抗靜電能力、工作電壓、反向擊穿電壓、消耗功率、運行速度和耐壓度等。光學特性測試可包括亮度、發光光譜分布、發光中心波長、色溫和發光強度等。可靠性測試可包括靜電敏感度特性、壽命和環境特性等。然而，本創作不以上述所舉的例子為限。Next, it is determined whether the wafer level of the LED wafers belongs to A level, B level, or C level through an electrical characteristic test or an optical characteristic test (step S102 (b)). For example, as shown in FIG. 5 and FIG. 6, the above-mentioned LED chips are tested for performance or characteristics to distinguish the grades of the wafers, and then determine which wafer grades belong to the A grade and which wafer grades belong to the B grade. , And which chip grades belong to the C grade. Among them, the test of the LED chip may include electrical characteristic test, optical characteristic test and reliability, and the electrical characteristic test may include voltage, current, leakage, antistatic ability, working voltage, reverse breakdown voltage, power consumption, operating speed and Pressure resistance, etc. The optical characteristic test may include brightness, emission spectrum distribution, emission center wavelength, color temperature, emission intensity, and the like. Reliability tests can include static sensitivity characteristics, life and environmental characteristics. However, this creation is not limited to the examples given above.
接下來，將屬於A級晶片等級的LED晶片、屬於B級晶片等級的LED晶片以及屬於C級晶片等級的LED晶片，分別定義為第一LED晶片1、第二LED晶片2以及第三LED晶片3（步驟S103(b)）。舉例來說，配合圖5及圖6所示，晶圓W切割後所形成的多個LED晶片在通過上述LED晶片的特性測試後，可將判別為屬於A級晶片等級的LED晶片定義為第一LED晶片1，並可將判別為屬於B級晶片等級的LED晶片可定義為第二LED晶片2，以及可將判別為屬於C級晶片等級的LED晶片可定義為第三LED晶片3。然而，本創作不以上述所舉的例子為限。Next, the LED wafers belonging to the A-level wafer class, the LED wafers belonging to the B-level wafer class, and the LED wafers belonging to the C-level wafer class are respectively defined as a first LED wafer 1, a second LED wafer 2 and a third LED wafer. 3 (step S103 (b)). For example, as shown in FIG. 5 and FIG. 6, after a plurality of LED wafers formed after wafer W dicing passes the above-mentioned characteristic test of the LED wafers, the LED wafers that are determined to belong to the A-level wafer class can be defined as the first An LED wafer 1 may be defined as a second LED wafer 2 and an LED wafer determined as belonging to a B-chip wafer level may be defined as a third LED wafer 3. However, this creation is not limited to the examples given above.
另外，配合圖5所示，本創作的混搭不同等級LED晶片的布局方法，在提供該些第一LED晶片1、該些第二LED晶片2與該些第三LED晶片3的步驟S104(b)前，布局方法還進一步包括：由兩個以上不同的晶圓，分別製作出多個LED晶片（步驟S101(d)）；通過電氣特性測試或者光學特性測試，以決定該些LED晶片的晶片等級是屬於A級、B級或C級（步驟S102(b)）；以及將屬於A級晶片等級的LED晶片、屬於B級晶片等級的LED晶片以及屬於C級晶片等級的LED晶片，分別定義為第一LED晶片1、第二LED晶片2以及第三LED晶片3（步驟S103(b)）。舉例來說，配合圖5所示，本創作的混搭不同等級LED晶片的布局方法在步驟S104(b)前，進一步還可通過切割兩個以上不同的晶圓（圖中未繪示），以製作出多個LED晶片；其中，兩個以上晶圓可為大小不同。接著，將該些LED晶片依據晶片等級定義為第一LED晶片1、第二LED晶片2或第三LED晶片3。然而，本創作不以上述所舉的例子為限。In addition, as shown in FIG. 5, the layout method of mixing and grading LED wafers of different levels in the present invention includes step S104 (b) of providing the first LED wafers 1, the second LED wafers 2 and the third LED wafers 3. ), The layout method further includes: producing a plurality of LED wafers from two or more different wafers (step S101 (d)); and determining the wafers of the LED wafers through an electrical characteristic test or an optical characteristic test. A grade is a grade A, B, or C (step S102 (b)); and an LED wafer belonging to a grade A wafer grade, an LED wafer belonging to a grade B wafer grade, and an LED wafer belonging to a grade C wafer grade are defined separately. The first LED wafer 1, the second LED wafer 2, and the third LED wafer 3 (step S103 (b)). For example, as shown in FIG. 5, before this step S104 (b), the layout method of mixing and matching LED wafers of different grades can be further cut by cutting more than two different wafers (not shown in the figure) to A plurality of LED wafers are fabricated; among them, more than two wafers may be different in size. Then, the LED chips are defined as the first LED chip 1, the second LED chip 2 or the third LED chip 3 according to the wafer level. However, this creation is not limited to the examples given above.
最後，配合圖5至圖7所示，將該些第一LED晶片1、該些第二LED晶片2與該些第三LED晶片3交錯設置在一電路基板B上（步驟S105(b)）。Finally, as shown in FIGS. 5 to 7, the first LED chips 1, the second LED chips 2 and the third LED chips 3 are staggered on a circuit substrate B (step S105 (b)). .
舉例來說，配合圖6及圖7所示，在該些LED晶片依據晶片等級分別定義為第一LED晶片1、第二LED晶片2以及第三LED晶片3後，可在電路基板B上而交錯設置第一LED晶片1、第二LED晶片2以及第三LED晶片3，並將第二LED晶片2設置在第一LED晶片1與第三LED晶片3之間。For example, as shown in FIG. 6 and FIG. 7, after these LED chips are respectively defined as the first LED chip 1, the second LED chip 2 and the third LED chip 3 according to the wafer level, they can be formed on the circuit substrate B. The first LED wafer 1, the second LED wafer 2, and the third LED wafer 3 are staggered, and the second LED wafer 2 is disposed between the first LED wafer 1 and the third LED wafer 3.
藉此，本創作的混搭不同等級LED晶片的布局方法可通過上述技術方案，將不同等級LED晶片以混搭方式設置在電路基板B上，而可利用屬於A級晶片等級的第一LED晶片1彌補屬於C級晶片等級的第三LED晶片3的效能或性能不足（例如亮度或波長，但不以此為限），以使第一LED晶片1與第三LED晶片3一起所產生的效能（如圖7中虛框所示）與第二LED晶片2相近，進而達到均勻效能的功效，並能避免資源浪費的問題。此外，本創作的混搭不同等級LED晶片的布局方法也可根據市場或使用者的特定需求（例如特定的電氣特性或特定的光學特性，但不以此為限），以混搭的方式將該些第一LED晶片1、該些第二LED晶片2與該些第三LED晶片3布局在電路基板B上，以產生符合該特定需求的顯示裝置D。In this way, the layout method of mixing and grading LED chips of different grades can be arranged on the circuit substrate B in a mashup manner through the above technical solution, and can be compensated by using the first LED chip 1 belonging to the level A chip grade. The efficiency or performance of the third LED chip 3 belonging to the C-level chip level is insufficient (such as brightness or wavelength, but not limited to this), so that the efficiency generated by the first LED chip 1 and the third LED chip 3 together (such as (Shown by a dashed box in FIG. 7) is similar to the second LED chip 2, thereby achieving uniform efficiency and avoiding the waste of resources. In addition, the layout method of mixing and matching different grades of LED chips in this creation can also be based on the specific needs of the market or users (such as specific electrical characteristics or specific optical characteristics, but not limited to this). The first LED chip 1, the second LED chips 2 and the third LED chips 3 are arranged on a circuit substrate B to generate a display device D that meets the specific requirements.
更進一步來說，配合圖6及圖8所示，本創作的混搭不同等級LED晶片的布局方法也可以其他佈局方式將該些第一LED晶片1、該些第二LED晶片2以及該些第三LED晶片3設置在電路基板B上，如圖7所示。通過此設置方式，同樣可使第一LED晶片1與第三LED晶片3一起所產生的效能與第二LED晶片2相近，進而達到均勻效能的功效。Furthermore, as shown in FIG. 6 and FIG. 8, the layout method of mixing and grading LED chips of different levels in the present invention may also use other layout methods to place the first LED chips 1, the second LED chips 2, and the first LED chips 2. The three LED wafers 3 are disposed on a circuit substrate B, as shown in FIG. 7. Through this setting method, the efficiency generated by the first LED chip 1 and the third LED chip 3 can be similar to that of the second LED chip 2, thereby achieving uniform efficiency.
[實施例的有益效果][Advantageous Effects of the Embodiment]
本創作的其中一有益效果在於，本創作所提供的混搭不同等級LED晶片的布局方法，其能通過“提供多個第一LED晶片1以及多個第二LED晶片2，第一LED晶片1與第二LED晶片2具有不同的晶片等級”以及“將該些第一LED晶片1與該些第二LED晶片2交替設置在電路基板B上”的技術方案，以達到混搭不同等級LED晶片的功效。One of the beneficial effects of this creation is that the layout method of mixing and matching different levels of LED chips provided by this creation can be achieved by "providing multiple first LED chips 1 and multiple second LED chips 2, The second LED chip 2 has a different chip level "and the technical solution of" the first LED chips 1 and the second LED chips 2 are alternately arranged on the circuit substrate B "to achieve the effect of mixing and matching LED chips of different levels. .
本創作的另外一有益效果在於，本創作所提供的混搭不同等級LED晶片的布局方法，其能通過“由同一個晶圓W或者不同晶圓W，製作出多個LED晶片”、“通過電氣特性測試或者光學特性測試，將該些LED晶片至少區分為具有相同晶片等級的多個第一LED晶片1以及具有相同晶片等級的多個第二LED晶片2，第一LED晶片1與第二LED晶片2具有不同的晶片等級”以及“將該些第一LED晶片1與該些第二LED晶片2設置在同一電路基板B上”的技術方案，以混搭不同等級LED晶片的功效。Another beneficial effect of this creation is that the layout method for mixing and grading LED wafers provided by this creation can be used to "make multiple LED wafers from the same wafer W or different wafers W", "through electrical Characteristic test or optical characteristic test, at least these LED wafers are divided into a plurality of first LED wafers 1 having the same wafer level and a plurality of second LED wafers 2 having the same wafer level, the first LED wafer 1 and the second LED The wafer 2 has different wafer levels "and the technical solution of" setting the first LED wafers 1 and the second LED wafers 2 on the same circuit substrate B "to mix and match the efficacy of LED wafers of different levels.
本創作的另外再一有益效果在於，本創作所提供的混搭不同等級LED晶片的顯示裝置，其能通過“多個第一LED晶片1分別設置在電路基板B上”、“多個第二LED晶片2分別設置在電路基板B上”以及“該些第一LED晶片1具有相同的晶片等級，該些第二LED晶片2具有相同的晶片等級，第一LED晶片1與第二LED晶片2具有不同的晶片等級”的技術方案，以混搭不同等級LED晶片的功效。Another beneficial effect of this creation is that the display device provided by this creation that mixes and distributes LED chips of different grades can pass “a plurality of first LED chips 1 respectively disposed on the circuit substrate B” and “a plurality of second LEDs”. The wafers 2 are respectively disposed on the circuit substrate B ”and“ the first LED wafers 1 have the same wafer level, the second LED wafers 2 have the same wafer level, and the first LED wafer 1 and the second LED wafer 2 have "Different chip levels" technology solution to mix and match the efficacy of different levels of LED chips.
更進一步來說，本創作所提供的混搭不同等級LED晶片的布局方法及混搭不同等級LED晶片的顯示裝置通過上述技術方案，以混搭方式將不同等級LED晶片（如屬於A級晶片等級的第一LED晶片1及屬於B級晶片等級的第二LED晶片2）設置在電路基板B上，不僅可達到均勻效能的功效，也解決習知技術所存在的資源浪費問題；並且，也可根據市場或使用者的特定需求（例如特定的電氣特性或特定的光學特性，但不以此為限），以混搭的方式將該些第一LED晶片1與該些第二LED晶片2布局在電路基板B上，以產生符合該特定需求的客製化顯示裝置D。Furthermore, the layout method of mashing different grades of LED chips and the display device mashing different grades of LED chips provided by this creation use the above technical solution to mix and match different grades of LED chips (such as the first class of A grade chip). The LED chip 1 and the second LED chip 2 belonging to the class B chip class 2) are arranged on the circuit substrate B, which can not only achieve the uniform efficiency, but also solve the problem of waste of resources in the conventional technology; and can also be based on the market or The specific needs of the user (such as specific electrical characteristics or specific optical characteristics, but not limited to this), the first LED chips 1 and the second LED chips 2 are arranged on the circuit substrate B in a mash-up manner. To generate a customized display device D that meets this specific requirement.
以上所公開的內容僅為本創作的優選可行實施例，並非因此侷限本創作的申請專利範圍，所以凡是運用本創作說明書及圖式內容所做的等效技術變化，均包含於本創作的申請專利範圍內。The content disclosed above is only the preferred and feasible embodiment of this creation, and therefore does not limit the scope of the patent application for this creation. Therefore, any equivalent technical changes made using this creation specification and diagram content are included in this creation application Within the scope of the patent.
D‧‧‧顯示裝置
1‧‧‧第一LED晶片
2‧‧‧第二LED晶片
3‧‧‧第三LED晶片
W‧‧‧晶圓
B‧‧‧電路基板D‧‧‧display device
1‧‧‧The first LED chip
2‧‧‧Second LED Chip
3‧‧‧ The third LED chip
W‧‧‧ Wafer
B‧‧‧Circuit Board
圖1為本創作第一實施例的混搭不同等級LED晶片的布局方法的流程示意圖。FIG. 1 is a schematic flowchart of a layout method of mixing and grading LED chips of different levels according to the first embodiment of the present invention.
圖2為本創作第一實施例的晶圓的示意圖。FIG. 2 is a schematic diagram of a wafer according to a first embodiment of the present invention.
圖3為本創作第一實施例的步驟S105(a)的第一示意圖。FIG. 3 is a first schematic diagram of step S105 (a) of the first embodiment of the creation.
圖4為本創作第一實施例的步驟S105(a)的第二示意圖。FIG. 4 is a second schematic diagram of step S105 (a) of the first embodiment of the creation.
圖5為本創作第二實施例的混搭不同等級LED晶片的布局方法的流程示意圖。FIG. 5 is a schematic flowchart of a layout method of mixing and grading LED chips of different levels according to the second embodiment of the present invention.
圖6為本創作第二實施例的晶圓的示意圖。FIG. 6 is a schematic diagram of a wafer according to a second embodiment of the present invention.
圖7為本創作第二實施例的步驟S105(b)的第一示意圖。FIG. 7 is a first schematic diagram of step S105 (b) of the second embodiment of the creation.
圖8為本創作第二實施例的步驟S105(b)的第二示意圖。FIG. 8 is a second schematic diagram of step S105 (b) of the second embodiment of the creation.
Claims (4)
一電路基板；
多個第一LED晶片，其分別設置在該電路基板上；以及
多個第二LED晶片，其分別設置在該電路基板上；
其中，該些第一LED晶片具有相同的晶片等級，該些第二LED晶片具有相同的晶片等級，該第一LED晶片與該第二LED晶片具有不同的晶片等級。 A display device for mixing and matching LED chips of different levels includes:
A circuit substrate;
A plurality of first LED wafers are respectively disposed on the circuit substrate; and a plurality of second LED wafers are respectively disposed on the circuit substrate;
The first LED wafers have the same wafer level, the second LED wafers have the same wafer level, and the first LED wafer and the second LED wafer have different wafer levels.
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| TWI748599B (en) * | 2020-08-14 | 2021-12-01 | 矽品精密工業股份有限公司 | Matching chips system and method of matching chips |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI748599B (en) * | 2020-08-14 | 2021-12-01 | 矽品精密工業股份有限公司 | Matching chips system and method of matching chips |
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