M440483 五、新型說明： 【新型所屬之技術領域】 -種電腦祕與電子裳置，_有關於—種外接励s開機的 系統、橋接裝置與整合式晶片組。 【先前技術】 隨著微機電技術的快速發展，使得電子裝置的功能越發的多 樣化。-般而t為謎動電.子裝置的運作需要軟體與硬體的相互 配合。而硬體方面多會以_(f聰赠e)作為與軟體的溝通介面。 舉例來說，基本輸端料統（簡·asieinput/_ts_ m〇S)相對於_計算機（例如：個人電腦或伺_，可以將其視 為主機板（mainboard)的硬體運作核心。若是儲存裝置中之咖 碼發生毀損或資料不完整的情況時，將使得電齡統無法順利開 在此f月況下，為了避免因BI〇s損壞而導致電腦▲ 作，習知細_纽職置編多麵刪碼^ =定優先 ’ #遭__，倾序_其他組儲存裳 置’崎決只有单組助s時的窘境。但使用前述方式，雖 =無法開機關題，卻也因植費過多的製造成本而變得^ 【新型内容】 #於以上的問題，本新型在於提供一種外接職 系統，可藉峨崎置中―物腦 M440483 處理。 =型所揭露之外接㈣s開機的電腦系統包括外接儲存裝 、建贿裝置、晶片組與橋接裝置。外接儲存裳置中的延伸 存預設跡晶咖根據預設開機狀態 板_'4，_触預設刪歧伸ΒΙ(^橋接 性連接於内建儲錢置與該晶片組。橋撼置包括第-切換開 :、弟-切換開關、微控制器與轉換單心第―切換 接於轉換單元與微控制器。第一切換開關選擇性的連接於晶片 —且第城開關經由第一連接介面連接於外接儲存農置。第 2換開_性連接於“組與微控湘。第二切換_選擇性 2接於喊儲縣置或賴單元，料二切換_經由第二連 ==於__。轉換單元_第—連接介面之訊 唬轉換為弟二連接介面之訊號。 微控根據預設職狀態斷開第二_開關與轉換單元的 =’使得^組讀取_儲存裝㈣預設㈣s。微控制器根據 備援開機狀態斷開第與晶片組的連接，並且第二切換 ==連接於轉換早凡，使得晶片組讀取外接儲存農置的延伸 本新型另提出-種橋_置，其係包括第—切制關、第二 切換開關、微控制器與轉換單元。第—切換開關電性連接於轉換 早咕微控制器。第-切換開關選擇性的連接於晶片組，且第一 切換開關經由第-連接介面連接於外接儲存裝置。第二切換開關 •切換開關選擇性的連接於内 電性連接於晶片組與微控制器。第M440483 V. New description: [New technology field] - A kind of computer secret and electronic display, _ there is a system, bridge device and integrated chip set for external excitation. [Prior Art] With the rapid development of MEMS technology, the functions of electronic devices are increasingly diversified. In general, t is the mystery. The operation of the sub-device requires the cooperation of software and hardware. On the other hand, the hardware side will use _(f smart e) as the communication interface with the software. For example, the basic input system (Jane · asieinput / _ts_ m 〇 S) relative to the _ computer (for example: personal computer or servo _, can be regarded as the hardware operating core of the mainboard (mainboard). If it is stored If the coffee code in the device is damaged or the data is incomplete, the battery system will not be able to open smoothly under this condition. In order to avoid the computer ▲ caused by the damage of BI〇s, the new _ Editing multiple faces to delete codes ^ = prioritizing ' #被__, 排序_ other groups store the singer's singularity only when the single group helps s. But using the above method, although = can not open the subject, but also because The cost of excessive planting costs has become ^ [New content] # In the above problem, the present invention is to provide an external job system, which can be handled by Miyazaki Seto-Minus M440483. The type is exposed to the external (4) s boot The computer system includes an external storage device, a bribe-making device, a chip set and a bridge device. The extended storage preset in the external storage shelf is based on the preset boot state board _'4, _ touch preset defragmentation (^ Bridging is connected to the built-in piggy bank and the chipset. The device includes a first-switching switch: a dice switch, a microcontroller, and a conversion single-core switch-switched to the conversion unit and the microcontroller. The first switch is selectively connected to the chip - and the first switch is first The connection interface is connected to the external storage farm. The second exchange is _ sexual connection to the "group and micro control Xiang. The second switch _ selective 2 is connected to the shouting county or Lai unit, the second switch _ via the second connection = = in __. The conversion unit _ the first connection interface is converted to the signal of the second connection interface. The micro control disconnects the second _ switch and the conversion unit according to the preset status = 'make the group read _ store Install (4) Preset (4) s. The microcontroller disconnects the connection with the chipset according to the backup power-on state, and the second switch == is connected to the conversion, so that the chipset reads the extension of the external storage farm. - a bridge _ set, which includes a first - cut off, a second switch, a microcontroller and a conversion unit. The first - switch is electrically connected to the switch early switch. The first switch is selectively connected On the chip set, and the first switch is connected via the first connection Plane connection to the external storage device. • the second switch is selectively connected to a switch electrically connected to the chip set of the microcontroller. The first
建儲存裝置或筒A 於内建儲紐置。轉換單元肋將第 ^面連接 一、鱼姐人t . 竹弟·"面之訊號轉換為第 隱娃丨之訊琥。微控制器根據預設開機狀態斷 關與轉換單元物h咖置的預= =8，微控制器根據備援開機狀態斷開第一切換開關與晶片ς 儲〇 Γ4—她則純胁無單元，储^組讀取外接 儲存裝置的延伸Bios。 ^新細出-種整合式晶版，可以.選擇内建的預設刪 或卜接的延伸BI0S進行開機。本新型的整合式晶片組包括第一切 =關、第二:換開關、微控制器與轉換私。第—切換開關電 '接於轉換料與微控制器。第—_開關經由第—連接介面 連接於外接儲存裝置。第二切換開關電性連接於微控制器。第二 _切換關選擇性的連接於内建儲存裝置或轉換單元，且第二切換 ._驗由第二連接介面連接於内建儲存裝置。轉換單元用以將第 #連接/1面之喊轉換為第二連接介面之訊號。微控制器根據預 .設開機狀態斷開第二切換開關與轉換單元的連結，用以讀取内建 -儲存裝置的預設BI0S，微控制器根據備援開機狀態斷開第一切換 開關與晶片組的連接’並且第二切換開關連接於轉換單元，用以 讀取外接儲存裝置的延伸BIOS。 本新型所提出的橋接裝置可崎f腦系統於開機的過轾中直 接透過外接儲存聚置讀取所儲存的延伸BI〇S，進而提供電腦系統 M440483 開機所需的BI0S。相較於習知技術而言，本新型不需透過使用者 的手動更換1勒部的腦S，就可崎縣職腿§毁損的電 腦進行開機的處理。 有關本新型的特徵與實作，兹配合圖式作最佳實施例詳細說 明如下。 【實施方式】 本新型所述的電腦系統可以是但不限定為個人電腦⑽ computer) > (notebook) > (server) ^ ^ (tablet)或其他具有開機處理的計算機之令。並且本新型除了應 用在BI〇S中，也可以應用在延伸韋刃體介面BIOS (Extensible FirmwareInterfaces_，EFIBI〇s)中。請參考第 ia 圖所示， ”係為本新型之整體架構示意圖。本新型的電腦系統包括：外接 儲存裝置100與電腦本體200。 外接儲存裝置⑽錢過第—連接介面131連接於電腦本體 2Q0。外接儲存|置⑽用以儲存—延伸m⑽q。外接儲存裝置 100的種類可以疋快閃記憶體（FlashmemGry)、記憶卡（刪卿 card)或外接式硬碟（extremeharddisk)。若電腦本體·在開機 過程中發生錯誤，則電腦本體將從外接儲存裝置則中讀取 =BI0S11G ’用以進行開機的相關程序（其切換過程將於後文 新型的第-連接介面131可根據外接贿裝置觸的種類 所決定。舉例來說’若外接儲存裝置漏為快閃記憶體，則第— M440483 連接介面ni可以是通用序列匯流排伽鄉心制如，口即 或是火線（fire wire);若外接儲存裝置1〇〇為安全數據記憶卡 (S⑽e Digital㈤）或CF記憶卡（Q)mpaet _咖）時， 則第-連接介面131可以透過所屬的存取控制器與電腦本體· 相連接。 電腦本體2GG至少包括電力單元21()、處理單元22〇、内建儲 存裝置230、晶片組240與橋接裝置25〇。電力單元21〇電性連接 於處理單元220 (processor)、内建儲存裝置23〇、晶片組與橋 接裝置250。電力單元210用以供應各元件的運作電力。在電腦本 體運觸過程中，處理單元22〇係根據所輸入的指令進行相 關的運算’並回應所運算的結果。而在開機的過程中，處理單元 220會根據内建儲存裝i 23〇中的預設聰现之内容進行硬體 周邊的偵測與開機自檢（P〇wer_〇nSelfTest，p〇ST)等程序。 春喊儲存裝置23〇用以儲存預設臟μ卜預設刪231係 為電腦本體200在正常開機時所用的相關資訊.。一般而言，内逢 儲存裝置23.0的種類可以為互補式金屬_氧化層半導體 (C〇mplementary Metal_0xide_ ，簡稱 -記憶體（Flash me騰y)或電子抹料可複寫唯讀記憶體 (Electncally-Erasable Programmable Read-Only Memory， EEPROM)之中。 橋接裝置250透過第—連接介面131連接於外接儲存裝置 1〇〇。橋接裝置250係透過第二連接介面132分別連接於日日日片組撕 7 M440483 與内建儲存襄置230。第一連接介面131的種類相異於第二連接介 面132的種類。而第二連接介面η]的種類係為低腳位計數（l〇wThe storage device or the cylinder A is built in the built-in storage. The conversion unit rib connects the first surface, and the fish sister's t. The bamboo brother's signal is converted into the first hidden baby. The microcontroller is turned off according to the preset power-on state and the conversion unit is pre-==8, and the microcontroller disconnects the first switch and the chip according to the backup power-on state. The storage group reads the extended Bios of the external storage device. ^New fine-integrated crystal plate, you can select the built-in preset to delete or extend the BI0S to boot. The novel integrated chip set includes a first cut = off, a second: change switch, a microcontroller and a conversion private. The first - the switch is electrically connected to the converter and the microcontroller. The first__ switch is connected to the external storage device via the first connection interface. The second switch is electrically connected to the microcontroller. The second switch is selectively connected to the built-in storage device or the conversion unit, and the second switch is connected to the built-in storage device by the second connection interface. The conversion unit is configured to convert the #connection/1 face shout into the signal of the second connection interface. The microcontroller disconnects the connection between the second switch and the conversion unit according to the pre-set state, and reads the preset BI0S of the built-in storage device, and the microcontroller disconnects the first switch according to the backup power-on state. The connection of the chip set 'and the second switch is connected to the conversion unit for reading the extended BIOS of the external storage device. The bridging device proposed by the present invention can directly store the stored extended BI〇S through the external storage aggregation in the booting process, thereby providing the BI0S required for the computer system M440483 to be turned on. Compared with the prior art, the present invention does not need to manually replace the brain S of the 1 part of the user, and the computer can be turned on by the smashed computer of the Kawasaki leg. The features and implementations of the present invention are described in detail below with reference to the drawings. [Embodiment] The computer system of the present invention may be, but is not limited to, a personal computer (10) computer) > (notebook) > (server) ^ ^ (tablet) or other computer with boot processing. In addition to being applied in BI〇S, the present invention can also be applied to the Extensible Firmware Interfaces (EFIBI〇s). Please refer to the figure ia, "This is a schematic diagram of the overall architecture. The computer system of the present invention includes: an external storage device 100 and a computer body 200. The external storage device (10) is over-connected - the connection interface 131 is connected to the computer body 2Q0 External storage | set (10) for storage - extension m (10) q. The type of external storage device 100 can be flash memory (FlashmemGry), memory card (deleted card) or external hard disk (extreme harddisk). If an error occurs during the booting process, the computer body will read from the external storage device = BI0S11G 'related procedures for booting (the switching process will be followed by a new type of connection interface 131 that can be touched according to the external bribe device) For example, if the external storage device is leaking to the flash memory, the M440483 connection interface ni can be a universal serial bus, such as a mouth or a fire wire; When the storage device 1 is a secure data memory card (S(10)e Digital(5)) or a CF memory card (Q)mpaet_coffee), the first connection interface 131 can transmit through the associated memory. The controller body is connected to the computer body. The computer body 2GG includes at least a power unit 21 (), a processing unit 22, a built-in storage device 230, a chip set 240, and a bridge device 25. The power unit 21 is electrically connected to the processing unit. 220 (processor), built-in storage device 23, chip set and bridge device 250. The power unit 210 is used to supply the operating power of each component. During the operation of the computer body, the processing unit 22 is configured according to the input command. The related operation 'receives the result of the operation. In the process of starting up, the processing unit 220 performs hardware peripheral detection and power-on self-test according to the preset content of the built-in storage device ( P〇wer_〇nSelfTest, p〇ST), etc. The spring shouting storage device 23 is used to store the preset dirty micro-buffer preset 231 is the relevant information used by the computer body 200 during normal booting. Generally speaking, The type of storage device 23.0 can be a complementary metal-oxide semiconductor (C〇mplementary Metal_0xide_, abbreviation - memory (Flash meton y) or electronic rewritable rewritable memory (Electncally The bridge device 250 is connected to the external storage device 1 through the first connection interface 131. The bridge device 250 is respectively connected to the Japanese and Japanese film groups through the second connection interface 132. 7 M440483 and built-in storage device 230. The type of the first connection interface 131 is different from the type of the second connection interface 132. The type of the second connection interface η] is a low pin count (l〇w
Ping Count ’ LPC)、通用型之輸入輸出（General Purpose I/O， GPI〇)、内部整合電路（Inter-IntegratedCircuit，I2C)或序列周邊 面匯流排（Serial Peripheral Interface Bus，SPI)。晶片組 240 的 種類可以是南橋晶片組或整合型晶片組。其中整合型晶片組係為 北橋晶片組（North Bridge Chipset)與南橋晶片組（Scmth Bridge Chipset)之整合型態。 3月麥考第1B圖所示，其係為本新型的橋接裝置之架構示意 圖。在本新型的橋接裝置25〇中更包括第一切換開關251、第二切 換開關252、微控制器253與轉換單元254。第-切換開關251電 性連接於轉換單元254與微控制器253。第一切換開關251可選擇 性的連接於晶片組240。而第一切換開關251在正常開機的狀態或 ，乍寺第切換開關251係連接於外接儲存裝置1〇〇,使得電腦 本體200運作時可以透過晶片組24〇直接向外接儲存裝置廟進 行資料的存取。第-切換_ 251經由第—連接介面i3i連接於 外接儲存裝置1〇〇。第二切換開關2S2電性連接於晶片組與微 工制253第一切換開關252選擇性的連接於内建儲存裝置 或轉，早凡254⑶選擇方式將於後文所述）。第二切換開關252 、’由第一連接介面132連接於内建儲存裝置mo。 轉換早兀254用以將第—連接介面131之訊號轉換為第二連 接"面132之訊號。若以第—連接介面ΐ3ι為脱而第二連接介 M440483 面132為SH為例，轉換單元254透過聰連接於外接儲存裝置 、透糊連接於内建儲存裝㈣。轉換單元25 服與肥的指令長度、接腳或工作時脈進行數據的轉譯。 、為清楚說明本新型的運作流程，還請參考第2 _示，其係 ==之運作流程示意圖。本新型的外㈣⑽的開機方法包括 步驟㈣：將橋接裝置經由第一連接介面連接於電腦本體的Ping Count ’ LPC), General Purpose I/O (GPI〇), Inter-Integrated Circuit (I2C) or Serial Peripheral Interface Bus (SPI). The type of wafer set 240 can be a south bridge chip set or an integrated chip set. The integrated chipset is an integrated version of the North Bridge Chipset and the Scmth Bridge Chipset. As shown in Figure 1B of March, it is a schematic diagram of the structure of the new bridging device. Further included in the bridge device 25 of the present invention is a first changeover switch 251, a second changeover switch 252, a microcontroller 253, and a conversion unit 254. The first-switch 251 is electrically connected to the conversion unit 254 and the microcontroller 253. The first changeover switch 251 is selectively coupled to the wafer set 240. The first switch 251 is normally turned on or the switch 251 is connected to the external storage device 1 so that the computer body 200 can directly access the storage device through the chip set 24 to perform data. access. The first-switching_251 is connected to the external storage device 1 via the first connection interface i3i. The second switch 2S2 is electrically connected to the chip set and the microprocessor 253 first switch 252 is selectively connected to the built-in storage device or the switch, and the 254 (3) selection mode will be described later). The second changeover switch 252, ' is connected to the built-in storage device mo by the first connection interface 132. The conversion early 254 is used to convert the signal of the first connection interface 131 into the signal of the second connection " face 132. For example, if the first connection interface ΐ3ι is off and the second connection M440483 surface 132 is SH, the conversion unit 254 is connected to the external storage device via Cong, and is connected to the built-in storage device (4). The conversion unit 25 performs the translation of the data by the instruction length, the pin or the working clock of the fat. In order to clearly explain the operation process of this new model, please also refer to the second _, which is a schematic diagram of the operation flow of ==. The booting method of the external (4) (10) of the present invention includes the step (4): connecting the bridge device to the computer body via the first connection interface
橋縣置，外接儲存裝置具有延伸BI0S 步驟S22G :將電腦本體的内建儲存裝置經由第二連接裝置連 接於橋接農置，内建儲存裳置具有預設BIOS ; 步驟S230 :令電腦本體進行開機； 步驟隊電腦本體根據預設開機狀態，透過橋接装置向内 建儲存裝置存取預設BI0S，橋接裝置並將預設 > BIOS傳送給晶片組；以及 .步驟齡電腦本體根據備軸絲，令橋撼置向外接 儲存裝置存取延伸助s，橋魏置將延伸邮§ 傳送給晶片組。 首先，將具⑽腦❺卜接梅請連接於於電腦本 體介面131°第—触介㈣酬接於橋^ 置250橋接裳置250也同時連接於内建儲存裝置现。在本_ 中為區分正常職與不正常開機的情況。所以紅常的開機定 為預設開機狀態，而不正常的開齡義為備援開機狀態。我. 9 纟開機的疋義為係為處理單元220可以透過晶片組240 向内建儲存裝置230取得預設βΙ_。而不正常開機指的是内 ^存裝置230發生毁損（erash)或離線（池㈣等狀態，使 :曰曰片、、且24〇無法向内建緒存裂置MO取得預設腦幻η。因此 晶片組240會轉向外接儲存裝置1〇〇並存取延伸腿龍。 “為月t·判另】預„又開機狀怨與備援開機狀態，所以本新型係透過 从控制器253對開機衫正常進行判斷。本新型的微控制器⑸ 中更包括計時抑贿）、計數器（―咖）或除錯埠（Debugp〇rt) 之任-（或任意之組合）。微控制器253可根據前述元件進行開機 正確或錯誤的γ貞測。 一般而言’電腦本體觸會以預設開機狀態的方式進行開機。 亚且晶片組24〇會經由橋接裝置-向内建儲存裝置挪取得預 設rs231。請參考第3圖所示，其係為本新型之預設開機狀態 不思圖。因此橋接裝置⑽可從中接獲來自於内建儲存裝置230 ==。請參考第3圖中的粗黑線，其係為資料的傳輸路徑。 弟*3圖的弟二切換開關252在預設間媸肚$了 a ⑽機狀態下會斷開與轉換單元 胸連接，使得晶片⑽會直接向内建館存裝㈣進行雜 若是微控制器253採用計時器的_方式。計時器在開機經 過預設開機時間且此-期間t未接收到來自於處科元⑽ 湖請應糊機峰猶她嶋 Γ ’微控制器253也可以採用外部強制輸入的_方 式。_本體勘開機時，使用者可以經由跳線器㈤㈣ M440483 BIOS231毀損的電腦進行開機的處理。 雖然本新_祕之雛實施_露如上，財並非用以限 定本新型，任域習減技藝者’林卿本新型之精神和範圍 内’當可作些許之更動與潤飾’因此本新型之專娜護範圍須視 本說明書所附之申請專利範圍所界定者為準。 【圖式簡單說明】 第1A圖係為本新型之整體架構示意圖。 第1B圖係為本新型的橋接裝置之架構示意圖。 第2圖係為本新型之運作流程示意圖。 第3圖係為本新型之預設開機狀態示意圖。 第4圖係為本新型之備援開機狀態示意圖。 第5圖係為本新型的另一實施態樣之架構示意圖。 【主要元件符號說明】 外接儲存裝置 100 、 510 延伸BIOS 110 、 511 第一連接介面 131 苐二連接介面 132 電腦本體 200 電力單元 210 處理單元 220 > 540 内建儲存裝置 230 > 520 預設BIOS 231 、 521 13 M440483 晶片組 240 、 530 橋接裝置 250 第一切換開關 251 ' 531 第二切換開關 252 ' 532 微控制器 253 、 533 轉換單元 254 、 534The bridge storage device has an extension BI0S step S22G: connecting the built-in storage device of the computer body to the bridge farm via the second connection device, and the built-in storage device has a preset BIOS; Step S230: turning the computer body on The step team computer body accesses the preset BI0S to the built-in storage device through the bridge device according to the preset power-on state, the bridge device transmits the preset > BIOS to the chip set; and the step-by-step computer body according to the spare axis wire, The bridge is placed outside the storage device to access the extension s, and the bridge will send the extension § to the chipset. First, connect the (10) brain ❺ 接 梅 请 131 131 131 电脑 电脑 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 131 四 四 四 四 四In this _, the situation is to distinguish between normal and abnormal startup. Therefore, the red boot is set to the default boot state, and the abnormal start age is the backup boot state. The meaning of the 9-inch boot is that the processing unit 220 can obtain the preset βΙ_ from the built-in storage device 230 through the wafer set 240. Inappropriate booting means that the internal storage device 230 is erashed or offline (pool (four), etc., so that: 曰曰片,, and 24〇 can not be built into the MO to obtain the preset brain illusion Therefore, the chip set 240 will be turned to the external storage device 1 〇〇 and access the extended leg dragon. "For the month t · judgment another" pre-opening resentment and backup boot state, so the new system through the controller 253 pairs The boot shirt is judged normally. The new type of microcontroller (5) further includes a time-suppressing bribe, a counter ("coffee" or a debugger (Debugp〇rt) - (or any combination). The microcontroller 253 can initiate a correct or erroneous gamma detection based on the aforementioned components. In general, the computer body touch will be turned on in a preset power-on state. The sub-chip group 24〇 will acquire the preset rs231 via the bridge device to the built-in storage device. Please refer to Figure 3, which is the default power-on state of the new model. Therefore, the bridging device (10) can receive from the built-in storage device 230 ==. Please refer to the thick black line in Figure 3, which is the transmission path of the data. The brother 2 switch 252 of the younger brother*3 will disconnect the chest from the conversion unit in the state of a (10) machine, so that the chip (10) will be directly stored in the built-in library (4). 253 uses the timer's _ mode. The timer has been turned on for the preset power-on time and this period - period t has not been received from the department (10). The lake can also use the external forced input mode. _ When the main body is booted, the user can perform the booting process via the jumper (5) (4) M440483 BIOS231 damaged computer. Although the implementation of this new _ secret _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The scope of the application shall be subject to the definition of the scope of the patent application attached to this specification. [Simple description of the diagram] Figure 1A is a schematic diagram of the overall architecture of the new model. Figure 1B is a schematic diagram of the architecture of the novel bridging device. Figure 2 is a schematic diagram of the operation of the new model. Figure 3 is a schematic diagram of the preset power-on state of the present invention. Figure 4 is a schematic diagram of the new backup state. Figure 5 is a schematic diagram of another embodiment of the present invention. [Main component symbol description] External storage device 100, 510 Extended BIOS 110, 511 First connection interface 131 Second connection interface 132 Computer body 200 Power unit 210 Processing unit 220 > 540 Built-in storage device 230 > 520 Default BIOS 231, 521 13 M440483 chip set 240, 530 bridge device 250 first switch 251 ' 531 second switch 252 ' 532 microcontroller 253, 533 conversion unit 254, 534
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