M419198 五、新型說明： 【新型所屬之技術領域】 本創作涉及電子式可抹除可編程唯讀記憶體(ElectricallyErasableM419198 V. New description: [New technical field] This creation involves electronic erasable programmable read-only memory (Electrically Erasable)
Programmable Read-Only Memory，EEPROM)產業領域，特別涉及一種 EEPROM資料防丟失電路結構。 【先前技術】 EEPROM χ種電;原失效後資料不|失的儲存晶#。胞可在電 腦上或專用設備上抹除已有資訊，重新編程。一般用在即插即用。 第1圖係目前EEPROM電路的連接示意圖。圖式中eepr〇m晶片的 备=WP為該裝置的寫入保護接腳，當其為高位準時開啓寫入保護機制； =為低位準時無寫入保護。這種電路結構使得目前的eepr〇m為方便燒 錄資料，電路設計上未對其進行寫入保護，實際應用中由於環境的影塑， 容易出現EEPROM資料錯誤、丟失等現象，造成產品無法正常使用。曰 中國申請第200820018796.3號的實用新型專利揭露了一種EEpR〇M資 ^保護電路，包括驗與EE觸M晶片相連接_ 口及用於與咖相連 接的端口，它還包括EEPR0M寫入保護控制電路，cpu透過邱卿 =路與腿0Μ晶片相連接，咖透過控制該·職寫1 保漠控制電路的導通及關閉’從而控制EEpR〇M晶片的供電時序。 峨讀搬梅纟_。蝴输_，且動用 了 CPU來進行控制，成本較高。 【新型内容】 為了克服現有技術的缺陷，本創作揭露了一種EEPR0M資 路結構’其結構簡單，成本低，可在需要的時候對EEPROM燒錚，可有放 防止EEPROM資料錯誤、丢失的現象。 4 了有效 本創作揭露的技術方案如下： ~iHPR〇M f料防丢失電路結構，包括腿〇M晶片、_單元、 _M晶_有寫人保護接腳，該燒_元件設 接腳，該控制早疋進-步包括電源模塊、電阻；該電阻—端與 3 M419198 電源模塊連接，另-端與該寫入保護接腳連接；該 資料元件的閒置接断I 这燒錄 與現有技術相比’本創作結構簡單，成本低，可在需要的時候 EEPROM燒錄資料’可有效防止EEPR〇M資料錯誤、丢失的現象。 【實施方式】 以下結合所附圖式及具體實施例對本創作做進一步的描述。 實施例 S ' 如第2圖所示，-種EEPR0M資料防吾失電路結構包括EEpR〇M 晶片10、控制單S2G'燒錄資料元件3(^EEPR〇M^ ig設置有寫 護接腳，燒錄資料元件30設置有一間置接腳。 在本實施例中，EEPROM晶片10的寫入保護接腳係第七個接腳呢。 燒錄資料元件30的閒置接腳係元件符號3〇1的接腳。 控制單元20進一步包括電源模塊VDD、電阻R1 ;電阻幻一端與 源模塊VDD連接’另-端與EEPR〇M晶片1〇的窝入保護接腳連接。、 同時EEPROM a曰片1〇的寫入保護接腳與燒錄資料元件3〇 腳3〇1連接。且EEPR0M晶片1〇的SCL、SDA連制燒錄資料元件3〇 的對應接腳上。且EEPRQM晶片1〇的VCC接腳連接—塊娜上。 需要對EEPROM晶片10進行冑入保護時，其w寫入保護接腳連接 的燒錄貧料元件30的閒置接腳3〇1空置，則w寫入保護接腳為高位 對EEPROM晶片10進行寫入保護。 一當需要對EEPROM進行資料燒錄時，將與抑寫入保護接腳連接的燒 錄資料元件30的間置接腳3()1接地，則,寫入保護接腳為低位準，解除 其寫入保護狀態。同時，透過給SCL、祖、vcc三個接峨供對應的信 號，從而完成資料燒錄。 與現有技術相比’本創作結構簡單，成本低，可在需要的時候對 EEPROM燒錄資料’可有效防止EEpR〇M f料錯誤、丟失的現象。 、.本創作較佳實施例只是㈣幫助闡述本創作。較佳實施例並沒有詳盡 欽述所有的細節’也軸作僅為所述的具體實施方式。難，根據 本說明書的内容’可作报多的修改和變化。本說明書選取並具體描述這些 4 M449 携 實施例’是為了更好地轉本創作的原理 域技術人員敵好地利用本創作^本創作僅’從而使所屬技術領 蠖範園内。 、邊化，都應落在本創作的保 【圖式簡單說明】 第1圖係目前EEPROM電路連接示意圖；以及 第2圖係本創作實施例一種EEPROM資料防丟失電路結構的電路連接 示意圖。 . 【主要元件符號說明】 1 A0 7 WP 2 A1 8 VCC 3 A2 10 EEPROM晶片 4 VSS 20 控制單元 5 SDA 30 燒錄資料元件 6 SCL 301 閒置接腳Programmable Read-Only Memory (EEPROM) industry, especially related to an EEPROM data loss prevention circuit structure. [Prior Art] EEPROM type of electricity; after the original failure, the data is not lost. The cell can erase existing information and reprogram it on the computer or on a dedicated device. Generally used in plug and play. Figure 1 is a schematic diagram of the connection of the current EEPROM circuit. In the figure, the device = WP of the eepr〇m chip is the write protection pin of the device, and when it is high, the write protection mechanism is turned on; = when it is low, there is no write protection. This kind of circuit structure makes the current eepr〇m easy to burn data, and the circuit design is not written and protected. In actual application, due to environmental shadowing, EEPROM data errors and loss are easy to occur, resulting in products failing to be normal. use. The utility model patent of China Application No. 200820018796.3 discloses an EEpR〇M protection circuit, including the connection with the EE touch M chip, and the port for connecting with the coffee, which also includes the EEPR0M write protection control. The circuit, the cpu is connected to the leg 0Μ chip through Qiu Qing = road, and the control of the power supply timing of the EEpR〇M chip is controlled by controlling the turn-on and turn-off of the control circuit. Read and move to Meilong _. It loses _, and the CPU is used for control, and the cost is high. [New content] In order to overcome the shortcomings of the prior art, the present invention discloses an EEPR0M resource structure, which has a simple structure and low cost, and can burn EEPROM when needed, and can prevent EEPROM data from being mistaken or lost. 4 The technical solutions disclosed in this effective creation are as follows: ~iHPR〇M f material anti-lost circuit structure, including leg 〇M chip, _ unit, _M crystal _ with write protection pin, the burning _ component set pin, the The control early step-by-step includes a power module and a resistor; the resistor end is connected to the 3 M419198 power module, and the other end is connected to the write protection pin; the idle disconnect of the data component is compared with the prior art. Compared with 'this creation structure is simple, the cost is low, and the EEPROM can be burned when needed' can effectively prevent EEPR〇M data from being wrong or lost. [Embodiment] The present invention will be further described below in conjunction with the drawings and specific embodiments. Embodiment S' As shown in FIG. 2, the EEPR0M data anti-fault circuit structure includes an EEpR〇M chip 10 and a control single S2G' burning data component 3 (^EEPR〇M^ ig is provided with a write protection pin, The programming data component 30 is provided with a pin. In this embodiment, the write protection pin of the EEPROM wafer 10 is the seventh pin. The idle pin component of the data component 30 is symbolized by 3〇1. The control unit 20 further includes a power module VDD and a resistor R1; the phantom end of the resistor is connected to the source module VDD, and the other end is connected to the socket of the EEPR 〇M chip 1 。. 〇The write protection pin is connected to the burn data element 3〇3〇1, and the SCL and SDA of the EEPR0M chip are connected to the corresponding pins of the data element 3〇, and the VCC of the EEPRQM chip 1〇 When the EEPROM chip 10 is subjected to the intrusion protection, the idle pin 3〇1 of the programming poor component 30 connected to the protection pin is vacant, and the w write protection pin is w Write protection for the EEPROM chip 10 for high bits. When it is necessary to burn data to the EEPROM, When the inter-pin 3 () 1 of the programming data element 30 connected to the protection pin is grounded, the write protection pin is at a low level, and the write protection state is released. At the same time, the SCL, the ancestor, and the vcc are transmitted. The data is connected to the corresponding signal to complete the data burning. Compared with the prior art, 'this creation structure is simple, the cost is low, and the EEPROM can be burned when needed' can effectively prevent EEpR〇M material errors and loss. The preferred embodiment of the present invention is only (iv) to help explain the present creation. The preferred embodiment does not fully clarify all the details 'also for the specific embodiment described. It is difficult, according to the contents of this specification. 'There are many changes and changes that can be reported. This manual selects and describes these 4 M449 with the embodiment' in order to better transfer the author of the domain. The technicians use this creation in a good way. The technology is in the Fan Park. The edge, should be in the creation of the protection [simplified description of the drawing] Figure 1 is the current EEPROM circuit connection diagram; and Figure 2 is an EEPROM data anti-lost in this creative embodiment The circuit configuration of a circuit connection diagram. The main element SIGNS LIST 1 A0 7 WP 2 A1 8 VCC 3 A2 10 EEPROM wafer 4 VSS 20 control unit 5 SDA 30 programming information element 6 SCL 301 idle pin