M276321 八、新型說明： 【新型所屬之技術領域】 本創作係關於一種靜電放電保護電路，尤指一種適用 於功率晶片之靜電放電保護電路。 【先前技術】 按，任何兩個不同材質的物體摩帛，都有可能產生靜 電（Static Electricity )’當帶有靜電的物體接觸到功率晶 片的金屬接腳（pin)時所產生的瞬間高壓放電，會經由金 1〇屬接腳而損害功帛晶片之内部電路，即所謂靜電放電 (Electro Static Discharge，卿）所造成的損害。功率晶 片内口P白組口又有ESD保護電路，其主要功能為ESD發生 時，在ESD對内部電路造成損害之前，提供適當的放電路 徑以迴避ESD所造成之損#。另夕卜，勘保護電路必須僅 15在ESD發生時才開始運作，否則功率晶片之輸入訊號亦被 移除，輸入訊號將無法傳送至功率晶片之内部電路。 如圖1所不，功率晶片1〇内部皆組設有靜電放電 (ElectrostaHc Dlscharge，ESD)偵測電路 16 以及靜電放 電保護電路18係。當ESD欲從電源輸人端12或信號輸出 20入端14流進功率晶片1〇時，靜電放電偵測電路16將偵測 到此ESD，並輸出致能訊號至靜電放電保護電路18，靜電 放電保護電路18可將此ESD導至接地端，使此高電壓或 大電流無法流入内部電路20,以免對内部電路2〇造成非 預期之傷害。 M276321 • 功率晶片10所輸入之電壓準位較高，習知靜電放 “ 5又电路18内部所使用之電晶體係使用場效電晶體 (则时⑽丁咖咖，_，包括：接面場效應電晶 體JFET)和金氧半場效電晶體（m〇sfet)，其優點為漏 電流較小、體積較小，元件功率消耗較少，然而，其缺點 為反應速度較慢、元件上之跨壓（指汲極與源極）較低， 因而無法滿足功率晶片1G對於反應快速及高跨壓（信號輸 出入端14至接地端上之跨壓）之要求。 本創作之主要目的係在提供一種功率晶片之靜電放 電保護電路，俾能承受較高之輸入電壓。 本創作之另一目的係在提供一種功率晶片之靜電放 電保護電路，俾能提供較快速之電流輸出路徑。 15 為達成上述目的，本創作揭露一種功率晶片之靜電放 電保濩電路，係用以將靜電放電輸入端所流入之靜電導出 至靜電放電輸出端，其包括：第一雙極性接面電晶體，係 依據致能訊號而將靜電由該靜電放電輸入端導入，並導出 之·，第一導通電路，係依據致能訊號而將靜電由第一雙極 20性接面電晶體導入，並導出之；以及第二雙極性接面電晶 體，係依據致能汛號而將靜電由第一導通電路導入，並導 出至靜電放電輸出端；其中，功率晶片更包括靜電放電偵 測電路，當靜電放電偵測電路偵測靜電時，輸出致能訊號 至靜電放電保護電路。 M276321 【實施方式】 為能讓貴審查委員能更瞭解本創作之技術内容，特 舉五較佳具體實施例說明如下。由於雙極性接面電晶體 5 (BJT)能承受較高之壓降以及較大之輸出電流，並提： 較快之反應速度以提供快速之電流輸出路徑，可避免習知 靜電放電保護電路18所存在之缺失，故本創作靜電放電保 護電路18内部電路皆使用至少一雙極性接面電晶體。 如圖2所不，本創作第一實施例之靜電放電保護電路 10 181係包括：NPN雙極性接面電晶體3〇、31以及第一導通電 路，其中，NPN雙極性接面電晶體3〇之沒極（㈤^恤） 係連結至信號輸出入端14，NPN雙極性接面電晶體3〇及31 之基極（Base)以及第一導通電路187之一端係連結至靜電 放電備測電路16之輸出端，NPN雙極性接面電晶體3〇之射 15極/Emmer)以及NPN雙極性接面電晶體31之汲極係連結 至第一導通電路187, NPN雙極性接面電晶體31之射極係連 結至接地端。 第一導通電路187之内部結構，可由NPN雙極性接面電 晶體或二極體所組成。如圖7a所示，第一導通電路187可包 20括NPN雙極性接面電晶體39及4〇，並將NpN雙極性接面電 晶體39及40之基極連結一起。由κΝρΝ雙極性接面電晶體 39及40導通時，其能承受較高之壓降，故能間接增加靜電 放電保護電路1 8 1所能承受之維持壓降（h〇lding v〇hag㈠， 使功率1C在正常操作下不致因突波雜訊而受到損壞。或如 M276321 圖7b所不，第—導通電路187係由NPN雙極性接面電晶體 41、一極體42、及43所組成。當NPN雙極性接面電晶體41 導通犄，二極體42、及43可承受兩倍之門檻電壓（threshold voltage)，約一點四伏特，亦可間接增加本創作靜電放電 5保護電路1 8 1所能承受之壓降。 S #電放電偵測電路丨6偵測到ESD時，靜電放電偵測 電路16輸出致能信號至靜電放電保護電路18 1，NPN雙極性 接面電晶體30、31進入順向主動區（f〇rward aCtive)，並 配合第一導通電路187之運作，可將信號輸出入端14所輸入 10之ESD迅速地輸出至接地端，以防止内部電路汕受到非預 期之傷害。由於靜電放電保護電路丨8丨所能承受之維持電壓 較咼（由NPN雙極性接面電晶體3〇、31及第一導通電路187 所承受），當靜電放電偵測電路16因雜訊而輸出錯誤之致 能信號時，由於雜訊引起之電壓變化不大，亦無法順利地 15致能靜電放電保護電路181之運作，如此一來，可降低雜訊 對靜電放電保護電路181所產生之干擾。 如圖3所示，本創作靜電放電保護電路182之第二實施 例係包括· NPN雙極性接面電晶體32、33以及第二導通電 路188,其中，NPN雙極性接面電晶體32之汲極係連結至信 20號輸出入端14，NPN雙極性接面電晶體3〇及31之基極係連 結至靜電放電偵測電路16之輸出端，NPN雙極性接面電晶 體32之射極以及NPN雙極性接面電晶體33之汲極係連結至 第二導通電路188, NPN雙極性接面電晶體33之射極係連結 至接地端。比較圖2及圖3即可發現，本創作靜電放電保護 M276321 電路182除了使用第二導通電路188外，第二導通電路188 與NPN雙極性接面電晶體30及31之基極並不產生連結。 第二導通電路188之内部結構，可由零歐姆之電阻或 加上一個以上二極體所組成。由於零歐姆之電阻可視為短 5 路，所以在此並未以圖表示之。如圖8所示，第一導通電路 1 87將二極體44堆疊至二極體45之上。由二極體44及45可承 受兩倍之門檻電壓，故能間接增加本創作靜電放電保護電 路1 82所能承受之壓降。由於本實施例之靜電放電保護電路 1 82的運作與前一實施例之靜電放電保護電路1 81之運作類 10 似，故不多作說明。 如圖4所示，本創作靜電放電保護電路1 83之第三實施 例係包括·弟二導通電路189以及NPN雙極性接面電晶體 34。其中，第三導通電路189之一端係連結至信號輸出入端 14 ’另一端係連結至NPN雙極性接面電晶體3 4之集極。NPN 15雙極性接面電晶體34之基極係連結至靜電放電偵測電路^ 6 之輸出端，NPN雙極性接面電晶體34之射極係連結至接地 端。 第二導通電路189之内部結構，可由電晶體或二極體 所組成，如圖9a所示，厚氧化層N型電晶體（Field_〇xide 20 NMOS)，或如圖9b所示，具有寄生二極體之金氧半場效n 型電晶體（NMOS)，或如圖9c所示，堆疊之二極體。可 想而知地是，使用者亦可使用p型電子元件以取代n型電子 元件，以連到類似之結果。 M276321 當靜電放電偵測電路16偵測到ESD時，靜電放電彳貞測 電路16輸出致能信號至靜電放電保護電路丨8 3，N p N雙極性 接面電晶體34進入順向主動區（forwar(iactive)，並配合 第三導通電路189之運作，可將信號輸出入端14所輸入之 5 ESD迅速地輸出至接地端，以防止内部電路2〇受到非預期 之傷害。由於靜電放電保護電路183所能承受之電壓較高 (由NPN雙極性接面電晶體34及第三導通電路189所承 受），當靜電放電偵測電路16因雜訊而輸出錯誤之致能信 號時，由於雜訊引起之電壓變化不大，亦無法順利地致能 10靜電放電保護電路183之運作，如此一來，可降低雜訊對靜 電放電保護電路183所產生之干擾。 如圖5所示，本創作靜電放電保護電路ι84之第四實施 例係包括·第三導通電路18 9、NPN雙極性接面電晶體3 5、 第一導通電路187、及NPN雙極性接面電晶體36。其中，第 15二導通電路189係分別連結至信號輸出入端14以及NpN雙 極性接面電晶體3 5之集極，NPN雙極性接面電晶體3 5、NPN 雙極性接面電晶體36之基極以及第一導通電路ι87之一端 係連結至靜電放電偵測電路16之輸出端，NPN雙極性接面 電晶體36之射極係連結至接地端，第一導通電路丨87亦連接 20至NPN雙極性接面電晶體3 5之射極以及NPN雙極性接面電 晶體36之集極。由於本實施例之靜電放電保護電路丨84之運 作方式與第一實施例之靜電放電保護電路1 8丨或第三實施 例之靜電放電保護電路183相似，在此不多作說明。 M276321 如圖6所示，本創作靜電放電保護電路i 85之第五實施 例係包括··第三導通電路189、NPN雙極性接面電晶體3 7、 第二導通電路188、及NPN雙極性接面電晶體3 8。其中，第 三導通電路1 89係分別連結至信號輸出入端14以及NPN雙 5 極性接面電晶體3 7之集極，NPN雙極性接面電晶體3 7、NPN 雙極性接面電晶體3 8之基極係連結至靜電放電偵測電路i 6 之輸出端，NPN雙極性接面電晶體36之射極係連結至接地 端’第二導通電路188亦連接至NPN雙極性接面電晶體3 7 之射極以及NPN雙極性接面電晶體38之集極。由於本實施 10例之靜電放電保護電路185之運作方式與第二實施例之靜 電放電保護電路1 82或第三實施例之靜電放電保護電路j 83 相似，在此不多作說明。 如圖10a所示，靜電放電偵測電路161可由電阻串接電 谷後，並連結至反向器，或如圖1 Ob所示，靜電放電伯測電 15路162可由電容串接電阻。當ESD從信號輸出入端14輸入 曰守’靜電放電偵測電路161或162可輸出致能信號（高準位） 至靜電放電保護電路18，以防止内部電路2〇受以〇之損害。 在上述說明中，係以信號輸出入端14為ESD之輸入 端，並以接地端為ESD之導出端。可想而知地，使用者亦 2〇可以電源輸入端16為ESD之輸入端，並以信號輸出入端14 為ESD之導出端，或以電源輸入端16為ESD之輸入端，並 以接地端為ESD2導出端，此時，靜電放電偵測電路16及 靜電放電保護電路1 8之運作與上述說明相似，在此並不多 作說明。 11 M276321 由以上之說明可知，本創作係於靜電放電保護電路中 使用雙極性接面電晶體以及導通電路，由雙極性接面電晶 體承受較高之壓降、較快之導通速率、及較大之輸出電流， 更可避免因雜訊而引起靜電放電保護電路之作用。 5 上述貫施例僅係為了方便說明而舉例而已，本創作所 主張之權利範圍自應以申請專利範圍所述為準，而非僅限 於上述實施例。 【圖式簡單說明】 10 圖1係功率晶片之示意圖。 圖2係本創作第一實施例靜電放電保護電路之示意 圖。 圖3係本創作第二實施例靜電放電保護電路之示意 圖。 、 15 圖4係本創作第三實施例靜電放電保護電路之示意 圖。 圖5係本創作第四實施例靜電放電保護電路之示意 圖。 、、 圖6係本創作第五實施例靜電放電保護電路之示意 20 圖。 圖7a係第一導通電路之示意圖。 圖7b係另一第一導通電路之示意圖。 圖8係第二導通電路之示意圖。 圖9a係第三導通電路之示意圖。 12 M276321 第94200204號，94年3月修正頁 圖9b係另一第三導通電路之示意圖。 圖9c係另一第三導通電路之示意圖。 圖9d係另一第三導通電路之示意圖。 圖1 〇a係靜電放電偵測電路之示意圖。 圖10b係另一靜電放電偵測電路之示意圖。 【主要元件符號說明】 14信號輸出入端 20内部電路M276321 8. Description of the new type: [Technical field to which the new type belongs] This creation is about an electrostatic discharge protection circuit, especially an electrostatic discharge protection circuit suitable for a power chip. [Previous technology] Pressing, any two objects of different materials can cause static electricity (Static Electricity) 'when the object with static electricity comes into contact with the metal pins of the power chip. It will damage the internal circuit of the power chip via the gold 10 pin, which is the damage caused by the so-called Electro Static Discharge (Qing). The power chip's internal port P white group port also has an ESD protection circuit. Its main function is to provide an appropriate discharge path to avoid damage caused by ESD before ESD damages the internal circuit #. In addition, the protection circuit must only operate when ESD occurs, otherwise the input signal of the power chip will be removed and the input signal will not be transmitted to the internal circuit of the power chip. As shown in FIG. 1, the power chip 10 is internally provided with an electrostatic discharge (ESD) detection circuit 16 and an electrostatic discharge protection circuit 18 series. When ESD wants to flow from the power input terminal 12 or signal output 20 input terminal 14 into the power chip 10, the electrostatic discharge detection circuit 16 will detect this ESD and output an enable signal to the electrostatic discharge protection circuit 18, static electricity. The discharge protection circuit 18 can conduct this ESD to the ground terminal, so that this high voltage or large current cannot flow into the internal circuit 20, so as to avoid causing unexpected damage to the internal circuit 20. M276321 • The input voltage level of the power chip 10 is high. It is known that the electrostatic discharge "5" and the transistor system used inside the circuit 18 use field-effect transistors. Effect transistor (JFET) and metal oxide half field effect transistor (m0sfet), which has the advantages of smaller leakage current, smaller volume, less power consumption of the device, however, its disadvantages are slower response speed, The voltage (refers to the drain and source) is low, so it cannot meet the requirements of the power chip 1G for fast response and high cross-voltage (the voltage across the signal input / output terminal 14 to the ground). The main purpose of this creation is to provide An electrostatic discharge protection circuit for a power chip can not withstand higher input voltages. Another purpose of this creation is to provide an electrostatic discharge protection circuit for a power chip, which can provide a faster current output path. 15 To achieve the above Purpose, this creation discloses an electrostatic discharge protection circuit for a power chip, which is used to export the static electricity flowing in from the electrostatic discharge input terminal to the electrostatic discharge output terminal, which includes: a first bipolar The interface transistor is based on the enabling signal to introduce static electricity from the electrostatic discharge input terminal and derive it. The first conduction circuit is based on the enabling signal to transfer static electricity from the first bipolar 20-type interface transistor. Import and export; and the second bipolar junction transistor, which introduces static electricity from the first conducting circuit and exports it to the electrostatic discharge output terminal according to the enabling flood number; wherein the power chip further includes electrostatic discharge detection Circuit, when the electrostatic discharge detection circuit detects static electricity, it outputs an enabling signal to the electrostatic discharge protection circuit. M276321 [Embodiment Mode] In order to allow your review committee to better understand the technical content of this creation, five best specific implementations are given. The example is explained below. Because the bipolar junction transistor 5 (BJT) can withstand higher voltage drop and larger output current, and mentions: Faster response speed to provide a fast current output path, which can avoid the known static electricity. The lack of the discharge protection circuit 18, so the internal circuit of the electrostatic discharge protection circuit 18 in this creation uses at least one bipolar junction transistor. As shown in Figure 2, this creation The electrostatic discharge protection circuit 10 181 of the embodiment includes: NPN bipolar junction transistor 30, 31, and a first conducting circuit, wherein the NPN bipolar junction transistor 30 has a pole (极 ^ shirt) connected. To the signal output and input terminal 14, the NPN bipolar interface transistors 30 and 31 and the first conducting circuit 187 are connected to the output terminal of the electrostatic discharge test circuit 16, and the NPN bipolar interface The emitter of the transistor 30 is 15 poles / Emmer) and the drain of the NPN bipolar junction transistor 31 is connected to the first conducting circuit 187, and the emitter of the NPN bipolar junction transistor 31 is connected to the ground. The internal structure of a conducting circuit 187 may be composed of an NPN bipolar junction transistor or a diode. As shown in FIG. 7a, the first conducting circuit 187 may include 20 NPN bipolar junction transistors 39 and 40. The bases of the NpN bipolar junction transistors 39 and 40 are connected together. When κΝρΝ bipolar junction transistors 39 and 40 are turned on, they can withstand higher voltage drops, so they can indirectly increase the sustaining voltage drop (h〇lding v〇hag㈠) that the electrostatic discharge protection circuit 1 8 1 can withstand, so that Power 1C will not be damaged due to surge noise under normal operation. Or, as shown in M276321 and Figure 7b, the first conduction circuit 187 is composed of NPN bipolar junction transistor 41, a pole body 42, and 43. When the NPN bipolar junction transistor 41 is turned on, the diodes 42 and 43 can withstand twice the threshold voltage (about 1.4 volts), which can also indirectly increase the electrostatic discharge of this creation. 5 Protection circuit 1 8 1. The voltage drop that can withstand. S #Electrical discharge detection circuit 丨 6 When ESD is detected, the electrostatic discharge detection circuit 16 outputs an enable signal to the electrostatic discharge protection circuit 18 1. NPN bipolar junction transistor 30, 31 enters the forward active area (f〇rward aCtive), and cooperates with the operation of the first conduction circuit 187, can quickly output the ESD input 10 of the signal input terminal 14 to the ground terminal to prevent the internal circuit from being unexpected Damage due to electrostatic discharge protection circuit丨 8 丨 The sustaining voltage that can withstand is relatively high (beared by NPN bipolar junction transistors 30, 31 and the first conducting circuit 187). When the electrostatic discharge detection circuit 16 outputs an error due to noise, it is enabled. At the time of signal, the voltage change caused by noise is not large, and the operation of electrostatic discharge protection circuit 181 cannot be smoothly enabled, so that the interference caused by noise to the electrostatic discharge protection circuit 181 can be reduced. As shown, the second embodiment of the electrostatic discharge protection circuit 182 of the present invention includes an NPN bipolar junction transistor 32 and 33 and a second conducting circuit 188, wherein the drain of the NPN bipolar junction transistor 32 is connected Zhixin No. 20 input / output terminal 14, the bases of NPN bipolar junction transistor 30 and 31 are connected to the output of electrostatic discharge detection circuit 16, the emitter of NPN bipolar junction transistor 32 and the NPN dual The drain of the polar junction transistor 33 is connected to the second conducting circuit 188, and the emitter of the NPN bipolar junction transistor 33 is connected to the ground. Comparing Figure 2 and Figure 3, you can find that the electrostatic discharge protection of this creation M276321 circuit 182 Outside the circuit 188, the second conducting circuit 188 is not connected to the bases of the NPN bipolar junction transistors 30 and 31. The internal structure of the second conducting circuit 188 may be a resistance of zero ohms or more than one diode Since the resistance of zero ohms can be regarded as 5 short circuits, it is not shown here. As shown in FIG. 8, the first conducting circuit 1 87 stacks the diode 44 on the diode 45. Since the diodes 44 and 45 can withstand twice the threshold voltage, it can indirectly increase the voltage drop that the electrostatic discharge protection circuit 182 of this creation can withstand. Since the operation of the ESD protection circuit 1 82 in this embodiment is similar to the operation of the ESD protection circuit 1 81 in the previous embodiment, it will not be described further. As shown in Fig. 4, the third embodiment of the electrostatic discharge protection circuit 183 of this invention includes a second-conductor circuit 189 and an NPN bipolar junction transistor 34. Among them, one terminal of the third conducting circuit 189 is connected to the signal input / output terminal 14 'and the other terminal is connected to the collector of the NPN bipolar junction transistor 34. The base of the NPN 15 bipolar junction transistor 34 is connected to the output terminal of the electrostatic discharge detection circuit ^ 6, and the emitter of the NPN bipolar junction transistor 34 is connected to the ground terminal. The internal structure of the second conducting circuit 189 may be composed of a transistor or a diode. As shown in FIG. 9a, a thick oxide N-type transistor (Field_〇xide 20 NMOS), or as shown in FIG. 9b, has parasitics. Metal-oxide half field-effect n-type transistors (NMOS) of diodes, or stacked diodes as shown in FIG. 9c. It is conceivable that users can also use p-type electronic components instead of n-type electronic components to connect to similar results. M276321 When the ESD detection circuit 16 detects ESD, the ESD detection circuit 16 outputs an enable signal to the ESD protection circuit. 8 3, N p N bipolar junction transistor 34 enters the forward active area ( Forwar (iactive), and cooperate with the operation of the third conduction circuit 189, can quickly output 5 ESD input from the signal input and output terminal 14 to the ground terminal to prevent the internal circuit 20 from being unexpectedly damaged. Because of electrostatic discharge protection The voltage that the circuit 183 can withstand is higher (beared by the NPN bipolar junction transistor 34 and the third conduction circuit 189). When the electrostatic discharge detection circuit 16 outputs an error enable signal due to noise, The voltage caused by the signal does not change much, and the operation of the 10 ESD protection circuit 183 cannot be smoothly enabled. In this way, the interference generated by the noise on the ESD protection circuit 183 can be reduced. As shown in Figure 5, this creation The fourth embodiment of the ESD protection circuit 84 includes a third conducting circuit 18 9, an NPN bipolar junction transistor 3 5, a first conducting circuit 187, and an NPN bipolar junction transistor 36. Among them, the 15th The conducting circuit 189 is respectively connected to the signal output terminal 14 and the collector of the NpN bipolar junction transistor 35, the NPN bipolar junction transistor 3 5, the base of the NPN bipolar junction transistor 36, and the first One terminal of the conducting circuit ι87 is connected to the output terminal of the electrostatic discharge detection circuit 16. The emitter of the NPN bipolar junction transistor 36 is connected to the ground. The first conducting circuit 87 is also connected to 20 to the NPN bipolar junction. The emitter of transistor 35 and the collector of NPN bipolar junction transistor 36. Because the electrostatic discharge protection circuit of this embodiment 84 operates in the same manner as the electrostatic discharge protection circuit 1 8 of the first embodiment or the third The electrostatic discharge protection circuit 183 of the embodiment is similar, and will not be described here. M276321 As shown in FIG. 6, the fifth embodiment of the electrostatic discharge protection circuit i 85 of the present invention includes a third conducting circuit 189, and NPN bipolar Junction transistor 37, second conducting circuit 188, and NPN bipolar junction transistor 38. Among them, the third conducting circuit 1 89 is connected to the signal input / output terminal 14 and the NPN dual 5-polar junction transistor. 3 7 collector, NPN bipolar Surface transistor 3 7, NPN bipolar junction transistor 3 8 The base is connected to the output terminal of the electrostatic discharge detection circuit i 6 and the emitter of the NPN bipolar junction transistor 36 is connected to the ground terminal. The two-conducting circuit 188 is also connected to the emitter of the NPN bipolar junction transistor 37 and the collector of the NPN bipolar junction transistor 38. Since the operation mode of the electrostatic discharge protection circuit 185 of the ten examples and the second implementation The electrostatic discharge protection circuit 182 of this example is similar to the electrostatic discharge protection circuit j 83 of the third embodiment, and will not be described here. As shown in FIG. 10a, the electrostatic discharge detection circuit 161 may be connected to the valley by a resistor in series, and connected to the inverter, or as shown in FIG. 1 Ob, the electrostatic discharge primary test circuit 15 162 may be connected in series with a resistor. When ESD is input from the signal input / output terminal 14, the ESD detection circuit 161 or 162 can output an enable signal (high level) to the ESD protection circuit 18 to prevent the internal circuit 20 from being damaged by 0%. In the above description, the signal input / output terminal 14 is used as the input terminal of the ESD, and the ground terminal is used as the output terminal of the ESD. It is conceivable that the user can also use the power input terminal 16 as the ESD input terminal, and the signal output input terminal 14 as the ESD export terminal, or the power input terminal 16 as the ESD input terminal, and ground The terminal is the ESD2 lead-out terminal. At this time, the operations of the electrostatic discharge detection circuit 16 and the electrostatic discharge protection circuit 18 are similar to the above description, and are not described here. 11 M276321 As can be seen from the above description, this creation is based on the use of bipolar junction transistors and conduction circuits in electrostatic discharge protection circuits. Bipolar junction transistors withstand higher voltage drops, faster conduction rates, and The large output current can avoid the role of electrostatic discharge protection circuit caused by noise. 5 The above-mentioned embodiments are merely examples for convenience of explanation. The scope of the rights claimed in this creation shall be based on the scope of the patent application, rather than being limited to the above-mentioned embodiments. [Schematic description] 10 Figure 1 is a schematic diagram of a power chip. Fig. 2 is a schematic diagram of an electrostatic discharge protection circuit according to the first embodiment of the present invention. Fig. 3 is a schematic diagram of an electrostatic discharge protection circuit according to a second embodiment of the present invention. Fig. 4 is a schematic diagram of an electrostatic discharge protection circuit according to the third embodiment of the present invention. Fig. 5 is a schematic diagram of an electrostatic discharge protection circuit according to a fourth embodiment of the present invention. Figure 6 is a schematic diagram of an electrostatic discharge protection circuit according to the fifth embodiment of the present invention. FIG. 7a is a schematic diagram of a first conducting circuit. FIG. 7b is a schematic diagram of another first conducting circuit. FIG. 8 is a schematic diagram of a second conducting circuit. FIG. 9a is a schematic diagram of a third conducting circuit. 12 M276321 No. 94200204, revised page of March 1994 Figure 9b is a schematic diagram of another third conduction circuit. FIG. 9c is a schematic diagram of another third conducting circuit. FIG. 9d is a schematic diagram of another third conducting circuit. Figure 10a is a schematic diagram of an electrostatic discharge detection circuit. FIG. 10b is a schematic diagram of another electrostatic discharge detection circuit. [Description of Symbols of Main Components] 14 Signal I / O 20 Internal Circuit
10 功率晶片 12電源輸入端 16 靜電放電偵測電路 18 靜電放電保護電路 30、3卜32、33、34、35 NPN雙極性接面電晶體 36 ' 37、38、 NPN雙極性接面電晶體 187第一導通電路188第二導通電路189第三導通電路10 Power chip 12 Power input terminal 16 ESD detection circuit 18 ESD protection circuit 30, 3, 32, 33, 34, 35 NPN bipolar junction transistor 36 '37, 38, NPN bipolar junction transistor 187 First conduction circuit 188 Second conduction circuit 189 Third conduction circuit
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