TWI835035B - 線路板與使用此線路板的電子構裝 - Google Patents
線路板與使用此線路板的電子構裝 Download PDFInfo
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- TWI835035B TWI835035B TW110146168A TW110146168A TWI835035B TW I835035 B TWI835035 B TW I835035B TW 110146168 A TW110146168 A TW 110146168A TW 110146168 A TW110146168 A TW 110146168A TW I835035 B TWI835035 B TW I835035B
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- circuit board
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- 229910000679 solder Inorganic materials 0.000 claims description 10
- 230000005540 biological transmission Effects 0.000 description 15
- 238000004891 communication Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- 101150013917 CAT8 gene Proteins 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000001151 other effect Effects 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 230000007847 structural defect Effects 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
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- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
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- H05K3/46—Manufacturing multilayer circuits
- H05K3/4688—Composite multilayer circuits, i.e. comprising insulating layers having different properties
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Abstract
一種線路板與使用此線路板的電子構裝。線路板包括硬板本體、可彎曲的至少一個延伸部、多個連接件以及多個屏蔽件。硬板本體包括多個導電層與位於導電層之間的多個介電層。各延伸部連接硬板本體的側邊,是由導電層中的多層與介電層中的至少一層延伸至硬板本體之外而形成,且各延伸部的末端為一連接端。連接件配置於連接端表面,並且電連接導電層中的訊號層。屏蔽件配置於所述連接端表面,並且電連接導電層中的接地層,其中各屏蔽件圍繞相應的連接件設置,連接件與屏蔽件突出於連接端表面,且屏蔽件的高度低於連接件的高度。
Description
本申請是有關於一種電子構裝組件。
近年來,高速訊號傳輸技術飛速發展,有線高速傳輸的I/O介面,如用於資料與影音儲存的SD8.0、網路通訊的Ethernet CAT8、兼容充電/資料/影音傳輸的USB4與Thunderbolt4、以及用於影音傳輸的HDMI 2.0與Displayport 2.1等等,都是運用更高速的爬升波形(Rise Time)或降低電壓位準技術來實現高速傳輸。然而,受限於電子構裝組件,如主控晶片、連接器、電纜線、電路板等的現有規格與特性,所述傳輸介面的傳輸速度與效能受到限制。
特別是,當主控晶片的運算速度不斷提高,連接器與電纜線等構件受限於原生結構缺陷,以及常規產品使用要求,存在高反射損耗與組件之間特性阻抗不匹配等問題,使得整體電子構裝必須降規使用,難以達到真正的高速規格。因此,為了達成高速傳輸的目標,需要對訊號傳輸路徑中所使用的電子構裝組件進行材料、結構改良與特性阻抗匹配等優化處理。
本申請提供一種線路板,可以降低已知電子構裝內的反射損耗以及特性阻抗不匹配,以實現低反射損耗的高速傳輸。
本申請的線路板包括硬板本體、可彎曲的至少一個延伸部、多個連接件以及多個屏蔽件。硬板本體包括多個導電層與位於所述多個導電層之間的多個介電層。所述各延伸部連接所述硬板本體的側邊,是由所述多個導電層中的多層與所述多個介電層中的至少一層延伸至所述硬板本體之外而形成,且所述各延伸部的末端為一連接端。所述多個連接件配置於所述連接端表面,並且電連接所述多層導電層中的訊號層。所述多個屏蔽件配置於所述連接端表面,並且電連接所述多層導電層中的接地層,其中所述各屏蔽件圍繞相應的所述連接件設置,所述多個連接件與所述多個屏蔽件突出於所述連接端表面,且所述多個屏蔽件的高度低於所述多個連接件的高度。
本申請更提出一種應用前述線路板來實現低反射損耗的高速傳輸的電子構裝,其中所述線路板的硬板本體例如是主機板,且所述電子構裝更包括接合於所述硬板本體的第一電子元件,以及接合於所述連接端,並且電連接所述多個連接件的第二電子元件。
本申請更提出另一種應用前述線路板來實現低反射損耗的高速傳輸的電子構裝,其中所述線路板的硬板本體例如是轉接
板(Bus Board),且所述電子構裝更包括承載所述硬板本體的主機板,電連接於所述主機板的第一電子元件,以及電連接於所述連接端的多個連接件的第二電子元件。
本申請更提出一種線路板,包括硬板本體、可彎曲的至少一個延伸部以及多個連接件。硬板本體包括多個導電層與位於所述多個導電層之間的多個介電層。所述各延伸部連接所述硬板本體的側邊,是由所述多個導電層中的多層與所述多個介電層中的至少一層延伸至所述硬板本體之外而形成,且所述各延伸部的末端為一連接端。所述多個連接件配置於所述連接端表面,並且電連接所述多層導電層中的訊號層。
100:線路板
110:硬板本體
112:導電層
114:介電層
120:延伸部
130:連接端
132:插孔
142:連接件
200:連接端
210:支撐基板
300:連接端
310:連接件
320:導電孔道
400:硬板本體
500:連接端
510:訊號層
520:接地層
600:連接端
610:訊號層
620、630:接地層
700:連接端
702:銲罩層
710:連接件
712:第一接墊
720:屏蔽件
722:第二接墊
724:導通孔
800:連接端
810:連接件
812:第一接墊
814:導通孔
910:連接件
920:屏蔽件
1010:連接件
1020:屏蔽件
1110:連接件
1120:屏蔽件
1200:連接端
1210:連接件
1300:連接端
1310:連接件
1400:連接端
1410:連接件
1412:第一接墊
1414:電鍍通孔
1420:屏蔽件
1422:第二接墊
1424:導通孔
1500:連接端
1510:連接件
1600:電子構裝
1610:硬板本體
1612:第一電子元件
1620:延伸部
1630:連接端
1632:插孔
1634:連接件
1642:第二電子元件
1640:外部元件
1700:電子構裝
1710:硬板本體
1720:延伸部
1730:連接端
1732:插孔
1734:連接件
1740:外部元件
1742:第二電子元件
1750:主機板
1752:第一電子元件
L1~L14:導電層
圖1繪示根據本申請的一實施例的線路板。
圖2繪示根據本申請的一實施例的線路板的連接端。
圖3繪示根據本申請的另一實施例的線路板的連接端。
圖4繪示根據本申請的一實施例的硬板本體可能的線路配置。
圖5與圖6根據圖4的硬板本體的線路配置,分別繪示連接端可能的線路配置。
圖7與圖8分別繪示根據本申請的不同實施例的連接端的局部剖面圖。
圖9~11分別繪示根據本申請的不同實施例的連接件與屏蔽
件的平面配置。
圖12與圖13分別繪示根據本申請的不同實施例的連接端的局部剖面圖。
圖14與圖15分別繪示根據本申請的不同實施例的連接端的局部剖面圖。
圖16繪示根據本申請的一實施例的電子構裝。
圖17繪示根據本申請的另一實施例的電子構裝。
以下藉由多個實施例來說明本申請的技術方案,其中針對各實施例中相同或類似的部分不做重複說明,本技術領域中具有通常知識者當可交互參照各實施例的說明,理解本申請的精神,並據以實施。
圖1繪示根據本申請的一實施例的線路板100,包括硬板本體110,其例如是由多個導電層112與多個介電層114交疊形成的多層線路板,其中部分導電層112與部分介電層114延伸至硬板本體110之外,而在硬板本體110的側邊形成外延的延伸部120。延伸部120的末端形成連接端130,且在連接端130的表面設置有多個連接件142,例如多個銲球,用以對外連接其他電子元件。具體而言,本實施例繪示在硬板本體110同一側形成一個(含)以上的(如圖示為兩個)延伸部120,並使兩延伸部120的連接端130表面相向配置,其外例如包覆可能存在的外殼(圖未示)而形成可供外部
電子元件插接的連接器。兩連接端130之間的空間則形成插孔132,使得外部電子元件***時與插孔132內的連接件142形成電通路。
在本實施例中,延伸部120可以位在硬板本體110側邊的任何適當位置上,且數量不限。例如,圖1所示的兩延伸部120位在硬板本體110側邊的同一平面位置上。此處所指的平面位置,即平行於硬板本體110表面的平面方向上的位置。換言之,兩延伸部120是由硬板本體110側邊的同一位置上外延,並且分別由所述多個導電層112與所述多個介電層114中的不同層所形成。由於延伸部120僅由部份的導電層112與介電層114所組成,因此厚度較薄,且可挑選適當的材料來製作介電層114,使得延伸部120整體具有可彎特性,以提供類似於已知電子構裝中的電纜線的橋接功能。
此外,隨著硬板本體110的線路層數不同,延伸部120及連接端130的組成可以有多種變化。舉例而言,如果硬板本體110是8層板,則圖1所示的各延伸部120及其連接端130至多包括4個導電層;如果硬板本體110是16層板,則圖1所示的各延伸部120及其連接端130至多包括8個導電層。各延伸部120及其連接端130的導電層數可以相同或不同,依此類推,視需求而定。
圖2與圖3分別是根據本申請不同實施例的連接端的示意圖。圖2所示的連接端200例如具有4層(含)以下的導電層(圖示為3層),此時考量到厚度較薄,可以在連接端200背側增設支撐基板210(例如是兩層板),以提高連接端200的剛性。又,圖3
所示的連接端300例如具有大於4層(圖示為8層)的導電層,其內部可能具有導電孔道320,例如導通孔(Via)、電鍍通孔(Plating Through Hole,PTH)或如圖示的共軸導通孔(Coaxial Via)320等,以使連接件310可經由導電孔道320連接到下層的訊號層。連接端的具體線路結構將於下文的實施例中說明。
另一方面,本申請線路板的連接端的實際線路配置與硬板本體的線路配置有關。圖4繪示根據本申請的一實施例的硬板本體可能的線路配置。圖5與圖6根據圖4的硬板本體的線路配置,分別繪示連接端可能的線路配置。如圖4所示,硬板本體400例如是14層板,其L1~L14各層線路配置如圖上所示,包括6個訊號層Signal_1~Signal_6、4個接地層GND以及4個接入電源層Vcc1~Vcc4。相應地,連接端可以是前述多個導電層的組合。
例如,圖5所示的連接端500為微帶線(Micro Stripline)結構,其中訊號層510位於上層並電連接到6個訊號層Signal_1~Signal_6中的一層(如L1的訊號層Signal_1),接地層520位於下層並電連接到4個接地層GND中的一層(如L2的接地層GND)。換言之,連接端500的導電層為L1~L2的Signal_1/GND。又或者,在其他未示的實施例中,若為三層線路結構,則可選擇L1~L3的Signal_1/GND/Signal_2,或是L3~L5的Signal_2/GND/Signal_3,或其他可能的組合來作為連接端500的導電層。
又例如,圖6所示的連接端600為帶狀線(Stripline)結構,其中訊號層610位於兩個接地層620、630之間,並電連接到6個
訊號層Signal_1~Signal_6中的一層(如L3的訊號層Signal_2),接地層620、630分別電連接到4個接地層GND中的一層(如L2的接地層GND與L4的接地層GND)。換言之,連接端600的導電層為L2~L4的GND/Signal_2/GND。又或者,在其他未示的實施例中,也可以選擇L4~L6的GND/Signal_3/Vcc1,或其他可能的組合來作為連接端600的導電層。
此外,為了降低訊號干擾,本申請還可以在連接端的表面設置屏蔽件,使其與前述用以傳輸訊號的連接件共同位於所形成的連接器的插孔內,並使且屏蔽件圍繞連接件,屏蔽可能的訊號干擾。以下多個實施例同樣以圖4的硬板本體400為例來說明對應於此硬板本體400的連接端可能的線路結構。
圖7繪示根據本申請的一實施例的連接端的局部剖面圖,其中連接端700具有3層線路結構,例如對應於圖4的硬板本體400的導電層L1~L3,即Signal_1/GND/Signal_2,並且連接端700具有銲罩層702覆蓋導電層L1的第一接墊712與第二接墊722。連接件710例如是形成在第一接墊712上的多個銲球,屏蔽件720例如是形成在第二接墊722上的多個銲料塊,其中連接件710與屏蔽件720皆突出於銲罩層702表面,且屏蔽件720的高度低於連接件710的高度。由於導電層L1作為訊號層Signal_1,連接件710可以經由第一接墊712連接到訊號源,用於傳輸訊號。此外,第二接墊722獨立於訊號層Signal_1,使屏蔽件720可以經由第二接墊722與導通孔724電連接到下方的接地層L2。
圖8繪示根據本申請的另一實施例的連接端的局部剖面圖。本實施例的連接端800與圖7所示的連接端700類似,同樣具有3層線路結構,例如對應於圖4的硬板本體400的導電層L1~L3,即Signal_1/GND/Signal_2。兩者主要的差異在於,本實施例的連接件810經由第一接墊812以及導通孔814連接到下方的導電層L3,即Signal_2,用於傳輸訊號。
在平面方向上,本申請的屏蔽件圍繞連接件,以達到屏蔽訊號干擾的效果。具體而言,圖9~11分別列舉了幾種可能的連接件與屏蔽件的平面配置,其中圖9所示的屏蔽件920為圍繞連接件910的封閉環形牆,圖10所示的屏蔽件1020為圍繞連接件1010的開放弧形牆,圖11所示的屏蔽件1120例如是圍繞連接件1110排列的多個立柱。
圖12與圖13分別繪示根據本申請的其他實施例的連接端的局部剖面圖。圖12的連接端1200以及圖13的連接端1300分別與圖7的連接端700以及圖8的連接端800具有類似的線路結構,主要的差異在於,圖12的連接端1200以及圖13的連接端1300皆採用彈簧片作為連接件1210與連接件1310。
圖14繪示根據本申請的另一實施例的連接端的局部剖面圖。連接端1400具有8層線路結構,包括導電層L1~L8,分別為Signal_1/GND/Signal_2...Signal_3/GND/Signal_4。連接件1410位於第一接墊1412上,並且經由貫穿且獨立於導電層L2~L7的電鍍通孔(Plating Through Hole,PTH)1414連接到最下方的導電層L8,
即Signal_4,用於傳輸訊號。位於第二接墊1422上的屏蔽件1420則是經由導通孔1424電連接到下方的接地層L2。在本實施例中,電鍍通孔(Plating Through Hole,PTH)1414還可以是共軸導通孔(Coaxial Via)或其他可能型態的導電孔道,以達到抗干擾或其他效果。
圖15繪示根據本申請的另一實施例的連接端的局部剖面圖。圖15的連接端1500與圖14的連接端1400具有類似的線路結構,主要的差異在於,圖15的連接端1500採用彈簧片作為連接件1510。
基於上述多個實施例,本申請使硬板本體內的導電層與介電層從側邊向外延伸形成延伸部,可以取代已知電子構裝的電纜線,其中延伸部與硬板本體具有相同的材料特性,可以避免特性阻抗不匹配的問題。此外,延伸部的末端作為對外連接的連接端,可以取代已知電子構裝的連接器,避免連接器造成的反射損耗。連接端上設置有等同於連接器接腳的銲球或彈簧片等連接件,且連接件的外圍設置有屏蔽件,用以降低反射訊號干擾。
當然,前述多個實施例僅是用於舉例說明。本技術領域中具有通常知識者應當理解,隨著硬板本體的線路配置不同或是實際的佈線需求等等,本申請線路板的延伸部與連接端的線路結構存在各種可能的變化,並可依據申請時的技術水平來實現所述變化。
圖16進一步繪示根據本申請的一實施例的電子構裝,其
可應用本申請的線路板來實現低反射損耗的高速傳輸。如圖16所示,本實施例的電子構裝1600例如用於高速網路通訊架構,其中所述線路板的硬板本體1610作為主機板,承載第一電子元件(如網路訊號發送器或IC晶片)1612,可彎的延伸部1620由硬板本體1610的側邊外延,其末端形成具有插孔1632的連接端1630。此外,具有第二電子元件(如網路訊號接收器或IC晶片)1642的外部元件1640可***連接端1630的插孔1632,電連接到插孔1632內的連接件1634,並經由連接端1630以及延伸部1620電連接到作為主機板的硬板本體1610,實現網路訊號的高速傳輸。
圖17繪示根據本申請的另一實施例的電子構裝。本實施例的電子構裝1700與圖16所示的電子構裝1600都是用於高速網路通訊架構,差別在於本實施例線路板的硬板本體1710是轉接板(Bus Board),其可接合到外部的主機板1750上。主機板1750上具有第一電子元件(如網路訊號發送器或IC晶片)1752。可彎的延伸部1720由硬板本體1710的側邊外延,其末端形成具有插孔1732的連接端1730。此外,具有第二電子元件(如網路訊號接收器或IC晶片)1742的外部元件1740可***連接端1730的插孔1732,電連接到插孔1732內的連接件1734,並經由連接端1730、延伸部1720與硬板本體1710,電連接到主機板1750,實現網路訊號的高速傳輸。相較於圖16所示的實施例,本實施例的硬板本體1710作為轉接板,所形成的延伸部1720與連接端1730可不受限於主機板1750的規格,為電子構裝1700的元件與配置提供更具彈性的
選擇。
綜上所述,本申請提出的線路板可以將硬板本體作為電子構裝中的轉接板或甚至直接作為主機板,延伸部可以取代已知電子構裝的電纜線,提供良好的特性阻抗匹配。延伸部末端的連接端可以取代已知電子構裝的連接器,避免反射損耗。此外,本申請還可以進一步在連接件的外圍設置屏蔽件,以降低訊號干擾。如此,對用於高速傳輸的電子構裝組件進行了結構改良與特性阻抗匹配等優化處理,以實現高速傳輸的目標。
100:線路板
110:硬板本體
112:導電層
114:介電層
120:延伸部
130:連接端
132:插孔
142:連接件
Claims (18)
- 一種線路板,包括:硬板本體,包括多個導電層與位於所述多個導電層之間的多個介電層;可彎曲的至少一個延伸部,所述各延伸部連接所述硬板本體的側邊,是由所述多個導電層中的多層與所述多個介電層中的至少一層延伸至所述硬板本體之外而形成,且所述各延伸部的末端為一連接端;多個連接件,配置於所述連接端表面,並且電連接到所述多層導電層中的訊號層;以及多個屏蔽件,配置於所述連接端表面,並且電連接到所述多層導電層中的接地層,其中所述各屏蔽件圍繞相應的所述連接件設置,所述多個連接件與所述多個屏蔽件突出於所述連接端表面,且所述多個屏蔽件的高度低於所述多個連接件的高度,其中所述至少一個延伸部包括在所述硬板本體同一側的兩延伸部,所述兩延伸部的連接端表面相向配置而形成連接器的插孔,所述多個連接件與所述多個屏蔽件位於所述插孔內。
- 如請求項1所述的線路板,其中所述兩延伸部位在所述硬板本體側邊的同一平面位置上,並且分別由所述多個導電層與所述多個介電層中的不同層所形成。
- 如請求項2所述的線路板,其中所述兩延伸部所具有的導電層的層數相同。
- 如請求項1所述的線路板,其中所述連接端包括銲罩層,覆蓋所述多層導電層的最外層,並且暴露出所述最外層導電層的多個第一接墊與多個第二接墊,所述多個連接件與所述多個屏蔽件分別位於所述多個第一接墊與所述多個第二接墊上,並且突出於所述銲罩層表面。
- 如請求項4所述的線路板,其中所述最外層導電層為所述訊號層,用於傳輸訊號給所述多個連接件,且所述多個屏蔽件分別經由多個導通孔電連接到下方的所述接地層。
- 如請求項4所述的線路板,其中所述最外層導電層為所述接地層,且所述多個連接件分別經由多個導通孔電連接到下方的所述訊號層。
- 如請求項4所述的線路板,其中所述多個連接件與所述多個屏蔽件分別通過多個導通孔電連接到下層的所述訊號層與所述接地層。
- 如請求項1所述的線路板,其中所述多個連接件包括多個銲球或多個彈簧片。
- 如請求項1所述的線路板,其中所述多個屏蔽件包括多個銲料塊。
- 如請求項1所述的線路板,其中所述各屏蔽件包括圍繞相應的所述連接件的封閉環形牆。
- 如請求項1所述的線路板,其中所述各屏蔽件包括圍繞相應的所述連接件的開放弧形牆。
- 如請求項1所述的線路板,其中所述各屏蔽件包括圍繞相應的所述連接件排列的多個立柱。
- 如請求項1所述的線路板,其中所述硬板本體為主機板。
- 如請求項1所述的線路板,其中所述硬板本體為轉接板。
- 一種電子構裝,包括:如請求項1~14中任一項所述的線路板,其中所述硬板本體為主機板;第一電子元件,電連接於所述硬板本體;以及第二電子元件,電連接於所述連接端的所述多個連接件。
- 如請求項15所述的電子構裝,其中所述第一電子元件與所述第二電子元件互為網路訊號發送器與網路訊號接收器。
- 一種電子構裝,包括:如請求項1~14中任一項所述的線路板,其中所述硬板本體為轉接板(Bus Board);主機板,所述硬板本體電連接於所述主機板;第一電子元件,電連接於所述主機板;以及第二電子元件,電連接於所述連接端的所述多個連接件。
- 如請求項17所述的電子構裝,其中所述第一電子元件與所述第二電子元件互為網路訊號發送器與網路訊號接收器。
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TW110146168A TWI835035B (zh) | 2021-12-09 | 2021-12-09 | 線路板與使用此線路板的電子構裝 |
CN202111572985.1A CN116261253A (zh) | 2021-12-09 | 2021-12-21 | 线路板与使用此线路板的电子构装 |
US17/564,225 US20230189435A1 (en) | 2021-12-09 | 2021-12-29 | Circuit board and electronic package using the same |
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TW110146168A TWI835035B (zh) | 2021-12-09 | 2021-12-09 | 線路板與使用此線路板的電子構裝 |
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Citations (5)
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US20060103004A1 (en) * | 2004-11-17 | 2006-05-18 | NEC CORPORATION and | Wiring board for semiconductor integrated circuit package and semiconductor integrated circuit device using the same |
US20110199739A1 (en) * | 2010-02-12 | 2011-08-18 | Ibiden Co., Ltd. | Flex-rigid wiring board and method for manufacturing the same |
US20150101847A1 (en) * | 2013-10-12 | 2015-04-16 | Zhen Ding Technology Co., Ltd. | Rigid-flexible printed circuit board,method for manufacturing same,and printed circuit board module |
US20180108968A1 (en) * | 2016-10-13 | 2018-04-19 | Delphi Technologies, Inc. | Ball-grid-array radio-frequency integrated-circuit printed-circuit-board assembly for automated vehicles |
CN113423172A (zh) * | 2021-05-24 | 2021-09-21 | 鹏鼎控股(深圳)股份有限公司 | 软硬结合电路板及其制作方法 |
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US11894629B2 (en) * | 2021-03-09 | 2024-02-06 | Tyco Electronics Japan G.K. | Electrical interconnect with conductive polymer contacts having tips with different shapes and sizes |
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2021
- 2021-12-09 TW TW110146168A patent/TWI835035B/zh active
- 2021-12-21 CN CN202111572985.1A patent/CN116261253A/zh active Pending
- 2021-12-29 US US17/564,225 patent/US20230189435A1/en active Pending
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20060103004A1 (en) * | 2004-11-17 | 2006-05-18 | NEC CORPORATION and | Wiring board for semiconductor integrated circuit package and semiconductor integrated circuit device using the same |
US20110199739A1 (en) * | 2010-02-12 | 2011-08-18 | Ibiden Co., Ltd. | Flex-rigid wiring board and method for manufacturing the same |
US20150101847A1 (en) * | 2013-10-12 | 2015-04-16 | Zhen Ding Technology Co., Ltd. | Rigid-flexible printed circuit board,method for manufacturing same,and printed circuit board module |
US20180108968A1 (en) * | 2016-10-13 | 2018-04-19 | Delphi Technologies, Inc. | Ball-grid-array radio-frequency integrated-circuit printed-circuit-board assembly for automated vehicles |
CN113423172A (zh) * | 2021-05-24 | 2021-09-21 | 鹏鼎控股(深圳)股份有限公司 | 软硬结合电路板及其制作方法 |
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CN116261253A (zh) | 2023-06-13 |
TW202325140A (zh) | 2023-06-16 |
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