TWI818033B - 用來釋放薄膜的應力的原位高功率植入 - Google Patents
用來釋放薄膜的應力的原位高功率植入 Download PDFInfo
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- TWI818033B TWI818033B TW108120405A TW108120405A TWI818033B TW I818033 B TWI818033 B TW I818033B TW 108120405 A TW108120405 A TW 108120405A TW 108120405 A TW108120405 A TW 108120405A TW I818033 B TWI818033 B TW I818033B
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- Prior art keywords
- hard mask
- carbon hard
- electrostatic chuck
- power
- substrate
- Prior art date
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/32091—Radio frequency generated discharge the radio frequency energy being capacitively coupled to the plasma
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/3115—Doping the insulating layers
- H01L21/31155—Doping the insulating layers by ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
- H01J37/317—Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. for ion implantation
- H01J37/3171—Electron-beam or ion-beam tubes for localised treatment of objects for changing properties of the objects or for applying thin layers thereon, e.g. for ion implantation for ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/32137—Radio frequency generated discharge controlling of the discharge by modulation of energy
- H01J37/32146—Amplitude modulation, includes pulsing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/32174—Circuits specially adapted for controlling the RF discharge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32412—Plasma immersion ion implantation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02115—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material being carbon, e.g. alpha-C, diamond or hydrogen doped carbon
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Abstract
本揭示的實施例通常係關於沉積用於圖案化應用的高密度膜的技術。在一個實施例中,提供了一種處理基板的方法。該方法包括:在基板上形成的膜堆疊上方沉積碳硬遮罩,其中基板經定位在處理腔室中設置的靜電夾盤上;將離子植入碳硬遮罩,其中沉積碳硬遮罩及將離子植入碳硬遮罩係在相同處理腔室中執行;以及以循環方式重複沉積碳硬遮罩及將離子植入碳硬遮罩,直至達到預定厚度的碳硬遮罩。
Description
本揭示的實施例通常係關於製造積體電路。更特定而言,本文所描述的實施例提供了沉積用於圖案化應用的高密度膜的技術。
硬遮罩用於製造NAND及動態隨機存取記憶體(dynamic random access memory; DRAM)裝置。硬遮罩通常用作在微影圖案化時之犧牲層,並且能夠經由蝕刻製程將特徵圖案化到半導體裝置的一或多個材料層上。例如,經圖案化的特徵可以形成電晶體及互連,該等電晶體及互連允許NAND及DRAM裝置操作。
例如,硬遮罩材料的一些重要性質係抗蝕刻性及壓縮應力。如與待蝕刻的層(在下文中為「下層」)相比,理想的硬遮罩對在蝕刻製程中使用的蝕刻劑具有高的抗蝕刻性。由此,可以比硬遮罩快得多的速率蝕刻下層。理想的硬遮罩亦具有低壓縮應力。較低壓縮應力消除在硬遮罩沉積之後不期望的基板彎曲,這可使裝置製造進一步變得困難。
為了改進硬遮罩的蝕刻選擇性,已經開發了高密度碳膜及摻雜的碳膜。利用此等新膜的挑戰之一者為高密度碳膜呈現高壓縮應力,這導致不期望的基板彎曲。
由此,在本領域中需要改進的形成硬遮罩的方法,該方法呈現增加的蝕刻選擇性,同時維持或減少硬遮罩材料的壓縮應力。
本揭示的實施例通常係關於沉積用於圖案化應用的高密度膜的技術。在一個實施例中,提供了一種處理基板的方法。該方法包括:在基板上形成的膜堆疊上方沉積碳硬遮罩,其中基板經定位在處理腔室中設置的靜電夾盤上;將離子植入碳硬遮罩,其中沉積碳硬遮罩及將離子植入碳硬遮罩係在相同處理腔室中執行;以及以循環方式重複沉積碳硬遮罩及將離子植入碳硬遮罩,直至達到預定厚度的碳硬遮罩。
在另一實施例中,提供了一種處理基板的方法。該方法包括:在基板上方沉積碳硬遮罩,其中碳硬遮罩係藉由將RF偏壓施加到靜電夾盤以產生電漿來沉積,在該基板定位在該靜電夾盤上;以及在基板上方沉積碳硬遮罩時,使用RF偏壓將離子從電漿植入碳硬遮罩,其中沉積碳硬遮罩及將離子植入碳硬遮罩同時在相同處理腔室中執行。
在又一實施例中,提供了一種處理基板的方法。該方法包括:藉由將具有第一功率位準的第一RF功率經由第一電極施加到靜電夾盤,在基板上形成的膜堆疊上方沉積類金剛石碳硬遮罩,其中基板經定位在靜電夾盤上,在該靜電夾盤中設置第一電極;將離子植入類金剛石碳硬遮罩,其中沉積類金剛石碳硬遮罩及將離子植入類金剛石碳硬遮罩在係相同處理腔室中執行;以循環方式重複沉積類金剛石碳硬遮罩及將離子植入類金剛石碳硬遮罩,直至達到預定厚度的類金剛石碳硬遮罩;圖案化類金剛石碳硬遮罩;使用圖案化的類金剛石碳硬遮罩蝕刻膜堆疊;以及移除類金剛石碳硬遮罩。
本文所描述的實施例包括改進的製造碳膜之方法,該等碳膜具有高密度(例如,>1.8 g/cc)、高模量(例如,>150 GPa)、及低應力(例如,<-500 MPa)。特定而言,揭示了用於在沉積腔室中形成具有增加的硬度及降低的應力的高密度碳膜的原位沉積植入製程。原位沉積植入製程可以循環或同時方式執行以允許形成具有任何目標厚度而不限於離子穿透閾值的碳膜,若異位執行沉積及植入製程,則會另外遇到目標厚度限於離子穿透閾值的情況。根據本文所描述的實施例製造的碳膜本質上係非晶的,並且與習知圖案化膜相比,具有較高蝕刻選擇性以及非常大的模量(例如,>150 GPa)連同較低應力(<-500 MPa)。根據本文所描述的實施例製造的碳膜不僅具有低應力,亦具有高sp3
碳含量(例如,類金剛石膜)。通常,本文所描述的沉積製程亦完全與當前的用於硬遮罩應用的整合方案相容。
儘管在本揭示中論述了高密度碳膜,可以預期,本揭示的各個實施例亦可以用於改進任何膜的膜應力、密度、或楊氏模量。此外,可以預期本揭示的態樣可用於任何沉積製程或圖案化方案,諸如自對準的三重圖案化(self-aligned triple patterning; SATP)製程、自對準的四重圖案化(self-aligned quadruple patterning; SAQP)製程、通孔/孔收縮製程、後段製程(back end of line; BEOL)等等,如在各個半導體製程(諸如NAND快閃應用、DRAM應用、或CMOS應用等等)中採用的,該等沉積製程或圖案化方案利用硬遮罩或保護性犧牲層。
本文所描述的實施例將在下文參考PECVD製程描述,該製程可以使用任何適當薄膜沉積系統執行。適當系統的實例包括可使用DXZ®
處理腔室的CENTURA®
系統、PRECISION 5000®
系統、 PRODUCER®
系統、PRODUCER®
GTTM
系統、PRODUCER®
XP PrecisionTM
系統、PRODUCER®
SETM
系統、Sym3®
處理腔室、及MesaTM
處理腔室,所有此等系統可購自Santa Clara,Calif的Applied Materials, Inc.。能夠執行PECVD製程的其他工具亦可適於獲益自本文所描述的實施例。此外,可以使用實現本文所描述的PECVD製程的任何系統。
第1A圖及第1B圖係闡述根據本揭示的實施例的用於在基板上設置的膜堆疊上形成硬遮罩的方法100的流程圖。第2A圖至第2F圖係示出根據方法100的硬遮罩形成序列的堆疊200的示意性橫截面圖。硬遮罩可為上文描述的類金剛石碳層,並且可以用於在三維半導體裝置的膜堆疊中製造類階梯結構、或任何適當的裝置製造應用。亦應當理解,在第1A圖及第1B圖中描繪的操作可同時執行及/或以與第1A圖及第1B圖中描繪的順序不同的順序執行。
方法100藉由將堆疊(諸如第2A圖描繪的堆疊200)定位到處理腔室(諸如PECVD腔室)中而開始於操作102。堆疊200可在PECVD腔室中設置的靜電夾盤上定位。然而,任何適當基板支撐件可用於替換靜電夾盤。一旦堆疊200定位在靜電夾盤上,將夾持電壓(恆定或脈衝)施加到靜電夾盤以將基板202夾緊到靜電夾盤。堆疊200包括基板202及其上設置的一或多層。在如圖所示的實例中,基板202其上設置有膜堆疊204。根據需要,基板202可為矽基材料或任何適當絕緣材料或導電材料。例如,基板202可為以下材料,諸如結晶矽(例如,Si>100>或Si>111>)、氧化矽、應變矽、鍺矽、摻雜或未摻雜的多晶矽、摻雜或未摻雜的矽基板、以及圖案化或未圖案化的絕緣體上矽(silicon on insulator; SOI)、碳摻雜的氧化矽、氮化矽、摻雜矽、鍺、砷化鎵、玻璃、藍寶石。基板202可具有各種尺寸,諸如200 mm、300 mm、及450 mm或其他直徑,以及矩形或方形平板形狀。除非另外提及,否則本文描述的實施例及實例係在具有200 mm直徑、300 mm直徑、或450 mm直徑的基板上進行。在其中SOI結構用於基板202的實施例中,基板可包括在矽結晶基板上設置的埋入介電層。在本文描繪的實施例中,基板202可為結晶矽基板。
膜堆疊204可為單層或數個垂直堆疊的層。例如,膜堆疊204可包括在膜堆疊204中重複形成的數對第一層(未圖示)及第二層(未圖示)。該等對包括交替重複形成的第一層及第二層,直至達到期望數量的數對第一層及第二層。膜堆疊204可為半導體晶片的一部分,諸如三維記憶體晶片。在一個實施例中,膜堆疊204用於形成三維記憶體晶片的多個閘極結構。在此種情況下,在膜堆疊204中形成的第一層可為第一介電層,並且在膜堆疊204中形成的第二層可為第二介電層。用於第一層及第二層的適當介電層可包括氧化矽、氮化矽、氮氧化矽、碳化矽、碳氧化矽、氮化鈦、氧化物及氮化物的複合物,夾雜氮化物層的至少一或多個氧化物層、及其組合等等。在一些實施例中,第一及第二介電層的一者或兩者可為具有大於4的介電常數的高介電常數材料。高介電常數材料的適當實例包括二氧化鉿(HfO2
)、二氧化鋯(ZrO2
)、二氧化鉿矽(HfSiO2
)、氧化鉿鋁(HfAlO)、二氧化鋯矽(ZrSiO2
)、二氧化鉭(TaO2
)、氧化鋁、鋁摻雜的二氧化鉿、鉍鍶鈦(bismuth strontium titanium; BST)、及鉑鋯鈦(platinum zirconium titanium; PZT)等等。膜堆疊204可具有在約100 Å與約2000 Å之間的總厚度。在一個實施例中,膜堆疊204的總厚度係約3微米至約10微米,並且將隨著技術進展而變化。
在操作102期間,可調節若干製程參數。在適用於處理300 mm基板的一個實施例中,處理容積中的處理壓力可維持在約0.1 mTorr至約10 Torr(例如,約2 mTorr至約50 mTorr;或約5 mTorr至約20 mTorr)。處理溫度及/或基板溫度可維持在約攝氏-50度至約攝氏350度(例如,約攝氏0度至約攝氏50度;或約攝氏10度至約攝氏20度)。
於操作104處,使含烴氣體流入處理腔室中。含烴氣體可穿過氣體分配組件(在靜電夾盤之上的處理腔室頂部設置)或經由處理腔室的側壁流入處理腔室中。含烴氣體可包括至少一種烴化合物。烴化合物可以為任何液體或氣體。在一個實施例中,烴化合物係氣態烴。在另一實施例中,烴化合物可最初為液體,並且可經由汽化器或起泡器、或其他液體前驅物傳遞系統傳遞到處理容積。
在一個實施例中,烴化合物具有通式Cx
Hy
,其中x具有在1與20之間的範圍,並且y具有在1與20之間的範圍。例如,適當的烴化合物可包括乙炔(C2
H2
)、乙烯(C2
H4
)、乙烷(C2
H6
)、丙炔(C3
H4
)、丙烯(C3
H6
)、丙烷(C3
H8
)、丁烷(C4
H10
)、甲烷(CH4
)、丁烯(C4
H8
)、丁烷(C4
H10
)、戊烷(C5
H12
)、己烷(C6
H14
)、金剛烷(C10
H16
)、降冰片烯(C7
H10
)、或其組合。歸因於形成更穩定的中間物種,這允許更多表面遷移性,C2
H2
可為有利的。
在一個實施例中,烴化合物係芳香族烴化合物,諸如苯、苯乙烯、甲苯、二甲苯、乙苯、苯乙酮、苯甲酸甲酯、乙酸苯酯、苯酚、甲酚、呋喃、及類似者,α-萜品烯、甲基異丙基苯、1,1,3,3-四甲基丁基苯、第三丁醚、第三丁基乙烯、甲基丙烯酸甲酯、及第三丁基糠基醚,具有式C3
H2
及C5
H4
的化合物,包括一氟苯、二氟苯、四氟苯、六氟苯的鹵化芳香族化合物,或其組合。在一些情況下,不需要含有氧及鹵化前驅物的烴化合物。
在一些實施例中,惰性氣體(諸如氬氣(Ar)及/或氦氣(He))可與含烴氣體一起供應到處理腔室中。其他惰性氣體(諸如氮(N2
)及一氧化氮(NO))亦可用於控制類金剛石碳層的密度及沉積速率。
在一些實施例中,含烴氣體可進一步包括一或多種稀釋氣體。適當的稀釋氣體可包括但不限於氦(He)、氬(Ar)、氙(Xe)、氫(H2
)、氮(N2
)、氨(NH3
)、一氧化氮(NO)、或其組合。Ar、He、及N2
可用於控制類金剛石碳層的密度及沉積速率。在一些情況下,添加N2
及/或NH3
可以用於控制類金剛石碳層的氫比率(例如,碳與氫比率)。
於操作106處,如第2B圖中所示,電漿在處理腔室中由氣體混合物產生以在膜堆疊204上形成硬遮罩206。電漿可藉由將第一RF功率(偏壓或電源)施加到靜電夾盤來產生。在約0.4 MHz至約300 MHz(例如,約11 MHz至約60 MHz)的頻率下,第一RF功率可為從約1千瓦至約10千瓦。在一個實施例中,在約2千瓦及約13.56 MHz的頻率下提供第一RF功率。可經由在靜電夾盤中設置的第一電極將第一RF功率從RF功率產生器提供到靜電夾盤。在一些情況中,第一電極亦可與夾持電源電子連通,這提供直流(direct current; DC)功率以將基板202靜電固定到靜電夾盤的上表面。
另外或替代地,第一RF功率可施加到上部電極,諸如在與靜電夾盤相對的處理腔室的頂部設置的噴頭。在一些實施例中,第一RF功率可施加到上部電極、底部電極(例如,第一電極)、及圍繞處理腔室的一部分的ICP線圈的至少一者。ICP線圈可用於形成電漿或調諧處理腔室內的電漿的均勻性。取決於供電方案,頂部電極、底部電極、及ICP線圈可同時供電,或該三者中的兩者可同時供電。所施加的RF頻率可以從數百kHz至數十MHz變化。多個頻率亦可以施加到頂部電極或底部電極以最佳化離子通量及入射到基板上的能量。
在一個實施例中,硬遮罩206係如上文論述的類金剛石碳膜。硬遮罩206可藉由在膜堆疊204上方的毯覆式沉積製程來沉積。注意到,在基板202上存在或不存在膜堆疊204的情況下,硬遮罩206可在基板202的任何表面或任何部分上形成。在一些實施例中,在操作104及106期間維持在操作102期間建立的處理條件。在一個實施例中,在形成硬遮罩206期間的處理腔室的壓力維持在約2 mTorr至約20 mTorr。
於操作108處,如第2C圖中所示,在處理腔室中執行離子植入製程以處理硬遮罩206。在一個實施例中,離子植入製程在相同處理腔室中原位執行,在該處理腔室中執行硬遮罩206的沉積製程(亦即,操作106)。在操作108期間,中斷含烴氣體的流動,同時可維持在操作104期間供應的惰性氣體及/或稀釋氣體。同時,在操作106期間施加到靜電夾盤的第一RF功率減少到足以維持電漿(亦即,在操作106及108期間電漿係連續的)的最小位準。例如,第一RF功率可從約2千瓦減小到約200瓦。
離子植入製程係藉由植入離子來執行,該等離子諸如來自惰性氣體的連續流的離子、以及來自仍餘留在電漿中的含烴氣體的離子。在一些實施例中,使用直流(direct current; DC)偏壓將離子植入硬遮罩206。DC偏壓覆蓋在降低的第一RF功率之上。特定而言,DC偏壓將高單能離子驅使到硬遮罩206中。可經由第二電極將DC偏壓提供到靜電夾盤。第二電極可設置在靜電夾盤中並且與DC電源電氣連通,該DC電源將偏壓提供到第二電極。或者,可將DC偏壓從夾持電源提供到第一電極。在任何情況下,DC偏壓可在約2千伏與約15千伏之間。在一個實施例中,DC偏壓係在約5千伏與約12千伏之間,例如約8千伏。由於DC偏壓係高的,DC偏壓可以在離子植入製程期間脈衝化。在各個實施例中,DC偏壓的脈衝寬度可為約1微秒至約1毫秒的數量級。在一些實施例中,在10 Hz至約10 kHz的脈衝頻率下施加DC偏壓,其中脈衝寬度為約5微秒至約30毫秒。
在一些實施例中,使用第二RF功率(偏壓或電源)將離子植入硬遮罩206。同樣,第二RF功率覆蓋在降低的第一RF功率之上。可經由在靜電夾盤中設置的第三電極將第二RF功率從RF功率產生器提供到靜電夾盤。在約0.4 MHz至約300 MHz(例如約11 MHz至約60 MHz)的頻率下,第二RF功率可為從約1千瓦至約10千瓦。在一個實施例中,在約2千瓦及約13.56 MHz的頻率下提供第一RF功率。第二RF功率可以在離子植入製程期間脈衝化。例如,第二RF功率可以約10%至約80%的範圍中的工作週期脈衝化,其中頻率為約1 Hz至約50 kHz。
在使用第二RF功率並且沉積物種亦用作植入物種(例如,來自含烴氣體的H2
)的情況下,降低的第一RF功率及第二RF功率可暫時偏置,使得降低的第一RF功率及脈衝的第二RF功率係同步或非同步的,由此分開沉積階段及處理階段(亦即,離子植入)。例如,當第二RF功率及降低的第一RF功率均開啟時,離子加速,從而導致發生硬遮罩206的撞擊,並且因為大部分膜生長來自在低位準(例如,200瓦)下操作的主要電漿(例如,第一RF功率),可最小化硬遮罩206的沉積。由此,離子植入主導。當脈衝化第二RF功率並且降低的第一RF功率開啟時,硬遮罩206的沉積增加並且變為主導製程。由此,膜沉積主導。
無論離子植入製程是使用DC偏壓還是第二RF功率,因為關閉沉積氣體(亦即,含烴氣體)的流動,將幾乎不發生或不發生硬遮罩206的沉積。由此,DC偏壓的脈衝或脈衝的第二RF功率分開沉積階段及處理階段(亦即,離子植入製程),從而使硬遮罩206的形成及處理成為循環的沉積-處理製程。在離子植入製程期間,來自惰性氣體的連續流的離子(諸如氬或氦離子)、以及來自餘留在電漿中的含烴氣體的離子由DC偏壓或第二RF功率吸引或驅動,並且向前移動到硬遮罩206。DC偏壓或第二RF功率用於藉由用離子撞擊硬遮罩206的表面來處理硬遮罩206。因此,沉積的硬遮罩206中的應力減少。
可執行離子植入製程,直至植入的粒子達到穿透閾值,這係歸因於隨著植入離子穿過硬遮罩206行進,植入離子逐漸失去能量。穿透閾值可藉由離子的穿透深度決定。或者,可執行離子植入製程,直至達到預定植入深度。預定的植入深度或離子穿透閾值可為在10奈米與1微米之間的範圍中,這可取決於離子的類型及大小以及用於激發離子207的偏壓而變化。
取決於期望的植入深度,植入能量可在約0.5 keV與約60 keV之間,例如約6 keV至約45 keV。離子劑量可在從約1x1013
cm-2
至約1x1017
cm-2
的範圍中,例如約5x1016
cm-2
。極低壓力(例如,2 mTorr至約20 mTorr)使非常高能量的離子能夠處理/植入硬遮罩206的表面。在不受任何特定理論約束的情況下,據信植入離子可以從硬遮罩206的懸垂碳-氫鍵提取剩餘的氫原子並且在硬遮罩206內形成碳化物結構。當與未處理的硬遮罩相比時,碳化物結構呈現增加的硬度。亦據信,植入離子佔據硬遮罩206內存在的間隙孔洞,這可以導致硬遮罩206的增加的密度。增加的密度進一步增加硬遮罩206的機械完整性。增加的硬遮罩206的硬度及密度可以提供機械穩固的硬遮罩206,這繼而導致改進的蝕刻選擇性及減少的內部應力。因此,消除不期望的基板變形。
因為植入製程在發生硬遮罩沉積的相同處理腔室中發生,原位沉積植入製程係有利的。由此,可以沉積並處理硬遮罩206,而不必破壞真空並且轉移到異位植入工具。因此,改進總產量並且降低與異位植入工具相關聯的成本。此外,由於植入離子具有穿透閾值,可異位處理的硬遮罩的厚度受限。利用原位沉積/離子植入製程,硬遮罩的沉積及處理可以循環方式執行以在相同處理腔室中將硬遮罩定製為可能地任何目標厚度。
於操作110處,作出決策,來決定已經處理的沉積的硬遮罩206是否達到目標厚度。硬遮罩206可具有對應於膜堆疊204的後續蝕刻要求的目標厚度。在一個實例中,硬遮罩206的目標厚度係在約0.5 μm與約1.5 μm之間,諸如約1.0 μm。若尚未達到硬遮罩206的目標厚度,沉積/離子植入製程的另一循環(例如,操作104、106及108)可在將處理的硬遮罩206的厚度再次與目標厚度進行比較之前執行。在植入離子達到預定植入或穿透深度但硬遮罩206尚未達到期望厚度的一些實施例中,沉積/離子植入製程的另一循環(例如,操作104、106及108)可以在將處理的硬遮罩206的厚度再次與目標厚度進行比較之前執行。重複原位硬遮罩沉積及離子植入的循環製程直至沉積的硬遮罩206達到目標厚度。
於操作112處,一旦硬遮罩206達到目標厚度,如第2D圖所示,圖案化的光阻層208在處理的硬遮罩206上方形成。可利用能量源(諸如光能量)將特徵或圖案從光遮罩轉移到光阻劑208。在一個實施例中,光阻劑係聚合材料,並且圖案化製程係藉由193 nm浸漬式光微影製程、或其他類似光微影製程執行。類似地,雷射亦可用來執行圖案化製程。
於操作114處,如第2E圖中所示,經處理的硬遮罩206係藉由例如光微影及一或多個蝕刻製程來圖案化,以將特徵從光阻劑208轉移到硬遮罩206。蝕刻製程可在任何適當的蝕刻腔室(諸如電漿蝕刻腔室)中執行。其後,光阻層208藉由任何適當的製程移除,諸如灰化製程或濕式蝕刻製程。
於操作116處,如第2F圖中所示,使用圖案化的硬遮罩206蝕刻膜堆疊204。膜堆疊204的蝕刻可在任何適當處理腔室(諸如電漿蝕刻腔室)中執行。蝕刻劑(諸如氟碳)可用於移除膜堆疊204的暴露部分。蝕刻劑的活性物種係選擇性的,使得該等活性物種實質上不與硬遮罩206的植入離子反應。因此,蝕刻劑對膜堆疊204具有選擇性。蝕刻劑的適當實例可包括但不限於CF4
、CHF3
、HBr、BCl3
、或Cl2
。蝕刻劑可與惰性載氣一起提供。隨後使用任何適當的硬遮罩移除製程來移除硬遮罩206。例如,氧電漿可用於移除硬遮罩206。所得堆疊200包括其中形成有一特徵(諸如高深寬比特徵)的膜堆疊204。所得堆疊200可隨後經歷進一步處理以形成功能半導體裝置。
第3A圖及第3B圖示出了根據本揭示的實施例的用於在基板上設置的膜堆疊上沉積硬遮罩的方法300的流程圖。如第2A圖至第2F圖中所示,方法300可以用於處理堆疊200。由此,將關於第2A圖至第2F圖描述方法300。同樣,沉積的硬遮罩可為如上文描述的類金剛石碳層,並且可以用於在膜堆疊中製造類階梯結構,用於三維半導體裝置、或任何適當的裝置製造應用。亦應當理解,第3A圖及第3B圖中描繪的操作可同時執行及/或以與第3A圖及第3B圖中描繪的順序不同的順序執行。
方法300的操作302及304類似於操作102及104,並且因此出於簡潔起見將不再描述。因此,如第2A圖所示,堆疊200與在基板202上方沉積的膜堆疊204一起形成。於操作306處,如第2B圖所示,硬遮罩沉積及離子植入處理的同時製程係在處理腔室中執行以在膜堆疊204上形成硬遮罩206。同時的製程可藉由在處理腔室中由氣體混合物(例如,含烴氣體及惰性氣體/稀釋氣體)產生電漿來執行,以在膜堆疊204上方形成一層硬遮罩206。電漿可藉由將高壓RF偏壓施加到靜電夾盤而在基板位準處產生。在約0.4 MHz至約300 MHz(例如約11 MHz至約60 MHz)的頻率下,高壓RF偏壓可在從約1千瓦至約15千瓦的範圍中。在一個實施例中,在約8千瓦及約13.56 MHz的頻率下提供高壓RF偏壓。可經由靜電夾盤中設置的第三電極將高壓RF偏壓從RF功率產生器提供到靜電夾盤。
在膜堆疊204上方沉積硬遮罩206時,施加到靜電夾盤的高壓RF偏壓亦可以用作植入能量以從朝向生長的硬遮罩206移動的氣體混合物(亦即,含烴氣體、惰性氣體/稀釋氣體)吸引離子。由此,如第2C圖中所示,硬遮罩206的離子植入處理與硬遮罩沉積同時執行。離子藉由高壓RF偏壓吸引及加速以撞擊硬遮罩206的表面,由此減少硬遮罩206的應力。
在一些實施例中,DC偏壓可額外施加到靜電夾盤以促進離子植入處理。來自氣體混合物(亦即,含烴氣體、惰性氣體/稀釋氣體)的離子可以由DC偏壓吸引及加速以撞擊硬遮罩206的表面,由此減少硬遮罩206的應力。如上文關於第1A圖及第1B圖所論述,可以經由第二電極將DC偏壓提供到靜電夾盤,該第二電極可設置在靜電夾盤中並且與DC電源電氣連通。或者,可將DC偏壓從夾持電源提供到第一電極。偏壓可在約1千伏與約15千伏之間。在一個實施例中,DC偏壓係在約2千伏與約6千伏之間。在另一實施例中,偏壓係在約8千伏與約10千伏之間。類似於操作108,取決於期望的植入深度,植入能量可在約0.5 keV與約60 keV之間,例如約6 keV至約45 keV。離子劑量可在從約1x1013
cm-2
至約1x1017
cm-2
的範圍中,例如約5x1016
cm-2
。
在任何情況下,氣體混合物(例如,含烴氣體及惰性氣體/稀釋氣體)的流動在整個操作308中係連續的。由此,用於硬遮罩沉積的沉積物種(例如,碳、氫等等的離子或中性物種)亦可以用作離子植入處理的植入物種。如與硬遮罩沉積及離子植入製程係由短工作週期RF或脈衝DC電壓分開的實施例相比,硬遮罩沉積及離子植入處理的原位製程實現同時且更有效地沉積及處理硬遮罩206。
於操作308處,作出決策以決定沉積/處理的硬遮罩206是否達到目標厚度。硬遮罩206可具有對應於膜堆疊204的後續蝕刻要求的目標厚度。在一個實例中,硬遮罩206的目標厚度係在約0.5 μm與約1.5 μm之間,諸如約1.0 μm。若尚未達到硬遮罩206的目標厚度,則沉積/離子植入製程的另一循環(例如,操作304及306)可在將處理的硬遮罩206的厚度再次與目標厚度進行比較之前執行。重複硬遮罩沉積及離子植入處理的原位同時製程,直至沉積/處理的硬遮罩206達到目標厚度。
操作310、312、314、及316類似於操作112、114、116、及118,並且因此出於簡便緣故將不描述。
第4圖係描繪對於根據上文關於第3A圖及第3B圖論述的一或多個實施例形成的類金剛石碳層(例如,硬遮罩)的(1)應力隨偏壓功率變化(由方形表示)以及(2)密度隨偏壓功率變化(由點表示)的圖400。x軸表示偏壓功率(瓦),並且y軸表示沉積膜的密度(g/cc)。如第4圖中示出,通常,隨著偏壓功率增加,所沉積膜的密度增加。特定而言,類金剛石碳層的應力在較高RF功率/離子能量下係較低的。
第5圖係描繪對於根據本揭示的一或多個實施例形成的類金剛石碳層(例如,硬遮罩)的應力隨植入劑量變化的圖500。圖500描繪了所沉積及使用約35 keV的植入能量來後離子植入類金剛石碳膜的應力資料。x軸表示沉積膜的應力(MPa),並且y軸表示植入劑量(A.U.)。如第5圖中示出,所沉積膜的應力在離子植入處理之後顯著降低。
第6圖係可用於實踐本文闡述的方法的任一個或組合的示例性處理的示意性橫截面圖。處理腔室600包括腔室蓋組件601、一或多個側壁602、及腔室底部604。腔室蓋組件601包括腔室蓋606、在腔室蓋606中設置的噴頭607、以及在腔室蓋606與一或多個側壁602之間設置的電氣絕緣環608。噴頭607、一或多個側壁602、及腔室底部604一起界定處理容積605。穿過腔室蓋606設置的進氣口609流體耦接到氣源610。穿過其中設置有複數個開口611的噴頭607用於將處理氣體從氣源610均勻地分配到處理容積605中。噴頭607電氣耦接到第一電源供應器612,諸如RF電源供應器,該電源供應器經由與其的電容性耦接來供應功率以點燃並且維持處理氣體的電漿613。在其他實施例中,處理腔室600包含感應性電漿產生器,並且電漿經由將RF功率感應性耦接到處理氣體來形成。
處理容積605經由真空出口614流體地耦接到真空源,諸如耦接到一或多個專用真空泵,該真空出口將處理容積605維持在低大氣條件下並且從該處理容積抽空處理氣體及其他氣體。在處理容積605中設置的基板支撐件615在可移動支撐軸616上設置,該支撐軸密封地穿過腔室底部604(諸如由波紋管(未圖示)圍繞)在腔室底部604之下的區域中延伸。在本文中,處理腔室600經習知地配置以促進穿過在一或多個側壁602的一者中的開口618將基板617轉移到基板支撐件615並且從基板支撐件615轉移基板617,在基板處理期間該開口習知地用門或閥(未圖示)密封。
在本文中,使用加熱器(諸如電阻式加熱元件619)及在基板支撐件615中設置的一或多個冷卻通道620的一者或兩者將在基板支撐件615上設置的基板617維持在期望的處理溫度下。通常,一或多個冷卻通道620流體耦接到冷卻劑源(未圖示),諸如修改的具有相對高的電阻的水源或冷卻劑源。在一些實施例中,基板支撐件615或其一或多個電極621電氣耦接到第二電源供應器622,諸如連續波(continuous wave; CW) RF電源供應器或脈衝RF電源供應器,該電源供應器向其供應偏壓。
處理腔室600進一步包括系統控制器630,該系統控制器用於控制處理腔室600的操作並且實施本文闡述的方法。系統控制器630包括可程式化中央處理單元,在本文中為中央處理單元(CPU 631),其可與記憶體632(例如,非揮發性記憶體)及支援電路633一起操作。支援電路633耦接到CPU 631並且包含耦接到處理腔室600的各種部件的快取記憶體、時鐘電路、輸入/輸出子系統、電源供應器、及其組合以促進其控制。CPU 631係用於控制處理腔室600的各種部件及子處理器的任何形式通用電腦處理器的一者,諸如可程式化邏輯控制器(programmable logic controller; PLC)。耦接到CPU 631的記憶體632係非暫時性的,並且通常為容易獲得的記憶體中的一或多者,諸如隨機存取記憶體(random access memory; RAM)、唯讀記憶體(read only memory; ROM)、軟碟驅動、硬碟、或任何其他形式的數位儲存器(本端或遠端)。
典型地,記憶體632係呈含有指令的電腦可讀取儲存媒體(例如,非揮發性記憶體)的形式,當由CPU 631執行時,該等指令促進處理腔室600的操作。記憶體632中的指令係呈程式產品的形式,諸如實施本揭示的方法的程式。程式碼可符合數個不同程式化語言的任一種。在一個實例中,本揭示可實施為在電腦可讀取儲存媒體上儲存的與電腦系統一起使用的程式產品。程式產品的程式定義實施例(包括本文描述的方法)的功能。
因此,提供了用於形成類金剛石碳硬遮罩層的方法,該硬遮罩層可用於形成半導體裝置。藉由利用原位硬遮罩沉積離子植入製程,硬遮罩層可經沉積及處理,而不必破壞真空並且轉移到異位植入工具。因此,改進總產量並且降低與異位植入工具相關聯的成本。另外,硬遮罩的沉積及處理可使用獨立的電漿源或一個高功率(高壓)電漿源以循環或同時的方式執行,來在相同處理腔室中將硬遮罩定製為可能的任何目標厚度。此外,植入離子用於增加硬遮罩的機械完整性及密度,同時維持或降低硬遮罩的內部應力。硬遮罩之增加的機械完整性及密度在蝕刻硬遮罩之後降低線性彎曲,並且硬遮罩之維持或降低的應力降低或消除不期望的基板彎曲或變形。總而言之,增加了硬遮罩的蝕刻選擇性。
儘管上述內容針對本揭示的實施例,但是本揭示的其他及進一步的實施例可在不脫離其基本範疇的情況下設計,並且其範疇由以下申請專利範圍決定。
100:方法
102:操作
104:操作
106:操作
108:操作
110:操作
112:操作
114:操作
116:操作
118:操作
200:堆疊
202:基板
204:膜堆疊
206:硬遮罩
207:離子
208:光阻劑
300:方法
302:操作
304:操作
306:操作
308:操作
310:操作
312:操作
314:操作
316:操作
400:圖
500:圖
600:處理腔室
601:腔室蓋組件
602:側壁
604:腔室底部
605:處理容積
606:腔室蓋
607:噴頭
608:環
609:進氣口
610:氣源
611:開口
612:第一電源供應器
613:電漿
614:真空出口
615:基板支撐件
616:可移動支撐軸
617:基板
618:開口
619:電阻式加熱元件
620:冷卻通道
621:電極
622:第二電源供應器
630:系統控制器
631:中央處理單元
632:記憶體
633:支援電路
為了能夠詳細理解本揭示的上述特徵所用方式,可參考實施例進行對上文簡要概述的本揭示的更特定描述,一些實施例在附圖中示出。然而,將注意,附圖僅示出本揭示的典型實施例,並且由此不被認為限制其範疇,因為本揭示可允許其他同等有效的實施例。
第1A圖及第1B圖係闡述根據本揭示的實施例的用於在膜堆疊上形成硬遮罩的方法的流程圖。
第2A圖至第2F圖係示出根據第1A圖及第1B圖的方法的硬遮罩形成序列的堆疊的示意性橫截面圖。
第3A圖及第3B圖係闡述根據本揭示的實施例的用於在膜堆疊上沉積硬遮罩的方法的流程圖。
第4圖係描繪對於根據本揭示的一或多個實施例形成的類金剛石碳層的(1)應力隨偏壓功率變化以及(2)密度隨偏壓功率變化的圖。
第5圖係描繪對於根據本揭示的一或多個實施例形成的類金剛石碳層的應力隨植入劑量變化的圖。
第6圖係可用於實踐本文闡述的方法的示例性處理的示意性橫截面圖。
為了便於理解,在可能的情況下,已使用相同元件符號標識圖中共有的相同元件。可以預期,一個實施例的元件及特徵可有利地併入其他實施例中,而無需進一步敘述。
國內寄存資訊 (請依寄存機構、日期、號碼順序註記)
無
國外寄存資訊 (請依寄存國家、機構、日期、號碼順序註記)
無
100:方法
102:操作
104:操作
106:操作
108:操作
110:操作
112:操作
Claims (30)
- 一種處理一基板以形成包含至少兩個碳硬遮罩層的一碳硬遮罩的方法,包含以下步驟:在該基板上形成的一膜堆疊上方沉積一第一碳硬遮罩層,其中該基板在一處理腔室中設置的一靜電夾盤上定位;將離子植入該碳硬遮罩層,其中沉積該碳硬遮罩層之步驟及將離子植入該碳硬遮罩之步驟係在該相同處理腔室中執行;以及在該基板不離開該處理腔室中的情況下,以一循環方式重複沉積該一或多個碳硬遮罩層之步驟及將離子植入該碳硬遮罩層之步驟,直至達到該碳硬遮罩的一預定厚度。
- 如請求項1所述之方法,其中沉積該碳硬遮罩之步驟係藉由經由在該靜電夾盤中設置的一第一電極將具有一第一功率位準的一第一RF功率施加至該靜電夾盤來執行。
- 如請求項2所述之方法,其中在約0.4MHz至約300MHz的一頻率下,該第一RF功率係在約1千瓦至約10千瓦的一範圍中。
- 如請求項2所述之方法,其中將離子植入該碳硬遮罩之步驟包含以下步驟: 在該膜堆疊上方沉積該碳硬遮罩之步驟之後,中斷用於形成該碳硬遮罩的一含烴氣體的一流動;以及將該第一RF功率從該第一功率位準降低到足以在該處理腔室中維持電漿的一第二功率位準。
- 如請求項1所述之方法,其中將離子植入該碳硬遮罩之步驟係藉由經由在該靜電夾盤中設置的一第二電極將一DC偏壓施加到該靜電夾盤來執行。
- 如請求項5所述之方法,其中該DC偏壓係在約2千伏至約15千伏的一範圍中。
- 如請求項5所述之方法,其中該DC偏壓係在10Hz至約10kHz的一脈衝頻率下提供,其中一脈衝寬度為約5微秒至約30毫秒。
- 如請求項1所述之方法,其中將離子植入該碳硬遮罩之步驟係藉由經由在該靜電夾盤中設置的一第三電極將一第二RF功率施加到該靜電夾盤來執行。
- 如請求項8所述之方法,其中在約0.4MHz至約300MHz的一頻率下,該第二RF功率係在約1千瓦至約10千瓦的一範圍中。
- 如請求項9所述之方法,其中該第二RF功率以在從約10%至約80%的一範圍中的一工作週期脈衝化。
- 一種處理一基板的方法,包含以下步驟:在一基板上方沉積一碳硬遮罩,其中該碳硬遮罩係藉由將一RF偏壓施加到一靜電夾盤以產生一電漿來沉積,該基板定位在該靜電夾盤上;以及在該基板上方沉積該碳硬遮罩時,使用該RF偏壓將離子從該電漿植入該碳硬遮罩,其中沉積該碳硬遮罩之步驟及將離子植入該碳硬遮罩之步驟係在該相同處理腔室中同時執行。
- 如請求項11所述之方法,其中在約0.4MHz至約300MHz的一頻率下,該RF偏壓係在從約1千瓦至約15千瓦的一範圍中。
- 如請求項11所述之方法,其中該RF偏壓提供約6keV至約45keV的一植入能量。
- 如請求項11所述之方法,進一步包含以下步驟:當在該基板上方沉積該碳硬遮罩時,將一DC偏壓施加至該靜電夾盤。
- 如請求項14所述之方法,其中該DC偏壓係在約1千瓦至約15千瓦的一範圍中。
- 一種處理一基板的方法,包含以下步驟:藉由經由一第一電極將具有一第一功率位準的一第一RF功率施加到一靜電夾盤來在一基板上形成的一 膜堆疊上方沉積一類金剛石碳硬遮罩,其中該基板在其中設置該第一電極的該靜電夾盤上定位;將離子植入該類金剛石碳硬遮罩,其中沉積該類金剛石碳硬遮罩之步驟及將離子植入該類金剛石碳硬遮罩之步驟係在該相同處理腔室中執行;重複以一循環方式沉積該類金剛石碳硬遮罩之步驟及將離子植入該類金剛石碳硬遮罩之步驟,直至達到該類金剛石碳硬遮罩的一預定厚度;圖案化該類金剛石碳硬遮罩;使用該圖案化的類金剛石碳硬遮罩蝕刻該膜堆疊;以及移除該類金剛石碳硬遮罩。
- 如請求項16所述之方法,其中將離子植入該類金剛石碳硬遮罩之步驟包含以下步驟:在該膜堆疊上方沉積該類金剛石碳硬遮罩之後,中斷用於形成該類金剛石碳硬遮罩之一含烴氣體的一流動;以及將該第一RF功率從該第一功率位準降低到足以在該處理腔室中維持電漿的一第二功率位準。
- 如請求項16所述之方法,其中將離子植入該類金剛石碳硬遮罩之步驟係藉由將一脈衝DC偏壓施加到該靜電夾盤來執行。
- 如請求項16所述之方法,其中將離子植入該類金剛石碳硬遮罩之步驟係藉由將一第二RF功率施加到該靜電夾盤來執行。
- 如請求項19所述之方法,其中該第二RF功率以在從約10%至約80%的一範圍中的一工作週期脈衝化。
- 一種處理一基板的方法,包含以下步驟:在該基板上形成的一膜堆疊上方沉積一碳硬遮罩,其中該基板在一處理腔室中設置的一靜電夾盤上定位;將離子植入該碳硬遮罩,其中沉積該碳硬遮罩之步驟及將離子植入該碳硬遮罩之步驟係在該相同處理腔室中執行;以一循環方式重複沉積該碳硬遮罩之步驟及將離子植入該碳硬遮罩層之步驟,直至達到該碳硬遮罩的一預定厚度;在該膜堆疊上方沉積該碳硬遮罩之步驟之後,中斷用於形成該碳硬遮罩的一含烴氣體的一流動;以及將該第一RF功率從該第一功率位準降低到足以在該處理腔室中維持電漿的一第二功率位準。
- 如請求項21所述之方法,其中將離子植入該碳硬遮罩之步驟係藉由經由在該靜電夾盤中設置的一第二電極將一DC偏壓施加到該靜電夾盤來執行。
- 如請求項22所述之方法,其中在約0.4MHz至約300MHz的一頻率下,該第一RF功率係在約1千瓦至約10千瓦的一範圍中。
- 如請求項21所述之方法,其中將離子植入該碳硬遮罩之步驟係藉由經由在該靜電夾盤中設置的一第二電極將一DC偏壓施加到該靜電夾盤來執行。
- 如請求項24所述之方法,其中該DC偏壓係在約2千伏至約15千伏的一範圍中。
- 如請求項24所述之方法,其中該DC偏壓係在10Hz至約10kHz的一脈衝頻率下提供,其中一脈衝寬度為約5微秒至約30毫秒。
- 如請求項21所述之方法,其中將離子植入該碳硬遮罩之步驟係藉由經由在該靜電夾盤中設置的一第三電極將一第二RF功率施加到該靜電夾盤來執行。
- 如請求項27所述之方法,其中在約0.4MHz至約300MHz的一頻率下,該第二RF功率係在約1千瓦至約10千瓦的一範圍中。
- 如請求項28所述之方法,其中該第二RF功率以在從約10%至約80%的一範圍中的一工作週期脈衝化。
- 一種處理一基板的方法,包含以下步驟: 在該基板上形成的一膜堆疊上方沉積一碳硬遮罩,其中該基板在一處理腔室中設置的一靜電夾盤上定位,並且沉積該碳硬遮罩之步驟係藉由經由在該靜電夾盤中設置的一第一電極將具有一第一功率位準的一第一RF功率施加至該靜電夾盤來執行;將離子植入該碳硬遮罩,其中沉積該碳硬遮罩之步驟及將離子植入該碳硬遮罩之步驟係在該相同處理腔室中執行,且將離子植入該碳硬遮罩之步驟包含以下步驟:在該膜堆疊上方沉積該碳硬遮罩之步驟之後,中斷用於形成該碳硬遮罩的一含烴氣體的一流動,以及將該第一RF功率從該第一功率位準降低到足以在該處理腔室中維持電漿的一第二功率位準;以及以一循環方式重複沉積該碳硬遮罩之步驟及將離子植入該碳硬遮罩之步驟,直至達到該碳硬遮罩的一預定厚度。
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