TWI817716B - Touch sensing device - Google Patents
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Abstract
Description
本案涉及一種電子裝置。詳細而言,本案涉及一種觸控感測裝置。This case involves an electronic device. In detail, this case involves a touch sensing device.
現有感測裝置處於低亮度的環境中,由於感測裝置之驅動電晶體之閘極端之電壓太低,使驅動電晶體操作於截止區中,無法產生足夠電流,進而降低觸控感測靈敏度。The existing sensing device is in a low-brightness environment. Since the voltage at the gate terminal of the driving transistor of the sensing device is too low, the driving transistor operates in the cut-off region and cannot generate sufficient current, thereby reducing the touch sensing sensitivity.
此外,現有感測裝置並未對感測裝置之驅動電晶體之臨界電壓進行補償。當驅動電晶體之臨界電壓變異時,驅動電晶體之臨界電壓嚴重影響感測裝置之感測結果以及降低觸控感測靈敏度。In addition, the existing sensing device does not compensate for the critical voltage of the driving transistor of the sensing device. When the critical voltage of the driving transistor varies, the critical voltage of the driving transistor seriously affects the sensing result of the sensing device and reduces the touch sensing sensitivity.
因此,上述技術尚存諸多缺陷,而有待本領域從業人員研發出其餘適合的觸控感測裝置。Therefore, the above technology still has many shortcomings, and practitioners in the field need to develop other suitable touch sensing devices.
本案的一面向涉及一種觸控感測裝置。觸控感測裝置包含第一節點、第二節點、第三節點、驅動電晶體、感測元件、第一電路及第二電路。驅動電晶體耦接於第一節點、第二節點及第三節點。感測元件耦接於第三節點。第一電路耦接於第二節點及第三節點,並用以接收第一訊號及第二訊號,以重置第二節點及第三節點,藉以間接重置第一節點。第二電路耦接於第一節點,並用以接收第三訊號及第四訊號。第一電路及第二電路用以分別根據第一訊號及第三訊號補償第一節點、第二節點及第三節點。感測元件用以感測目標物之生物特徵,以產生感測訊號,藉以改變第三節點之電壓準位。第一電路根據第一訊號關閉以維持第三節點之電壓準位。第二電路用以根據第四訊號以重置第三節點。第一電路及第二電路用以分別根據第二訊號及第四訊號以間接透過驅動電晶體讀取感測訊號,以產生輸出訊號。One aspect of this case involves a touch sensing device. The touch sensing device includes a first node, a second node, a third node, a driving transistor, a sensing element, a first circuit and a second circuit. The driving transistor is coupled to the first node, the second node and the third node. The sensing element is coupled to the third node. The first circuit is coupled to the second node and the third node, and is used to receive the first signal and the second signal to reset the second node and the third node, thereby indirectly resetting the first node. The second circuit is coupled to the first node and used to receive the third signal and the fourth signal. The first circuit and the second circuit are used to compensate the first node, the second node and the third node according to the first signal and the third signal respectively. The sensing element is used to sense the biological characteristics of the target object to generate a sensing signal to change the voltage level of the third node. The first circuit is turned off according to the first signal to maintain the voltage level of the third node. The second circuit is used to reset the third node according to the fourth signal. The first circuit and the second circuit are used to indirectly read the sensing signal through the driving transistor according to the second signal and the fourth signal respectively to generate an output signal.
以下將以圖式及詳細敘述清楚說明本案之精神,任何所屬技術領域中具有通常知識者在瞭解本案之實施例後,當可由本案所教示之技術,加以改變及修飾,其並不脫離本案之精神與範圍。The following will clearly illustrate the spirit of this application with drawings and detailed descriptions. Anyone with ordinary knowledge in the technical field, after understanding the embodiments of this application, can make changes and modifications based on the techniques taught in this application without departing from the spirit of this application. Spirit and scope.
本文之用語只為描述特定實施例,而無意為本案之限制。單數形式如“一”、“這”、“此”、“本”以及“該”,如本文所用,同樣也包含複數形式。The terms used herein are only used to describe specific embodiments and are not intended to be limiting. Singular forms such as "a", "this", "this", "this" and "the", as used herein, also include the plural forms.
關於本文中所使用之『包含』、『包括』、『具有』、『含有』等等,均為開放性的用語,即意指包含但不限於。The words "includes", "includes", "has", "contains", etc. used in this article are all open terms, which mean including but not limited to.
關於本文中所使用之用詞(terms),除有特別註明外,通常具有每個用詞使用在此領域中、在本案之內容中與特殊內容中的平常意義。某些用以描述本案之用詞將於下或在此說明書的別處討論,以提供本領域技術人員在有關本案之描述上額外的引導。Regarding the terms used in this article, unless otherwise noted, they generally have the ordinary meanings of each term used in this field, the content of this case, and the special content. Certain terms used to describe the present invention are discussed below or elsewhere in this specification to provide those skilled in the art with additional guidance in describing the present invention.
第1圖為根據本案一些實施例繪示的觸控感測裝置100之電路方塊示意圖。在一些實施例中,如第1圖所示,觸控感測裝置100包含第一節點N1、第二節點N2、第三節點N3、驅動電晶體DT1、感測元件PD、第一電路110及第二電路120。在一些實施例中,觸控感測裝置100之輸出端V
OUT耦接於外部積體電路910。在一些實施例中,觸控感測裝置100及外部積體電路910位於一種電子裝置之內部(圖中未示)。
Figure 1 is a circuit block diagram of a
須說明的是,電子裝置包含複數個觸控感測裝置100。每一個觸控感測裝置100等同於一個感測畫素。進一步說明的是,觸控感測裝置100亦可設計於電子裝置之顯示畫素(圖中未示)之驅動行或驅動列之間。第一訊號S2[N+1]為第四訊號S2[N]之次級訊號。第一訊號S2[N+1]至第四訊號S2[N]可同時為電子裝置之顯示畫素之驅動訊號。換言之,本案觸控感測裝置100可於現有電子裝置之顯示畫素進行整合,不影響現有電子裝置之顯示畫素之驅動方式It should be noted that the electronic device includes a plurality of
在一些實施例中,請參閱第1圖,驅動電晶體DT1耦接於第一節點N1、第二節點N2及第三節點N3。感測元件PD耦接於第三節點N3。In some embodiments, please refer to FIG. 1 , the driving transistor DT1 is coupled to the first node N1 , the second node N2 and the third node N3 . The sensing element PD is coupled to the third node N3.
第一電路110耦接於第二節點N2及第三節點N3,並用以接收第一訊號S2[N+1]及第二訊號S1[N+1],以重置第二節點N2及第三節點N3,藉以間接重置第一節點N1。第二電路120耦接於第一節點N1,並用以接收第三訊號EM[N]及第四訊號S2[N]。The
接著,第一電路110及第二電路120用以分別根據第一訊號S2[N+1]及第三訊號EM[N]以補償第一節點N1、第二節點N2及第三節點N3。Then, the
再者,感測元件PD用以感測目標物之生物特徵,以產生感測訊號,藉以改變第三節點N3之電壓準位。第一電路110根據第一訊號S2[N+1]關閉以維持第三節點N3之電壓準位。Furthermore, the sensing element PD is used to sense the biological characteristics of the target object to generate a sensing signal, thereby changing the voltage level of the third node N3. The
爾後,第二電路120用以根據第四訊號S2[N]以重置第三節點N3。第一電路110及第二電路120用以分別根據第二訊號S1[N+1]及第四訊號S2[N]以間接透過驅動電晶體DT1讀取感測訊號,以產生輸出訊號(圖中未示)。Thereafter, the
在一些實施例中,請參閱第1圖,並請以圖示中元件的上方及右方起算為第一端,驅動電晶體DT1包含第一端、第二端以及控制端(即驅動電晶體DT1之閘極端)。驅動電晶體DT1之第一端耦接於第一節點N1。驅動電晶體DT1之第二端耦接於第二節點N2。驅動電晶體DT1之控制端耦接於第三節點N3。驅動電晶體DT1響應第三節點N3之電壓準位而關閉或導通。In some embodiments, please refer to Figure 1, and please take the top and right side of the component in the figure as the first terminal. The driving transistor DT1 includes a first terminal, a second terminal and a control terminal (i.e., the driving transistor DT1 gate extreme). The first terminal of the driving transistor DT1 is coupled to the first node N1. The second terminal of the driving transistor DT1 is coupled to the second node N2. The control terminal of the driving transistor DT1 is coupled to the third node N3. The driving transistor DT1 is turned off or turned on in response to the voltage level of the third node N3.
在一些實施例中,請參閱第1圖,第一電路110包含第一電晶體T1及第二電晶體T2。In some embodiments, please refer to FIG. 1 , the
此外,第一電晶體T1包含第一端、第二端以及控制端(即第一電晶體T1之閘極端)。第一電晶體T1之第一端耦接於第二節點N2。第一電晶體T1之第二端耦接於第三節點N3。第一電晶體T1之控制端用以接收第一訊號S2[N+1]。第一電晶體T1響應第一訊號S2[N+1]而導通。In addition, the first transistor T1 includes a first terminal, a second terminal and a control terminal (ie, the gate terminal of the first transistor T1). The first terminal of the first transistor T1 is coupled to the second node N2. The second terminal of the first transistor T1 is coupled to the third node N3. The control end of the first transistor T1 is used to receive the first signal S2[N+1]. The first transistor T1 is turned on in response to the first signal S2[N+1].
另外,第二電晶體T2包含第一端、第二端以及控制端(即第二電晶體T2之閘極端)。第二電晶體T2之第一端耦接於觸控感測裝置100之輸出端V
OUT。第二電晶體T2之第二端耦接於第二節點N2。第二電晶體T2之控制端用以接收第二訊號S1[N+1]。第二電晶體T2響應第二訊號S1[N+1]而導通。
In addition, the second transistor T2 includes a first terminal, a second terminal and a control terminal (ie, the gate terminal of the second transistor T2). The first terminal of the second transistor T2 is coupled to the output terminal V OUT of the
在一些實施例中,請參閱第1圖,第二電路120包含第三電晶體T3及第四電晶體T4。In some embodiments, please refer to FIG. 1 , the
此外,第三電晶體T3包含第一端、第二端以及控制端(即第三電晶體T3之閘極端)。第三電晶體T3之第一端用以接收參考電壓V REF。第三電晶體T3之第二端耦接於第一節點N1。第三電晶體T3之控制端用以接收第三訊號EM[N]。第三電晶體T3響應第三訊號EM[N]而導通。 In addition, the third transistor T3 includes a first terminal, a second terminal and a control terminal (ie, the gate terminal of the third transistor T3). The first terminal of the third transistor T3 is used to receive the reference voltage V REF . The second terminal of the third transistor T3 is coupled to the first node N1. The control end of the third transistor T3 is used to receive the third signal EM[N]. The third transistor T3 is turned on in response to the third signal EM[N].
另外,第四電晶體T4包含第一端、第二端以及控制端(即第四電晶體T4之閘極端)。第四電晶體T4之第一端用以接收電壓源FVDD之系統高電壓VDD。第四電晶體T4之第二端耦接於第一節點N1。第四電晶體T4之控制端用以接收第四訊號S2[N]。第四電晶體T4響應第四訊號S2[N]而導通。In addition, the fourth transistor T4 includes a first terminal, a second terminal and a control terminal (ie, the gate terminal of the fourth transistor T4). The first terminal of the fourth transistor T4 is used to receive the system high voltage VDD of the voltage source FVDD. The second terminal of the fourth transistor T4 is coupled to the first node N1. The control end of the fourth transistor T4 is used to receive the fourth signal S2[N]. The fourth transistor T4 is turned on in response to the fourth signal S2[N].
在一些實施例中,請參閱第1圖,感測元件PD包含第一端以及第二端。感測元件PD之第一端耦接於電壓源FVSS之系統低電壓VSS。感測元件PD之第二端耦接於第三節點N3。感測元件PD用以感測目標物之生物特徵。生物特徵包含目標物之指紋特徵。在一些實施例中,感測元件PD與第一電路110位於不同層。感測元件PD與第二電路120位於不同層。感測元件PD與驅動電晶體DT1位於不同層。In some embodiments, please refer to FIG. 1 , the sensing element PD includes a first terminal and a second terminal. The first terminal of the sensing element PD is coupled to the system low voltage VSS of the voltage source FVSS. The second terminal of the sensing element PD is coupled to the third node N3. The sensing element PD is used to sense the biological characteristics of the target object. Biometric characteristics include fingerprint characteristics of the target. In some embodiments, the sensing element PD and the
在一些實施例中,第一電晶體T1之電晶體種類、第二電晶體T2之電晶體種類、第三電晶體T3之電晶體種類、第四電晶體T4之電晶體種類及驅動電晶體DT1之電晶體種類均相同。在一些實施例中,上述電晶體T1~T4及驅動電晶體DT1為P型金屬氧化物半導體場效電晶體(P-type Metal-Oxide-Semiconductor Field-Effect Transistor, PMOS)。須說明的是,電晶體之種類可依據需求設計,並不以本案實施例為限。In some embodiments, the transistor type of the first transistor T1 , the transistor type of the second transistor T2 , the transistor type of the third transistor T3 , the transistor type of the fourth transistor T4 and the driving transistor DT1 The transistor types are all the same. In some embodiments, the transistors T1 to T4 and the driving transistor DT1 are P-type Metal-Oxide-Semiconductor Field-Effect Transistor (PMOS). It should be noted that the type of transistor can be designed according to requirements and is not limited to the embodiment of this case.
在一些實施例中,為使第1圖之觸控感測裝置100的操作易於理解,請一併參閱第2圖,第2圖為根據本案一些實施例繪示的觸控感測裝置100之驅動訊號時序示意圖。第一電路110於第一階段I1根據第一訊號S2[N+1]及第二訊號S1[N+1]以重置第二節點N2及第三節點N3,藉以間接重置第一節點N1。接著,第一電路110於第二階段I2根據第一訊號S2[N+1]以維持第二節點N2及第三節點N3之電壓準位。In some embodiments, in order to make the operation of the
再者,第一電路110於第三階段I3根據第一訊號S2[N+1]導通。於此同時,第二電路120於第三階段I3根據第三訊號EM[N]導通。第一電路110及第二電路120用以於第三階段I3補償第一節點N1、第二節點N2及第三節點N3。Furthermore, the
爾後,感測元件PD用以於第四階段I4感測目標物之生物特徵,以產生感測訊號,藉以改變第三節點N3之電壓準位。接著,第一電路110於第五階段I5根據第一訊號S2[N+1]關閉以維持第三節點N3之電壓準位。Thereafter, the sensing element PD is used to sense the biological characteristics of the target object in the fourth stage I4 to generate a sensing signal to change the voltage level of the third node N3. Then, the
再者,第二電路120用以於第六階段I6根據第四訊號S2[N]以重置第三節點N3。Furthermore, the
爾後,第一電路110用以於第七階段I7根據第二訊號S1[N+1]導通。於此同時,第二電路120用以於第七階段I7根據第四訊號S2[N]以間接透過驅動電晶體DT1讀取感測訊號,以產生輸出訊號。須說明的是,第一階段I1至第七階段I7為觸控感測裝置100或上述電子裝置更新畫面的時間為一幀(frame)。Thereafter, the
第3圖為根據本案一些實施例繪示的觸控感測裝置100之電路狀態示意圖。在一些實施例中,請參閱第2圖及第3圖,於第一階段I1中,第一訊號S2[N+1]及第二訊號S1[N+1]均為低準位V
GL,第三訊號EM[N]及第四訊號S2[N]均為高準位V
GH。觸控感測裝置100之第一電路110於第一階段I1根據第一訊號S2[N+1]及第二訊號S1[N+1]以重置第二節點N2及第三節點N3。
Figure 3 is a schematic diagram of the circuit status of the
在一些實施例中,此時外部積體電路910用以產生系統低電壓VSS。第二訊號S1[N+1]透過第一電路110之第二電晶體T2對第二節點N2寫入系統低電壓VSS。第一訊號S2[N+1]透過第一電路110之第一電晶體T1對第三節點N3寫入系統低電壓VSS。接著,驅動電晶體DT1響應系統低電壓VSS導通,藉以使第一電路110透過驅動電晶體DT1對第一節點N1寫入系統低電壓VSS。In some embodiments, the external
此時,第一節點N1之電壓準位為(系統低電壓VSS+驅動電晶體DT1之臨界電壓|V TH_DT1|)。第二節點N2之電壓準位為系統低電壓VSS。第三節點N3之電壓準位為系統低電壓VSS。 At this time, the voltage level of the first node N1 is (system low voltage VSS + critical voltage of the driving transistor DT1 |V TH_DT1 |). The voltage level of the second node N2 is the system low voltage VSS. The voltage level of the third node N3 is the system low voltage VSS.
第4圖為根據本案一些實施例繪示的觸控感測裝置100之電路狀態示意圖。在一些實施例中,請參閱第2圖及第4圖,於第二階段I2中,第一訊號S2[N+1]為低準位V
GL,第二訊號S1[N+1]、第三訊號EM[N]及第四訊號S2[N]均為高準位V
GH。觸控感測裝置100之第一電路110於第二階段I2根據第一訊號S2[N+1]以維持第二節點N2及第三節點N3之電壓準位。
Figure 4 is a schematic diagram of the circuit status of the
在一些實施例中,第一訊號S2[N+1]透過第一電路110之第一電晶體T1維持第二節點N2及第三節點N3之電壓準位為系統低電壓VSS。In some embodiments, the first signal S2[N+1] maintains the voltage level of the second node N2 and the third node N3 at the system low voltage VSS through the first transistor T1 of the
此時,第一節點N1之電壓準位為(系統低電壓VSS+驅動電晶體DT1之臨界電壓|V TH_DT1|)。第二節點N2之電壓準位為系統低電壓VSS。第三節點N3之電壓準位為系統低電壓VSS。 At this time, the voltage level of the first node N1 is (system low voltage VSS + critical voltage of the driving transistor DT1 |V TH_DT1 |). The voltage level of the second node N2 is the system low voltage VSS. The voltage level of the third node N3 is the system low voltage VSS.
第5圖為根據本案一些實施例繪示的觸控感測裝置100之電路狀態示意圖。在一些實施例中,請參閱第2圖及第5圖,於第三階段I3中,第一訊號S2[N+1]及第三訊號EM[N]為低準位V
GL,第二訊號S1[N+1]及第四訊號S2[N]均為高準位V
GH。觸控感測裝置100之第一電路110及第二電路120用以於第三階段I3補償第一節點N1、第二節點N2及第三節點N3。
Figure 5 is a schematic diagram of the circuit status of the
在一些實施例中,參考電壓V
REF透過第二電路120之第三電晶體T3對第一節點N1進行補償。由於驅動電晶體DT1為持續導通狀態,參考電壓V
REF透過驅動電晶體DT1對第二節點N2進行補償。參考電壓V
REF更透過驅動電晶體DT1及第一電路110之第一電晶體T1對第三節點N3進行補償。
In some embodiments, the reference voltage V REF compensates the first node N1 through the third transistor T3 of the
此時,第一節點N1之電壓準位為參考電壓V REF。第二節點N2之電壓準位為(參考電壓V REF-驅動電晶體DT1之臨界電壓|V TH_DT1|)。第三節點N3之電壓準位為(參考電壓V REF-驅動電晶體DT1之臨界電壓|V TH_DT1|)。 At this time, the voltage level of the first node N1 is the reference voltage VREF . The voltage level of the second node N2 is (reference voltage V REF - critical voltage of the driving transistor DT1 |V TH_DT1 |). The voltage level of the third node N3 is (reference voltage V REF - critical voltage of the driving transistor DT1 |V TH_DT1 |).
第6圖為根據本案一些實施例繪示的觸控感測裝置100之電路狀態示意圖。在一些實施例中,請參閱第2圖及第6圖,於第四階段I4中,第三訊號EM[N]為低準位V
GL,第一訊號S2[N+1]、第二訊號S1[N+1]及第四訊號S2[N]均為高準位V
GH。觸控感測裝置100之感測元件PD用以於第四階段I4感測目標物之生物特徵,以產生感測訊號,藉以改變第三節點N3之電壓準位。
Figure 6 is a schematic diagram of the circuit status of the
在一些實施例中,觸控感測裝置100之感測元件PD用以於第四階段I4感測目標物之生物特徵(以圖示中光線L1進行示意,以產生感測訊號(即感測電流I
PD及感測電壓
)藉以改變第三節點N3之電壓準位。與此同時,參考電壓V
REF透過第二電路120之第三電晶體T3對第一節點N1維持於相同電壓準位。
In some embodiments, the sensing element PD of the
此時,第一節點N1之電壓準位為參考電壓V REF。第二節點N2之電壓準位為(參考電壓V REF-驅動電晶體DT1之臨界電壓|V TH_DT1|)。第三節點N3之電壓準位為(參考電壓V REF-驅動電晶體DT1之臨界電壓|V TH_DT1|-感測電壓 )。 At this time, the voltage level of the first node N1 is the reference voltage VREF . The voltage level of the second node N2 is (reference voltage V REF - critical voltage of the driving transistor DT1 |V TH_DT1 |). The voltage level of the third node N3 is (reference voltage V REF - critical voltage of the driving transistor DT1 | V TH_DT1 | - sensing voltage ).
須說明的是,感測電壓 之電壓準位範圍介於(參考電壓V REF-驅動電晶體DT1之臨界電壓|V TH_DT1|)及系統低電壓VSS之間。 It should be noted that the sensing voltage The voltage level range is between (reference voltage V REF - critical voltage of driving transistor DT1 | V TH_DT1 |) and the system low voltage VSS.
第7圖為根據本案一些實施例繪示的觸控感測裝置100之電路狀態示意圖。在一些實施例中,請參閱第2圖及第7圖,於第五階段I5中,第一訊號S2[N+1]、第二訊號S1[N+1]、第三訊號EM[N]及第四訊號S2[N]均為高準位V
GH。觸控感測裝置100之第一電路110及於第五階段I5根據第一訊號S2[N+1]關閉以維持第三節點N3之電壓準位。
Figure 7 is a schematic diagram of the circuit status of the
在一些實施例中,驅動電晶體DT1響應第三節點N3之電壓準位而持續導通。此時,第一節點N1之電壓準位為參考電壓V REF。第二節點N2之電壓準位為(參考電壓V REF-驅動電晶體DT1之臨界電壓|V TH_DT1|)。第三節點N3之電壓準位為(參考電壓V REF-驅動電晶體DT1之臨界電壓|V TH_DT1|-感測電壓 )。 In some embodiments, the driving transistor DT1 remains on in response to the voltage level of the third node N3. At this time, the voltage level of the first node N1 is the reference voltage VREF . The voltage level of the second node N2 is (reference voltage V REF - critical voltage of the driving transistor DT1 |V TH_DT1 |). The voltage level of the third node N3 is (reference voltage V REF - critical voltage of the driving transistor DT1 | V TH_DT1 | - sensing voltage ).
第8圖為根據本案一些實施例繪示的觸控感測裝置100之電路狀態示意圖。在一些實施例中,請參閱第2圖及第8圖,於第六階段I6中,第四訊號S2[N]為低準位V
GL,第一訊號S2[N+1]、第二訊號S1[N+1]及第三訊號EM[N]均為高準位V
GH。
Figure 8 is a schematic diagram of the circuit status of the
在一些實施例中,由於驅動電晶體DT1響應第三節點N3之電壓準位持續導通,第四訊號S2[N]透過第四電晶體T4對第一節點N1及第二節點N2寫入電壓源FVDD之系統高電壓VDD。In some embodiments, since the driving transistor DT1 continues to be turned on in response to the voltage level of the third node N3, the fourth signal S2[N] writes the voltage source to the first node N1 and the second node N2 through the fourth transistor T4. FVDD is the system high voltage VDD.
此時,第一節點N1之電壓準位為系統高電壓VDD。第二節點N2之電壓準位為系統高電壓VDD。第三節點N3之電壓準位為(參考電壓V REF-驅動電晶體DT1之臨界電壓|V TH_DT1|-感測電壓 )。 At this time, the voltage level of the first node N1 is the system high voltage VDD. The voltage level of the second node N2 is the system high voltage VDD. The voltage level of the third node N3 is (reference voltage V REF - critical voltage of the driving transistor DT1 | V TH_DT1 | - sensing voltage ).
第9圖為根據本案一些實施例繪示的觸控感測裝置100之電路狀態示意圖。在一些實施例中,請參閱第2圖及第9圖,於第七階段I7中,第二訊號S1[N+1]及第四訊號S2[N]均為低準位V
GL,第一訊號S2[N+1]及第三訊號EM[N]均為高準位V
GH。觸控感測裝置100之第一電路110及第二電路120用以分別根據第二訊號S1[N+1]及第四訊號S2[N]以間接透過驅動電晶體DT1讀取感測訊號,以產生輸出訊號I
R。
Figure 9 is a schematic diagram of the circuit status of the
在一些實施例中,第一電路110及第二電路120更用以透過驅動電晶體DT1之臨界電壓|V
TH_DT1|以讀取感測訊號,以產生輸出訊號I
R,並藉由觸控感測裝置100之輸出端V
OUT輸出至外部積體電路910。
In some embodiments, the
在一些實施例中,此時外部積體電路910用以讀取觸控感測裝置100之感測訊號。第二訊號S1[N+1]透過第二電晶體T2產生傳輸通道至外部積體電路910。第四訊號S2[N]透過第四電晶體T4產生輸出訊號I
R至外部積體電路910。輸出訊號I
R之公式如下所示:
…式1
In some embodiments, the external
於式1中,I
R為輸出訊號。VGS為驅動電晶體DT1之控制端及第二端之電壓差。Vth為驅動電晶體DT1之臨界電壓。驅動電晶體DT1之控制端之電壓為第三節點N3之電壓準位,其相當於(參考電壓V
REF-驅動電晶體DT1之臨界電壓|V
TH_DT1|-感測電壓
)。驅動電晶體DT1之第二端之電壓為第二節點N2之電壓準位,其相當於系統高電壓VDD。將驅動電晶體DT1之控制端及第二端的電位代入式1中,可得出:
…式2
In
上述式2中,|V TH_DT1|為驅動電晶體DT1之臨界電壓。如式2所示,驅動電晶體DT1之臨界電壓可互相抵消,將式2改寫如下: …式3 In the above equation 2, |V TH_DT1 | is the critical voltage of the driving transistor DT1. As shown in Equation 2, the critical voltages of the driving transistor DT1 can cancel each other out. Rewrite Equation 2 as follows: ...Formula 3
因此,本案之觸控感測裝置100之輸出訊號I
R之電流大小取決於系統高電壓VDD、參考電壓V
REF及感測電壓
之數值。
Therefore, the current size of the output signal IR of the
依據前述實施例,本案提供一種觸控感測裝置,藉以透過補償驅動電晶體之臨界電壓,並加強驅動電晶體之第二端及控制端之跨壓,以產生足夠讀取電流,提高觸控感測裝置之觸控感測靈敏度。According to the foregoing embodiments, the present invention provides a touch sensing device, which can generate sufficient reading current by compensating the critical voltage of the driving transistor and strengthening the cross-voltage between the second terminal and the control terminal of the driving transistor, thereby improving the touch sensitivity. Touch sensing sensitivity of the sensing device.
雖然本案以詳細之實施例揭露如上,然而本案並不排除其他可行之實施態樣。因此,本案之保護範圍當視後附之申請專利範圍所界定者為準,而非受於前述實施例之限制。Although this case is disclosed above with detailed embodiments, this case does not exclude other feasible implementation forms. Therefore, the scope of protection in this case shall be determined by the scope of the appended patent application and shall not be limited by the foregoing embodiments.
對本領域技術人員而言,在不脫離本案之精神和範圍內,當可對本案作各種之更動與潤飾。基於前述實施例,所有對本案所作的更動與潤飾,亦涵蓋於本案之保護範圍內。For those skilled in the art, various modifications and modifications can be made to the present application without departing from the spirit and scope of the present application. Based on the foregoing embodiments, all changes and modifications made to this case are also covered by the protection scope of this case.
100:觸控感測裝置 110:第一電路 120:第二電路 910:外部積體電路 T1~T4:電晶體 DT1:驅動電晶體 N1~N3:節點 PD:感測元件 S2[N+1]:第一訊號 S1[N+1]:第二訊號 EM[N]:第三訊號 S2[N]:第四訊號 FVDD, FVSS:電壓源 V REF:參考電壓 V OUT:輸出端 I1~I7:階段 V GH:高準位 V GL:低準位 I PD:感測電流 I R:輸出訊號 L1:光線100: Touch sensing device 110: First circuit 120: Second circuit 910: External integrated circuit T1~T4: Transistor DT1: Driving transistor N1~N3: Node PD: Sensing element S2[N+1] : first signal S1[N+1]: second signal EM[N]: third signal S2[N]: fourth signal FVDD, FVSS: voltage source V REF : reference voltage V OUT : output terminals I1~I7: Stage V GH : High level V GL : Low level I PD : Sensing current I R : Output signal L1: Light
參照後續段落中的實施方式以及下列圖式,當可更佳地理解本案的內容: 第1圖為根據本案一些實施例繪示的觸控感測裝置之電路方塊示意圖; 第2圖為根據本案一些實施例繪示的觸控感測裝置之驅動訊號時序示意圖; 第3圖為根據本案一些實施例繪示的觸控感測裝置之電路狀態示意圖; 第4圖為根據本案一些實施例繪示的觸控感測裝置之電路狀態示意圖; 第5圖為根據本案一些實施例繪示的觸控感測裝置之電路狀態示意圖; 第6圖為根據本案一些實施例繪示的觸控感測裝置之電路狀態示意圖; 第7圖為根據本案一些實施例繪示的觸控感測裝置之電路狀態示意圖; 第8圖為根據本案一些實施例繪示的觸控感測裝置之電路狀態示意圖;以及 第9圖為根據本案一些實施例繪示的觸控感測裝置之電路狀態示意圖。 The contents of this case can be better understood with reference to the implementation methods in the following paragraphs and the following diagrams: Figure 1 is a schematic circuit block diagram of a touch sensing device according to some embodiments of this case; Figure 2 is a schematic diagram of the driving signal timing of the touch sensing device according to some embodiments of this case; Figure 3 is a schematic diagram of the circuit status of a touch sensing device according to some embodiments of this case; Figure 4 is a schematic diagram of the circuit status of a touch sensing device according to some embodiments of this case; Figure 5 is a schematic diagram of the circuit status of a touch sensing device according to some embodiments of this case; Figure 6 is a schematic diagram of the circuit status of a touch sensing device according to some embodiments of this case; Figure 7 is a schematic diagram of the circuit status of a touch sensing device according to some embodiments of this case; Figure 8 is a schematic diagram of the circuit status of a touch sensing device according to some embodiments of this case; and Figure 9 is a schematic diagram of the circuit status of a touch sensing device according to some embodiments of the present invention.
國內寄存資訊(請依寄存機構、日期、號碼順序註記) 無 國外寄存資訊(請依寄存國家、機構、日期、號碼順序註記) 無 Domestic storage information (please note in order of storage institution, date and number) without Overseas storage information (please note in order of storage country, institution, date, and number) without
100:觸控感測裝置 100:Touch sensing device
110:第一電路 110:First circuit
120:第二電路 120: Second circuit
910:外部積體電路 910:External integrated circuit
T1~T4:電晶體 T1~T4: transistor
DT1:驅動電晶體 DT1: drive transistor
N1~N3:節點 N1~N3: nodes
PD:感測元件 PD: sensing element
S2[N+1]:第一訊號 S2[N+1]: first signal
S1[N+1]:第二訊號 S1[N+1]: second signal
EM[N]:第三訊號 EM[N]: The third signal
S2[N]:第四訊號 S2[N]: The fourth signal
FVDD,FVSS:電壓源 FVDD, FVSS: voltage source
VREF:參考電壓 V REF : reference voltage
VOUT:輸出端 V OUT : output terminal
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