TWI809063B - Wafer holder - Google Patents
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- TWI809063B TWI809063B TW108109518A TW108109518A TWI809063B TW I809063 B TWI809063 B TW I809063B TW 108109518 A TW108109518 A TW 108109518A TW 108109518 A TW108109518 A TW 108109518A TW I809063 B TWI809063 B TW I809063B
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
- H01L21/67103—Apparatus for thermal treatment mainly by conduction
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32715—Workpiece holder
- H01J37/32724—Temperature
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
- H01L21/6833—Details of electrostatic chucks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68735—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge profile or support profile
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68757—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a coating or a hardness or a material
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68785—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the mechanical construction of the susceptor, stage or support
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32532—Electrodes
- H01J37/32541—Shape
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32532—Electrodes
- H01J37/3255—Material
Abstract
陶瓷加熱器10，包括陶瓷基板20，具有上面裝載晶圓W的晶圓裝載面22；以及加熱電極26，埋設在陶瓷基板20的內部。陶瓷基板20，具有核心部20a與設置在核心部20a表面上的表層部20b。表層部20b的體積電阻率，比核心部20a的體積電阻率高，核心部20a的熱傳導率，比表層部20b的熱傳導率高。表層部20b，設置在核心部20a的側面20a2與核心部20a的上面20a1之中至少沒被晶圓W覆蓋的區域。 The ceramic heater 10 includes a ceramic substrate 20 having a wafer loading surface 22 on which a wafer W is loaded; and heating electrodes 26 buried inside the ceramic substrate 20 . The ceramic substrate 20 has a core part 20a and a surface layer part 20b provided on the surface of the core part 20a. The volume resistivity of the surface layer portion 20b is higher than that of the core portion 20a, and the thermal conductivity of the core portion 20a is higher than that of the surface layer portion 20b. The surface layer portion 20b is provided in at least a region not covered by the wafer W among the side surface 20a2 of the core portion 20a and the upper surface 20a1 of the core portion 20a.
Description
本發明，係有關於晶圓支撐座。The present invention relates to a wafer support base.
作為半導體製造裝置構件，支撐用以施行電漿處理的晶圓之晶圓支撐座係眾所周知的。作為這樣的晶圓支撐台，熟知包括陶瓷基板，具有上面裝載晶圓的晶圓裝載部；以及加熱電極，埋設在陶瓷基板的內部。又，作為陶瓷基板的材料，最好是熱傳導性及耐蝕性優異的氮化鋁燒結體係眾所周知的。但是，氮化鋁燒結體，因為在高溫區體積電阻率大為降低，來自加熱電極的漏電流變大，可能成為晶圓處理的障礙。有鑑於這點，專利文件1中，由於使氮化鋁燒結體的平均粒徑在4μm以下，釔氧化物的添加量為0.3～10質量%，使高溫區也成為高體積電阻率。 [先行技術文件] [專利文件]As a component of a semiconductor manufacturing apparatus, a wafer support for supporting a wafer to be subjected to plasma treatment is well known. As such a wafer support table, it is known to include a ceramic substrate having a wafer loading portion on which a wafer is placed, and a heater electrode embedded in the ceramic substrate. In addition, as the material of the ceramic substrate, the aluminum nitride sintered system which is excellent in thermal conductivity and corrosion resistance is well known. However, since the aluminum nitride sintered body greatly reduces the volume resistivity in the high temperature region, the leakage current from the heater electrode increases, which may become an obstacle to wafer processing. In view of this, in Patent Document 1, since the average particle diameter of the aluminum nitride sintered body is 4 μm or less, and the addition amount of yttrium oxide is 0.3 to 10 mass %, high volume resistivity is also achieved in the high temperature region. [Prior Technical Documents] [Patent Document]
[專利文件1] 專利公開第2003-313078號公報[Patent Document 1] Patent Publication No. 2003-313078
[發明所欲解決的課題][Problems to be Solved by the Invention]
但是，因為專利文件1的陶瓷基板側面沒有高電阻層，產生與電極的電漿耦合。還有，因為可以提高高溫區中的體積電阻率之物的熱傳導率變低，有時不能得到充分的晶圓均熱性。However, since there is no high-resistance layer on the side of the ceramic substrate of Patent Document 1, plasmonic coupling with electrodes occurs. In addition, since the thermal conductivity of what can increase the volume resistivity in the high-temperature region becomes low, sufficient wafer thermal uniformity may not be obtained.
本發明，係用以解決上述的課題研發而成，主要目的在於防止加熱電極與電漿耦合的同時，使晶圓的均熱性提高。 [用以解決課題的手段]The present invention is developed to solve the above-mentioned problems, and its main purpose is to improve the heat uniformity of the wafer while preventing the coupling between the heating electrode and the plasma. [Means to solve the problem]
本發明的晶圓支撐座，包括： 陶瓷基板，具有上面裝載晶圓的晶圓裝載部；以及 加熱電極，埋設在上述陶瓷基板的內部； 上述陶瓷基板，具有核心部與設置在上述核心部表面上的表層部； 上述表層部的體積電阻率，比上述核心部的體積電阻率高； 上述核心部的熱傳導率，比上述表層部的熱傳導率高； 上述表層部，設置在上述核心部的側面與上述核心部的上面之中至少沒被上述晶圓覆蓋的區域。The wafer support seat of the present invention comprises: a ceramic substrate having a wafer loading portion on which a wafer is loaded; and The heating electrode is embedded in the interior of the above-mentioned ceramic substrate; The above-mentioned ceramic substrate has a core part and a surface layer part provided on the surface of the above-mentioned core part; The volume resistivity of the above-mentioned surface layer part is higher than the volume resistivity of the above-mentioned core part; The thermal conductivity of the above-mentioned core part is higher than the thermal conductivity of the above-mentioned surface layer part; The surface layer portion is provided on at least a region not covered by the wafer among the side surfaces of the core portion and the upper surface of the core portion.
此晶圓支撐座中，陶瓷基板具有核心部與設置在上述核心部表面上的表層部，表層部設置在核心部的側面與核心部的上面之中至少沒被晶圓覆蓋的區域。在此，表層部的體積電阻率，比核心部的體積電阻率高。因此，對晶圓施行電漿處理之際，可以抑制產生對晶圓的電漿處理形成障礙之加熱電極與電漿的耦合。另一方面，核心部的熱傳率，比表層部的熱傳導率高。因此，陶瓷基板全體由於熱傳導率變得較高，晶圓的均熱性提高。In this wafer holder, the ceramic substrate has a core portion and a surface portion disposed on the surface of the core portion, and the surface portion is disposed on at least an area not covered by the wafer among the side surfaces of the core portion and the upper surface of the core portion. Here, the volume resistivity of the surface layer portion is higher than that of the core portion. Therefore, when plasma processing is performed on the wafer, it is possible to suppress the coupling between the heating electrode and the plasma, which would hinder the plasma processing of the wafer. On the other hand, the heat transfer rate of the core portion is higher than that of the surface layer portion. Therefore, since the thermal conductivity of the entire ceramic substrate becomes high, the thermal uniformity of the wafer is improved.
又，本說明書中，「上」「下」並非表示絕對的位置關係，係表示相對的位置關係。因此，根據陶瓷加熱器的方向「上」「下」為「左」「右」、「前」「後」或「下」「上」。In addition, in this specification, "upper" and "lower" do not mean an absolute positional relationship, but a relative positional relationship. Therefore, depending on the direction of the ceramic heater, "up" and "down" are "left" and "right", "front" and "back" or "down" and "up".
本發明的晶圓支持座中，上述表層部，更進一步地也設置在上述核心部的下面也可以。這樣，可以更抑制通過陶瓷基板的背面產生與電漿的耦合。In the wafer holder of the present invention, the surface portion may be further provided on the lower surface of the core portion. In this way, it is possible to further suppress coupling with plasma through the back surface of the ceramic substrate.
本發明的晶圓支持座中，上述表層部，更進一步也設置在上述核心部的上面之中被上述晶圓覆蓋的區域也可以。即，表層部，設置在核心部的上面全面也可以。這樣，可以抑制從加熱電極到晶圓的漏電流。In the wafer holder of the present invention, the surface portion may be further provided in a region covered by the wafer among the upper surfaces of the core portion. That is, the surface layer portion may be provided on the entire upper surface of the core portion. In this way, leakage current from the heater electrode to the wafer can be suppressed.
本發明的晶圓支持座中，上述表層部，設置為包圍上述核心部的全表面也可以。這樣，可以更加抑制加熱電極與電漿的耦合以及產生來自加熱電極的漏電流。In the wafer holder of the present invention, the surface portion may be provided so as to surround the entire surface of the core portion. In this way, the coupling of the heating electrode to the plasma and the generation of leakage current from the heating electrode can be further suppressed.
本發明的晶圓支持座中，上述陶瓷基板內部，埋設靜電電極及RF電極中至少一方作為上述加熱電極以外的電極也可以。陶瓷基板內部，埋設靜電電極及RF電極時，可能從這樣的電極流出漏電流。但是，本發明的晶圓支撐座，可以降低這樣的漏電流。In the wafer support according to the present invention, at least one of an electrostatic electrode and an RF electrode may be buried inside the ceramic substrate as an electrode other than the heating electrode. When static electrodes and RF electrodes are buried inside the ceramic substrate, leakage current may flow from such electrodes. However, the wafer support seat of the present invention can reduce such leakage current.
這樣的晶圓支持座中，加熱電極以外的電極，埋設在上述陶瓷基板的上面與上述加熱電極之間也可以。此時，加熱電極以外的電極與陶瓷基板的上面的間隔變小，因為容易產生漏電流，應用本發明的意義很大。In such a wafer holder, electrodes other than the heating electrodes may be embedded between the upper surface of the ceramic substrate and the heating electrodes. In this case, since the distance between the electrodes other than the heater electrode and the upper surface of the ceramic substrate becomes small, leakage current is likely to occur, and the application of the present invention is significant.
本發明的晶圓支持座中，上述核心部及上述表層部，最好主成分是氮化鋁。因為氮化鋁的熱傳導性及耐蝕性優異。In the wafer holder of the present invention, it is preferable that the main component of the core portion and the surface portion is aluminum nitride. This is because aluminum nitride has excellent thermal conductivity and corrosion resistance.
為了製造構成本發明的晶圓支持座的陶瓷基板，例如，(1)成形核心部的原料粉末後燒成製作核心部，接著核心部的既定表面上供給表層部的原料粉末成形，將此燒成也可以，或是(2)以模鑄造(Mold Cast)成形分別製作核心部的原料粉末成形體與表層部的原料粉末成形體，燒成一體化這些的成形體也可以。In order to manufacture the ceramic substrate constituting the wafer holder of the present invention, for example, (1) the raw material powder of the forming core part is fired to make the core part, and then the raw material powder of the surface part is supplied on the predetermined surface of the core part for molding, and this is fired. or (2) Mold Cast (Mold Cast) molding to make the raw material powder molded body of the core part and the raw material powder molded body of the surface layer respectively, and burn and integrate these molded bodies.
邊參照圖面，以下邊說明本發明的最佳實施形態。第1圖是陶瓷加熱器10的立體圖，第2圖係第1圖的A-A剖面圖，第3圖係陶瓷基板20的製造步驟圖。Referring to the drawings, a preferred embodiment of the present invention will be described below. FIG. 1 is a perspective view of the ceramic heater 10 , FIG. 2 is a cross-sectional view taken along line A-A of FIG. 1 , and FIG. 3 is a manufacturing process diagram of the ceramic substrate 20 .
陶瓷加熱器10，係本發明的晶圓裝載台的一例，包括陶瓷基板20與筒狀軸30。The ceramic heater 10 is an example of the wafer stage of the present invention, and includes a ceramic substrate 20 and a cylindrical shaft 30 .
陶瓷基板20，具有上面21裝載晶圓W的晶圓裝載面22。陶瓷基板20的直徑，例如300mm(毫米)左右，厚度例如20mm左右。晶圓裝載面22，係設置在陶瓷基板20的上面21中央的凹部。在上面21，包圍晶圓裝載面22，設置比晶圓裝載面22高一段的環狀面23，在晶圓裝載面22與環狀面23之間設置傾斜面構成的堤24。即，上面21，具有晶圓裝載面22、環狀面23及堤24。The ceramic substrate 20 has a wafer loading surface 22 on which a wafer W is loaded on the upper surface 21 . The diameter of the ceramic substrate 20 is, for example, about 300 mm (millimeter), and the thickness is, for example, about 20 mm. The wafer loading surface 22 is a recess provided at the center of the upper surface 21 of the ceramic substrate 20 . On the upper surface 21, surrounding the wafer loading surface 22, an annular surface 23 higher than the wafer loading surface 22 is provided. That is, the upper surface 21 has a wafer loading surface 22 , an annular surface 23 and a bank 24 .
陶瓷基板20，如第2圖所示，具有與陶瓷基板20大致同形狀的核心部20a及設置在陶瓷基板20表面的表層部20b。核心部20a，形成陶瓷基板20的中心。表層部20b，設置為包圍核心部20a的全表面，即核心部20a的上面20a1、側面20a2及下面20a3。表層部20b的體積電阻率，比核心部20a的體積電阻率高，核心部20a的熱傳導率比表層部20b的熱傳導率高。核心部20a及表層部20b，都是主成分為氮化鋁。作為體積電阻率低且熱傳導率高的核心部20a的材料，例如舉出粒徑大的氮化鋁燒結體。作為體積電阻率高且熱傳導率低的表層部20b的材料，例如舉出粒徑小的氮化鋁燒結體。在表1顯示核心部20a及表層部20b的材料的一例。表層部20b的厚度，不特別限定，例如1~5mm也可以。 The ceramic substrate 20 has, as shown in FIG. 2 , a core portion 20 a having substantially the same shape as the ceramic substrate 20 and a surface layer portion 20 b provided on the surface of the ceramic substrate 20 . The core portion 20 a forms the center of the ceramic substrate 20 . The surface part 20b is provided so as to surround the entire surface of the core part 20a, that is, the upper surface 20a1, the side surfaces 20a2, and the lower surface 20a3 of the core part 20a. The volume resistivity of the surface layer portion 20b is higher than that of the core portion 20a, and the thermal conductivity of the core portion 20a is higher than that of the surface layer portion 20b. Both the core part 20a and the surface layer part 20b are composed mainly of aluminum nitride. As a material of the core portion 20 a having a low volume resistivity and high thermal conductivity, for example, an aluminum nitride sintered body having a large grain size is used. As a material of the surface layer portion 20 b having a high volume resistivity and a low thermal conductivity, for example, an aluminum nitride sintered compact having a small grain size is used. Table 1 shows an example of the material of the core part 20a and the surface layer part 20b. The thickness of the surface layer portion 20b is not particularly limited, and may be, for example, 1 to 5 mm.
陶瓷基板20的核心部20a中，埋設加熱電極26與RF電極28。加熱電極26，以Mo(鉬)為主成分的線圈遍佈陶瓷基板20全面根據一次畫出的要領配線。加熱電極26的兩端，分別連接供電構件(未圖示)。供電構件，通過筒狀軸30的中空內部連接至外部電源(未圖示)。RF電極28，係比陶瓷基板20稍微小徑的圓盤狀薄層電極，網狀編入以Mo(鉬)為主成分的細金屬線，以薄片狀的網目形成。此RF電極28，在陶瓷基板20中埋設在加熱電極26與晶圓裝載面22之間。又，加熱電極26、RF電極28的材質為Mo，是因為與構成陶瓷基板20的氮化鋁的熱膨脹係數接近，製造陶瓷基板20時、重複熱循環時等難以產生裂開。RF電極28的中央附近，連接供電構件(未圖示)。RF電極28，在產生電漿之際使用。 In the core portion 20 a of the ceramic substrate 20 , heater electrodes 26 and RF electrodes 28 are buried. The heater electrode 26 is wired with a coil mainly composed of Mo (molybdenum) over the entire surface of the ceramic substrate 20 in a manner drawn once. Both ends of the heater electrode 26 are respectively connected to power supply members (not shown). The power supply member is connected to an external power source (not shown) through the hollow interior of the cylindrical shaft 30 . The RF electrode 28 is a disk-shaped thin-layer electrode having a diameter slightly smaller than that of the ceramic substrate 20, and thin metal wires mainly composed of Mo (molybdenum) are woven into a mesh to form a sheet-like mesh. This RF electrode 28 is embedded in the ceramic substrate 20 between the heater electrode 26 and the wafer loading surface 22 . In addition, the heating electrode 26 and the RF electrode 28 are made of Mo because the coefficient of thermal expansion is close to that of aluminum nitride constituting the ceramic substrate 20, and cracks are less likely to occur during the manufacture of the ceramic substrate 20 or repeated thermal cycles. Near the center of the RF electrode 28, a power supply member (not shown) is connected. The RF electrode 28 is used when plasma is generated.
筒狀軸30，係以氮化鋁為主成分的陶瓷製圓筒構件，上部開口周圍具有第1凸緣31，下部開口周圍具有第2凸緣32。第1凸緣31的端面，固相接合或擴散接合至陶瓷基板20的下面25。 The cylindrical shaft 30 is a ceramic cylindrical member mainly composed of aluminum nitride, and has a first flange 31 around the upper opening and a second flange 32 around the lower opening. The end surface of the first flange 31 is solid-phase bonded or diffusion bonded to the lower surface 25 of the ceramic substrate 20 .
其次，說明關於陶瓷加熱器10的使用例。未圖示的密室內配置陶 瓷加熱器10，晶圓裝載面22上配置晶圓W。於是，藉由對RF電極28施加交流高頻電壓，設置在密室內的上方未圖示的對向水平電極與埋設在陶瓷基板20內的RF電極28構成的平行平板電極間產生電漿，利用其電漿對晶圓W施行CVD成膜、施行蝕刻。又，根據未圖示的熱電對的檢出信號求出晶圓W的溫度，為了使其溫度成為預定的設定溫度，控制對加熱電極26施加的電壓。 Next, an example of use of the ceramic heater 10 will be described. The pottery is arranged in the secret room not shown The ceramic heater 10 has a wafer W placed on the wafer loading surface 22 . Then, by applying an AC high-frequency voltage to the RF electrode 28, a plasma is generated between the parallel plate electrodes formed by the facing horizontal electrode (not shown) above the closed chamber and the RF electrode 28 embedded in the ceramic substrate 20, and the plasma is generated by using The plasma performs CVD film formation and etching on the wafer W. Further, the temperature of wafer W is obtained from detection signals of a pyroelectric pair (not shown), and the voltage applied to heater electrode 26 is controlled so that the temperature becomes a predetermined set temperature.
其次，說明關於構成陶瓷加熱器10的陶瓷基板20的製造例。第3圖是陶瓷基板20的製造步驟圖。首先，以模鑄造(Mold Cast)成形製作用以製作陶瓷基板20的核心部20a之第1成形體50a(參照第3(A)圖)。第1成形體50a，內建加熱電極26與RF電極28。第1成形體50a的製作，使用不含氧化鈦(Titania)、氧化鎂(Magnesia)等添加物的氮化鋁粉末。所謂模鑄造(Mold Cast)成形，係有時也稱作凝膠鑄造(Gel Cast)成形的眾所周知的方法，其細節例如揭示在專利第5458050號公報等。此公報中，因為記載陶瓷成形體的內部埋設2層電極的陶瓷成形體的製作方法，以其方法為標準製作第1成形體50a並脫脂。接著，以模鑄造(Mold Cast)成形製作用以製作陶瓷基板20的表層部20b的第2成形體50b的下半部半體50b1與上半部半體50b2並脫脂(參照第3(B)圖)。這些半體50b1、50b2的製作，使用在氮化鋁粉末中少量添加(例如1質量%以下)氧化鈦(Titania)、氧化鎂(Magnesia)等之物。接著，這些半體50b1、50b2與第1成形體50a一體化形成統合成形體50(參照第3(C)圖)。藉由熱壓燒成此統合成形體50，第1成形體50a成為核心部20a，第2成形體50b成為表層部20b，得到陶瓷基板20(參照第3(D)圖)。相對於核心部20a是使不含添加物的氮化鋁粉末的成形體燒結之物，表層部20b，因為是使包含氧化鈦、氧化鎂的氮化鋁粉末燒結之物，難以粒成長。因此，表層部20b的氮化鋁燒結體，比起核心部20a的氮化鋁燒結體，粒徑變小。氮化鋁燒結體，粒徑越小，體積電阻率越高但熱傳導率越低。因此，體積電阻率，在表層部20b變得比核心部20a高，熱傳導率，在核心部20a變得比表層部20b高。Next, a manufacturing example of the ceramic substrate 20 constituting the ceramic heater 10 will be described. FIG. 3 is a manufacturing step diagram of the ceramic substrate 20 . First, the first molded body 50a for making the core portion 20a of the ceramic substrate 20 is molded by mold casting (see FIG. 3(A) ). The first molded body 50a has the heater electrode 26 and the RF electrode 28 built therein. The production of the first molded body 50a uses aluminum nitride powder that does not contain additives such as titanium oxide (Titania) and magnesium oxide (Magnesia). The so-called mold casting (Mold Cast) molding is a well-known method which may also be called Gel Cast (Gel Cast) molding, and its details are disclosed in, for example, Japanese Patent No. 5458050 and the like. This gazette describes a method of manufacturing a ceramic molded body in which two layers of electrodes are embedded in the ceramic molded body, and the first molded body 50a is produced and degreased according to the method. Then, the lower half half body 50b1 and the upper half half body 50b2 of the second molded body 50b for making the surface layer portion 20b of the ceramic substrate 20 are formed by mold casting (Mold Cast) and degreased (refer to Section 3 (B) picture). These half bodies 50b1 and 50b2 are produced by adding a small amount (for example, 1% by mass or less) of titanium oxide (Titania), magnesium oxide (Magnesia) or the like to aluminum nitride powder. Next, these half bodies 50b1 and 50b2 are integrated with the first molded body 50a to form an integrated molded body 50 (see FIG. 3(C) ). The integrated molded body 50 is fired by hot pressing, the first molded body 50a becomes the core part 20a, the second molded body 50b becomes the surface layer part 20b, and the ceramic substrate 20 is obtained (see FIG. 3(D) ). While the core portion 20a is formed by sintering a molded body of aluminum nitride powder containing no additives, the surface layer portion 20b is formed by sintering aluminum nitride powder containing titanium oxide and magnesium oxide, so grain growth is difficult. Therefore, the aluminum nitride sintered body in the surface layer portion 20b has a smaller grain size than the aluminum nitride sintered body in the core portion 20a. Aluminum nitride sintered body, the smaller the particle size, the higher the volume resistivity but the lower the thermal conductivity. Therefore, the volume resistivity becomes higher in the surface layer part 20b than the core part 20a, and the thermal conductivity becomes higher in the core part 20a than the surface layer part 20b.
以上詳述的陶瓷加熱器10中，體積電阻率高的表層部20b，設置在體積電阻率低的核心部20a的上面20a1、側面20a2及下面20a3。即，表層部20b，設置為包圍核心部20a的全表面。因此，對晶圓W施行電漿處理之際，對晶圓W的電漿處理成為障礙，可以抑制加熱電極26與電漿產生耦合。另一方面，在陶瓷基板20中心的核心部20a的熱傳導率，比陶瓷基板20的表層部20b的熱傳導率高。因此，由於陶瓷基板20的全體熱傳導率變比較高，晶圓W的均熱性提高。In the ceramic heater 10 described in detail above, the surface layer portion 20b having a high volume resistivity is provided on the upper surface 20a1, side surfaces 20a2, and lower surface 20a3 of the core portion 20a having a low volume resistivity. That is, the surface layer portion 20b is provided so as to surround the entire surface of the core portion 20a. Therefore, when the plasma treatment is performed on the wafer W, the plasma treatment on the wafer W becomes an obstacle, and it is possible to suppress coupling between the heater electrode 26 and the plasma. On the other hand, the thermal conductivity of the core portion 20 a at the center of the ceramic substrate 20 is higher than the thermal conductivity of the surface layer portion 20 b of the ceramic substrate 20 . Therefore, since the overall thermal conductivity of the ceramic substrate 20 becomes relatively high, the thermal uniformity of the wafer W is improved.
表層部20b，特別設置在陶瓷基板20的上面21全面。即，表層部20b，不只在陶瓷基板20的上面21之中沒被晶圓W覆蓋的區域(環狀面23及堤24)，也設置在被晶圓W覆蓋的區域(晶圓裝載面22)。因此，可以抑制從加熱電極26、RF電極28到晶圓W的漏電流。又，表層部20b，也設置在陶瓷基板20的下面25全面。因此，可以抑制通過陶瓷基板20的背面產生與電漿的耦合。The surface layer portion 20b is particularly provided on the entire upper surface 21 of the ceramic substrate 20 . That is, the surface layer portion 20b is provided not only on the region not covered by the wafer W (annular surface 23 and bank 24) but also on the region covered by the wafer W (wafer loading surface 22) on the upper surface 21 of the ceramic substrate 20. ). Therefore, leakage current from heater electrode 26 and RF electrode 28 to wafer W can be suppressed. In addition, the surface layer portion 20 b is also provided on the entire lower surface 25 of the ceramic substrate 20 . Therefore, it is possible to suppress coupling with plasma through the back surface of the ceramic substrate 20 .
又，RF電極28，埋設在陶瓷基板20的上面21與加熱電極26之間。因此，RF電極28與陶瓷基板20的晶圓裝載面22的距離(即，介電層的厚度)變小。因為對RF電極28施加高電壓，介電層的厚度越小，漏電流越容易發生。因為這樣，應用本發明的意義很大。Furthermore, the RF electrode 28 is embedded between the upper surface 21 of the ceramic substrate 20 and the heater electrode 26 . Therefore, the distance between the RF electrode 28 and the wafer loading surface 22 of the ceramic substrate 20 (ie, the thickness of the dielectric layer) becomes small. Since a high voltage is applied to the RF electrode 28, the smaller the thickness of the dielectric layer, the easier the leakage current occurs. Because of this, the significance of applying the present invention is great.
又，陶瓷基板20的核心部20a及表層部20b，因為主成分是氮化鋁，熱傳導性及耐蝕性優異。Moreover, since the core portion 20a and the surface layer portion 20b of the ceramic substrate 20 are mainly composed of aluminum nitride, they are excellent in thermal conductivity and corrosion resistance.
又，本發明不受上述實施形態任何限定，只要屬於本發明的技術範圍，當然能夠實施各種形態。In addition, this invention is not limited at all by the above-mentioned embodiment, As long as it belongs to the technical scope of this invention, it cannot be overemphasized that various forms can be implemented.
例如，上述實施形態中，在陶瓷基板20的核心部20a的上面20a1、側面20a2及下面20a3設置體積電阻率高且熱傳導率低的表層部20b，但如第4圖所示，核心部20a的下面20a3不設置表層部20b也可以。因為，經由下面20a3，產生加熱電極26與電漿的耦合的危險較低。或者，如第5圖所示，上面20a1之中，沒被晶圓W覆蓋的區域(環狀面23及堤24)中設置表層部20b，被晶圓W覆蓋的區域(晶圓裝載面22)中不設置表層部20b也可以。因為晶圓裝載面22被晶圓W覆蓋，對晶圓W施行電漿處理之際，不暴露在電漿之中。又，第5圖的晶圓裝載面22比堤24的內周緣稍微高。第4及5圖中關於與上述的實施例相同的構成要素，附上相同的符號。第5圖中，如第4圖在核心部20a的下面20a3設置表層部20b也可以。For example, in the above-mentioned embodiment, the surface layer portion 20b having high volume resistivity and low thermal conductivity is provided on the upper surface 20a1, the side surface 20a2, and the lower surface 20a3 of the core portion 20a of the ceramic substrate 20, but as shown in FIG. 4, the core portion 20a The surface layer part 20b may not be provided in the lower surface 20a3. Because, via the underside 20a3, the risk of coupling of the heating electrode 26 to the plasma is low. Alternatively, as shown in FIG. 5, among the upper surface 20a1, the surface layer portion 20b is provided in the area not covered by the wafer W (the annular surface 23 and the bank 24), and the area covered by the wafer W (the wafer loading surface 22 ) may not be provided with the surface layer portion 20b. Since the wafer loading surface 22 is covered by the wafer W, the wafer W is not exposed to the plasma when the plasma treatment is performed. In addition, the wafer loading surface 22 in FIG. 5 is slightly higher than the inner peripheral edge of the bank 24 . In Figs. 4 and 5, the same reference numerals are attached to the same components as those in the above-mentioned embodiment. In FIG. 5, as in FIG. 4, the surface layer portion 20b may be provided on the lower surface 20a3 of the core portion 20a.
上述的實施形態中，以設置在陶瓷基板20的上面21的中央的凹部作為晶圓裝載面22，但如第6圖所示，不在上面21設置凹部，晶圓裝載面22與環狀面23同一平面也可以。或者，如第7圖所示，不在上面21設置凹部，晶圓裝載面22作為上面21的全面也可以。第6及7圖中關於與上述實施形態相同的構成要素，附上相同的符號。In the above-mentioned embodiment, the concave portion provided at the center of the upper surface 21 of the ceramic substrate 20 is used as the wafer loading surface 22, but as shown in FIG. The same plane is also fine. Alternatively, as shown in FIG. 7 , the upper surface 21 is not provided with a concave portion, and the wafer loading surface 22 may be the entire surface of the upper surface 21 . In FIGS. 6 and 7, the same reference numerals are assigned to the same components as those in the above-mentioned embodiment.
上述的實施形態中，陶瓷基板20的核心部20a中埋設RF電極28，但省略也可以，代替RF電極28或加上靜電電極埋設在核心部20a中也可以。埋設靜電電極時，晶圓裝載面22上裝載晶圓W後，藉由對靜電電極施加電壓，可以靜電吸附晶圓W至晶圓裝載面22。靜電電極，埋設在晶圓裝載面22與加熱電極26之間也可以。In the above-mentioned embodiment, the RF electrode 28 is embedded in the core portion 20a of the ceramic substrate 20, but it may be omitted, and may be embedded in the core portion 20a instead of the RF electrode 28 or in addition to an electrostatic electrode. When burying the electrostatic electrodes, after loading the wafer W on the wafer loading surface 22 , the wafer W can be electrostatically attracted to the wafer loading surface 22 by applying a voltage to the electrostatic electrodes. The electrostatic electrodes may be buried between the wafer loading surface 22 and the heating electrodes 26 .
上述的實施形態中，例示直形狀的筒狀軸30，但不特別限定筒狀軸30的形狀為直形狀。例如，從筒狀軸的下端到既定高度為止形成直部，從既定高度到上端為止形成比直部的徑大的擴管部也可以。擴管部的一部分或全部，越接近上端徑越大也可以。In the above-mentioned embodiment, the straight cylindrical shaft 30 was exemplified, but the shape of the cylindrical shaft 30 is not particularly limited to a straight shape. For example, a straight portion may be formed from the lower end of the cylindrical shaft to a predetermined height, and an expanded pipe portion having a larger diameter than the straight portion may be formed from the predetermined height to the upper end. Part or all of the expanded pipe portion may have a larger diameter toward the upper end.
上述的實施形態中，加熱電極26遍佈陶瓷基板20全面根據一次畫出的要領配線，但分開陶瓷基板20為複數的區域，每一區域配線加熱電極也可以。In the above-mentioned embodiment, the heater electrode 26 is wired over the entire surface of the ceramic substrate 20 by drawing at one time, but the ceramic substrate 20 may be divided into a plurality of regions and the heater electrode may be wired for each region.
上述的實施形態中，陶瓷基板20的核心部20a與表層部20b形成以氮化鋁為主成分的陶瓷製，主成分為氮化鋁以外的成分，例如氧化鋁或氮化矽、碳化矽、堇青石(cordierite)等也可以。In the above-mentioned embodiment, the core part 20a and the surface layer part 20b of the ceramic substrate 20 are made of ceramics mainly composed of aluminum nitride, and the main component is a component other than aluminum nitride, such as aluminum oxide or silicon nitride, silicon carbide, Cordierite and the like may also be used.
上述的實施形態中，使用線圈作為加熱電極26，但代替線圈使用帶狀物(扁平的形)也可以。使用帶狀物作為加熱電極26時，藉由印刷金屬膏材(例如Mo膏材)可以製作加熱電極26。 In the above-mentioned embodiment, a coil is used as the heater electrode 26, but a strip (flat shape) may be used instead of the coil. When a ribbon is used as the heater electrode 26, the heater electrode 26 can be fabricated by printing a metal paste (such as Mo paste).
上述實施形態中，加熱電極26及RF電極28利用以Mo為主成分的材料製作，但不特別限定於此，利用以其它的高融點金屬(例如W等)為主成分的材料製作也可以。 In the above-mentioned embodiment, the heating electrode 26 and the RF electrode 28 are made of a material mainly composed of Mo, but they are not particularly limited thereto, and may be made of a material mainly composed of other high-melting point metals (such as W, etc.) .
本申請案，以2018年3月26日申請的美國臨時申請案第62/647,970號為優先權主張的基礎，根據引用其全部內容包含在本說明書內。 This application is based on U.S. Provisional Application No. 62/647,970 filed on March 26, 2018 as the basis for claiming priority, the entire contents of which are incorporated herein by reference.
本發明，例如可以利用作為半導體製造裝置的構成零件。The present invention can be utilized, for example, as a component of a semiconductor manufacturing apparatus.
10:陶瓷加熱器 10: ceramic heater
20:陶瓷基板 20: ceramic substrate
20a:核心部 20a: Core Department
20a1:上面 20a1: above
20a2:側面 20a2: side
20a3:下面 20a3: below
20b:表層部 20b: surface layer
21:上面 21: above
22:晶圓裝載面 22: Wafer loading surface
23:環狀面 23: Ring surface
24:堤 24: dike
25:下面 25: below
26‧‧‧加熱電極 28‧‧‧RF電極 30‧‧‧筒狀軸 31‧‧‧第1凸緣 32‧‧‧第2凸緣 50‧‧‧統合成形體 50a‧‧‧第1成形體 50b‧‧‧第2成形體 50b1‧‧‧下半部半體 50b2‧‧‧上半部半體26‧‧‧Heating electrode 28‧‧‧RF electrode 30‧‧‧Tubular shaft 31‧‧‧1st flange 32‧‧‧2nd flange 50‧‧‧Integrate into form 50a‧‧‧The first molded body 50b‧‧‧The second molded body 50b1‧‧‧lower half 50b2‧‧‧upper half
[第1圖] 係陶瓷加熱器10的立體圖； [第2圖] 係第1圖的A-A剖面圖； [第3圖] 係陶瓷基板20的製造步驟圖； [第4圖] 係陶瓷基板20的別例的剖面圖； [第5圖] 係陶瓷基板20的別例的剖面圖； [第6圖] 係陶瓷基板20的別例的剖面圖； [第7圖] 係陶瓷基板20的別例的剖面圖。[Fig. 1] is a perspective view of a ceramic heater 10; [Fig. 2] is the A-A sectional view of Fig. 1; [Fig. 3] is a manufacturing step diagram of the ceramic substrate 20; [FIG. 4] is a sectional view of another example of the ceramic substrate 20; [FIG. 5] is a sectional view of another example of the ceramic substrate 20; [FIG. 6] is a sectional view of another example of the ceramic substrate 20; [ FIG. 7 ] is a cross-sectional view of another example of the ceramic substrate 20 .
10:陶瓷加熱器 10: ceramic heater
20:陶瓷基板 20: ceramic substrate
20a:核心部 20a: Core Department
20a1:上面 20a1: above
20a2:側面 20a2: side
20a3:下面 20a3: Below
20b:表層部 20b: surface layer
21:上面 21: above
22:晶圓裝載面 22: Wafer loading surface
23:環狀面 23: Ring surface
24:堤 24: dike
25‧‧‧下面 25‧‧‧below
26‧‧‧加熱電極 26‧‧‧Heating electrode
28‧‧‧RF電極 28‧‧‧RF electrode
30‧‧‧筒狀軸 30‧‧‧Tubular shaft
31‧‧‧第1凸緣 31‧‧‧1st flange
32‧‧‧第2凸緣 32‧‧‧2nd flange
W‧‧‧晶圓 W‧‧‧Wafer
Claims (6)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201862647970P | 2018-03-26 | 2018-03-26 | |
| US62/647,970 | 2018-03-26 |
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| TW201941352A TW201941352A (en) | 2019-10-16 |
| TWI809063B true TWI809063B (en) | 2023-07-21 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW108109518A TWI809063B (en) | 2018-03-26 | 2019-03-20 | Wafer holder |
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| Country | Link |
|---|---|
| US (1) | US11574822B2 (en) |
| JP (1) | JP7055811B2 (en) |
| KR (1) | KR102292855B1 (en) |
| CN (1) | CN110709983B (en) |
| TW (1) | TWI809063B (en) |
| WO (1) | WO2019188496A1 (en) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2021111771A1 (en) * | 2019-12-04 | 2021-06-10 | 日本碍子株式会社 | Ceramic heater |
| CN111128845B (en) * | 2019-12-16 | 2022-10-21 | 北京北方华创微电子装备有限公司 | Tray applied to thin film deposition device |
| KR20230001692A (en) * | 2021-06-29 | 2023-01-05 | 주식회사 아모센스 | Electrostatic chuck, electrostatic chuck heater and semiconductor holding device comprising the same |
| KR102461995B1 (en) * | 2021-09-17 | 2022-11-03 | 주식회사 미코세라믹스 | High Temperature Susceptor With Shaft Of Low Thermal Conductance |
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2019
- 2019-03-18 WO PCT/JP2019/011170 patent/WO2019188496A1/en active Application Filing
- 2019-03-18 CN CN201980002640.7A patent/CN110709983B/en active Active
- 2019-03-18 KR KR1020197035036A patent/KR102292855B1/en active IP Right Grant
- 2019-03-18 JP JP2019539866A patent/JP7055811B2/en active Active
- 2019-03-20 TW TW108109518A patent/TWI809063B/en active
- 2019-11-25 US US16/693,855 patent/US11574822B2/en active Active
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Also Published As
| Publication number | Publication date |
|---|---|
| CN110709983A (en) | 2020-01-17 |
| WO2019188496A1 (en) | 2019-10-03 |
| CN110709983B (en) | 2023-07-21 |
| KR20190142384A (en) | 2019-12-26 |
| US20200090964A1 (en) | 2020-03-19 |
| JPWO2019188496A1 (en) | 2020-04-30 |
| KR102292855B1 (en) | 2021-08-25 |
| US11574822B2 (en) | 2023-02-07 |
| TW201941352A (en) | 2019-10-16 |
| JP7055811B2 (en) | 2022-04-18 |
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