TWI789611B - Pattern forming method and method manufacturing semiconductor which includes pattern forming method - Google Patents
Pattern forming method and method manufacturing semiconductor which includes pattern forming method Download PDFInfo
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- TWI789611B TWI789611B TW109126486A TW109126486A TWI789611B TW I789611 B TWI789611 B TW I789611B TW 109126486 A TW109126486 A TW 109126486A TW 109126486 A TW109126486 A TW 109126486A TW I789611 B TWI789611 B TW I789611B
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- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/20—Exposure; Apparatus therefor
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- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
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- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/40—Treatment after imagewise removal, e.g. baking
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
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Abstract
本發明提供一種可獲得蝕刻耐性優異之樹脂膜遮罩的圖案形成方法。 藉由光微影及蝕刻技法於半纖維素膜30上形成圖案。藉由將半纖維素膜30於包含三甲基鋁之環境中加熱而使半纖維素膜30中含浸鋁。對含浸有鋁之半纖維素膜30照射閃光於1秒以內將其加熱至特定溫度以上,藉此使鋁於膜中擴散而使半纖維素膜30硬化。將硬化後蝕刻耐性變高之半纖維素膜30作為遮罩進行下層膜20之蝕刻處理。The present invention provides a pattern forming method capable of obtaining a resin film mask excellent in etching resistance. Patterns are formed on the hemicellulose film 30 by photolithography and etching techniques. The hemicellulose film 30 is impregnated with aluminum by heating the hemicellulose film 30 in an environment containing trimethylaluminum. The hemicellulose film 30 impregnated with aluminum is irradiated with a flashlight and heated to a predetermined temperature or higher within 1 second, whereby the aluminum is diffused in the film and the hemicellulose film 30 is cured. The etching process of the lower layer film 20 is performed using the hemicellulose film 30 whose etching resistance becomes high after hardening as a mask.
Description
本發明係關於一種於半導體晶圓等薄板狀精密電子基板(以下,簡稱為「基板」)上形成硬質遮罩而形成圖案之圖案形成方法及包含該方法之半導體之製造方法。 The present invention relates to a pattern forming method for forming a pattern by forming a hard mask on a thin plate-shaped precision electronic substrate (hereinafter referred to as "substrate") such as a semiconductor wafer, and a semiconductor manufacturing method including the method.
為了進行半導體基板之乾式蝕刻,有時會使用耐性優異之硬質遮罩。硬質遮罩例如於3D記憶體製造時為了形成高縱橫比之圖案而使用。先前,例如使用非晶形碳作為硬質遮罩之材料(參照專利文獻1、2)。
In order to perform dry etching of a semiconductor substrate, a hard mask having excellent resistance is sometimes used. Hard masks are used, for example, to form patterns with high aspect ratios during 3D memory manufacturing. Conventionally, for example, amorphous carbon has been used as a material for a hard mask (see
然而,使用非晶形碳之硬質遮罩係藉由CVD(chemical vapor deposition,化學氣相沈積)而形成,故其製作需要長時間。又,非晶形碳之素材費用本身亦高昂。結果為,非晶形碳之硬質遮罩具有製造成本較大之問題。因此,正在研究一種更廉價之使用被稱為Spin On Carbon(SOC(旋塗碳))之樹脂的硬質遮罩。 However, the hard mask using amorphous carbon is formed by CVD (chemical vapor deposition, chemical vapor deposition), so its fabrication takes a long time. In addition, the material cost itself of amorphous carbon is also high. As a result, the hard mask of amorphous carbon has a problem of high manufacturing cost. Therefore, a less expensive hard mask using a resin called Spin On Carbon (SOC (Spin On Carbon)) is being studied.
[專利文獻1]日本專利特開2009-135439號公報 [Patent Document 1] Japanese Patent Laid-Open No. 2009-135439
[專利文獻2]日本專利特表2013-543281號公報 [Patent Document 2] Japanese Patent Application Publication No. 2013-543281
於下一代微影術中要求高蝕刻選擇比之硬質遮罩。然,若僅於基板上形成SOC膜並圖案化,則存在如下問題:蝕刻耐性較低,與先前之非晶形碳之硬質遮罩相比,蝕刻選擇比仍不充分。 Hard masks requiring high etch selectivity in next-generation lithography. However, if only the SOC film is formed and patterned on the substrate, there are problems in that the etching resistance is low, and the etching selectivity is still insufficient compared with the conventional hard mask of amorphous carbon.
本發明係鑒於上述課題而完成,目的在於提供一種可獲得蝕刻耐性優異之樹脂膜遮罩的圖案形成方法。 This invention was made in view of the said subject, and it aims at providing the pattern formation method which can obtain the resin film mask excellent in etching resistance.
為了解決上述問題,技術方案1之發明係一種圖案形成方法,其特徵在於:其係於基板上形成圖案者,且具備:第1成膜製程,其係於基板上塗佈形成包含含有氧原子之聚合物之樹脂膜;第2成膜製程,其係於上述樹脂膜上形成含矽膜;第3成膜製程,其係於上述含矽膜上塗佈形成抗蝕膜;光微影製程,其係於上述抗蝕膜上形成特定之圖案;第1蝕刻製程,其係將上述抗蝕膜作為遮罩並藉由蝕刻將上述圖案轉印至上述含矽膜;第2蝕刻製程,其係將上述含矽膜作為遮罩並藉由蝕刻將上述圖案轉印至上述樹脂膜;及含浸製程,其係於包含金屬原子之氣體中使被轉印有上述圖
案之上述樹脂膜之表面含浸金屬。
In order to solve the above problems, the invention of
又,技術方案2之發明係如技術方案1之發明之圖案形成方法,其特徵在於:上述含浸製程包含第1加熱製程,該第1加熱製程係於上述包含金屬原子之氣體中加熱上述基板。
In addition, the invention of claim 2 is the pattern forming method of the invention of
又,技術方案3之發明係如技術方案2之發明之圖案形成方法,其特徵在於:進而具備第2加熱製程,該第2加熱製程係於上述含浸製程之後,於1秒以內將上述樹脂膜加熱至特定溫度以上。 In addition, the invention of claim 3 is the pattern forming method of the invention of claim 2, which is characterized in that: it further has a second heating process, and the second heating process is to spray the above-mentioned resin film within 1 second after the above-mentioned impregnation process. Heated above a certain temperature.
又,技術方案4之發明係如技術方案3之發明之圖案形成方法,其特徵在於:於上述第2加熱製程中,對上述樹脂膜照射閃光或雷射光。 Furthermore, the invention of claim 4 is the pattern forming method of the invention of claim 3, characterized in that, in the second heating process, the resin film is irradiated with flash or laser light.
又,技術方案5之發明係如技術方案1之發明之圖案形成方法,其特徵在於,上述光微影製程包含:曝光製程,其其藉由曝光將上述圖案印於上述抗蝕膜;及顯影製程,其係藉由顯影將上述圖案形成於上述抗蝕膜。
In addition, the invention of technical solution 5 is the pattern forming method of the invention of
又,技術方案6之發明係如技術方案1之發明之圖案形成方法,其特徵在於:上述聚合物之氧原子含有率相對於上述聚合物之總質量為20質量%以上。
In addition, the invention of claim 6 is the pattern forming method of the invention of
又,技術方案7之發明係如技術方案6之發明之圖案形成方法,其特 徵在於:上述聚合物包含來自糖衍生物之單位。 Also, the invention of technical scheme 7 is the pattern forming method of the invention of technical scheme 6, and its characteristic Characterized in that the above-mentioned polymer comprises units derived from sugar derivatives.
又,技術方案8之發明係如技術方案7之發明之圖案形成方法,其特徵在於:上述聚合物為半纖維素。 Furthermore, the invention of claim 8 is the pattern forming method of the invention of claim 7, characterized in that the polymer is hemicellulose.
又,技術方案9之發明係一種半導體之製造方法,其包含如技術方案1至8中任一項之發明之圖案形成方法。
Furthermore, the invention of claim 9 is a semiconductor manufacturing method including the pattern forming method of any one of the inventions of
根據技術方案1至9之發明,於包含金屬原子之氣體中使被轉印有圖案之樹脂膜之表面含浸金屬,故金屬與樹脂發生反應而使樹脂膜硬化,從而可獲得蝕刻耐性優異之樹脂膜遮罩。
According to the inventions of
尤其根據技術方案3之發明,於含浸製程之後,將樹脂膜於1秒以內加熱至特定溫度以上,故金屬於樹脂膜中擴散而可使樹脂膜整體硬化。 In particular, according to the invention of claim 3, after the impregnation process, the resin film is heated to a specific temperature or higher within 1 second, so that the metal diffuses in the resin film to harden the resin film as a whole.
10:基材 10: Substrate
20:下層膜 20: Lower film
30:半纖維素膜 30: Hemicellulose membrane
40:含矽膜 40:Silicone-containing film
50:抗蝕膜 50: resist film
W:半導體晶圓 W: semiconductor wafer
S1~S11:步驟 S1~S11: Steps
圖1係表示本發明之圖案形成方法之處理順序之流程圖。 FIG. 1 is a flow chart showing the processing procedure of the pattern forming method of the present invention.
圖2係表示本發明之圖案形成方法之處理順序之流程圖。 Fig. 2 is a flow chart showing the processing procedure of the pattern forming method of the present invention.
圖3係表示成為處理對象之半導體晶圓之剖面構造之圖。 FIG. 3 is a diagram showing a cross-sectional structure of a semiconductor wafer to be processed.
圖4係表示形成有半纖維素膜之半導體晶圓之剖面構造之圖。 Fig. 4 is a diagram showing a cross-sectional structure of a semiconductor wafer formed with a hemicellulose film.
圖5係表示形成有含矽膜之半導體晶圓之剖面構造之圖。 FIG. 5 is a diagram showing a cross-sectional structure of a semiconductor wafer formed with a silicon-containing film.
圖6係表示形成有抗蝕膜之半導體晶圓之剖面構造之圖。 FIG. 6 is a diagram showing a cross-sectional structure of a semiconductor wafer formed with a resist film.
圖7係表示於抗蝕膜上形成有圖案之半導體晶圓之剖面構造之圖。 FIG. 7 is a diagram showing a cross-sectional structure of a semiconductor wafer on which a pattern is formed on a resist film.
圖8係表示於含矽膜上轉印有圖案之半導體晶圓之剖面構造之圖。 FIG. 8 is a diagram showing a cross-sectional structure of a semiconductor wafer with a pattern transferred on a silicon-containing film.
圖9係表示於半纖維素膜上轉印有圖案之半導體晶圓之剖面構造之圖。 Fig. 9 is a diagram showing a cross-sectional structure of a semiconductor wafer with a pattern transferred on a hemicellulose film.
圖10係表示於半纖維素膜之表面含浸有鋁之半導體晶圓之剖面構造之圖。 Fig. 10 is a diagram showing a cross-sectional structure of a semiconductor wafer in which the surface of a hemicellulose film is impregnated with aluminum.
圖11係模式性地表示鋁於半纖維素膜中擴散之半導體晶圓之剖面構造之圖。 Fig. 11 is a diagram schematically showing a cross-sectional structure of a semiconductor wafer in which aluminum is diffused in a hemicellulose film.
圖12係表示於下層膜上形成有圖案之半導體晶圓之剖面構造之圖。 FIG. 12 is a diagram showing a cross-sectional structure of a semiconductor wafer in which a pattern is formed on an underlayer film.
圖13係表示聚合物之構造之一例之圖。 Fig. 13 is a diagram showing an example of a polymer structure.
以下,參照附圖對本發明之實施方式詳細地進行說明。本說明書中,半纖維素係指包含來自構成半纖維素之木糖等糖衍生物之單位之樹脂。作為上述糖衍生物,能夠自植物、木材等提取,例如可藉由國際公開第2019/012716號記載之方法製造。再者,圖1及之後之各圖中,為了容易理解,視需要將各部分之尺寸或數量誇張或簡化地描述。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In this specification, hemicellulose refers to a resin containing units derived from sugar derivatives such as xylose constituting hemicellulose. The above-mentioned sugar derivatives can be extracted from plants, wood, etc., and can be produced, for example, by the method described in International Publication No. 2019/012716. Furthermore, in FIG. 1 and subsequent figures, for easy understanding, the size or quantity of each part is exaggerated or simplified as necessary.
圖1及圖2係表示本發明之圖案形成方法之處理順序之流程圖。本發明之實施方式中,使用半導體晶圓W作為處理對象,本發明之圖案形成方法能夠作為半導體之製造方法來實施,且包含於半導體之製造方法中。於圖1、2所示之處理之前於成為處理對象之半導體晶圓W之表面形成有下層膜。圖3係表示成為處理對象之半導體晶圓W之剖面構造之圖。於矽(Si)
基材10之上形成有下層膜20。下層膜20例如係將二氧化矽(SiO2)之薄膜與氮化矽(SiN)之薄膜交替積層而成之多層膜。下層膜20例如藉由CVD蒸鍍於基材10上而成膜。下層膜20亦可為非晶矽。對該下層膜20藉由蝕刻形成較深之孔,藉此製造例如3D-NAND(Not AND,反及)快閃記憶體。
1 and 2 are flowcharts showing the processing procedure of the pattern forming method of the present invention. In the embodiment of the present invention, the semiconductor wafer W is used as a processing object, and the pattern forming method of the present invention can be implemented as a semiconductor manufacturing method and included in the semiconductor manufacturing method. Before the processing shown in FIGS. 1 and 2 , an underlayer film is formed on the surface of the semiconductor wafer W to be processed. FIG. 3 is a diagram showing a cross-sectional structure of a semiconductor wafer W to be processed. A
對如圖3所示之構造之半導體晶圓W塗佈形成半纖維素膜(步驟S1)。圖4係表示形成有半纖維素膜30之半導體晶圓W之剖面構造之圖。半纖維素膜30藉由公知之旋轉塗佈法而形成。具體而言,一面使如圖3所示之半導體晶圓W旋轉,一面向下層膜20之上表面噴出包含半纖維素之塗佈液。塗佈液藉由離心力於下層膜20之上表面展開而形成塗膜。藉由使該塗膜乾燥而於下層膜20上形成半纖維素膜30。
Coating and forming a hemicellulose film on the semiconductor wafer W with the structure shown in FIG. 3 (step S1). FIG. 4 is a diagram showing a cross-sectional structure of a semiconductor wafer W on which a
其次,對如圖4所示之構造之半導體晶圓W形成含矽膜(步驟S2)。圖5係表示形成有含矽膜40之半導體晶圓W之剖面構造之圖。含矽膜40亦藉由旋轉塗佈法而形成。即,一面使如圖4所示之半導體晶圓W旋轉,一面向半纖維素膜30之上表面噴出含有矽之聚合物之塗佈液。塗佈液藉由離心力於半纖維素膜30之上表面均勻地展開而形成塗膜,藉由使該塗膜乾燥而於半纖維素膜30上形成含矽膜40。再者,含矽膜亦可藉由CVD(Chemical Vapor Deposition)來代替旋轉塗佈法而成膜。
Next, a silicon-containing film is formed on the semiconductor wafer W having the structure shown in FIG. 4 (step S2). FIG. 5 is a diagram showing a cross-sectional structure of a semiconductor wafer W on which a silicon-containing
對如圖5所示之構造之半導體晶圓W進而塗佈形成抗蝕膜(步驟S3)。圖6係表示形成有抗蝕膜50之半導體晶圓W之剖面構造之圖。抗蝕膜50亦藉由旋轉塗佈法而形成。即,一面使具有如圖5所示之構造之半導體晶圓
W旋轉,一面向含矽膜40之上表面噴出光阻劑。本實施方式中,使用化學放大型光阻劑。到達含矽膜40之上表面之光阻劑藉由離心力於含矽膜40之上表面上展開而形成塗膜,藉由使該塗膜乾燥而於含矽膜40上形成抗蝕膜50。
A resist film is further coated and formed on the semiconductor wafer W having the structure shown in FIG. 5 (step S3). FIG. 6 is a diagram showing a cross-sectional structure of a semiconductor wafer W on which a resist
其次,進行抗蝕膜50之曝光處理(步驟S4)。曝光處理係藉由使用曝光機(步進機)將光罩之圖案投影曝光而將圖案印於抗蝕膜50。曝光機例如使用ArF準分子雷射作為光源對抗蝕膜50進行曝光。化學放大型抗蝕劑之抗蝕膜50中,於被照射有光之曝光區域生成酸。
Next, exposure processing of the resist
曝光處理結束後,進行曝光後烘烤處理(PEB:Post Exposure Bake)(步驟S5)。曝光後烘烤處理中,對曝光後之半導體晶圓W進行加熱,藉此使曝光時抗蝕膜50中生成之酸於曝光區域中擴散而進行抗蝕樹脂之去保護反應。再者,若抗蝕膜50並非化學放大型抗蝕劑,則無需進行曝光後烘烤處理。
After the exposure process is completed, a post exposure bake process (PEB: Post Exposure Bake) is performed (step S5). In the post-exposure bake process, the semiconductor wafer W after exposure is heated, whereby the acid generated in the resist
曝光後烘烤處理之後,進行顯影處理(步驟S6)。顯影處理中,對抗蝕膜50供給顯影液使曝光區域溶解,藉此將上述曝光製程中已曝光之圖案形成於抗蝕膜50。圖7係表示於抗蝕膜50上形成有圖案之半導體晶圓W之剖面構造之圖。步驟S4至步驟S6之製程係所謂光微影製程,藉由該光微影製程而於抗蝕膜50上形成圖案。
After the post-exposure bake process, a development process is performed (step S6). In the development process, a developing solution is supplied to the resist
其次,將形成有圖案之抗蝕膜50作為遮罩進行含矽膜40之蝕刻處理
(步驟S7)。步驟S7之蝕刻處理係藉由將氟系氣體用作蝕刻氣體之反應性離子蝕刻(RIE:Reactive Ion Etching)而執行。藉由將抗蝕膜50作為遮罩進行含矽膜40之蝕刻處理,而將藉由光微影製程形成於抗蝕膜50上之圖案轉印至含矽膜40。圖8係表示於含矽膜40上轉印有圖案之半導體晶圓W之剖面構造之圖。將與形成於抗蝕膜50上之圖案相同之圖案亦形成於含矽膜40上。
Next, the silicon-containing
繼而,將被轉印有圖案之含矽膜40作為遮罩進行半纖維素膜30之蝕刻處理(步驟S8)。步驟S8之蝕刻處理係藉由將氧系氣體用作蝕刻氣體之反應性離子蝕刻而執行。藉由將含矽膜40作為遮罩進行半纖維素膜30之蝕刻處理,而將形成於含矽膜40上之圖案轉印至半纖維素膜30。於該階段,半纖維素膜30尚未硬化,故半纖維素膜30較易被蝕刻。圖9係表示於半纖維素膜30上轉印有圖案之半導體晶圓W之剖面構造之圖。將與藉由光微影製程形成於抗蝕膜50上之圖案相同之圖案經由含矽膜40亦形成於半纖維素膜30上。
Next, etching of the
於半纖維素膜30上形成圖案後,對半纖維素膜30進行金屬含浸處理(步驟S9)。該處理係藉由將於半纖維素膜30上形成有圖案之半導體晶圓W於包含三甲基鋁(TMA:Trimethylaluminium)之環境氣體中加熱而進行。此時之半導體晶圓W之加熱溫度為20℃以上400℃以下。又,加熱時間為30秒以上60分鐘以下。藉由在包含三甲基鋁之環境中加熱半纖維素膜30,而使半纖維素膜30之表面含浸金屬鋁(Al)。圖10係表示於半纖維素膜30之表面含浸有鋁之半導體晶圓W之剖面構造之圖。
After the pattern is formed on the
其次,進行表面含浸有鋁之半纖維素膜30之短時間加熱處理(步驟S10)。具體而言,將含浸有鋁之半纖維素膜30加熱1秒以內。本實施方式中,對形成有半纖維素膜30之半導體晶圓W執行閃光燈退火(FLA:Flash Lamp Anneal)。將如圖10所示之於半纖維素膜30之表面含浸有鋁之半導體晶圓W搬入至閃光燈退火裝置。自氙閃光燈對該半導體晶圓W之表面照射閃光。閃光之照射時間為0.1毫秒~100毫秒。本實施方式中,例如以0.8毫秒之照射時間自閃光燈照射閃光。
Next, short-time heat treatment is performed on the
藉由將照射強度較強且照射時間極短之閃光照射至半導體晶圓W之表面,而使包含半纖維素膜30之半導體晶圓W之僅表面附近在極短時間內被加熱。藉由利用閃光照射對表面含浸有鋁之半纖維素膜30進行1秒以內之短時間加熱,從而鋁於半纖維素膜30中擴散。圖11係模式性地表示鋁於半纖維素膜30中擴散之半導體晶圓W之剖面構造之圖。
By irradiating the surface of the semiconductor wafer W with a flash light having a strong irradiation intensity and a very short irradiation time, only the vicinity of the surface of the semiconductor wafer W including the
步驟S10中,亦可將半纖維素膜30加熱至半纖維素之熱分解溫度以上。若為閃光燈退火,則即便將半纖維素膜30加熱至熱分解溫度以上,成為熱分解溫度以上之時間亦為1秒以內,故半纖維素膜30並不會熱分解而是鋁於膜中擴散。又,閃光照射時之半纖維素膜30達到之溫度越高,鋁越容易於膜中擴散。
In step S10, the
半纖維素係以OH基之形態包含較多氧原子之樹脂。藉由閃光照射使鋁於半纖維素膜30中擴散並與半纖維素之氧原子發生反應,藉此半纖維素
膜30整體硬化,從而蝕刻耐性提昇。其結果,獲得半纖維素膜30作為硬質遮罩所需之特性(較高之蝕刻選擇比等)。
Hemicellulose is a resin containing more oxygen atoms in the form of OH groups. Aluminum diffuses in the
於半纖維素膜30之短時間加熱結束之後,將半纖維素膜30作為遮罩進行下層膜20之蝕刻處理(步驟S11)。該蝕刻處理亦藉由反應性離子蝕刻執行。藉由將半纖維素膜30作為遮罩進行下層膜20之蝕刻處理,而將形成於半纖維素膜30之圖案轉印至下層膜20。圖12係表示於下層膜20上形成有圖案之半導體晶圓W之剖面構造之圖。
After the short-time heating of the
將三甲基鋁(TMA)與半纖維素樹脂發生反應而硬化之半纖維素膜30作為遮罩進行蝕刻處理,藉此半纖維素膜30並不損耗而僅下層膜20被蝕刻。其結果,如圖12所示,於下層膜20形成較深之孔。
By using the
本實施方式中,藉由光微影及蝕刻技法於半纖維素膜30上形成圖案。若僅於半纖維素膜30上形成圖案,則半纖維素膜30之蝕刻耐性較低,難以將該半纖維素膜30用作硬質遮罩。因此,使半纖維素膜30中含浸鋁,藉由閃光燈退火使鋁擴散,藉此使半纖維素膜30硬化而提高蝕刻耐性。藉此,可獲得蝕刻耐性優異之樹脂膜(半纖維素膜30)之硬質遮罩,能夠將半纖維素膜30作為遮罩進行下層膜20之蝕刻處理。
In this embodiment, a pattern is formed on the
半纖維素係包含較多氧原子之樹脂。因此,與先前用作硬質遮罩之材料之非晶形碳相比,用以形成圖案之蝕刻較為容易。因此,可減薄用以蝕刻半纖維素膜30之含矽膜40之膜厚,其結果,亦可減薄抗蝕膜50,於
圖案崩塌或微細化方面有利。另一方面,包含較多氧原子之半纖維素具有易與鋁等金屬發生反應之特性。由於該特性,藉由使半纖維素膜30之表面含浸鋁並發生反應,可使半纖維素膜30硬化。進而,植物之細胞壁中亦會包含之半纖維素與非晶形碳相比亦為廉價之素材。由於該等理由,半纖維素適宜作為硬質遮罩之材料。
Hemicellulose is a resin containing more oxygen atoms. Etching for patterning is therefore easier compared to amorphous carbon, which has previously been used as a material for hard masks. Therefore, the film thickness of the silicon-containing
以上,對本發明之實施方式進行了說明,但本發明能夠於不脫離其主旨之範圍內進行除上述以外之各種變更。上述實施方式中,於下層膜20上形成半纖維素膜30,將半纖維素膜30作為遮罩進行下層膜20之蝕刻處理,但並非限定於此,亦可將半纖維素膜30作為遮罩而蝕刻例如矽基材10本身。總之,只要於欲形成圖案之層上形成半纖維素膜30即可。
As mentioned above, although embodiment of this invention was described, this invention can make various changes other than the above in the range which does not deviate from the summary. In the above-mentioned embodiment, the
又,上述實施方式中,使半纖維素膜30中含浸有作為金屬之鋁,但並非限定於此,亦可使Li、Be、B、Na、Mg、Al、Si、K、Ca、Sc、Ti、V、Cr、Mn、Fe、Co、Ni、Cu、Zn、Ga、Ge、As、Rb、Sr、Y、Zr、Nb、Mo、Ru、Pd、Ag、Cd、In、Sn、Sb、Te、Cs、Ba、La、Hf、Ta、W、Re、Os、Ir、Pt、Au、Hg、Tl、Pb、Bi、Po、Ce、Pr、Nd、Pm、Sm、Eu、Gd、Tb、Dy、Ho、Er、Tm、Yb、Lu等其他金屬含浸於半纖維素膜30。以此方式亦可使半纖維素膜30硬化而取得與上述實施方式相同之效果。
In addition, in the above-mentioned embodiment, the
又,上述實施方式中,向半纖維素膜30中含浸金屬之處理時於包含三甲基鋁之環境中加熱半導體晶圓W,但並非必須加熱,亦可僅使半纖維
素膜30接觸包含三甲基鋁之環境。即便不進行加熱,只要使包含較多氧原子之半纖維素膜30之表面接觸包含三甲基鋁之環境,就能夠使該表面含浸鋁。
In addition, in the above-mentioned embodiment, the semiconductor wafer W was heated in an atmosphere containing trimethylaluminum during the process of impregnating the metal into the
又,步驟S10之短時間加熱處理亦並非必須之製程。即便不進行閃光燈退火,只要使半纖維素膜30中含浸鋁,包含較多氧原子之半纖維素與鋁就會在某種程度上進行反應,從而半纖維素膜30硬化而可對半纖維素膜30賦予必要之蝕刻耐性。但,進行閃光燈退火等短時間加熱處理更能使半纖維素與鋁進行反應而使半纖維素膜30充分硬化。
Also, the short-time heat treatment in step S10 is not an essential process. Even if flash lamp annealing is not performed, as long as the
又,步驟S10之短時間加熱處理並非限定於閃光燈退火,例如亦可為對包含半纖維素膜30之半導體晶圓W之表面照射雷射光之雷射退火。即,只要為將含浸有鋁之半纖維素膜30於1秒以內加熱至特定溫度以上之形態即可。
In addition, the short-time heat treatment in step S10 is not limited to flash lamp annealing, and may be, for example, laser annealing in which the surface of the semiconductor wafer W including the
又,上述實施方式中,形成有半纖維素膜30作為用於硬質遮罩之樹脂膜,但樹脂膜之材料並非限定於半纖維素。只要用於硬質遮罩之樹脂膜之材料為含有氧原子之聚合物且該聚合物之氧原子含有率相對於該聚合物之總質量為20質量%以上(材料1)即可。
In addition, in the above-mentioned embodiment, the
尤其是上述材料1中,上述聚合物較佳為包含選自如下單位中之至少一者(材料2),即,來自糖衍生物之單位及來自(甲基)丙烯酸酯之單位。
In particular, in the above-mentioned
尤其是上述材料1或材料2中,較佳為,含有聚合物及有機溶劑,該聚合物具有聚合部a及聚合部b,且該聚合部a具有糖衍生物部,該糖衍生物部為戊糖衍生物部及己糖衍生物部中之至少一個,該聚合部b不具有糖衍生物部(材料3)。
In particular, in the above-mentioned
又,上述材料3中,上述聚合物亦可包含(a)來自糖衍生物之單位、(b)來自具有抗光反射功能之化合物之單位、及(c)來自將該聚合物交叉偶合獲得之化合物之單位。 In addition, in the above-mentioned material 3, the above-mentioned polymer may also contain (a) a unit derived from a sugar derivative, (b) a unit derived from a compound having an antireflection function, and (c) a unit derived from a compound obtained by cross-coupling the polymer. The unit of the compound.
作為材料1~材料3,例示出例如以PGMEA(丙二醇單甲醚乙酸酯)為溶劑之甲基丙烯酸糖酯及苯乙烯(90:10)之無規聚合物。又,作為材料1~材料3,例示出例如以PGMEA為溶劑之甲基丙烯酸糖酯、甲基丙烯酸酯及苯乙烯(120:280:278)之無規聚合物。該聚合物中,甲基丙烯酸酯作為交聯性基發揮功能。又,作為材料4,例示出具有如圖13所示之構造者。
As
本發明之技術適合將樹脂膜作為硬質遮罩而形成圖案之方法及包含該方法之半導體之製造方法、例如3D-NAND快閃記憶體之製造。 The technique of the present invention is suitable for a method of forming a pattern using a resin film as a hard mask and a semiconductor manufacturing method including the method, such as the manufacturing of 3D-NAND flash memory.
10:基材 10: Substrate
20:下層膜 20: Lower film
30:半纖維素膜 30: Hemicellulose membrane
W:半導體晶圓 W: semiconductor wafer
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