TWI760184B - OLED display with pixel protection function and information processing device using the same - Google Patents

OLED display with pixel protection function and information processing device using the same Download PDF

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TWI760184B
TWI760184B TW110113182A TW110113182A TWI760184B TW I760184 B TWI760184 B TW I760184B TW 110113182 A TW110113182 A TW 110113182A TW 110113182 A TW110113182 A TW 110113182A TW I760184 B TWI760184 B TW I760184B
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pmos transistor
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TW202240567A (en
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郝榮杰
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大陸商北京集創北方科技股份有限公司
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Abstract

一種具有像素保護功能之OLED顯示器，具有：一OLED畫素陣列模組，包括成陣列之複數個子畫素單元及一低電壓偵測單元，其中，該低電壓偵測單元係用以在所述複數個子畫素單元中有一子畫素單元之一源極驅動電壓低於一閾值電壓時使一輸出信號呈現不作用狀態；及一控制電路，係用以驅動該OLED畫素陣列模組且其包括一電源模組及一電源致能單元，其中，該電源模組係用以在一致能信號呈現作用狀態時提供一組供電電壓給各所述子畫素單元，及在該致能信號呈現不作用狀態時關斷該組供電電壓；且該電源致能單元係用以在一脈衝調變信號的準位為邏輯0且該輸出信號呈現所述不作用狀態時使該致能信號呈現所述不作用狀態。An OLED display with pixel protection function, comprising: an OLED pixel array module, including a plurality of sub-pixel units in an array and a low voltage detection unit, wherein the low voltage detection unit is used for the When a source driving voltage of a sub-pixel unit in the plurality of sub-pixel units is lower than a threshold voltage, an output signal exhibits an inactive state; and a control circuit is used for driving the OLED pixel array module and its It includes a power module and a power enable unit, wherein the power module is used to provide a set of power supply voltages to each of the sub-pixel units when an enable signal is in an active state, and when the enable signal is displayed Turn off the set of power supply voltages in the inactive state; and the power enabling unit is used for enabling the enabling signal to present any level when the level of a pulse modulation signal is logic 0 and the output signal presents the inactive state Inactive state.

Description

具有像素保護功能之OLED顯示器及利用其之資訊處理裝置OLED display with pixel protection function and information processing device using the same

本發明係有關OLED(organic light emitting diode；有機發光二極體)顯示器，尤指一種具有像素保護功能之OLED顯示器。The present invention relates to an OLED (organic light emitting diode; organic light emitting diode) display, in particular to an OLED display with pixel protection function.

一般OLED顯示器的子畫素單元的電流驅動電路都是採用PMOS(P型金-氧-半)電晶體，因此，在子畫素單元的資料電壓輸入端(或源極驅動電壓輸入端)發生信號連接異常，例如信號線有導通不良或斷裂的情況，而沒有達到正常電位時，子畫素單元就極可能會產生大電流和超亮的白畫面而致使其被燒毀。Generally, the current driving circuit of the sub-pixel unit of an OLED display adopts PMOS (P-type gold-oxygen-semi) transistors. Therefore, the data voltage input terminal (or source driving voltage input terminal) of the sub-pixel unit generates If the signal connection is abnormal, for example, the signal line has poor conduction or breakage, and does not reach the normal potential, the sub-pixel unit is very likely to generate a large current and an ultra-bright white picture, causing it to be burned.

為解決上述的問題，本領域亟需一種新穎的OLED顯示器架構。To solve the above problems, a novel OLED display structure is urgently needed in the art.

本發明之一目的在於提供一種具有像素保護功能之OLED顯示器，其可藉由在顯示控制電路與OLED面板間之資料電壓信號傳輸發生異常狀況時關斷電源以避免OLED面板被燒毀。One objective of the present invention is to provide an OLED display with pixel protection function, which can prevent the OLED panel from being burned by turning off the power supply when an abnormal condition occurs in the data voltage signal transmission between the display control circuit and the OLED panel.

本發明之另一目的在於提供一種資訊處理裝置，其具有前述之OLED顯示器而可在顯示控制電路與OLED面板間之資料電壓信號傳輸發生異常狀況時關斷電源以避免OLED面板被燒毀。Another object of the present invention is to provide an information processing device, which has the aforementioned OLED display and can turn off the power supply when an abnormal condition occurs in the data voltage signal transmission between the display control circuit and the OLED panel to prevent the OLED panel from being burned.

為達到前述之目的，一種具有像素保護功能之OLED顯示器乃被提出，其具有：In order to achieve the aforementioned purpose, an OLED display with pixel protection function is proposed, which has:

一OLED畫素陣列模組，其包括成陣列之複數個子畫素單元及一低電壓偵測單元，其中，該低電壓偵測單元係用以在所述複數個子畫素單元中有一子畫素單元之一源極驅動電壓低於一閾值電壓時使一輸出信號呈現不作用狀態；以及An OLED pixel array module, which includes a plurality of sub-pixel units in an array and a low-voltage detection unit, wherein the low-voltage detection unit is used for a sub-pixel in the plurality of sub-pixel units When a source drive voltage of a cell is lower than a threshold voltage, an output signal is rendered inactive; and

一控制電路，係用以驅動該OLED畫素陣列模組且其包括一電源模組、一發光驅動單元及一電源致能單元，其中，該電源模組係用以在一致能信號呈現作用狀態時提供一組供電電壓給各所述子畫素單元，及在該致能信號呈現不作用狀態時關斷該組供電電壓；該發光驅動單元係用以產生一脈衝調變信號至該電源致能單元及各所述子畫素單元；及該電源致能單元係用以在該脈衝調變信號的準位為邏輯0且該輸出信號呈現所述不作用狀態時使該致能信號呈現所述不作用狀態。A control circuit is used for driving the OLED pixel array module and includes a power module, a light-emitting driving unit and a power enabling unit, wherein the power module is used for showing an active state when an enabling signal is used provide a set of power supply voltages to each of the sub-pixel units, and turn off the set of power supply voltages when the enable signal is in an inactive state; the light-emitting driving unit is used for generating a pulse modulation signal to the power source an enabling unit and each of the sub-pixel units; and the power enabling unit is used to make the enabling signal present all conditions when the level of the pulse modulation signal is logic 0 and the output signal presents the inactive state Inactive state.

在一實施例中，該低電壓偵測單元係一邏輯及閘。In one embodiment, the low voltage detection unit is a logic and gate.

在一實施例中，該電源致能單元係一邏輯或閘。In one embodiment, the power enable unit is a logic OR gate.

在一實施例中，所述子畫素單元包含成一疊接組態之一第一PMOS電晶體、一第二PMOS電晶體、一第三PMOS電晶體及一OLED元件，其中，該疊接組態係耦接於該組供電電壓之間；該第一PMOS電晶體及該第三PMOS電晶體之閘極耦接該脈衝調變信號，該第二PMOS電晶體之閘極耦接一所述源極驅動電壓並提供該閘極之電壓至該低電壓偵測單元。In one embodiment, the sub-pixel unit includes a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, and an OLED element in a stacked configuration, wherein the stacked group The state system is coupled between the set of supply voltages; the gates of the first PMOS transistor and the third PMOS transistor are coupled to the pulse modulation signal, and the gate of the second PMOS transistor is coupled to one of the source driving voltage and provide the voltage of the gate to the low voltage detection unit.

在一實施例中，所述子畫素單元包含成一疊接組態之一第一PMOS電晶體、一第二PMOS電晶體、一第三PMOS電晶體及一OLED元件，以及一比較器，其中，該疊接組態係耦接於該組供電電壓之間之間；該第一PMOS電晶體及該第三PMOS電晶體之閘極耦接該脈衝調變信號，該第二PMOS電晶體之閘極耦接一所述源極驅動電壓；該比較器之正輸入端耦接該第二PMOS電晶體之該閘極，負輸入端耦接一閾值電壓，輸出端提供一低壓指示信號至該低電壓偵測單元，其中，當該正輸入端的電壓低於該閾值電壓時，該低壓指示信號即呈現邏輯0之狀態。In one embodiment, the sub-pixel unit includes a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, and an OLED element in a stacked configuration, and a comparator, wherein , the stacking configuration is coupled between the set of supply voltages; the gates of the first PMOS transistor and the third PMOS transistor are coupled to the pulse modulation signal, the second PMOS transistor is The gate is coupled to a source driving voltage; the positive input terminal of the comparator is coupled to the gate of the second PMOS transistor, the negative input terminal is coupled to a threshold voltage, and the output terminal provides a low voltage indication signal to the The low-voltage detection unit, wherein when the voltage of the positive input terminal is lower than the threshold voltage, the low-voltage indication signal presents a state of logic 0.

為達到前述之目的，本發明進一步提出一種資訊處理裝置，其具有一中央處理單元及一OLED顯示器，其中，該中央處理單元係用以與該OLED顯示器通信，且該OLED顯示器具有：In order to achieve the aforementioned object, the present invention further provides an information processing device, which has a central processing unit and an OLED display, wherein the central processing unit is used for communicating with the OLED display, and the OLED display has:

一OLED畫素陣列模組，其包括成陣列之複數個子畫素單元及一低電壓偵測單元，其中，該低電壓偵測單元係用以在所述複數個子畫素單元中有一子畫素單元之一源極驅動電壓低於一閾值電壓時使一輸出信號呈現不作用狀態；以及An OLED pixel array module, which includes a plurality of sub-pixel units in an array and a low-voltage detection unit, wherein the low-voltage detection unit is used for a sub-pixel in the plurality of sub-pixel units When a source drive voltage of a cell is lower than a threshold voltage, an output signal is rendered inactive; and

一控制電路係用以驅動該OLED畫素陣列模組且其包括一電源模組、一發光驅動單元及一電源致能單元，其中，該電源模組係用以在一致能信號呈現作用狀態時提供一組供電電壓給各所述子畫素單元，及在該致能信號呈現不作用狀態時關斷該組供電電壓；該發光驅動單元係用以產生一脈衝調變信號至該電源致能單元及各所述子畫素單元；及該電源致能單元係用以在該脈衝調變信號的準位為邏輯0且該輸出信號呈現所述不作用狀態時使該致能信號呈現所述不作用狀態。A control circuit is used for driving the OLED pixel array module and includes a power module, a light-emitting driving unit and a power enabling unit, wherein the power module is used when an enabling signal is in an active state providing a set of power supply voltages to each of the sub-pixel units, and turning off the set of power supply voltages when the enabling signal is in an inactive state; the light-emitting driving unit is used for generating a pulse modulation signal to enable the power supply a unit and each of the sub-pixel units; and the power enabling unit is used for making the enabling signal present the enabling signal when the level of the pulse modulation signal is logic 0 and the output signal presents the inactive state inactive state.

在一實施例中，該低電壓偵測單元係一邏輯及閘，且該電源致能單元係一邏輯或閘。In one embodiment, the low voltage detection unit is a logic AND gate, and the power enable unit is a logic OR gate.

在一實施例中，所述子畫素單元包含成一疊接組態之一第一PMOS電晶體、一第二PMOS電晶體、一第三PMOS電晶體及一OLED元件，其中，該疊接組態係耦接於該組供電電壓之間；該第一PMOS電晶體及該第三PMOS電晶體之閘極耦接該脈衝調變信號，該第二PMOS電晶體之閘極耦接一所述源極驅動電壓並提供該閘極之電壓至該低電壓偵測單元。In one embodiment, the sub-pixel unit includes a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, and an OLED element in a stacked configuration, wherein the stacked group The state system is coupled between the set of supply voltages; the gates of the first PMOS transistor and the third PMOS transistor are coupled to the pulse modulation signal, and the gate of the second PMOS transistor is coupled to one of the source driving voltage and provide the voltage of the gate to the low voltage detection unit.

在一實施例中，所述子畫素單元包含成一疊接組態之一第一PMOS電晶體、一第二PMOS電晶體、一第三PMOS電晶體及一OLED元件，以及一比較器，其中，該疊接組態係耦接於該組供電電壓之間之間；該第一PMOS電晶體及該第三PMOS電晶體之閘極耦接該脈衝調變信號，該第二PMOS電晶體之閘極耦接一所述源極驅動電壓；該比較器之正輸入端耦接該第二PMOS電晶體之該閘極，負輸入端耦接一閾值電壓，輸出端提供一低壓指示信號至該低電壓偵測單元，其中，當該正輸入端的電壓低於該閾值電壓時，該低壓指示信號即呈現邏輯0之狀態。In one embodiment, the sub-pixel unit includes a first PMOS transistor, a second PMOS transistor, a third PMOS transistor, and an OLED element in a stacked configuration, and a comparator, wherein , the stacking configuration is coupled between the set of supply voltages; the gates of the first PMOS transistor and the third PMOS transistor are coupled to the pulse modulation signal, the second PMOS transistor is The gate is coupled to a source driving voltage; the positive input terminal of the comparator is coupled to the gate of the second PMOS transistor, the negative input terminal is coupled to a threshold voltage, and the output terminal provides a low voltage indication signal to the The low-voltage detection unit, wherein when the voltage of the positive input terminal is lower than the threshold voltage, the low-voltage indication signal presents a state of logic 0.

在可能的實施例中，該資訊處理裝置可為一攜帶型電腦或一智慧型手持裝置。In a possible embodiment, the information processing device may be a portable computer or a smart handheld device.

請參照圖1，其繪示本發明之具有像素保護功能之OLED顯示器之一實施例之方塊圖。如圖1所示，一OLED顯示器100包括一OLED畫素陣列模組110及一控制電路120。Please refer to FIG. 1 , which shows a block diagram of an embodiment of an OLED display with pixel protection function of the present invention. As shown in FIG. 1 , an OLED display 100 includes an OLED pixel array module 110 and a control circuit 120 .

OLED畫素陣列模組110包括n*m個子畫素單元111及一邏輯及閘112。The OLED pixel array module 110 includes n*m sub-pixel units 111 and a logic AND gate 112 .

各子畫素單元111均具有一OLED元件且均係由一正供應電壓ELVDD及一參考地電壓ELVSS之壓差提供工作電壓。於操作時，各子畫素單元111係依一源極驅動電壓V SR[i,j]及一脈衝調變信號EM決定該OLED元件之工作電流，且會同時提供一斷電指示信號PD[i,j]，其中，i為介於1到n之整數，n為大於1之整數，j為介於1到m之整數，m為大於1之整數，且斷電指示信號PD[i,j]係在源極驅動電壓V SR[i,j]低於一閾值電壓時呈現作用狀態(在此實施例中，所述作用狀態為邏輯0)。 Each sub-pixel unit 111 has an OLED element and is provided with a working voltage by a voltage difference between a positive supply voltage ELVDD and a reference ground voltage ELVSS. During operation, each sub-pixel unit 111 determines the operating current of the OLED device according to a source driving voltage VSR [i,j] and a pulse modulation signal EM, and simultaneously provides a power-off indication signal PD[ i,j], where i is an integer between 1 and n, n is an integer greater than 1, j is an integer between 1 and m, m is an integer greater than 1, and the power-off indication signal PD[i, j] represents an active state (in this embodiment, the active state is logic 0) when the source drive voltage V SR [i,j] is lower than a threshold voltage.

邏輯及閘112係用以對n*m個斷電指示信號PD[1,1]-PD[n,m]執行一邏輯及運算以產生一斷電信號PD，其中，當n*m個斷電指示信號PD[1,1]-PD[n,m]中之任一個信號呈現作用狀態(邏輯0)時，斷電信號PD即呈現作用狀態(邏輯0)。The logic AND gate 112 is used to perform a logic AND operation on the n*m power-off indication signals PD[1,1]-PD[n,m] to generate a power-off signal PD, wherein when the n*m power-off indication signals PD[1,1]-PD[n,m] When any one of the electrical indication signals PD[1,1]-PD[n,m] assumes an active state (logic 0), the power-off signal PD exhibits an active state (logic 0).

控制電路120包含一電源模組121、一發光驅動單元122、一源極驅動單元123及一邏輯或閘124。The control circuit 120 includes a power module 121 , a light-emitting driving unit 122 , a source driving unit 123 and a logic OR gate 124 .

電源模組121係用以在一致能信號EN呈現作用狀態(邏輯1)時輸出正供應電壓ELVDD及參考地電壓ELVSS，及在致能信號EN呈現不作用狀態(邏輯0)時關斷正供應電壓ELVDD及參考地電壓ELVSS。The power module 121 is used to output the positive supply voltage ELVDD and the reference ground voltage ELVSS when the enable signal EN is in an active state (logic 1), and turn off the positive supply when the enable signal EN is in an inactive state (logic 0). Voltage ELVDD and reference ground voltage ELVSS.

發光驅動單元122係用以產生脈衝調變信號EM以傳送至OLED畫素陣列模組110及邏輯或閘124。The light-emitting driving unit 122 is used for generating the pulse modulation signal EM to transmit to the OLED pixel array module 110 and the logic OR gate 124 .

源極驅動單元123係用以依一時序控制器(未示於圖1中)所提供之顯示資料信號產生n*m個源極驅動電壓V SR[1,1]-V SR[n,m]，其中，該時序控制器可位於控制電路120外部或包含在控制電路120之中，當OLED畫素陣列模組110係一小尺寸之顯示模組時，源極驅動單元123可由單顆源極驅動IC實現，而當OLED畫素陣列模組110為一大尺寸之顯示模組時，源極驅動單元123可由多顆源極驅動IC實現。 The source driving unit 123 is used for generating n*m source driving voltages V SR [1,1]-V SR [n,m according to the display data signal provided by a timing controller (not shown in FIG. 1 ) ], wherein the timing controller can be located outside the control circuit 120 or included in the control circuit 120. When the OLED pixel array module 110 is a small-sized display module, the source driving unit 123 can be a single source When the OLED pixel array module 110 is a large-sized display module, the source driving unit 123 can be realized by a plurality of source driving ICs.

邏輯或閘124係用以對斷電信號PD及脈衝調變信號EM進行一邏輯或運算以產生該致能信號EN，其中，當斷電信號PD及脈衝調變信號EM均呈現作用狀態(邏輯0)時，該致能信號EN會呈現不作用狀態(邏輯0)以驅使電源模組121關斷正供應電壓ELVDD及參考地電壓ELVSS。另外，邏輯或閘124可為一離散組件或整合在一源極驅動IC或一時序控制器之中。The logical OR gate 124 is used to perform a logical OR operation on the power-off signal PD and the pulse modulation signal EM to generate the enable signal EN, wherein, when the power-off signal PD and the pulse modulation signal EM are both active (logic 0), the enable signal EN exhibits an inactive state (logic 0) to drive the power module 121 to turn off the positive supply voltage ELVDD and the reference ground voltage ELVSS. Alternatively, the logic OR gate 124 may be a discrete component or integrated into a source driver IC or a timing controller.

另外，請參照圖2a，其繪示圖1之OLED顯示器之子畫素單元111之一實施例之電路圖。如圖2a所示，子畫素單元111包含成一疊接組態之一第一PMOS電晶體111a、一第二PMOS電晶體111b、一第三PMOS電晶體111c及一OLED元件111d，其中，該疊接組態係耦接於正供應電壓ELVDD及參考地電壓ELVSS之間；第一PMOS電晶體111a及第三PMOS電晶體111c之閘極耦接脈衝調變信號EM，第二PMOS電晶體111b之閘極耦接一源極驅動電壓V SR[i,j]並提供一斷電指示信號PD[i,j]。 In addition, please refer to FIG. 2 a , which illustrates a circuit diagram of an embodiment of the sub-pixel unit 111 of the OLED display of FIG. 1 . As shown in FIG. 2a, the sub-pixel unit 111 includes a first PMOS transistor 111a, a second PMOS transistor 111b, a third PMOS transistor 111c, and an OLED element 111d in a stacked configuration, wherein the The stacked configuration is coupled between the positive supply voltage ELVDD and the reference ground voltage ELVSS; the gates of the first PMOS transistor 111a and the third PMOS transistor 111c are coupled to the pulse modulation signal EM, and the second PMOS transistor 111b The gate is coupled to a source driving voltage VSR [i,j] and provides a power-off indication signal PD[i,j].

另外，請參照圖2b，其繪示圖1之OLED顯示器之子畫素單元111之另一實施例之電路圖。如圖2b所示，子畫素單元111包含成一疊接組態之一第一PMOS電晶體111a、一第二PMOS電晶體111b、一第三PMOS電晶體111c及一OLED元件111d，以及一比較器111e，其中，該疊接組態係耦接於正供應電壓ELVDD及參考地電壓ELVSS之間；第一PMOS電晶體111a及第三PMOS電晶體111c之閘極耦接脈衝調變信號EM，第二PMOS電晶體111b之閘極耦接一源極驅動電壓V SR[i,j]；比較器111e之正輸入端耦接第二PMOS電晶體111b之閘極，負輸入端耦接一閾值電壓V REF，輸出端提供一斷電指示信號PD[i,j]，其中，當該正輸入端的電壓低於該閾值電壓V REF時，該斷電指示信號PD[i,j]即呈現邏輯0之狀態。 In addition, please refer to FIG. 2 b , which shows a circuit diagram of another embodiment of the sub-pixel unit 111 of the OLED display of FIG. 1 . As shown in FIG. 2b, the sub-pixel unit 111 includes a first PMOS transistor 111a, a second PMOS transistor 111b, a third PMOS transistor 111c, and an OLED element 111d in a stacked configuration, and a comparison The device 111e, wherein the stacked configuration is coupled between the positive supply voltage ELVDD and the reference ground voltage ELVSS; the gates of the first PMOS transistor 111a and the third PMOS transistor 111c are coupled to the pulse modulation signal EM, The gate of the second PMOS transistor 111b is coupled to a source driving voltage V SR [i,j]; the positive input terminal of the comparator 111e is coupled to the gate of the second PMOS transistor 111b, and the negative input terminal is coupled to a threshold voltage V REF , the output terminal provides a power-off indication signal PD[i,j], wherein when the voltage of the positive input terminal is lower than the threshold voltage V REF , the power-off indication signal PD[i,j] presents a logic 0 state.

依上述的設置，如果有一源極驅動電壓V SR[i,j]發生異常狀況時，邏輯及閘112即會輸出邏輯0給邏輯或閘124。若此時脈衝調變信號EM的準位為邏輯1，則第一PMOS電晶體111a及第三PMOS電晶體111c的通道會被斷開，因此，即使電源模組121仍正常輸出正供應電壓ELVDD和參考地電壓ELVSS，子畫素單元111並不會有大電流產生；反之，若此時脈衝調變信號EM的準位為邏輯0，由於第一PMOS電晶體111a及第三PMOS電晶體111c的通道會被導通，因此，若電源模組121仍正常輸出正供應電壓ELVDD和參考地電壓ELVSS，子畫素單元111就會有大電流產生的風險，所以，邏輯或閘124乃在此時使致能信號EN呈現不作用狀態(邏輯0)以驅使電源模組121關斷正供應電壓ELVDD及參考地電壓ELVSS，從而達到保護OLED畫素陣列模組110的目的。亦即，本發明之具有像素保護功能之OLED顯示器的技術方案可描述如下： According to the above arrangement, if a source driving voltage V SR [i, j] is abnormal, the logical AND gate 112 will output a logical 0 to the logical OR gate 124 . If the level of the pulse modulation signal EM is logic 1 at this time, the channels of the first PMOS transistor 111a and the third PMOS transistor 111c will be disconnected, so even if the power module 121 still outputs the positive supply voltage ELVDD normally and the reference ground voltage ELVSS, the sub-pixel unit 111 will not generate a large current; on the contrary, if the level of the pulse modulation signal EM is logic 0 at this time, due to the first PMOS transistor 111a and the third PMOS transistor 111c Therefore, if the power supply module 121 still outputs the positive supply voltage ELVDD and the reference ground voltage ELVSS normally, the sub-pixel unit 111 will have the risk of generating a large current. Therefore, the logic OR gate 124 is at this time. The enable signal EN is rendered inactive (logic 0) to drive the power module 121 to turn off the positive supply voltage ELVDD and the ground reference voltage ELVSS, so as to protect the OLED pixel array module 110 . That is, the technical solution of the OLED display with pixel protection function of the present invention can be described as follows:

(1)其包括一OLED畫素陣列模組及一控制電路；(1) It includes an OLED pixel array module and a control circuit;

(2)該OLED畫素陣列模組包括成陣列之複數個子畫素單元及一低電壓偵測單元，其中，該低電壓偵測單元係用以在所述複數個子畫素單元中有一子畫素單元之一源極驅動電壓低於一閾值電壓時使一輸出信號呈現不作用狀態；以及(2) The OLED pixel array module includes a plurality of sub-pixel units in an array and a low-voltage detection unit, wherein the low-voltage detection unit is used for a sub-pixel unit in the plurality of sub-pixel units When a source driving voltage of a pixel unit is lower than a threshold voltage, an output signal is rendered inactive; and

(3)該控制電路係用以驅動該OLED畫素陣列模組且其包括一電源模組、一發光驅動單元及一電源致能單元，其中，該電源模組係用以在一致能信號呈現作用狀態時提供一組供電電壓給各所述子畫素單元，及在該致能信號呈現不作用狀態時關斷該組供電電壓；該發光驅動單元係用以產生一脈衝調變信號至該電源致能單元及各所述子畫素單元；及該電源致能單元係用以在該脈衝調變信號的準位為邏輯0且該輸出信號呈現所述不作用狀態時使該致能信號呈現所述不作用狀態。(3) The control circuit is used to drive the OLED pixel array module and includes a power module, a light-emitting driving unit and a power enabling unit, wherein the power module is used for presenting an enabling signal when A set of power supply voltages are provided to each of the sub-pixel units in an active state, and the set of power supply voltages are turned off when the enabling signal is in an inactive state; the light-emitting driving unit is used for generating a pulse modulation signal to the a power enable unit and each of the sub-pixel units; and the power enable unit is used for enabling the enable signal when the level of the pulse modulation signal is logic 0 and the output signal exhibits the inactive state The inactive state is presented.

依上述的說明，本發明進一步提出一資訊處理裝置。請參照圖3，其繪示本發明之資訊處理裝置之一實施例的方塊圖。如圖3所示，一資訊處理裝置200具有一中央處理單元210及一OLED顯示器220，其中，中央處理單元210係用以與OLED顯示器220通信且OLED顯示器220係由OLED顯示器100實現。另外，資訊處理裝置200可為一攜帶型電腦或一智慧型手持裝置。According to the above description, the present invention further provides an information processing device. Please refer to FIG. 3 , which shows a block diagram of an embodiment of the information processing apparatus of the present invention. As shown in FIG. 3 , an information processing device 200 has a central processing unit 210 and an OLED display 220 , wherein the central processing unit 210 is used for communicating with the OLED display 220 and the OLED display 220 is realized by the OLED display 100 . In addition, the information processing device 200 can be a portable computer or a smart handheld device.

依上述的說明可知，本發明可提供以下的優點：According to the above description, the present invention can provide the following advantages:

1.本發明的具有像素保護功能之OLED顯示器可藉由在顯示控制電路與OLED面板間之資料電壓信號傳輸發生異常狀況時關斷電源以避免OLED面板被燒毀。1. The OLED display with pixel protection function of the present invention can prevent the OLED panel from being burned by turning off the power supply when an abnormal condition occurs in the data voltage signal transmission between the display control circuit and the OLED panel.

2.本發明的資訊處理裝置因具有前述之OLED顯示器而可在顯示控制電路與OLED面板間之資料電壓信號傳輸發生異常狀況時關斷電源以避免OLED面板被燒毀。2. Since the information processing device of the present invention has the aforementioned OLED display, the power supply can be turned off when the data voltage signal transmission between the display control circuit and the OLED panel is abnormal to prevent the OLED panel from being burned.

本發明所揭示者，乃較佳實施例之一種，舉凡局部之變更或修飾而源於本發明之技術思想而為熟習該項技藝知人所易於推知者，俱不脫本發明之專利權範疇。What is disclosed in the present invention is one of the preferred embodiments, and any partial changes or modifications originating from the technical idea of the present invention and easily inferred by those skilled in the art are within the scope of the patent right of the present invention.

綜上所陳，本案無論目的、手段與功效，皆顯示其迥異於習知技術，且其首先發明合於實用，確實符合發明之專利要件，懇請　貴審查委員明察，並早日賜予專利俾嘉惠社會，是為至禱。To sum up, regardless of the purpose, means and effect of this case, it shows that it is completely different from the conventional technology, and its first invention is suitable for practical use, and indeed meets the patent requirements of the invention. Society is to pray for the best.

100:OLED顯示器 110:OLED畫素陣列模組 111:子畫素單元 111a:第一PMOS電晶體 111b:第二PMOS電晶體 111c:第三PMOS電晶體 111d:OLED元件 111e:比較器 112:邏輯及閘 120:控制電路 121:電源模組 122:發光驅動單元 123:源極驅動單元 124:邏輯或閘 200:資訊處理裝置 210:中央處理單元 220:OLED顯示器 100: OLED display 110: OLED pixel array module 111: Sub-pixel unit 111a: the first PMOS transistor 111b: Second PMOS transistor 111c: the third PMOS transistor 111d: OLED components 111e: Comparator 112: Logic and Gates 120: Control circuit 121: Power Module 122: Light-emitting drive unit 123: source drive unit 124: logical OR gate 200: Information processing device 210: Central Processing Unit 220: OLED display

為進一步揭示本發明之具體技術內容，首先請參閱圖式，其中： 圖1繪示本發明之具有像素保護功能之OLED顯示器之一實施例之方塊圖。 圖2a繪示圖1之OLED顯示器之子畫素單元之一實施例之電路圖。 圖2b繪示圖1之OLED顯示器之子畫素單元之另一實施例之電路圖。 圖3繪示本發明之資訊處理裝置之一實施例的方塊圖。 In order to further disclose the specific technical content of the present invention, please refer to the drawings first, wherein: FIG. 1 is a block diagram illustrating an embodiment of an OLED display with pixel protection function of the present invention. FIG. 2a shows a circuit diagram of an embodiment of a sub-pixel unit of the OLED display of FIG. 1 . FIG. 2b shows a circuit diagram of another embodiment of the sub-pixel unit of the OLED display of FIG. 1 . FIG. 3 is a block diagram illustrating an embodiment of the information processing apparatus of the present invention.

100:OLED顯示器 100: OLED display

110:OLED畫素陣列模組 110: OLED pixel array module

111:子畫素單元 111: Sub-pixel unit

112:邏輯及閘 112: Logic and Gates

120:控制電路 120: Control circuit

121:電源模組 121: Power Module

122:發光驅動單元 122: Light-emitting drive unit

123:源極驅動單元 123: source drive unit

124:邏輯或閘 124: logical OR gate

Claims (12)

一種具有像素保護功能之OLED顯示器，其具有：一OLED畫素陣列模組，其包括成陣列之複數個子畫素單元及一低電壓偵測單元，其中，該低電壓偵測單元係用以在所述複數個子畫素單元中有一子畫素單元之一源極驅動電壓低於一閾值電壓時使一輸出信號呈現不作用狀態；以及一控制電路，係用以驅動該OLED畫素陣列模組，且係用以在一致能信號呈現作用狀態時提供一組供電電壓給各所述子畫素單元，及在該致能信號呈現不作用狀態時關斷該組供電電壓，其中，該致能信號係在該輸出信號呈現所述不作用狀態且一脈衝調變信號的準位為邏輯0時呈現所述不作用狀態。 An OLED display with pixel protection function, which has: an OLED pixel array module, which includes a plurality of sub-pixel units in an array and a low voltage detection unit, wherein the low voltage detection unit is used for In the plurality of sub-pixel units, a source driving voltage of a sub-pixel unit is lower than a threshold voltage to make an output signal in an inactive state; and a control circuit is used to drive the OLED pixel array module , and is used to provide a set of supply voltages to each of the sub-pixel units when an enable signal is in an active state, and to turn off the set of supply voltages when the enable signal is in an inactive state, wherein the enable The signal exhibits the inactive state when the output signal exhibits the inactive state and the level of a pulse modulation signal is logic 0. 如申請專利範圍第1項所述之具有像素保護功能之OLED顯示器，其中，該低電壓偵測單元係一邏輯及閘。 The OLED display with pixel protection function described in claim 1, wherein the low voltage detection unit is a logic and gate. 如申請專利範圍第1項所述之具有像素保護功能之OLED顯示器，其中，該控制電路包括一電源模組、一發光驅動單元及一電源致能單元，其中，該電源模組係用以在該致能信號呈現所述作用狀態時提供該組供電電壓，及在該致能信號呈現所述不作用狀態時關斷該組供電電壓；該發光驅動單元係用以產生該脈衝調變信號至該電源致能單元及各所述子畫素單元；及該電源致能單元係用以產生該致能信號。 The OLED display with pixel protection function described in claim 1, wherein the control circuit includes a power module, a light-emitting driving unit and a power enabling unit, wherein the power module is used for The set of supply voltages are provided when the enable signal is in the active state, and the set of supply voltages are turned off when the enable signal is in the inactive state; the light-emitting driving unit is used for generating the pulse modulation signal to The power enabling unit and each of the sub-pixel units; and the power enabling unit is used for generating the enabling signal. 如申請專利範圍第3項所述之具有像素保護功能之OLED顯示器，其中，該電源致能單元係一邏輯或閘。 The OLED display with pixel protection function as described in claim 3, wherein the power enabling unit is a logic OR gate. 如申請專利範圍第1項所述之具有像素保護功能之OLED顯示器，其中，所述子畫素單元包含成一疊接組態之一第一PMOS電晶體、一第二PMOS電晶體、一第三PMOS電晶體及一OLED元件，其中，該疊接組態係耦接於該組供電電壓之間；該第一PMOS電晶體及該第三PMOS電晶體之閘極耦接該脈衝調變信號，該第二PMOS電晶體之閘極耦接一所述源極驅動電壓並提供該閘極之電壓至該低電壓偵測單元。 The OLED display with pixel protection function as described in claim 1, wherein the sub-pixel unit comprises a first PMOS transistor, a second PMOS transistor, a third PMOS transistor in a stacked configuration PMOS transistors and an OLED device, wherein the stacked configuration is coupled between the set of supply voltages; the gates of the first PMOS transistor and the third PMOS transistor are coupled to the pulse modulation signal, The gate of the second PMOS transistor is coupled to a source driving voltage and provides the gate voltage to the low voltage detection unit. 如申請專利範圍第1項所述之具有像素保護功能之OLED顯示器，其中，所述子畫素單元包含成一疊接組態之一第一PMOS電晶體、一第二PMOS電晶體、一第三PMOS電晶體及一OLED元件，以及一比較器，其中，該疊接組態係耦接於該組供電電壓之間之間；該第一PMOS電晶體及該第三PMOS電晶體之閘極耦接該脈衝調變信號，該第二PMOS電晶體之閘極耦接一所述源極驅動電壓；該比較器之正輸入端耦接該第二PMOS電晶體之該閘極，負輸入端耦接該閾值電壓，輸出端提供一低壓指示信號至該低電壓偵測單元，其中，當該正輸入端的電壓低於該閾值電壓時，該低壓指示信號即呈現邏輯0之狀態。 The OLED display with pixel protection function as described in claim 1, wherein the sub-pixel unit comprises a first PMOS transistor, a second PMOS transistor, a third PMOS transistor in a stacked configuration PMOS transistor and an OLED element, and a comparator, wherein the stacked configuration is coupled between the set of supply voltages; the gates of the first PMOS transistor and the third PMOS transistor are coupled Connected to the pulse modulation signal, the gate of the second PMOS transistor is coupled to a source driving voltage; the positive input terminal of the comparator is coupled to the gate of the second PMOS transistor, and the negative input terminal is coupled to Connected to the threshold voltage, the output terminal provides a low voltage indication signal to the low voltage detection unit, wherein when the voltage of the positive input terminal is lower than the threshold voltage, the low voltage indication signal presents a logic 0 state. 一種資訊處理裝置，其具有一中央處理單元及一OLED顯示器，其中，該中央處理單元係用以與該OLED顯示器通信，且該OLED顯示器具有：一OLED畫素陣列模組，其包括成陣列之複數個子畫素單元及一低電壓偵測單元，其中，該低電壓偵測單元係用以在所述複數個子畫素單元中有一子畫素單元之一源極驅動電壓低於一閾值電壓時使一輸出信號呈現不作用狀態；以及一控制電路，係用以驅動該OLED畫素陣列模組，且係用以在一致能信號呈現作用狀態時提供一組供電電壓給各所述子畫素單元，及在該致能信號呈現不作用狀態時關斷該組供電電壓，其中，該致能信號係在該輸出信號呈現所述不作用狀態且一脈衝調變信號的準位為邏輯0時呈現所述不作用狀態。 An information processing device has a central processing unit and an OLED display, wherein the central processing unit is used for communicating with the OLED display, and the OLED display has: an OLED pixel array module, which includes an array of A plurality of sub-pixel units and a low-voltage detection unit, wherein the low-voltage detection unit is used when a source driving voltage of a sub-pixel unit in the plurality of sub-pixel units is lower than a threshold voltage making an output signal in an inactive state; and a control circuit for driving the OLED pixel array module and for providing a set of power supply voltages to each of the sub-pixels when an enabling signal is in an active state unit, and shutting off the set of supply voltages when the enable signal exhibits an inactive state, wherein the enabling signal is when the output signal exhibits the inactive state and a level of a pulse modulation signal is logic 0 The inactive state is presented. 如申請專利範圍第7項所述之資訊處理裝置，其中，該控制電路包括一電源模組、一發光驅動單元及一電源致能單元，其中，該電源模組係用以在該致能信號呈現所述作用狀態時提供該組供電電壓，及在該致能信號呈現所述不作用狀態時關斷該組供電電壓；該發光驅動單元係用以產生該脈衝調變信號至該電源致能單元及各所述子畫素單元；及該電源致能單元係用以產生該致能信號。 The information processing device as described in claim 7, wherein the control circuit includes a power module, a light-emitting driving unit and a power enable unit, wherein the power module is used for the enable signal Providing the set of power supply voltages when the active state is present, and turning off the set of power supply voltages when the enabling signal presents the inactive state; the light-emitting driving unit is used for generating the pulse modulation signal to enable the power supply The unit and each of the sub-pixel units; and the power enabling unit are used for generating the enabling signal. 如申請專利範圍第8項所述之資訊處理裝置，其中，該低電壓偵測單元係一邏輯及閘，且該電源致能單元係一邏輯或閘。 The information processing device of claim 8, wherein the low voltage detection unit is a logic AND gate, and the power enabling unit is a logic OR gate. 如申請專利範圍第7項所述之資訊處理裝置，其中，所述子畫素單元包含成一疊接組態之一第一PMOS電晶體、一第二PMOS電晶體、一第三PMOS電晶體及一OLED元件，其中，該疊接組態係耦接於該組供電電壓之間；該第一PMOS電晶體及該第三PMOS電晶體之閘極耦接該脈衝調變信號，該第二PMOS電晶體之閘極耦接一所述源極驅動電壓並提供該閘極之電壓至該低電壓偵測單元。 The information processing device of claim 7, wherein the sub-pixel unit comprises a first PMOS transistor, a second PMOS transistor, a third PMOS transistor and a stacked configuration. An OLED device, wherein the stacked configuration is coupled between the set of supply voltages; the gates of the first PMOS transistor and the third PMOS transistor are coupled to the pulse modulation signal, and the second PMOS transistor The gate of the transistor is coupled to a source driving voltage and provides the gate voltage to the low voltage detection unit. 如申請專利範圍第7項所述之資訊處理裝置，其中，所述子畫素單元包含成一疊接組態之一第一PMOS電晶體、一第二PMOS電晶體、一第三PMOS電晶體及一OLED元件，以及一比較器，其中，該疊接組態係耦接於該組供電電壓之間之間；該第一PMOS電晶體及該第三PMOS電晶體之閘極耦接該脈衝調變信號，該第二PMOS電晶體之閘極耦接一所述源極驅動電壓；該比較器之正輸入端耦接該第二PMOS電晶體之該閘極，負輸入端耦接該閾值電壓，輸出端提供一低壓指示信號至該低電壓偵測單元，其中，當該正輸入端的電壓低於該閾值電壓時，該低壓指示信號即呈現邏輯0之狀態。 The information processing device of claim 7, wherein the sub-pixel unit comprises a first PMOS transistor, a second PMOS transistor, a third PMOS transistor and a stacked configuration. an OLED element and a comparator, wherein the stacking configuration is coupled between the set of supply voltages; the gates of the first PMOS transistor and the third PMOS transistor are coupled to the pulse modulation The gate of the second PMOS transistor is coupled to a source driving voltage; the positive input terminal of the comparator is coupled to the gate of the second PMOS transistor, and the negative input terminal is coupled to the threshold voltage , the output terminal provides a low voltage indication signal to the low voltage detection unit, wherein when the voltage of the positive input terminal is lower than the threshold voltage, the low voltage indication signal presents a state of logic 0. 如申請專利範圍第7至11項中任一項所述之資訊處理裝置，其係一攜帶型電腦或一智慧型手持裝置。 The information processing device according to any one of items 7 to 11 of the scope of the application is a portable computer or a smart handheld device.
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