TWI757755B - Switch driving circuit capable of reducing switching noises - Google Patents
Switch driving circuit capable of reducing switching noises Download PDFInfo
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Description
本發明相關於一種開關驅動電路,尤指一種可抑制切換雜訊之開關驅動電路。 The present invention relates to a switch driving circuit, in particular to a switch driving circuit capable of suppressing switching noise.
電腦系統中不同組件所需的操作電壓不同,因此普遍採用電源供應器(power supply)以通過變壓、整流與濾波的方式,將交流電(AC)室內電源轉換為直流電(DC)以驅動不同零組件。先前技術的電源供應器通常包含一變壓器、一功率開關、一脈衝寬度調變積體電路(PWMIC),以及儲能元件(例如電容和電感)。藉由採用特定頻率來切換功率開關,電源供應器可依據一輸入電壓來重複地對儲能元件進行充電或放電,進而提供不同於輸入電壓的一輸出電壓。上述功率開關通常採用具有低開啟狀態電阻的電晶體,脈衝寬度調變積體電路可依據相關輸出電壓之一回授電壓來控制切換條件,進而適當地調節輸出電壓之值以維持恆定輸出。 Different components in a computer system require different operating voltages, so a power supply is generally used to convert alternating current (AC) indoor power into direct current (DC) by means of voltage transformation, rectification and filtering to drive different zeroes. components. Prior art power supplies typically include a transformer, a power switch, a pulse width modulation integrated circuit (PWMIC), and energy storage elements (eg, capacitors and inductors). By switching the power switch with a specific frequency, the power supply can repeatedly charge or discharge the energy storage element according to an input voltage, thereby providing an output voltage different from the input voltage. The above-mentioned power switches usually use transistors with low on-state resistance. The pulse width modulation integrated circuit can control the switching conditions according to a feedback voltage of the relevant output voltage, and then appropriately adjust the value of the output voltage to maintain a constant output.
脈衝寬度調變積體電路所能提供的驅動電流有限,除了會限制功率開關的切換速度之外,在出現電流尖波(current spike)時也容易 破壞系統中較敏感的元件。因此,先前技術的電源供應器通常會使用開關驅動電路來作為脈衝寬度調變積體電路和功率開關之間的界面電路,進而提升功率開關的切換速度和保護功率開關。 The driving current provided by the PWM integrated circuit is limited. In addition to limiting the switching speed of the power switch, it is also prone to current spikes. Destroy the more sensitive components of the system. Therefore, the power supply of the prior art usually uses a switch driving circuit as an interface circuit between the PWM integrated circuit and the power switch, so as to improve the switching speed of the power switch and protect the power switch.
針對高頻運作而設計之電源供應器可使用較小體積的儲能元件,但功率開關之寄生電容和離散電感在高頻運作時無可避免地會造成切換雜訊。第1圖為使用先前技術開關驅動電路之功率開關在高頻運作時相關訊號之示意圖。當開關驅動電路提供之開關控制電壓Vg從除能電位切換至致能電位時(如時間點T1和T3),功率開關開始從截止狀態切換至導通狀態,在高頻切換過程中其寄生電容和離散電感會造成切換雜訊Vn;當功率開關控制電壓Vg從致能電位切換至除能電位時(如時間點T2和T4),功率開關開始從導通狀態切換至截止狀態,在高頻切換過程中其寄生電容和離散電感會造成切換雜訊Vn。上述高頻運作下的切換雜訊會造成開關誤動作,或造成閉鎖(latch-up)使整個系統永久損壞。因此,需要一種可抑制高頻切換雜訊之開關驅動電路。 Power supplies designed for high-frequency operation can use smaller-sized energy storage components, but the parasitic capacitance and discrete inductance of power switches inevitably cause switching noise during high-frequency operation. FIG. 1 is a schematic diagram of related signals when a power switch using the prior art switch driving circuit operates at a high frequency. When the switch control voltage Vg provided by the switch driving circuit switches from the disable potential to the enable potential (such as time points T1 and T3), the power switch starts to switch from the off state to the on state, and its parasitic capacitance and Discrete inductance will cause switching noise Vn; when the power switch control voltage Vg switches from the enabling potential to the disabling potential (such as time points T2 and T4), the power switch starts to switch from the on state to the off state. During the high frequency switching process Among them, its parasitic capacitance and discrete inductance will cause switching noise Vn. The switching noise in the high frequency operation described above can cause the switch to malfunction, or cause latch-up to permanently damage the entire system. Therefore, there is a need for a switch driving circuit capable of suppressing high frequency switching noise.
本發明提供一種可抑制切換雜訊之開關驅動電路,其包含用來接收一驅動電壓之一輸入端,用來輸出一開關控制電壓以驅動一功率開關之一輸出端,一啟動及加速放電電路,一雜訊抑制電路,以及一緩振模式控制電路。在該功率開關從一截止狀態切換至一導通狀態之暫態運作過程中,該開關驅動電路係在一第一狀態下運作。當該功率開關在一完全導通之穩態下運作時,該開關驅動電路係在一第二狀態下運作。在該功率開關從該導通狀態切換至該截止狀態之暫態運作 過程中,該開關驅動電路係在一第三狀態下運作。當該功率開關在一完全截止之穩態下運作時,該開關驅動電路係在一第四狀態下運作。該啟動及加速放電電路用來控制該功率開關之充放電過程。該雜訊抑制電路用來在該功率開關於該第一狀態或該第三狀態下運作時提供一緩振電路以抑制該功率開關之切換雜訊。該緩振模式控制電路用來控制該雜訊抑制電路之運作模式。 The present invention provides a switch driving circuit capable of suppressing switching noise, which comprises an input terminal for receiving a driving voltage, an output terminal for outputting a switch control voltage to drive a power switch, a start-up and acceleration discharge circuit , a noise suppression circuit, and a slow vibration mode control circuit. During the transient operation of the power switch being switched from an off state to an on state, the switch driving circuit operates in a first state. When the power switch operates in a fully turned-on steady state, the switch driving circuit operates in a second state. Transient operation during switching of the power switch from the on state to the off state During the process, the switch driving circuit operates in a third state. When the power switch operates in a completely off steady state, the switch driving circuit operates in a fourth state. The start-up and acceleration-discharge circuit is used to control the charge-discharge process of the power switch. The noise suppression circuit is used for providing a damping circuit to suppress switching noise of the power switch when the power switch operates in the first state or the third state. The slow vibration mode control circuit is used for controlling the operation mode of the noise suppression circuit.
10:啟動及加速放電電路 10: Start and accelerate the discharge circuit
20:雜訊抑制電路 20: Noise suppression circuit
30:緩振模式控制電路 30: Slow vibration mode control circuit
40:保護電路 40: Protection circuit
100:開關驅動電路 100: switch drive circuit
Q1:功率開關 Q1: Power switch
Q2:輔助開關 Q2: Auxiliary switch
Cgd、Cgs、Coss:寄生電容 Cgd, Cgs, Coss: Parasitic capacitance
Ld、Ls:離散電感 Ld, Ls: discrete inductance
Rg:啟動電阻 Rg: start resistance
Dg:加速放電二極體 Dg: Accelerating Discharge Diode
Dr:緩振二極體 Dr: Slow Vibration Diode
ZD:稽納二極體 ZD: Ziner diode
Cr:緩振電容 Cr: Snubber capacitor
Lr:緩振電感 Lr: damping inductance
Rr1、Rr2:緩振電阻 Rr1, Rr2: buffer resistance
VPWM:驅動電壓 V PWM : drive voltage
Vg:開關控制電壓 Vg: switch control voltage
Ig:驅動電流 Ig: drive current
VZD:崩潰電壓 V ZD : breakdown voltage
GND:接地電位 GND: ground potential
P1~P3:迴路 P1~P3: circuit
第1圖為使用先前技術開關驅動電路之功率開關在高頻運作時相關訊號之示意圖。 FIG. 1 is a schematic diagram of related signals when a power switch using the prior art switch driving circuit operates at a high frequency.
第2圖為本發明實施例中一種可抑制高頻切換雜訊之開關驅動電路的功能方塊圖。 FIG. 2 is a functional block diagram of a switch driving circuit capable of suppressing high frequency switching noise according to an embodiment of the present invention.
第3圖為本發明實施例中一種開關驅動電路實作方式之示意圖。 FIG. 3 is a schematic diagram of an implementation of a switch driving circuit according to an embodiment of the present invention.
第4圖為本發明實施例中一種開關驅動電路在運作時相關訊號之波形示意圖。 FIG. 4 is a schematic diagram of waveforms of related signals during operation of a switch driving circuit according to an embodiment of the present invention.
第5圖為本發明實施例中一種開關驅動電路在一特定狀態下運作時之等效電路示意圖。 FIG. 5 is a schematic diagram of an equivalent circuit of a switch driving circuit operating in a specific state according to an embodiment of the present invention.
第6圖為本發明實施例中一種開關驅動電路在另一特定狀態下運作時之等效電路示意圖。 FIG. 6 is a schematic diagram of an equivalent circuit of a switch driving circuit operating in another specific state according to an embodiment of the present invention.
第7圖為本發明實施例中一種開關驅動電路在另一特定狀態下運作時之等效電路示意圖。 FIG. 7 is a schematic diagram of an equivalent circuit of a switch driving circuit operating in another specific state according to an embodiment of the present invention.
第2圖為本發明實施例中一種可抑制高頻切換雜訊之開關驅動電路100的功能方塊圖。開關驅動電路100包含一啟動及加速放電電路10、一雜訊抑制電路20、一緩振模式控制電路30,以及一保護電路40。開關驅動電路100可於輸入端接收一驅動電壓VPWM,並於輸出端提供一開關控制電壓Vg,進而選擇性地導通或截止一功率開關Q1。功率開關Q1包含一第一端、一第二端,以及一控制端,其非理想特性由第一端和第二端之間存在的寄生電容Coss、控制端和第一端之間存在的寄生電容Cgd、控制端和第二端之間存在的寄生電容Cgs、第一端存在的離散電感Ld,以及第二端存在的離散電感Ls來表示。功率開關Q1之控制端耦接至開關驅動電路100之輸出端以接收開關控制電壓Vg。
FIG. 2 is a functional block diagram of a
驅動電壓VPWM可由一脈衝寬度調變積體電路或其它類型的驅動電路來提供,其為以特定週期切換高低電位之脈衝訊號。啟動及加速放電電路10用來控制功率開關Q1之充放電過程,例如調整功率開關Q1之驅動電流值,或提昇功率開關Q1在截止狀態下的放電速度。雜訊抑制電路20用來抑制功率開關Q1在切換運作狀態時所產生之切換雜訊,緩振模式控制電路30用來控制雜訊抑制電路20之運作模式,而保護電路40用來穩定開關控制電壓Vg之值。開關控制電壓Vg和驅動電壓VPWM具相同責任週期(duty cycle),當開關控制電壓Vg具一致能電位時,功率開關Q1會被導通;當開關控制電壓Vg具一除能電位時,功率開關Q1會被截止。
The driving voltage V PWM can be provided by a pulse width modulation integrated circuit or other types of driving circuits, which is a pulse signal that switches high and low voltage levels with a specific period. The start-up and acceleration-
第3圖為本發明實施例開關驅動電路100實作方式之示意
圖。啟動及加速放電電路10包含一啟動電阻Rg和一加速放電二極體Dg,並聯於開關驅動電路100之輸入端和雜訊抑制電路20之間。加速放電二極體Dg之陽極透過雜訊抑制電路20耦接於開關驅動電路100之輸出端,而陰極耦接於開關驅動電路100之輸入端。當驅動電壓VPWM具致能電位時,加速放電二極體Dg會因反向偏壓(reverse-biased)而被截止,此時驅動電壓VPWM之能量可傳送到功率開關Q1之控制端,其中啟動電阻Rg之值決定功率開關Q1的驅動電流Ig值;當驅動電壓VPWM具致能電位時,加速放電二極體Dg會因正向偏壓(forward-biased)而被導通,進而使功率開關Q1內存能量能加速放電至開關驅動電路100之輸入端。
FIG. 3 is a schematic diagram of the implementation of the
雜訊抑制電路20包含一緩振電容Cr、一緩振電感Lr,和一緩振電阻Rr1,其中緩振電容Cr和緩振電阻Rr1並聯於啟動及加速放電電路10和開關驅動電路100之輸出端之間,而緩振電感Lr耦接於開關驅動電路100之輸出端和一接地電位GND之間。當功率開關Q1在暫態下運作時(從截止狀態切換至導通狀態的過程,或從導通狀態切換至截止狀態的過程),雜訊抑制電路20中的緩振電阻Rr1、緩振電感Lr和緩振電容Cr會提供一電阻-電感-電容(RLC)緩振電路以抑制功率開關Q1之非理想特性所造成的切換雜訊。當功率開關Q1在完全導通的穩態下運作時,雜訊抑制電路20中的緩振電阻Rr1和緩振電容Cr會提供一電阻-電容(RC)緩振電路以抑制驅動電壓VPWM中的電流尖波。
The
緩振模式控制電路30包含一輔助開關Q2、一緩振電阻Rr2,和一緩振二極體Dr,其中輔助開關Q2之第一端透過緩振二極體Dr耦接至開關驅動電路100之輸出端,第二端透過緩振電阻Rr2耦接至接地電
位GND,而控制端耦接至開關驅動電路100之輸出端。當功率開關Q1在暫態下運作時(從截止狀態切換至導通狀態的過程,或從導通狀態切換至截止狀態的過程),緩振模式控制電路30為關閉,此時雜訊抑制電路20會在提供RLC緩振電路之模式下運作;當功率開關Q1在完全導通的穩態下運作時,緩振模式控制電路30中為開啟,進而提供放電路徑給雜訊抑制電路20中的緩振電感Lr,此時雜訊抑制電路20會在提供RC緩振電路之模式下運作。
The slow vibration
保護電路40包含一稽納二極體(Zener diode)ZD,其陽極耦接至接地電位GND,而陰極耦接至開關驅動電路100之輸出端,其為在反向偏壓下運作之元件。在本發明中,當開關控制電壓Vg之值足以導通功率開關Q1時,其亦會讓稽納二極體ZD崩潰而提供一固定崩潰電壓,進而箝制開關控制電壓Vg之值以避免損壞功率開關Q1。
The
第4圖為本發明實施例中開關驅動電路100在運作時相關訊號之波形示意圖。接下來將開關驅動電路100之運作分為四個狀態S1~S4來作說明,其中開關控制電壓Vg之值會在致能電位(例如時間點T1和T2之間)和在除能電位(例如時間點T2和T3之間)切換。狀態S1對應至功率開關Q1從截止狀態切換至導通狀態之暫態運作過程,狀態S2對應至功率開關Q1在完全導通時之穩態運作過程,狀態S3對應至功率開關Q1從導通狀態切換至截止狀態之暫態運作過程,而狀態S4對應至功率開關Q1在完全截止時之穩態運作過程。下列表一顯示了在狀態S1~S4下開關驅動電路100中各元件的狀態。
FIG. 4 is a schematic diagram of waveforms of related signals during the operation of the
第5圖為本發明實施例開關驅動電路100在狀態S1下運作時之等效電路示意圖。第6圖為本發明實施例開關驅動電路100在狀態S2下運作時之等效電路示意圖。第7圖為本發明實施例開關驅動電路100在狀態S3下運作時之等效電路示意圖。
FIG. 5 is a schematic diagram of an equivalent circuit of the
如第4、5圖和表一所示,狀態S1對應至功率開關Q1由截止狀態切換至導通狀態的暫態運作過程。在控制訊號SPWM從除能電位切換至致能電位後,其能量會經由啟動及加速放電電路10之啟動電阻Rg和雜訊抑制電路20傳送至功率開關Q1之控制端,此時相對應開關控制電壓Vg之值尚不足以啟動功率開關Q1和輔助開關Q2。在這種情況下,加速放電二極體Dg會因逆向偏壓而呈截止,阻斷開關驅動電路100之輸出端至輸入端的放電路徑。在輔助開關Q2被截止時緩振模式控制電路30並未運作,使得雜訊抑制電路20中的緩振電阻Rr1、緩振電感Lr和緩振電容Cr會形成RLC緩振電路,進而抑制功率開關Q1之非理想特性所造成的切換雜訊。另一方面,在狀態S1下開關控制電壓Vg之值也不足以讓稽納二極體ZD崩潰,因此保護電路40並未運作。
As shown in FIGS. 4 and 5 and Table 1, the state S1 corresponds to the transient operation process in which the power switch Q1 is switched from the off state to the on state. After the control signal S PWM is switched from the disabling potential to the enabling potential, its energy will be transmitted to the control terminal of the power switch Q1 through the starting resistor Rg of the starting and accelerating
如第4、6圖和表一所示,狀態S2對應至功率開關Q1完全導通下的穩態運作,此時開關控制電壓Vg之值已經足以啟動功率開關Q1和輔助開關Q2,而功率開關Q1之非理想特性在穩態運作時並不會造成雜訊。緩振模式控制電路30在輔助開關Q2導通後開始運作,使得雜訊抑制電路20中緩振電感Lr在狀態S1下所儲存的能量能依序經由緩振模式控制電路30中正向偏壓的緩振二極體Dr、導通之輔助開關Q2和緩振電阻Rr2放電至接地電位GND。因此,在狀態下S3雜訊抑制電路20中只有緩振電容Cr和緩振電阻Rr1會形成RC緩振電路,進而抑制驅動電壓VPWM中的電流尖波。另一方面,在狀態S2下開關控制電壓Vg之值會讓稽納二極體ZD崩潰,進而將開關控制電壓Vg箝制在固定值VZD以保護功率開關Q1。
As shown in Figures 4 and 6 and Table 1, the state S2 corresponds to the steady-state operation when the power switch Q1 is fully turned on. At this time, the value of the switch control voltage Vg is sufficient to start the power switch Q1 and the auxiliary switch Q2, and the power switch Q1 The non-ideal characteristics of this do not cause noise in steady state operation. The slow vibration
如第4、7圖和表一所示,狀態S3對應至功率開關Q1由導通狀態切換至截止狀態的暫態過程。在控制訊號SPWM從致能電位切換至除能電位後,雖然開關驅動電路100之輸出端已無能量傳送至功率開關Q1之控制端,但功率開關Q1之寄生電容Coss在先前狀態S2下所儲存的能量仍足以讓功率開關Q1和輔助開關Q2維持在導通狀態,以及足以讓加速二極體Dg和緩振二極體Dr呈正向偏壓。在這種情況下,寄生電容Coss內儲存的能量會透過3個迴路來放電,其中第一迴路是經由緩振模式控制電路30中正向偏壓之緩振二極體Dr、導通之輔助開關Q2,以及緩振電阻Rr2放電至接地電位GND(由箭號P1表示),第二迴路是經由雜訊抑制電路20中的緩振電感Lr放電至接地電位GND(由箭號P2表示),而第三迴路是經由雜訊抑制電路20中的緩振電容Cr和緩振電阻Rr1以及加速
放電電路10中正向偏壓之加速放電二極體Dg放電至開關驅動電路100之輸入端(由箭號P3表示)。在狀態S3下,雜訊抑制電路20中的緩振電容Cr、緩振電感Lr和緩振電阻Rr1會提供RLC緩振電路,進而抑制功率開關Q1之非理想特性所造成的切換雜訊
As shown in Figs. 4 and 7 and Table 1, the state S3 corresponds to the transient process in which the power switch Q1 is switched from the on state to the off state. After the control signal S PWM is switched from the enabling level to the disabling level, although the output terminal of the
如第4圖和表一所示,狀態S4對應至功率開關Q1完全截止下的穩態運作,此時功率開關Q1之寄生電容Coss內儲存的能量已經完全放電至接地電位GND,而雜訊抑制電路20沒有運作。
As shown in Figure 4 and Table 1, the state S4 corresponds to the steady-state operation when the power switch Q1 is completely turned off. At this time, the energy stored in the parasitic capacitance Coss of the power switch Q1 has been completely discharged to the ground potential GND, and the
在本發明中,啟動電阻Rg之值可為100Ω(誤差±1%),緩振電容Cr之值可為330μF(誤差±10%),緩振電感Lr之值可為10μH(誤差±10%),緩振電阻Rr1之值可為1KΩ(誤差±5%),緩振電阻Rr2之值可為10Ω(誤差±1%),稽納二極體ZD之崩潰電壓之值可為15V,功率開關Q1中寄生電容Cgd之值可為500pF(誤差±10%),功率開關Q1中寄生電容Cgs之值可為630pF(誤差±10%),功率開關Q1中寄生電容COSS之值可為40pF(誤差±10%),功率開關Q1中寄生電感Ld之值可為2.3nH(誤差±10%),而功率開關Q1中寄生電感Ls之值可為3.9nH(誤差±10%)。然而,上述元件之實作方式並不限定本發明之範疇。 In the present invention, the value of the starting resistance Rg can be 100Ω (error ±1%), the value of the snubber capacitor Cr can be 330μF (error ±10%), and the value of the snubber inductance Lr can be 10μH (error ±10%) ), the value of the damping resistance Rr1 can be 1KΩ (error ±5%), the value of the damping resistance Rr2 can be 10Ω (error ±1%), the value of the breakdown voltage of the Zener diode ZD can be 15V, the power The value of parasitic capacitance Cgd in switch Q1 can be 500pF (error ±10%), the value of parasitic capacitance Cgs in power switch Q1 can be 630pF (error ±10%), the value of parasitic capacitance C OSS in power switch Q1 can be 40pF (error ±10%), the value of the parasitic inductance Ld in the power switch Q1 can be 2.3nH (error ±10%), and the value of the parasitic inductance Ls in the power switch Q1 can be 3.9nH (error ±10%). However, the implementation of the above elements does not limit the scope of the present invention.
在本發明實施例中,功率開關Q1和輔助開關Q2可為金屬氧化物半導體場效電晶體(metal-oxide-semiconductor field-effect transistor,MOSFET)、雙極性接面型電晶體(bipolar junction transistor,BJT),或其它具類似功能的元件。功率開關Q1可採用氮化鎵(GaN)或碳化矽(SiC)等具高頻切換能力的材質。對N型電晶體來說,致能電位為高電位, 而除能電位為低電位;對P型電晶體來說,致能電位為低電位,而除能電位為高電位。然而,功率開關Q1和輔助開關Q2之種類並不限定本發明之範疇。 In the embodiment of the present invention, the power switch Q1 and the auxiliary switch Q2 can be a metal-oxide-semiconductor field-effect transistor (MOSFET), a bipolar junction transistor, BJT), or other elements with similar functions. The power switch Q1 can be made of materials with high frequency switching capability such as gallium nitride (GaN) or silicon carbide (SiC). For N-type transistors, the enabling potential is high, The disabling potential is a low potential; for a P-type transistor, the enabling potential is a low potential, and the disabling potential is a high potential. However, the types of the power switch Q1 and the auxiliary switch Q2 do not limit the scope of the present invention.
綜上所述,本發明之開關驅動電路可提供開關控制電壓以選擇性地導通或截止一功率開關。當功率開關在暫態下運作時,本發明開關驅動電路中的雜訊抑制電路會提供RLC緩振電路來抑制功率開關之非理想特性所造成的切換雜訊。當功率開關在穩態下運作時,本發明開關驅動電路中的雜訊抑制電路會提供RC緩振電路來抑制電流尖波。 To sum up, the switch driving circuit of the present invention can provide the switch control voltage to selectively turn on or turn off a power switch. When the power switch operates in a transient state, the noise suppression circuit in the switch driving circuit of the present invention provides an RLC snubber circuit to suppress the switching noise caused by the non-ideal characteristics of the power switch. When the power switch operates in a steady state, the noise suppression circuit in the switch driving circuit of the present invention provides an RC snubber circuit to suppress the current spike.
以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。 The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the scope of the patent application of the present invention shall fall within the scope of the present invention.
10:啟動及加速放電電路 10: Start and accelerate the discharge circuit
20:雜訊抑制電路 20: Noise suppression circuit
30:緩振模式控制電路 30: Slow vibration mode control circuit
40:保護電路 40: Protection circuit
100:開關驅動電路 100: switch drive circuit
Q1:功率開關 Q1: Power switch
Q2:輔助開關 Q2: Auxiliary switch
Cgd、Cgs、Coss:寄生電容 Cgd, Cgs, Coss: Parasitic capacitance
Ld、Ls:離散電感 Ld, Ls: discrete inductance
Rg:啟動電阻 Rg: start resistance
Dg:加速放電二極體 Dg: Accelerating Discharge Diode
Dr:緩振二極體 Dr: Slow Vibration Diode
ZD:稽納二極體 ZD: Ziner diode
Cr:緩振電容 Cr: Snubber capacitor
Lr:緩振電感 Lr: damping inductance
Rr1、Rr2:緩振電阻 Rr1, Rr2: buffer resistance
VPWM:驅動電壓 V PWM : drive voltage
Vg:開關控制電壓 Vg: switch control voltage
Ig:驅動電流 Ig: drive current
GND:接地電位 GND: ground potential
Claims (11)
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TW200912861A (en) * | 2007-09-10 | 2009-03-16 | Himax Tech Ltd | Source driver and method for restraining noise thereof |
TW201018052A (en) * | 2008-10-16 | 2010-05-01 | Delta Electronics Inc | Auto-start circuit and uninterruptible power supply using the same |
CN202524606U (en) * | 2012-03-20 | 2012-11-07 | 苏州达方电子有限公司 | Light emitting diode driving circuit |
TW201333496A (en) * | 2011-09-26 | 2013-08-16 | Belkin International Inc | Systems and methods for data compression and feature extraction for the purpose of disaggregating loads on an electrical network |
US9515561B2 (en) * | 2014-11-27 | 2016-12-06 | Fuji Electric Co., Ltd. | Switching power supply device |
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TW200912861A (en) * | 2007-09-10 | 2009-03-16 | Himax Tech Ltd | Source driver and method for restraining noise thereof |
TW201018052A (en) * | 2008-10-16 | 2010-05-01 | Delta Electronics Inc | Auto-start circuit and uninterruptible power supply using the same |
TW201333496A (en) * | 2011-09-26 | 2013-08-16 | Belkin International Inc | Systems and methods for data compression and feature extraction for the purpose of disaggregating loads on an electrical network |
CN202524606U (en) * | 2012-03-20 | 2012-11-07 | 苏州达方电子有限公司 | Light emitting diode driving circuit |
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