TWI742098B - Ruthenium (Ru) wiring and manufacturing method of the ruthenium wiring - Google Patents

Ruthenium (Ru) wiring and manufacturing method of the ruthenium wiring Download PDF

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TWI742098B
TWI742098B TW106120930A TW106120930A TWI742098B TW I742098 B TWI742098 B TW I742098B TW 106120930 A TW106120930 A TW 106120930A TW 106120930 A TW106120930 A TW 106120930A TW I742098 B TWI742098 B TW I742098B
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石坂忠大
藤里敏章
韓千洙
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日商東京威力科創股份有限公司
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    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
    • H—ELECTRICITY
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76841—Barrier, adhesion or liner layers
    • H01L21/76871—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers
    • H01L21/76876—Layers specifically deposited to enhance or enable the nucleation of further layers, i.e. seed layers for deposition from the gas phase, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01044—Ruthenium [Ru]

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Abstract

目的在於控制產生於配線的應力，可以抑制配線圖案之倒塌或起伏等變形之產生。又，在溝槽等之凹部內填埋釕膜之後，容易進行平坦化。 The purpose is to control the stress generated in the wiring, and to suppress the collapse or undulation of the wiring pattern. In addition, after the ruthenium film is buried in the recesses such as trenches, it is easy to planarize.

針對表面具有形成有溝槽(203)及通孔(204)的層間絕緣膜(202)之基板(W)，填埋溝槽(203)及通孔(204)來製造釕配線(207)時，至少在溝槽(203)及通孔(204)之表面形成作為底層膜的TiON膜(205)，之後，於TiON膜(205)之上以填埋溝槽(203)及通孔(204)的方式形成釕膜(206)。又，形成底層膜(211)，之後形成釕膜(206)之後，藉由包含氬電漿處理之除去處理使表面之釕膜(206)及底層膜(211)平坦化。 For the substrate (W) with the interlayer insulating film (202) formed with the trench (203) and the through hole (204) on the surface, when the trench (203) and the through hole (204) are filled to manufacture the ruthenium wiring (207) At least on the surface of the trench (203) and the through hole (204), a TiON film (205) is formed as the underlying film, and then the trench (203) and the through hole (204) are filled on the TiON film (205) ) To form a ruthenium film (206). In addition, an underlying film (211) is formed, and then a ruthenium film (206) is formed, and then the ruthenium film (206) and the underlying film (211) on the surface are flattened by a removal treatment including argon plasma treatment.

Description

釕(Ru)配線及該釕配線的製造方法 Ruthenium (Ru) wiring and manufacturing method of the ruthenium wiring

本發明關於釕(Ru)配線及該釕配線的製造方法。 The present invention relates to ruthenium (Ru) wiring and a method of manufacturing the ruthenium wiring.

近年來，伴隨著半導體元件之微細化，配線之微細化亦被進展。結果，配線電阻之增大及配線間之結合電容量之增大引起的RC延遲阻礙元件之高速動作的問題變為顯著化。因此，近年來使用體積電阻(bulk resistance)較習知使用的鋁(Al)或鎢(W)為低的銅(Cu)作為配線材料，使用低介電常數膜(Low-k膜)作為層間絕緣膜。 In recent years, with the miniaturization of semiconductor elements, the miniaturization of wiring has also progressed. As a result, the problem of RC delay hindering the high-speed operation of the element due to the increase in the wiring resistance and the increase in the combined capacitance between the wirings has become significant. Therefore, in recent years, copper (Cu), which has a lower bulk resistance than conventionally used aluminum (Al) or tungsten (W), has been used as wiring material, and low-k films have been used as interlayers. Insulating film.

但是，隨著微細化的進展，Cu配線出現新的問題點。亦即依據ITRS之技術藍圖14nm世代之元件使用的配線寬度為32nm，其比Cu材料中的電子之平均自由行程之約39nm更窄，散射導致電阻值之上升。具體而言，配線之電阻值雖以體積之電阻值、表面散射引起的電阻因子、粒界散射引起的電阻因子之和表示，但是表面散射引起的電阻因子及粒界散射引起的電阻因子之其中任一均與平均自由行程成比例，因此當電子之平均自由行程大於配 線寬度時，電子對於配線側面或粒界之衝撞變為支配因素，而導致散射引起的電阻值之上升。該問題隨著配線之越微細化而變為越顯著。 However, as the miniaturization progresses, new problems have arisen in Cu wiring. That is, according to the ITRS technology blueprint, the wiring width used in the 14nm generation device is 32nm, which is narrower than the average free path of electrons in the Cu material, which is about 39nm. Scattering leads to an increase in the resistance value. Specifically, although the resistance value of the wiring is represented by the sum of the resistance value of the volume, the resistance factor caused by surface scattering, and the resistance factor caused by grain boundary scattering, the resistance factor caused by surface scattering and the resistance factor caused by grain boundary scattering are among them Either one is proportional to the mean free path. Therefore, when the mean free path of electrons is greater than the width of the wiring, the collision of the electrons on the side of the wiring or the grain boundary becomes the dominant factor, leading to an increase in the resistance value caused by scattering. This problem becomes more pronounced as the wiring becomes finer.

於此，作為配線材料，針對體積之電阻值雖不如Cu低，但材料中的電子之平均自由行程短於Cu的釕(Ru)進行檢討。具體而言，Ru之體積之電阻值為7.1μΩ-cm，高於Cu之1.7μΩ-cm，但其電子之平均自由行程為10.8nm，短於Cu之38.7nm。 Here, as a wiring material, ruthenium (Ru) whose volume resistance is not as low as that of Cu, but the mean free path of electrons in the material is shorter than that of Cu. Specifically, the volume resistance of Ru is 7.1μΩ-cm, which is higher than Cu's 1.7μΩ-cm, but the average free path of electrons is 10.8nm, which is shorter than Cu's 38.7nm.

又，Ru之融點係較Cu之融點亦即1085℃高的2334℃，因此就電子遷移耐性之觀點而言比起Cu有利。 In addition, the melting point of Ru is 2334°C, which is higher than the melting point of Cu, which is 1085°C. Therefore, it is more advantageous than Cu from the viewpoint of electron migration resistance.

Ru不同於Cu，較難擴散至絕緣膜，因此Ru膜之底層膜不要求阻障性。但是，在絕緣膜上直接且密接性良好地形成Ru膜為困難者。因此，在絕緣膜之上形成作為底層膜的TiN膜，於該TiN膜上形成Ru膜而形成Ru配線的技術被提案(非專利文獻1)。 Unlike Cu, Ru is more difficult to diffuse into the insulating film, so the underlying film of the Ru film does not require barrier properties. However, it is difficult to form the Ru film directly on the insulating film with good adhesion. Therefore, a technique of forming a TiN film as an underlying film on the insulating film and forming a Ru film on the TiN film to form Ru wiring has been proposed (Non-Patent Document 1).

另外，作為形成Cu配線的技術，半導體晶圓表面之形成有溝槽(trench)的層間絕緣膜形成阻障膜之後，於溝槽填埋Cu膜，之後藉由CMP(Chemical Mechanical Polishing)法實施平坦化技術為習知者(例如專利文獻1)。因此，形成Ru配線時，亦或在形成Ru膜之後，藉由CMP處理實施平坦化係可以考慮者。專利文獻2雖非配線之例，其揭示在沈積Ru膜之後，藉由CMP法等進行平坦化處理，而形成儲存陽極電極(SN)電極。 In addition, as a technique for forming Cu wiring, a barrier film is formed on an interlayer insulating film formed with a trench on the surface of a semiconductor wafer, and the trench is filled with a Cu film, and then implemented by CMP (Chemical Mechanical Polishing) method The flattening technology is known (for example, Patent Document 1). Therefore, when the Ru wiring is formed, or after the Ru film is formed, it may be considered to perform planarization by the CMP process. Although Patent Document 2 is not an example of wiring, it discloses that after depositing a Ru film, a planarization process is performed by a CMP method or the like to form a storage anode electrode (SN) electrode.

[先前技術文獻] [Prior Technical Literature] [專利文獻] [Patent Literature]

[專利文獻1]特開2006-148075號公報 [Patent Document 1] JP 2006-148075 A

[專利文獻2]特開2000-114474號公報 [Patent Document 2] JP 2000-114474 A

[非專利文獻] [Non-Patent Literature]

[非專利文獻1]L.G.Wen et al., Proceeding of IEEE IITC/AMC 2016, pp34-36 [Non-Patent Document 1] L.G.Wen et al., Proceeding of IEEE IITC/AMC 2016, pp34-36

但是，在絕緣膜上形成底層膜之TiN膜，於其上形成Ru膜時，TiN膜、Ru膜均受到拉伸應力之作用，作為積層構造時應力變為更大。因此，配線被施加大的應力。配線之應力變大時，有產生配線圖案之倒塌或起伏等變形之虞。特別是，隨著配線構造之微細化，配線間之間隔亦變短，更容易引起配線之變形。 However, when the TiN film of the underlying film is formed on the insulating film and the Ru film is formed thereon, both the TiN film and the Ru film are subjected to tensile stress, and the stress becomes greater when the structure is a multilayer structure. Therefore, a large stress is applied to the wiring. When the stress of the wiring increases, there is a risk of deformation such as collapse or undulation of the wiring pattern. In particular, with the miniaturization of the wiring structure, the spacing between the wirings has also become shorter, which is more likely to cause the deformation of the wiring.

另外，Ru係貴金屬、離子化傾向低，因此存在有半導體晶圓表面之Ru膜較難藉由CMP除去，在溝槽填埋Ru膜後之平坦化使用CMP時需要花大量時間之問題。 In addition, Ru is a noble metal and has a low ionization tendency. Therefore, it is difficult to remove the Ru film on the surface of the semiconductor wafer by CMP, and it takes a lot of time to use CMP to planarize the trench after the Ru film is buried.

因此，本發明之第1課題在於提供，可以控制產生於配線的應力，可以抑制配線圖案之倒塌或起伏等變形之產生的釕配線及該釕配線之製造方法。 Therefore, the first subject of the present invention is to provide a ruthenium wiring that can control the stress generated in the wiring and suppress the occurrence of deformation such as collapse or undulation of the wiring pattern, and a method of manufacturing the ruthenium wiring.

又，本發明之第2課題在於提供，在溝槽等之 凹部內填埋釕膜之後，容易進行平坦化的釕配線之製造方法。 In addition, the second subject of the present invention is to provide a method for manufacturing ruthenium wiring that can be easily planarized after a ruthenium film is buried in a recessed portion such as a trench.

為解決上述課題，本發明之第1觀點提供一種釕配線，其特徵為：在基板表面之規定之膜所形成的凹部具有：作為底層膜而被形成的TiON膜；及在上述TiON膜之上以填埋上述凹部的方式而形成的釕膜。 In order to solve the above-mentioned problems, the first aspect of the present invention provides a ruthenium wiring characterized in that: a recess formed by a predetermined film on the surface of a substrate has: a TiON film formed as an underlying film; and on the above-mentioned TiON film A ruthenium film formed to fill the above-mentioned recesses.

上述第1觀點中可以是，上述規定之膜為層間絕緣膜，於上述層間絕緣膜形成有溝槽及通孔(via hole)作為上述凹部者。可以是，上述TiON膜係藉由ALD形成的膜，上述釕膜係藉由CVD形成的膜。上述TiON膜之氧含量在50at%以上為較佳。 In the first aspect described above, the predetermined film may be an interlayer insulating film, and grooves and via holes (via holes) may be formed in the interlayer insulating film as the recesses. The above-mentioned TiON film may be a film formed by ALD, and the above-mentioned ruthenium film may be a film formed by CVD. The oxygen content of the above-mentioned TiON film is preferably 50 at% or more.

本發明之第2觀點提供一種釕配線的製造方法，係針對表面具有形成有凹部的規定之膜的基板，填埋上述凹部來製造釕配線者，其特徵為具有：至少在上述凹部之表面形成作為底層膜的TiON膜之工程；及在上述TiON膜之上以填埋上述凹部的方式形成釕膜之工程。 A second aspect of the present invention provides a method for manufacturing ruthenium wiring, which is a method for manufacturing ruthenium wiring by filling the recessed portion with respect to a substrate having a predetermined film formed with a recessed portion on the surface, characterized in that the ruthenium wiring is formed at least on the surface of the recessed portion The process of forming a TiON film as the underlying film; and the process of forming a ruthenium film on the TiON film by filling the recesses.

可以是，上述規定之膜為層間絕緣膜，於上述層間絕緣膜形成有作為上述凹部之溝槽及通孔者。 The predetermined film may be an interlayer insulating film, and the interlayer insulating film may have grooves and through holes as the recesses.

亦可以另具有：形成上述釕膜填埋上述凹部之後，將表面之上述釕膜及上述TiON膜除去使平坦化之工程。上述平坦化之工程，可以藉由CMP研磨上述表面之上述釕膜及上述TiON膜來進行。又，上述平坦化之工 程，可以藉由包含氬(Ar)電漿處理之處理除去上述表面之上述釕膜及上述TiON膜來進行。該情況下，上述平坦化之工程，可以藉由氬電漿處理除去上述表面之上述釕膜及上述TiON膜之後，藉由CMP研磨來進行。上述氬電漿處理以氬離子濺鍍處理為較佳。亦可以是另具有：在形成上述釕膜之後，於上述平坦化之前，實施退火處理之工程。 It may also have a process of removing and planarizing the ruthenium film and the TiON film on the surface after forming the ruthenium film to fill the recess. The planarization process can be performed by polishing the ruthenium film and the TiON film on the surface by CMP. In addition, the planarization process can be performed by removing the ruthenium film and the TiON film on the surface by a treatment including argon (Ar) plasma treatment. In this case, the planarization process can be performed by CMP polishing after removing the ruthenium film and the TiON film on the surface by argon plasma treatment. The above-mentioned argon plasma treatment is preferably argon ion sputtering treatment. It may also have a process of performing annealing treatment after the formation of the ruthenium film and before the planarization.

藉由調整上述TiON膜之氧含量，可以控制作用於上述TiON膜的應力。上述TiON膜之氧含量設為50at%以上為較佳。 By adjusting the oxygen content of the TiON film, the stress acting on the TiON film can be controlled. The oxygen content of the above-mentioned TiON film is preferably 50 at% or more.

上述TiON膜可以如下形成：將基板配置於處理容器內，將上述處理容器內保持於減壓狀態，在規定之處理溫度下，以重複X次交互地進行對上述處理容器內供給Ti含有氣體的步驟及對上述處理容器內供給氮化氣體的步驟來形成單位TiN膜之後，對上述處理容器內供給氧化劑使上述單位TiN膜氧化的一連串之處理設為1循環，以成為所要之膜厚的方式重複進行複數次該循環，可以藉由X之次數調整膜中之氧含量。 The TiON film can be formed as follows: a substrate is placed in a processing container, the inside of the processing container is maintained in a reduced pressure state, and the Ti-containing gas is alternately supplied to the processing container at a predetermined processing temperature X times. Steps and the step of supplying nitriding gas to the processing vessel to form a unit TiN film, and then supplying an oxidizing agent to the processing vessel to oxidize the unit TiN film in a series of treatments is set to one cycle to achieve the desired film thickness Repeating this cycle several times, the oxygen content in the film can be adjusted by the number of times X.

此時，上述Ti含有氣體可以使用TiCl4氣體，上述氮化氣體可以使用NH3氣體。又，上述氧化劑可以使用由O2氣體、O3氣體、H2O、NO2構成之群選擇的含氧氣體或將上述含氧氣體電漿化者。另外，形成上述TiON膜時之上述處理溫度可以設為300~500℃之範圍。 In this case, TiCl 4 gas may be used for the Ti-containing gas , and NH 3 gas may be used for the nitriding gas. In addition, as the oxidant , an oxygen-containing gas selected from the group consisting of O 2 gas, O 3 gas, H 2 O, and NO 2 or a plasma-formed oxygen-containing gas may be used. In addition, the processing temperature during the formation of the TiON film may be in the range of 300 to 500°C.

本發明之第3觀點提供的釕配線的製造方法，係針對表面具有形成有凹部的規定之膜的基板，填埋上述 凹部來製造釕配線者，其特徵為具有：至少在上述凹部之表面形成底層膜之工程；在上述底層膜之上以填埋上述凹部的方式形成釕膜之工程；及在形成上述釕膜填埋上述凹部之後，藉由包含氬電漿處理之處理除去表面之上述釕膜及上述底層膜使平坦化之工程。 According to a third aspect of the present invention, a method for manufacturing ruthenium wiring provides a method for manufacturing ruthenium wiring on a substrate having a predetermined film with recesses formed on the surface. The process of underlayer film; the process of forming a ruthenium film on the underlayer film by filling the recesses; and after forming the ruthenium film to fill the recesses, removing the ruthenium on the surface by a treatment including argon plasma treatment The process of flattening the film and the above-mentioned underlying film.

上述第3觀點中，上述平坦化之工程，係藉由氬電漿處理除去上述表面之上述釕膜及上述底層膜之後，藉由CMP研磨來進行。上述氬電漿處理以氬離子濺鍍處理為較佳。亦可以另具有：在形成上述釕膜之後，上述平坦化之工程之前，實施退火處理之工程。 In the third aspect, the planarization process is performed by CMP polishing after removing the ruthenium film and the underlying film on the surface by argon plasma treatment. The above-mentioned argon plasma treatment is preferably argon ion sputtering treatment. It may also have a process of performing annealing treatment after the formation of the ruthenium film and before the process of planarization.

作為上述底層膜較佳可以使用TiN膜、Ta膜、TaN膜、TaAlN膜及TiON膜之任一。 As the above-mentioned underlayer film, any one of TiN film, Ta film, TaN film, TaAlN film, and TiON film can be preferably used.

上述第2觀點及第3觀點中，上述釕膜可以藉由CVD形成。該情況下，成膜原料可以使用釕羰基(ruthenium carbonyl)。又，形成上述釕膜時之處理溫度可以設為130~250℃之範圍。 In the second aspect and the third aspect, the ruthenium film may be formed by CVD. In this case, ruthenium carbonyl can be used as a film-forming raw material. In addition, the processing temperature when forming the above-mentioned ruthenium film can be set in the range of 130 to 250°C.

依據本發明之第1觀點，作為釕膜之底層膜係使用和TiN膜比較作用於膜的拉伸應力較小的TiON膜，因此可以縮小作用於與釕膜之積層膜的應力，可以縮小應力引起的配線構造之變形。又，藉由調整膜中之氧含量，可以控制膜之應力，可以有效抑制應力引起的配線構造之變形。 According to the first aspect of the present invention, as the base film of the ruthenium film, a TiON film with a smaller tensile stress applied to the film is used as compared with the TiN film. Therefore, the stress applied to the laminated film with the ruthenium film can be reduced, and the stress can be reduced The resulting deformation of the wiring structure. In addition, by adjusting the oxygen content in the film, the stress of the film can be controlled, and the deformation of the wiring structure caused by the stress can be effectively suppressed.

依據本發明之第2觀點，在形成釕膜填埋凹部後之平坦化處理使用氬電漿，因此平坦化可容易進行。 According to the second aspect of the present invention, argon plasma is used for the planarization treatment after forming the ruthenium film to fill the recesses, so the planarization can be easily performed.

1‧‧‧成膜系統 1‧‧‧Film forming system

10‧‧‧真空搬送室 10‧‧‧Vacuum transfer room

11‧‧‧TiON膜成膜裝置 11‧‧‧TiON film forming device

12‧‧‧冷卻裝置 12‧‧‧Cooling device

13‧‧‧Ru膜成膜裝置 13‧‧‧Ru film forming device

14‧‧‧加載鎖定室 14‧‧‧Load lock room

201‧‧‧基體 201‧‧‧Matrix

202‧‧‧層間絕緣膜 202‧‧‧Interlayer insulation film

203‧‧‧溝槽 203‧‧‧Groove

204‧‧‧通孔 204‧‧‧Through hole

205‧‧‧TiON膜 205‧‧‧TiON film

206‧‧‧Ru膜 206‧‧‧Ru film

207、212‧‧‧Ru配線 207, 212‧‧‧Ru wiring

211‧‧‧底層膜 211‧‧‧Bottom film

301‧‧‧單位TiN膜 301‧‧‧unit TiN film

400‧‧‧Ar離子濺鍍裝置 400‧‧‧Ar ion sputtering device

W‧‧‧半導體晶圓 W‧‧‧Semiconductor Wafer

[圖1]概略地表示本發明第1實施形態的Ru配線的製造方法之流程圖。 [Fig. 1] A flowchart schematically showing a manufacturing method of Ru wiring according to the first embodiment of the present invention.

[圖2]概略地表示本發明第1實施形態的Ru配線的製造方法之工程斷面圖。 [Fig. 2] A cross-sectional view of the process schematically showing the manufacturing method of Ru wiring according to the first embodiment of the present invention.

[圖3]表示TiN膜及TiON膜(O：46at%及O：55at%)之膜厚與膜應力之關係的圖。 [Fig. 3] A graph showing the relationship between the film thickness of the TiN film and the TiON film (O: 46 at% and O: 55 at%) and the film stress.

[圖4]表示TiON膜之成膜手法之序列之一例時序圖。 [Fig. 4] A timing chart showing an example of the sequence of the film forming method of the TiON film.

[圖5]表示TiON膜之成膜手法之序列之一例的流程圖。 [Fig. 5] A flowchart showing an example of the sequence of the film forming method of the TiON film.

[圖6]表示以圖4、圖5之序列進行TiON膜之成膜時的成膜狀態的模式圖。 [Fig. 6] A schematic diagram showing the state of film formation when the TiON film is formed in the sequence of Fig. 4 and Fig. 5.

[圖7]概略地表示實施第1實施形態的Ru配線的製造方法所使用的成膜系統之一例之水平斷面圖。 [FIG. 7] A horizontal cross-sectional view schematically showing an example of a film forming system used to implement the Ru wiring manufacturing method of the first embodiment.

[圖8]概略地表示圖7之成膜系統所搭載的TiON膜成膜裝置之一例之斷面圖。 [FIG. 8] A cross-sectional view schematically showing an example of a TiON film forming apparatus installed in the film forming system of FIG. 7.

[圖9]概略地表示圖7之成膜系統所搭載的Ru膜成膜裝置之一例之斷面圖。 [FIG. 9] A cross-sectional view schematically showing an example of a Ru film forming apparatus mounted in the film forming system of FIG. 7.

[圖10]概略地表示本發明第2實施形態的Ru配線的製造方法之流程圖。 [Fig. 10] A flowchart schematically showing a manufacturing method of Ru wiring according to the second embodiment of the present invention.

[圖11]概略地表示本發明第2實施形態的Ru配線的製造方法之工程斷面圖。 [Fig. 11] A cross-sectional view of the process schematically showing the manufacturing method of Ru wiring according to the second embodiment of the present invention.

[圖12]表示作為第2實施形態中平坦化使用的Ar電漿處理裝置之Ar離子濺鍍裝置之一例的斷面圖。 [Fig. 12] Fig. 12 is a cross-sectional view showing an example of an Ar ion sputtering apparatus as an Ar plasma processing apparatus used for planarization in the second embodiment.

[圖13]概略地表示可以統合實施第2實施形態的Ru配線的製造方法之成膜系統之一例之水平斷面圖。 [FIG. 13] A horizontal cross-sectional view schematically showing an example of a film forming system that can collectively implement the Ru wiring manufacturing method of the second embodiment.

[圖14]表示針對在層間絕緣膜形成有溝槽的晶圓，形成由TaN膜構成的底層膜之後，形成Ru膜，填埋溝槽的狀態的SEM照片。 [Fig. 14] An SEM photograph showing a state in which the trench is filled with a Ru film after the formation of an underlying film made of a TaN film for a wafer in which trenches are formed in the interlayer insulating film.

[圖15]表示針對圖14之狀態之晶圓進行Ar離子濺鍍，除去晶圓表面之Ru膜及TaN膜的狀態的SEM照片。 [FIG. 15] An SEM photograph showing a state where Ar ion sputtering is performed on the wafer in the state of FIG. 14 to remove the Ru film and the TaN film on the wafer surface.

[圖16]表示在各種寬度之溝槽形成作為底層膜的TaN膜之後，形成Ru膜填埋溝槽之後，藉由Ar離子濺鍍進行平坦化而形成Ru配線時之溝槽寬度與配線電阻之關係的圖。 [FIG. 16] After forming a TaN film as an underlying film in trenches of various widths, a Ru film is formed to fill the trenches and then planarized by Ar ion sputtering to form Ru wiring and the trench width and wiring resistance Diagram of the relationship.

[圖17]表示在各種寬度之溝槽，形成作為底層膜的TaN膜之後，形成Ru膜填埋溝槽之後，藉由Ar離子濺鍍進行平坦化而形成Ru配線時之施加電壓與洩漏電流之關係的圖。 [Figure 17] shows the applied voltage and leakage current when forming the Ru wiring by Ar ion sputtering after forming the TaN film as the underlying film in the trenches of various widths, forming the Ru film to fill the trenches Diagram of the relationship.

以下參照添附圖面具體說明本發明實施形態。 Hereinafter, the embodiments of the present invention will be described in detail with reference to the attached drawings.

<第1實施形態> <First Embodiment>

首先，對本發明第1實施形態進行說明。 First, the first embodiment of the present invention will be described.

[第1實施形態的Ru配線的製造方法及Ru配線之構造] [The manufacturing method of Ru wiring and the structure of Ru wiring of the first embodiment]

首先，對本發明第1實施形態的Ru配線的製造方法及Ru配線之構造進行說明。圖1係概略地表示本發明第1實施形態的Ru配線的製造方法之流程圖，圖2係其工程斷面圖。 First, the manufacturing method of Ru wiring and the structure of Ru wiring in the first embodiment of the present invention will be described. Fig. 1 is a flowchart schematically showing a manufacturing method of Ru wiring according to the first embodiment of the present invention, and Fig. 2 is a sectional view of the process.

首先，準備在具有下部構造的基體201之上形成由SiO2膜、低介電常數(Low-k)膜(SiCO、SiCOH等)等構成的層間絕緣膜202，於層間絕緣膜202以規定圖案形成有溝槽203，在溝槽203之底部與基體201上之下部構造(未圖示)之間以規定間隔形成有通孔204的的半導體晶圓(以下，簡單標記為晶圓)W(步驟1，圖2(a))。 First, prepare to form an interlayer insulating film 202 composed of a SiO 2 film, a low-k film (SiCO, SiCOH, etc.) on the substrate 201 with a lower structure, and the interlayer insulating film 202 is patterned in a predetermined pattern. A semiconductor wafer (hereinafter, simply referred to as wafer) W( Step 1, Figure 2(a)).

接著，必要時，對該晶圓W進行作為前處理的脫氣(degas)製程或前洗淨(預清洗(pre-clean)製程之後，為了與Ru膜之良好密接性目的而在包含溝槽203或通孔204之表面的整面例如藉由原子層沉積法(ALD)形成作為底層膜的TiON膜205(步驟2，圖2(b))。 Then, if necessary, the wafer W is subjected to a degassing process or a pre-cleaning (pre-cleaning) process as a pre-treatment, and a groove is included for the purpose of good adhesion with the Ru film. The entire surface of 203 or the through hole 204 is formed with a TiON film 205 as an underlying film by, for example, atomic layer deposition (ALD) (step 2, FIG. 2(b)).

之後，例如藉由化學蒸鍍法(CVD)形成Ru膜206而在溝槽203及通孔204內填埋Ru膜206(步驟3，圖2(c))。 After that, the Ru film 206 is formed by, for example, chemical vapor deposition (CVD), and the Ru film 206 is buried in the trench 203 and the through hole 204 (Step 3, FIG. 2(c)).

Ru膜206之形成後，必要時進行退火處理(步驟4，圖2(d))。藉由該退火處理，使Ru膜206穩定化。 After the Ru film 206 is formed, an annealing treatment is performed if necessary (Step 4, Fig. 2(d)). This annealing treatment stabilizes the Ru film 206.

之後，例如藉由習知製造Cu配線時使用的 CMP對晶圓W表面之整面進行研磨，除去比Ru膜206及TiON膜205之層間絕緣膜202之表面更上面之部分，使平坦化(步驟5，圖2(e))。據此而在溝槽203及通孔204內形成由作為底層膜的TiON膜205及Ru膜206構成的Ru配線207。又，該平坦化處理不限定於CMP。例如後述之第2實施形態所示，進行氬(Ar)電漿處理亦可。又，在Ar電漿處理之後進行CMP亦可。Ar電漿處理以Ar離子濺鍍為較佳。 After that, for example, the entire surface of the wafer W is polished by CMP, which is used in the conventional manufacturing of Cu wiring, to remove the upper part of the surface of the interlayer insulating film 202 of the Ru film 206 and the TiON film 205 to planarize ( Step 5, Figure 2(e)). According to this, Ru wiring 207 composed of TiON film 205 and Ru film 206 as the underlying film is formed in trench 203 and through hole 204. In addition, this planarization process is not limited to CMP. For example, as shown in the second embodiment described later, argon (Ar) plasma treatment may be performed. In addition, CMP may be performed after Ar plasma treatment. Ar plasma treatment is preferably Ar ion sputtering.

此種Ru配線207中，Ru膜206被作用有1.3GPa左右之拉伸應力。該情況下，如非專利文獻1般使用TiN膜作為Ru膜之底層膜時，於TiN膜亦和Ru同樣地被作用1.3GPa左右之拉伸應力。因此，使用TiN膜作為底層膜並於其上積層Ru膜時，兩者之應力合計使得Ru配線被施加較大的應力。配線之應力變大時，會有配線圖案之倒塌或起伏等變形之虞。特別是，隨著配線之微細化，配線間之間隔亦變短，更容易引起配線之變形。 In such Ru wiring 207, tensile stress of about 1.3 GPa is applied to the Ru film 206. In this case, when a TiN film is used as the underlying film of the Ru film as in Non-Patent Document 1, a tensile stress of about 1.3 GPa is applied to the TiN film similarly to Ru. Therefore, when a TiN film is used as an underlying film and a Ru film is laminated thereon, the sum of the stresses of the two causes the Ru wiring to be subjected to a relatively large stress. When the stress of the wiring increases, there is a risk of deformation such as collapse or undulation of the wiring pattern. In particular, with the miniaturization of wiring, the spacing between wirings has also become shorter, which is more likely to cause wiring deformation.

相對於此，本實施形態中使用的TiON膜205，和TiN膜比較拉伸方向之應力較小，因此可以縮小作用於與Ru膜之積層膜的應力，可以縮小應力引起的配線構造之變形。又，藉由調整膜中之氧(O)之量，可以控制膜之應力，可以有效抑制應力引起的配線構造之變形。 In contrast, the TiON film 205 used in this embodiment has less stress in the tensile direction than the TiN film, so the stress acting on the laminated film with the Ru film can be reduced, and the deformation of the wiring structure caused by the stress can be reduced. In addition, by adjusting the amount of oxygen (O) in the film, the stress of the film can be controlled, and the deformation of the wiring structure caused by the stress can be effectively suppressed.

具體而言，TiON膜205之O之量小於50at%，結晶構造為和TiN相同的立方晶，大小較TiN小者受到比較大的拉伸應力作用。相對於此，TiON膜之O之量為50at%以上時，結晶構造由立方晶變化為正交晶(orthorhombic crystal)，作用於膜的應力急速變小，按膜厚而成為壓縮應力。 Specifically, the amount of O in the TiON film 205 is less than 50 at%, and the crystal structure is the same cubic crystal as that of TiN, and those with a smaller size than TiN are subjected to larger tensile stress. In contrast, when the amount of O in the TiON film is 50 at% or more, the crystal structure changes from a cubic crystal to an orthorhombic crystal, and the stress acting on the film decreases rapidly and becomes a compressive stress depending on the film thickness.

圖3表示TiN膜及TiON膜(O：46at%及O：55at%)之膜厚與膜應力之關係。如該圖所示可知，相比於TiN膜，TiON膜基於O之摻入而具有作用於膜的應力之絕對值變小的傾向，特別是O在50at%以上之55at%中，膜厚薄而應力大致為0，膜厚大於10nm時成為壓縮應力。 Fig. 3 shows the relationship between the film thickness of the TiN film and the TiON film (O: 46 at% and O: 55 at%) and the film stress. As shown in the figure, compared to the TiN film, the TiON film has a tendency that the absolute value of the stress acting on the film becomes smaller due to the doping of O. In particular, the film thickness is thin and the film thickness is thinner when O is 50at% or more than 55at%. The stress is approximately zero, and when the film thickness exceeds 10 nm, it becomes a compressive stress.

因此，使用TiON膜作為底層膜，較好為將TiON膜之O之量設為50at%以上，如此則，和使用TiN膜之情況比較，作用於Ru膜之積層膜的應力變小，可以抑制膜應力引起的配線構造之變形。又，TiON膜的電阻比較低，適合作為配線的膜使用。 Therefore, when the TiON film is used as the underlying film, it is preferable to set the amount of O in the TiON film to 50at% or more. In this case, compared with the case of using the TiN film, the stress acting on the Ru film build-up film becomes smaller, which can suppress Deformation of the wiring structure caused by film stress. In addition, the resistance of the TiON film is relatively low, and it is suitable for use as a wiring film.

(TiON膜之成膜工程) (Film-forming project of TiON film)

接著，對作為Ru膜之底層膜而形成的TiON膜205之成膜工程進行說明。 Next, the film formation process of the TiON film 205 formed as the underlying film of the Ru film will be described.

TiON膜205之成膜較好是如下進行，亦即將晶圓W搬入腔室內，將重複複數次(X次)交互地進行Ti含有氣體之供給、氮化氣體之供給以及夾於其間的凈化之後，供給氧化劑，之後進行凈化的循環設為1循環，重複進行複數次(Y次)該循環的手法來形成。 The film formation of the TiON film 205 is preferably carried out as follows, that is, the wafer W is carried into the chamber, and the supply of the Ti-containing gas, the supply of the nitriding gas, and the purification sandwiched therebetween are repeated multiple times (X times) alternately. , The cycle of supplying oxidant and then purifying is set to 1 cycle, and the method is formed by repeating this cycle a plurality of times (Y times).

藉由採用此種成膜手法，藉由調整X之次數，可以容易控制膜中之氧(O)量，可以容易控制作用於膜的應力。O量，除了X之次數之調整以外，亦可以藉由氧化 劑之供給量、或氧化劑之供給時間、或該等之兩方之調整而調整。TiON膜205之厚度以1~10nm為較好，1~5nm為更好。 By adopting such a film forming technique, by adjusting the number of Xs, the amount of oxygen (O) in the film can be easily controlled, and the stress acting on the film can be easily controlled. In addition to the adjustment of the number of times of X, the amount of O can also be adjusted by the adjustment of the supply amount of the oxidant, the supply time of the oxidant, or both. The thickness of the TiON film 205 is preferably 1-10 nm, more preferably 1-5 nm.

以下，具體進行說明。 Hereinafter, a specific description will be given.

Ti含有氣體較佳為使用四氯化鈦(TiCl4)氣體。除TiCl4氣體以外，可以使用四(異丙)鈦(TTIP)、四溴化鈦(TiBr4)、四碘化鈦(TiI4)、四(乙基甲基氨基)鈦(TEMAT)、四(二甲基氨基)鈦(TDMAT)、四(二乙基氨基)鈦(TDEAT)等。又，氮化氣體較佳為使用NH3氣體。除NH3以外，可以使用甲基肼(MMH)。氧化劑可以使用O2氣體、O3氣體、H2O、NO2等之含氧氣體。將含氧氣體電漿化作為氧化劑使用亦可。凈化氣體可以使用N2氣體或Ar氣體等之稀有氣體。 The Ti-containing gas is preferably titanium tetrachloride (TiCl 4 ) gas. Except TiCl 4 gas, a tetra (isopropoxy) titanium (of TTIP), titanium tetrabromide (TiBr 4), titanium tetraiodide (TiI 4), tetrakis (ethylmethylamino) titanium (TEMAT), four (Dimethylamino)titanium (TDMAT), tetrakis(diethylamino)titanium (TDEAT), etc. In addition, it is preferable to use NH 3 gas as the nitriding gas. In addition to NH 3 , methylhydrazine (MMH) can be used. As the oxidant, oxygen-containing gas such as O 2 gas, O 3 gas, H 2 O, NO 2 and the like can be used. Plasma of oxygen-containing gas can also be used as an oxidant. The purge gas can use rare gases such as N 2 gas or Ar gas.

參照圖4之時序圖及圖5之流程圖說明TiON膜之成膜時之序列之一例。 An example of the sequence of forming the TiON film will be described with reference to the timing chart of FIG. 4 and the flowchart of FIG. 5.

首先，將Ti含有氣體亦即TiCl4氣體供給至腔室使晶圓W吸附TiCl4氣體(步驟S1)，接著，停止TiCl4氣體之供給，藉由凈化氣體之N2氣體對腔室內進行凈化(步驟S2)，接著，將氮化氣體例如NH3氣體供給至腔室，使與吸附的TiCl4反應而形成TiN(步驟S3)，接著，停止NH3氣體之供給，藉由N2氣體對腔室內進行凈化(步驟S4)，重複進行X次該等步驟S1~S4。之後，將氧化劑之O2氣體供給至腔室進行氧化處理(步驟S5)，接著對腔室內進行凈化(步驟S6)。將該循環設為1循環，藉由重複進行Y次該循環來形 成所要厚度之TiON膜。 First, Ti-containing gas, namely TiCl 4 gas, is supplied to the chamber to make the wafer W adsorb TiCl 4 gas (step S1), then, the supply of TiCl 4 gas is stopped, and the chamber is cleaned by N 2 gas, which is a purge gas. (Step S2) Next, a nitriding gas such as NH 3 gas is supplied to the chamber to react with the adsorbed TiCl 4 to form TiN (Step S3). Then, the supply of NH 3 gas is stopped, and the N 2 gas is used to The chamber is cleaned (step S4), and these steps S1 to S4 are repeated X times. After that, the O 2 gas of the oxidant is supplied to the chamber for oxidation treatment (step S5), and then the chamber is purified (step S6). This cycle is set to 1 cycle, and this cycle is repeated Y times to form a TiON film with a desired thickness.

此時之成膜狀態如圖6所示。如該圖所示，藉由重複進行X次步驟S1~S4來形成規定膜厚之單位TiN膜301，之後藉由進行步驟S5之氧化處理與步驟S6之凈化使單位TiN膜301氧化。將其設為1循環並藉由進行Y次該循環來形成規定膜厚之TiON膜。此時，藉由步驟S1~S4之重複次數亦即X可以調整TiON膜之氧含量。亦即減少X則氧化之頻度增加因而膜中之氧取入量增加，反之增加X則膜中之氧取入量減少。例如X為1時膜中之O量可以設為約62at%，X為9時膜中之O量可以設為約50at%。上述圖3之例之TiON膜係藉由此種手法成膜者，O為46at%之情況下X=12，O為55at%之情況下X=6。又，膜中之O量，除上述說明之X之次數之調整以外，亦可以藉由氧化劑之供給量、或氧化劑之供給時間或該等之兩方來調整。 The film formation state at this time is shown in Figure 6. As shown in the figure, steps S1 to S4 are repeated X times to form a unit TiN film 301 with a predetermined film thickness, and then the unit TiN film 301 is oxidized by performing the oxidation treatment of step S5 and the purification of step S6. This is set to 1 cycle, and this cycle is performed Y times to form a TiON film with a predetermined film thickness. At this time, the oxygen content of the TiON film can be adjusted by the number of repetitions of steps S1 to S4, that is, X. That is, if X is reduced, the frequency of oxidation increases and the amount of oxygen taken in the film increases. On the contrary, if X is increased, the amount of oxygen taken in the film decreases. For example, when X is 1, the amount of O in the film can be set to about 62 at%, and when X is 9, the amount of O in the film can be set to about 50 at%. The TiON film in the example of FIG. 3 is formed by this method, X=12 when O is 46 at%, and X=6 when O is 55 at%. In addition, the amount of O in the film can be adjusted by the amount of oxidant supplied, the time of oxidant supplied, or both, in addition to the adjustment of the number of times of X described above.

又，重複進行步驟S1~S4之後，藉由進行步驟S5、S6的循環之循環數Y可以調整膜厚。 In addition, after repeating steps S1 to S4, the film thickness can be adjusted by performing the number Y of cycles of steps S5 and S6.

步驟S5之氧化處理與步驟S6之凈化可以重複進行複數次(N次)。據此，可以提高氧化劑之供給性提高氧化效率。 The oxidation treatment of step S5 and the purification of step S6 can be repeated several times (N times). According to this, the supply of oxidant can be improved and the oxidation efficiency can be improved.

又，在TiON膜成膜時，為了調整TiN之氧化而於成膜之途中進行變更X等之調整亦可，又，除上述步驟S1~S6之基本步驟以外，追加基於強化氧化或氮化等目的之附加步驟亦可。 Also, during the formation of the TiON film, in order to adjust the oxidation of TiN, adjustments such as X may be changed during the film formation. In addition to the basic steps of the above steps S1 to S6, additional steps based on enhanced oxidation or nitridation may be added. Additional steps for the purpose are also possible.

又，Ti原料氣體使用TiCl4氣體，氮化氣體使 用NH3氣體，載氣．凈化氣體使用N2氣體，氧化劑使用O2氣體之情況下之成膜條件之較佳範圍如以下。 In addition, TiCl 4 gas is used as the Ti raw material gas , NH 3 gas is used as the nitriding gas, and the carrier gas is used. The preferable range of film forming conditions in the case of using N 2 gas as the purge gas and O 2 gas as the oxidant is as follows.

處理溫度(承載器(Susceptor)溫度)：300~500℃ Processing temperature (Susceptor temperature): 300~500℃

腔室內壓力：13.33~1333Pa(0.1~10Torr) Pressure in the chamber: 13.33~1333Pa(0.1~10Torr)

TiCl4氣體流量：10~300mL/min(sccm) TiCl 4 gas flow rate: 10~300mL/min(sccm)

NH3氣體流量：1000~10000mL/min(sccm) NH 3 gas flow rate: 1000~10000mL/min(sccm)

N2氣體流量：1000~30000mL/min(sccm) N 2 gas flow rate: 1000~30000mL/min(sccm)

步驟1~4之1次之供給時間：0.01~3sec Supply time for the first step of step 1~4: 0.01~3sec

O2氣體流量：10~3000mL/min(sccm) O 2 gas flow rate: 10~3000mL/min(sccm)

O2氣體供給時間：0.1~60sec O 2 gas supply time: 0.1~60sec

(Ru膜之成膜工程) (Film-forming project of Ru film)

接著，對Ru膜206之成膜工程進行說明。 Next, the film formation process of the Ru film 206 will be described.

Ru膜206較好是以釕羰基(Ru3(CO)12)為成膜原料藉由熱CVD進行成膜。據此，可以高階梯覆蓋性形成高純度且薄的Ru膜。此時之成膜條件，例如處理容器內之壓力為1.3~66.5Pa之範圍，成膜溫度(晶圓溫度)為130~250℃之範圍。Ru膜206，除釕羰基以外之其他成膜原料，例如可以使用(環戊二烯基)(2,4-二甲基戊二烯基)釕、雙(環戊二烯基)(2,4-甲基戊二烯基)釕、(2,4-二甲基戊二烯基)(乙基環戊二烯基)釕、雙(2,4-甲基戊二烯基)(乙基環戊二烯基)釕等釕之戊二烯基化合物進行成膜。又，於此所謂CVD係亦包含ALD。 The Ru film 206 is preferably formed by thermal CVD using ruthenium carbonyl (Ru 3 (CO) 12 ) as a film forming material. According to this, a high-purity and thin Ru film can be formed with high step coverage. The film forming conditions at this time, for example, the pressure in the processing container is in the range of 1.3 to 66.5 Pa, and the film forming temperature (wafer temperature) is in the range of 130 to 250°C. Ru film 206, other film-forming materials other than ruthenium carbonyl group, for example (cyclopentadienyl) (2,4-dimethylpentadienyl) ruthenium, bis(cyclopentadienyl) (2, 4-methylpentadienyl)ruthenium, (2,4-dimethylpentadienyl)(ethylcyclopentadienyl)ruthenium, bis(2,4-methylpentadienyl)(ethyl Cyclopentadienyl) ruthenium and other ruthenium pentadienyl compounds are formed into a film. In addition, the CVD system here also includes ALD.

[成膜系統] [Film forming system]

接著，針對用於第1實施形態的Ru配線的製造方法所使用的成膜系統之一例進行說明。 Next, an example of a film forming system used in the Ru wiring manufacturing method used in the first embodiment will be described.

圖7係概略地表示此種成膜系統之一例之水平斷面圖。 Fig. 7 is a horizontal sectional view schematically showing an example of such a film forming system.

成膜系統1具有：1個TiON膜成膜裝置11；1個冷卻裝置12；及2個Ru成膜裝置13。彼等分別透過柵閥G連接於平面形狀形成為七角形的真空搬送室10之4個壁部。真空搬送室10內透過真空泵進行排氣而保持於規定之真空度。 The film forming system 1 has: one TiON film forming device 11; one cooling device 12; and two Ru film forming devices 13. They are respectively connected to the four walls of the vacuum transfer chamber 10 formed in a heptagonal shape through a gate valve G. The inside of the vacuum transfer chamber 10 is evacuated by a vacuum pump and maintained at a predetermined degree of vacuum.

TiON膜成膜裝置11與Ru膜成膜裝置13之處理溫度有差，因此冷卻裝置12係對經由TiON膜成膜裝置11處理的晶圓W在搬送至Ru膜成膜裝置13之前將其暫時冷卻至室溫者，成為在保持於真空的腔室內設置有載置晶圓W的冷卻板之構造。又，TiON膜成膜裝置11及Ru膜成膜裝置13如後述說明。 The processing temperature of the TiON film forming device 11 and the Ru film forming device 13 is different, so the cooling device 12 temporarily transfers the wafer W processed by the TiON film forming device 11 to the Ru film forming device 13 When it is cooled to room temperature, it has a structure in which a cooling plate on which wafer W is placed is installed in a chamber maintained in a vacuum. In addition, the TiON film forming apparatus 11 and the Ru film forming apparatus 13 will be described later.

3個加載鎖定室(load-lock chamber)14透過柵閥G1連接於真空搬送室10之其他3個壁部。隔著加載鎖定室14而在真空搬送室10之相反側設置有大氣搬送室15。3個加載鎖定室14透過柵閥G2連接於大氣搬送室15。加載鎖定室14係在大氣搬送室15與真空搬送室10之間進行晶圓W搬送時，在大氣壓與真空之間進行壓力控制者。 The three load-lock chambers 14 are connected to the other three walls of the vacuum transfer chamber 10 through a gate valve G1. An atmosphere transfer chamber 15 is provided on the opposite side of the vacuum transfer chamber 10 with the load lock chamber 14 interposed therebetween. The three load lock chambers 14 are connected to the atmosphere transfer chamber 15 through a gate valve G2. The load lock chamber 14 is one that performs pressure control between the atmospheric pressure and the vacuum when the wafer W is transferred between the atmospheric transfer chamber 15 and the vacuum transfer chamber 10.

在大氣搬送室15之與加載鎖定室14之安裝壁部相反側之壁部具有3個晶圓傳送盒安裝埠16，用於安裝收納晶圓W的晶圓傳送盒(FOUP等)C。又，於大氣搬送室 15之側壁設置進行矽晶圓W之對準的對準腔室17。於大氣搬送室15內形成清淨空氣之下降流。 Three wafer transfer cassette mounting ports 16 are provided on the wall portion of the atmospheric transfer chamber 15 opposite to the mounting wall portion of the load lock chamber 14 for mounting a wafer transfer cassette (FOUP, etc.) C containing wafers W. In addition, an alignment chamber 17 for performing alignment of the silicon wafer W is provided on the side wall of the atmospheric transfer chamber 15. A downflow of clean air is formed in the atmospheric transfer chamber 15.

真空搬送室10內設置有搬送機構18。搬送機構18對TiON膜成膜裝置11、冷卻裝置12、Ru膜成膜裝置13、加載鎖定室14搬送晶圓W。搬送機構18具有可以獨立移動的2個搬送臂部19a、19b。 A conveying mechanism 18 is provided in the vacuum conveying chamber 10. The transport mechanism 18 transports the wafer W to the TiON film forming device 11, the cooling device 12, the Ru film forming device 13, and the load lock chamber 14. The conveyance mechanism 18 has two conveyance arm parts 19a, 19b which can move independently.

於大氣搬送室15內設有搬送機構20。搬送機構20對晶圓傳送盒C、加載鎖定室14、對準腔室17搬送晶圓W。 A conveying mechanism 20 is provided in the atmospheric conveying chamber 15. The transfer mechanism 20 transfers the wafer W to the wafer transfer cassette C, the load lock chamber 14, and the alignment chamber 17.

成膜系統1具有整體控制部21。整體控制部21具有：具有CPU(電腦)的主控制部，該CPU(電腦)對TiON膜成膜裝置11、冷卻裝置12、Ru膜成膜裝置13之各構成部、真空搬送室10之排氣機構或搬送機構18、加載鎖定室14之排氣機構或氣體供給機構、大氣搬送室15之搬送機構20、柵閥G、G1、G2之驅動系等進行控制；輸入裝置(鍵盤、滑鼠等)；輸出裝置(印表機等)；顯示裝置(顯示器等)；及記憶裝置(記憶媒體)。整體控制部21之主控制部，例如係依據內建於記憶裝置的記憶媒體或被設定於記憶裝置的記憶媒體上所記憶的處理配方(recipe)，使成膜系統1執行規定之動作。 The film formation system 1 has an overall control unit 21. The overall control unit 21 has: a main control unit with a CPU (computer), which controls the various components of the TiON film forming device 11, the cooling device 12, and the Ru film forming device 13, and the vacuum transfer chamber 10 The air mechanism or conveying mechanism 18, the exhaust mechanism or gas supply mechanism of the load lock chamber 14, the conveying mechanism 20 of the atmospheric conveying chamber 15, the drive system of the gate valves G, G1, G2, etc. are controlled; input device (keyboard, mouse Etc.); output devices (printers, etc.); display devices (displays, etc.); and memory devices (memory media). The main control unit of the overall control unit 21, for example, makes the film forming system 1 perform predetermined actions based on a storage medium built in a memory device or a processing recipe stored on a storage medium set in the memory device.

接著，對以上構成的成膜系統之動作進行說明。以下之處理動作係依據整體控制部21中之記憶媒體所記憶的處理配方被執行。 Next, the operation of the above-structured film forming system will be described. The following processing actions are executed according to the processing recipe stored in the storage medium in the overall control unit 21.

首先，藉由搬送機構20由與大氣搬送室15連 接的晶圓傳送盒C取出晶圓W，打開任一之加載鎖定室14之柵閥G2將該晶圓W搬入該加載鎖定室14內。關閉柵閥G2之後，對加載鎖定室14內進行真空排氣。 First, the wafer W is taken out from the wafer transfer cassette C connected to the atmospheric transfer chamber 15 by the transfer mechanism 20, and the gate valve G2 of any load lock chamber 14 is opened to transfer the wafer W into the load lock chamber 14. After closing the gate valve G2, the load lock chamber 14 is evacuated.

在該加載鎖定室14成為規定之真空度的時點打開柵閥G1，藉由真空搬送室10內之搬送機構18之搬送臂部19a、19b之任一由加載鎖定室14取出矽晶圓W。 The gate valve G1 is opened when the load lock chamber 14 reaches a predetermined degree of vacuum, and the silicon wafer W is taken out from the load lock chamber 14 by any of the transfer arms 19a and 19b of the transfer mechanism 18 in the vacuum transfer chamber 10.

接著，打開TiON膜成膜裝置11之柵閥G，將搬送機構18之任一之搬送臂部所保持的矽晶圓W搬入TiON膜成膜裝置11，關閉柵閥G，藉由TiON膜成膜裝置11進行TiON膜之成膜。 Next, the gate valve G of the TiON film forming apparatus 11 is opened, the silicon wafer W held by any one of the conveying arms of the conveying mechanism 18 is transferred into the TiON film forming apparatus 11, the gate valve G is closed, and the TiON film forming The film device 11 forms a TiON film.

TiON膜之成膜處理結束後，打開柵閥G，藉由搬送機構18之任一之搬送臂部搬出晶圓W，打開冷卻裝置12之柵閥G將晶圓W搬入其中。藉由冷卻裝置12使晶圓W冷卻之後，藉由搬送機構18之任一之搬送臂部將晶圓W搬出，打開任一之Ru膜成膜裝置13之柵閥G將晶圓W搬入其中。接著，藉由Ru膜成膜裝置13進行Ru膜之成膜。 After the TiON film formation process is completed, the gate valve G is opened, the wafer W is carried out by any of the transport arms of the transport mechanism 18, and the gate valve G of the cooling device 12 is opened to carry the wafer W into it. After the wafer W is cooled by the cooling device 12, the wafer W is transported out by any of the transport arms of the transport mechanism 18, and the gate valve G of any Ru film forming device 13 is opened to transport the wafer W into it . Next, the Ru film is formed by the Ru film forming apparatus 13.

Ru膜之成膜被進行之後，打開該Ru膜成膜裝置13之柵閥G，藉由搬送機構18之搬送臂部19a、19b之任一，搬出其中之晶圓W，接著，打開任一之加載鎖定室14之柵閥G1，將搬送臂部上之矽晶圓W搬入該加載鎖定室14內。接著，使該加載鎖定室14內回復大氣，打開柵閥G2，藉由搬送機構20使加載鎖定室14內之矽晶圓W回到晶圓傳送盒C。 After the formation of the Ru film is performed, the gate valve G of the Ru film formation device 13 is opened, and the wafer W therein is transported by any one of the transport arms 19a, 19b of the transport mechanism 18, and then either The gate valve G1 of the load lock chamber 14 carries the silicon wafer W on the transfer arm into the load lock chamber 14. Next, the load lock chamber 14 is returned to the atmosphere, the gate valve G2 is opened, and the silicon wafer W in the load lock chamber 14 is returned to the wafer transfer box C by the transfer mechanism 20.

針對複數個矽晶圓W同時並行進行以上之處 理，結束規定片數之晶圓W之TiON膜之成膜處理及Ru膜之成膜處理。 The above process is performed in parallel for a plurality of silicon wafers W at the same time, and the film forming process of the TiON film and the film forming process of the Ru film of the predetermined number of wafers W are ended.

如以上般至Ru膜成膜結束之後，必要時進行退火之後，將晶圓傳送盒C搬送至CMP裝置，進行晶圓W之CMP處理。又，退火可於成膜系統1內之任一之模組進行，亦可以藉由另設置的退火裝置進行。 As described above, after the Ru film formation is completed and annealing is performed if necessary, the wafer transfer cassette C is transported to the CMP device, and the CMP processing of the wafer W is performed. In addition, annealing can be performed in any module in the film forming system 1, or can be performed by an annealing device provided separately.

(TiON膜成膜裝置) (TiON film forming device)

接著，對上述成膜系統1之TiON膜成膜裝置11進行說明。 Next, the TiON film forming apparatus 11 of the above-mentioned film forming system 1 will be described.

圖8係概略地表示TiON膜成膜裝置11之一例之斷面圖。 FIG. 8 is a cross-sectional view schematically showing an example of the TiON film forming apparatus 11.

該TiON膜成膜裝置11具有氣密式構成的略圓筒狀之腔室31。在腔室31之內部配置由AlN等之陶瓷構成的承載器32，該承載器32作為將被處理基板亦即晶圓W支撐為水平之平台，且透過設於腔室31之中央下部的圓筒狀之支撐構件33進行支撐之狀態下被配置。在承載器32之外緣部設置將晶圓W導引之導環34。又，於承載器32填埋有加熱器35，該加熱器35藉由加熱器電源36之供電而將被處理基板亦即晶圓W加熱至規定之溫度。又，於承載器32設有將晶圓W支撐並使其升降之複數個晶圓升降銷(未圖示)，該晶圓升降銷相對於承載器32之表面可以突出/沒入。 The TiON film forming apparatus 11 has a substantially cylindrical chamber 31 formed in an airtight manner. A carrier 32 made of ceramics such as AlN is arranged inside the chamber 31. The carrier 32 serves as a platform that supports the substrate to be processed, that is, the wafer W in a horizontal position, and passes through a circle provided in the lower center of the chamber 31. The cylindrical support member 33 is arranged in a supported state. A guide ring 34 for guiding the wafer W is provided at the outer edge of the carrier 32. In addition, a heater 35 is embedded in the carrier 32, and the heater 35 is powered by the heater power source 36 to heat the substrate to be processed, that is, the wafer W to a predetermined temperature. In addition, the carrier 32 is provided with a plurality of wafer lift pins (not shown) that support and lift the wafer W, and the wafer lift pins can protrude/submerge relative to the surface of the carrier 32.

於腔室31之天壁31a設有噴氣頭40。噴氣頭40 具有底座構件41與噴氣板42，噴氣板42之外周部透過中間構件43被螺旋固定於底座構件41。噴氣板42形成為凸緣狀，於其內部形成有凹部，在底座構件41與噴氣板42之間形成氣體擴散空間44。底座構件41於其外周形成凸緣部41a，該凸緣部41a被安裝於腔室31之天壁31a。於噴氣板42形成有複數個氣體吐出孔45，於底座構件41形成2個氣體導入孔46及47。 An air jet 40 is provided on the sky wall 31 a of the chamber 31. The air blowing head 40 has a base member 41 and an air blowing plate 42, and the outer periphery of the air blowing plate 42 is screwed to the base member 41 through the intermediate member 43. The air blowing plate 42 is formed in a flange shape, a recess is formed in the inside thereof, and a gas diffusion space 44 is formed between the base member 41 and the air blowing plate 42. The base member 41 has a flange portion 41 a formed on its outer periphery, and the flange portion 41 a is attached to the sky wall 31 a of the cavity 31. A plurality of gas discharge holes 45 are formed in the jet plate 42, and two gas introduction holes 46 and 47 are formed in the base member 41.

氣體供給機構50具有：供給作為Ti含有氣體之TiCl4氣體的TiCl4氣體供給源51；及供給作為氮化氣體之NH3氣體的NH3氣體供給源53。TiCl4氣體供給源51與TiCl4氣體供給管52連接，該TiCl4氣體供給管52與第1氣體導入孔46連接。NH3氣體供給源53與NH3氣體供給管54連接，該NH3氣體供給管54與第2氣體導入孔47連接。 The gas supply mechanism 50 has: a Ti-containing feed gas of TiCl 4 gas supply source 51 TiCl 4 gas; and the supply of the NH 3 gas nitriding gas of NH 3 gas supply source 53. The TiCl 4 gas supply source 51 is connected to a TiCl 4 gas supply pipe 52, and the TiCl 4 gas supply pipe 52 is connected to the first gas introduction hole 46. The NH 3 gas supply source 53 is connected to the NH 3 gas supply pipe 54, and the NH 3 gas supply pipe 54 is connected to the second gas introduction hole 47.

TiCl4氣體供給管52與N2氣體供給管56連接，由N2氣體供給源55將N2氣體作為載氣或凈化氣體供給至該N2氣體供給管56。 TiCl 4 gas supply pipe 52 and the N 2 gas supply pipe 56 is connected to the N 2 gas supply source 55 supplying N 2 gas as a carrier gas or purge gas to the N 2 gas supply pipe 56.

NH3氣體供給管54與氧化劑供給管58連接，由氧化劑供給源57將作為氧化劑的上述說明之含氧氣體供給至該氧化劑供給管58。亦可以將含氧氣體電漿化。此時，由氧化劑供給源57事先將含氧氣體電漿化而供給亦可，亦可以使含氧氣體在噴氣頭40內實施電漿化亦可。NH3氣體供給管54與N2氣體供給管60連接，由N2氣體供給源59將作為載氣或凈化氣體的N2氣體供給至該N2氣體供給管60。 The NH 3 gas supply pipe 54 is connected to the oxidant supply pipe 58, and the above-described oxygen-containing gas as the oxidant is supplied to the oxidant supply pipe 58 from the oxidant supply source 57. It is also possible to plasmaize oxygen-containing gas. At this time, the oxygen-containing gas may be plasma-formed and supplied by the oxidant supply source 57 in advance, or the oxygen-containing gas may be plasma-formed in the jet head 40. NH 3 gas supply tube 54 and the N 2 gas supply pipe 60 is connected to the N 2 gas supply source 59 is supplied to the gas supply pipe 60 N 2 N 2 as a carrier gas or purge gas.

於TiCl4氣體供給管52、NH3氣體供給管54、 氧化劑供給管58、N2氣體供給管56、60設置隔著質量流量控制器63及質量流量控制器63的2個閥64。 The TiCl 4 gas supply pipe 52, the NH 3 gas supply pipe 54, the oxidant supply pipe 58, and the N 2 gas supply pipes 56 and 60 are provided with two valves 64 with a mass flow controller 63 and a mass flow controller 63 interposed therebetween.

因此，來自TiCl4氣體供給源51之TiCl4氣體及來自N2氣體供給源55之N2氣體，係透過TiCl4氣體供給管52由噴氣頭40之第1氣體導入孔46到達噴氣頭40內之氣體擴散空間44，又，來自NH3氣體供給源53之NH3氣體、來自氧化劑供給源57之氧化劑及來自N2氣體供給源59之N2氣體，係透過NH3氣體供給管54由噴氣頭40之第2氣體導入孔47到達噴氣頭40內之氣體擴散空間44，彼等之氣體由噴氣板42之氣體吐出孔45向腔室31內吐出。又，噴氣頭40亦可以是單獨地將TiCl4氣體與NH3氣體供給至腔室31內的後混合型。 Thus, 51 of the TiCl 4 gas and N 2 gas is supplied from a source 55 of N 2 gas from the TiCl 4 gas supply source line through the TiCl 4 gas supply pipe 52 to the jet head 40 by the first gas introducing hole jet head 40 of 46 the gas diffusion space 44, and, from the NH 3 gas supply source 53 of the NH 3 gas, the oxidant from the oxidant supply 57 of and 59 of the N 2 gas from the gas supply source N, Department through the NH 3 gas supply tube 54 by a jet The second gas introduction hole 47 of the head 40 reaches the gas diffusion space 44 in the jet head 40, and their gas is ejected into the chamber 31 through the gas ejection hole 45 of the jet plate 42. In addition, the jet head 40 may be a post-mix type in which TiCl 4 gas and NH 3 gas are separately supplied into the chamber 31.

於噴氣頭40之底座構件41設有對噴氣頭40進行加熱之加熱器75。該加熱器75與加熱器電源76連接，藉由加熱器電源76對加熱器75供電而將噴氣頭40加熱至所要之溫度。在底座構件41之上部所形成的凹部設有提升加熱器75之加熱效率的隔熱構件77。 The base member 41 of the jet head 40 is provided with a heater 75 for heating the jet head 40. The heater 75 is connected to a heater power source 76, and the heater power source 76 supplies power to the heater 75 to heat the jet head 40 to a desired temperature. The recess formed in the upper part of the base member 41 is provided with a heat insulating member 77 that improves the heating efficiency of the heater 75.

在腔室31之底壁31b之中央部形成圓形之穴65，在底壁31b以覆蓋該穴65的方式設置向下方突出的排氣室66。排氣室66之側面與排氣管67連接，該排氣管67與排氣裝置68連接。因此，藉由該排氣裝置68之動作可以將腔室31內減壓至規定之真空度。 A circular cavity 65 is formed in the center of the bottom wall 31b of the cavity 31, and an exhaust chamber 66 protruding downward is provided on the bottom wall 31b so as to cover the cavity 65. The side surface of the exhaust chamber 66 is connected to an exhaust pipe 67, and the exhaust pipe 67 is connected to an exhaust device 68. Therefore, by the operation of the exhaust device 68, the pressure in the chamber 31 can be reduced to a predetermined degree of vacuum.

在腔室31之側壁設置在與真空搬送室10之間進行晶圓W之搬出入的搬出入口72，如上述說明，該搬出 入口72藉由柵閥G進行開關。 The side wall of the chamber 31 is provided with a carry-out inlet 72 for carrying in and out of the wafer W between the chamber 31 and the vacuum transfer chamber 10. As described above, the carrying-out inlet 72 is opened and closed by the gate valve G.

TiON膜成膜裝置11具有對該各構成部例如加熱器電源36及76、閥64、質量流量控制器63等進行控制的控制部80。控制部80透過整體控制部21之指令對各構成部進行控制。 The TiON film forming apparatus 11 has a control unit 80 that controls the respective components such as heater power supplies 36 and 76, valves 64, mass flow controller 63, and the like. The control unit 80 controls each component through instructions from the overall control unit 21.

如此構成的TiON膜成膜裝置11中，打開柵閥G，由真空搬送室10藉由搬送機構18透過搬出入口72將晶圓W搬入腔室31內，使載置於承載器32。承載器32係藉由加熱器35加熱至規定溫度，晶圓W被載置於承載器32的狀態下藉由對腔室31內供給N2氣體而對晶圓W進行加熱，在晶圓W之溫度大致穩定之時點開始TiON膜之成膜。 In the TiON film forming apparatus 11 configured as described above, the gate valve G is opened, and the vacuum transfer chamber 10 uses the transfer mechanism 18 to transfer the wafer W into the chamber 31 through the transfer inlet 72 and place it on the carrier 32. The carrier 32 is heated to a predetermined temperature by the heater 35, and the wafer W is heated by supplying N 2 gas into the chamber 31 while the wafer W is placed on the carrier 32, and the wafer W is heated on the wafer W. When the temperature is approximately stable, the formation of the TiON film begins.

首先，由TiCl4氣體供給源51將TiCl4氣體供給至腔室31使TiCl4氣體被吸附於晶圓W，接著，停止TiCl4氣體之供給，藉由N2氣體對腔室31內進行凈化，接著，由NH3氣體供給源53將NH3氣體供給至腔室31，使與吸附的TiCl4反應形成TiN，接著，停止NH3氣體之供給，藉由N2氣體對腔室31內進行凈化，重複X次彼等之步驟。之後，由氧化劑供給源57將氧化劑(例如O2氣體)供給至腔室31進行氧化處理，接著對腔室31內進行凈化。以該循環設為1循環，重複進行Y次該循環而形成規定膜厚之TiON膜。 First, a TiCl 4 gas supply source 51 supplies TiCl 4 gas is supplied to the chamber 31 causes the TiCl 4 gas is adsorbed on the wafer W, and then, stops the supply of the TiCl 4 gas, N 2 gas by purging the inside of the chamber 31 Next, the NH 3 gas is supplied to the chamber 31 from the NH 3 gas supply source 53 to react with the adsorbed TiCl 4 to form TiN. Then, the supply of the NH 3 gas is stopped, and the N 2 gas is used to perform Purify, repeat their steps X times. After that, an oxidant (for example, O 2 gas) is supplied from the oxidant supply source 57 to the chamber 31 for oxidation treatment, and then the inside of the chamber 31 is purified. Let this cycle be one cycle, and repeat this cycle Y times to form a TiON film with a predetermined film thickness.

此時，如上述說明，藉由控制X之次數等，來控制TiON膜之O量，而可以控制作用於TiON膜的應力。 At this time, as described above, by controlling the number of times of X, etc., the amount of O in the TiON film can be controlled, and the stress acting on the TiON film can be controlled.

成膜處理結束後，對腔室31內進行凈化，打開柵閥G，藉由搬送機構18透過搬出入口72搬出晶圓W。 After the film formation process is completed, the inside of the chamber 31 is cleaned, the gate valve G is opened, and the wafer W is transported out through the transport inlet 72 by the transport mechanism 18.

(Ru膜成膜裝置) (Ru film forming device)

接著，對上述成膜系統1之Ru膜成膜裝置13進行說明。 Next, the Ru film forming apparatus 13 of the above-mentioned film forming system 1 will be described.

圖9係概略地表示Ru膜成膜裝置13之一例之斷面圖。 FIG. 9 is a cross-sectional view schematically showing an example of the Ru film forming apparatus 13.

該Ru膜成膜裝置13具有氣密構成的略圓筒狀之腔室101，其中用於將被處理基板亦即晶圓W支撐於水平狀之承載器102，係被設於腔室101之底壁中央的圓筒狀之支撐構件103支撐而配置。於承載器102填埋有加熱器105，該加熱器105透過加熱器電源106之供電而將被處理基板亦即晶圓W加熱至規定之溫度。又，於承載器102設有相對於承載器102之表面可以突出/沒入，用於支撐晶圓W並使其升降之複數個晶圓升降銷(未圖示)。 The Ru film forming apparatus 13 has a gas-tight, substantially cylindrical chamber 101, and a carrier 102 for supporting the substrate to be processed, that is, the wafer W, on a horizontal carrier 102 is provided in the chamber 101. The cylindrical support member 103 in the center of the bottom wall is supported and arranged. A heater 105 is embedded in the carrier 102, and the heater 105 heats the substrate to be processed, that is, the wafer W to a predetermined temperature through the power supply of the heater power supply 106. In addition, the carrier 102 is provided with a plurality of wafer lifting pins (not shown) that can protrude or sink relative to the surface of the carrier 102 to support and lift the wafer W.

於腔室101之天壁以與承載器102對置的方式設有噴氣頭110，該噴氣頭110將藉由CVD進行Ru膜之成膜用的處理氣體以噴氣狀導入腔室101內。噴氣頭110係將後述之氣體供給機構130所供給的氣體吐出至腔室101內者，於其上部形成有導入氣體之氣體導入口111。又，於噴氣頭110之內部形成有氣體擴散空間112，於噴氣頭110之底面形成有與氣體擴散空間112連通的複數個氣體吐出孔113。 A jet head 110 is provided on the sky wall of the chamber 101 so as to face the susceptor 102, and the jet head 110 introduces the processing gas for forming the Ru film by CVD into the chamber 101 in a jet form. The jet head 110 ejects the gas supplied by the gas supply mechanism 130 described later into the chamber 101, and a gas inlet 111 for introducing the gas is formed in the upper part thereof. In addition, a gas diffusion space 112 is formed inside the jet head 110, and a plurality of gas discharge holes 113 communicating with the gas diffusion space 112 are formed on the bottom surface of the jet head 110.

於腔室101之底壁設置向下方突出的排氣室121。排氣室121之側面與排氣配管122連接，該排氣配管122與具有真空泵或壓力控制閥等的排氣裝置123連接。藉 由該排氣裝置123之動作可以將腔室101內設為規定之減壓(真空)狀態。 An exhaust chamber 121 protruding downward is provided on the bottom wall of the chamber 101. The side surface of the exhaust chamber 121 is connected to an exhaust pipe 122, and the exhaust pipe 122 is connected to an exhaust device 123 having a vacuum pump, a pressure control valve, or the like. By the operation of the exhaust device 123, the inside of the chamber 101 can be brought into a predetermined reduced pressure (vacuum) state.

於腔室101之側壁設有在與真空搬送室10之間進行晶圓W之搬出入之搬出入口127，搬出入口127係藉由柵閥G進行開關。 The side wall of the chamber 101 is provided with a carry-out inlet 127 for carrying in and out of the wafer W between the chamber 101 and the vacuum transfer chamber 10, and the carrying-out inlet 127 is opened and closed by a gate valve G.

氣體供給機構130具有收容作為固體狀成膜原料S的釕羰基(Ru3(CO)12)之成膜原料容器131。於成膜原料容器131之周圍設有加熱器132。於成膜原料容器131被***有由上方供給載氣的載氣供給配管133。載氣供給配管133與供給載氣的載氣供給源134連接。載氣可以使用Ar氣體或N2氣體等之惰性氣體、或CO氣體。又，於成膜原料容器131被***有成膜原料氣體供給配管135。該成膜原料氣體供給配管135連接於噴氣頭110之氣體導入口111。因此，由載氣供給源134透過載氣供給配管133將載氣吹入成膜原料容器131內，於成膜原料容器131內已昇華的釕羰基(Ru3(CO)12)氣體被載氣搬送並經由成膜原料氣體供給配管135及噴氣頭110被供給至腔室101內。於載氣供給配管133設有流量控制用之質量流量控制器136及其前後之閥137a、137b。又，於氣體供給配管135設有把握釕羰基(Ru3(CO)12)之氣體量的流量計138及其前後之閥139a、139b。 The gas supply mechanism 130 has a film-forming material container 131 containing ruthenium carbonyl (Ru 3 (CO) 12 ) as a solid film-forming material S. A heater 132 is provided around the film-forming raw material container 131. A carrier gas supply pipe 133 for supplying carrier gas from above is inserted into the film-forming raw material container 131. The carrier gas supply pipe 133 is connected to a carrier gas supply source 134 that supplies carrier gas. As the carrier gas, inert gas such as Ar gas or N 2 gas, or CO gas can be used. In addition, a film-forming raw material gas supply pipe 135 is inserted into the film-forming raw material container 131. The film forming source gas supply pipe 135 is connected to the gas inlet 111 of the jet head 110. Therefore, the carrier gas is blown into the film-forming raw material container 131 from the carrier gas supply source 134 through the carrier gas supply pipe 133, and the sublimated ruthenium carbonyl (Ru 3 (CO) 12 ) gas in the film-forming raw material container 131 is carried by the carrier gas. It is transported and supplied into the chamber 101 via the film-forming source gas supply pipe 135 and the jet head 110. The carrier gas supply pipe 133 is provided with a mass flow controller 136 for flow control and its front and rear valves 137a and 137b. In addition, the gas supply pipe 135 is provided with a flow meter 138 for grasping the amount of gas of ruthenium carbonyl (Ru 3 (CO) 12 ) and its front and rear valves 139a and 139b.

氣體供給機構130另外具有：稀釋氣體供給源144；及與稀釋氣體供給源144連接的稀釋氣體供給配管145。稀釋氣體供給配管145之另一端連接於成膜原料氣體 供給配管135。稀釋氣體係將成膜原料氣體進行稀釋之氣體，稀釋氣體例如可以使用Ar氣體、N2氣體等之惰性氣體。稀釋氣體亦發揮對成膜原料氣體供給配管135或腔室101之殘留氣體進行凈化的凈化氣體之機能。於稀釋氣體供給配管145設有流量控制用之質量流量控制器146及其前後之閥147a、147b。 The gas supply mechanism 130 additionally includes a dilution gas supply source 144 and a dilution gas supply pipe 145 connected to the dilution gas supply source 144. The other end of the dilution gas supply pipe 145 is connected to the film formation source gas supply pipe 135. The diluent gas system is a gas that dilutes the film-forming raw material gas. For the diluent gas, for example, inert gas such as Ar gas and N 2 gas can be used. The dilution gas also functions as a purge gas for purifying the remaining gas in the film-forming material gas supply pipe 135 or the chamber 101. The dilution gas supply pipe 145 is provided with a mass flow controller 146 for flow control and its front and rear valves 147a and 147b.

Ru膜成膜裝置13具有對該各構成部例如加熱器電源106、排氣裝置123、氣體供給機構130之閥、質量流量控制器等之各構成部進行控制之控制部150。控制部150藉由整體控制部21之指令對各構成部進行控制。 The Ru film forming apparatus 13 has a control unit 150 that controls each of the components such as the heater power supply 106, the exhaust device 123, the valve of the gas supply mechanism 130, and the mass flow controller. The control unit 150 controls each constituent unit by commands from the overall control unit 21.

如此構成的Ru膜成膜裝置13中，打開柵閥G由搬出入口127將晶圓W搬入腔室101內，使載置於承載器102上。承載器102係藉由加熱器105被加熱至規定溫度例如130~250℃之範圍內之溫度，藉由將惰性氣體導入腔室101內來使晶圓W被加熱。藉由排氣裝置123之真空泵對腔室101內進行排氣，將腔室101內之壓力調整為2~67Pa。 In the Ru film forming apparatus 13 configured as described above, the gate valve G is opened to carry the wafer W into the chamber 101 from the carry-out inlet 127 and place it on the carrier 102. The susceptor 102 is heated by the heater 105 to a predetermined temperature, for example, a temperature in the range of 130 to 250° C., and the wafer W is heated by introducing an inert gas into the chamber 101. The chamber 101 is exhausted by the vacuum pump of the exhaust device 123, and the pressure in the chamber 101 is adjusted to 2~67Pa.

接著，打開閥137a、137b透過載氣供給配管133將載氣吹入成膜原料容器131，在成膜原料容器131內經由加熱器132之加熱昇華而生成的Ru3(CO)12氣體被載氣搬送，透過成膜原料氣體供給配管135及噴氣頭110被導入至腔室101內。據此，在晶圓W表面沉積Ru3(CO)12氣體被熱分解而生成的Ru，形成具有規定之膜厚的Ru膜。 Next, the valves 137a and 137b are opened and the carrier gas is blown into the film-forming raw material container 131 through the carrier gas supply pipe 133, and the Ru 3 (CO) 12 gas generated by the heating and sublimation of the heater 132 in the film-forming raw material container 131 is carried. The gas is transported and introduced into the chamber 101 through the film-forming source gas supply pipe 135 and the jet head 110. Accordingly, on the surface of the wafer W, Ru generated by thermal decomposition of the Ru 3 (CO) 12 gas is deposited to form a Ru film having a predetermined film thickness.

成膜處理結束後，對腔室101內進行凈化，打開柵閥G，藉由搬送機構18透過搬出入口127將晶圓W搬 出。 After the film formation process is completed, the inside of the chamber 101 is cleaned, the gate valve G is opened, and the wafer W is transported out through the transport inlet 127 by the transport mechanism 18.

<第2實施形態> <Second Embodiment>

接著，對本發明第2實施形態進行說明。 Next, the second embodiment of the present invention will be described.

[第2實施形態的Ru配線的製造方法] [Method for manufacturing Ru wiring of the second embodiment]

首先，對本發明第2實施形態的Ru配線的製造方法進行說明。圖10係概略地表示本發明第2實施形態的Ru配線的製造方法之流程圖，圖11係其工程斷面圖。 First, the manufacturing method of Ru wiring according to the second embodiment of the present invention will be described. Fig. 10 is a flowchart schematically showing a manufacturing method of Ru wiring according to the second embodiment of the present invention, and Fig. 11 is a sectional view of the process.

第2實施形態的Ru配線的製造方法之基本的工程係和第1實施形態同樣，和第1實施形態不同點在於：底層膜不限定於TiON膜，及平坦化工程係藉由Ar離子濺鍍進行。 The basic process system of the Ru wiring manufacturing method of the second embodiment is the same as that of the first embodiment, but differs from the first embodiment in that the underlying film is not limited to the TiON film, and the planarization process is performed by Ar ion sputtering. conduct.

首先，和第1實施形態的步驟1同樣，準備在具有下部構造的基體201之上形成由SiO2膜、低介電常數(Low-k)膜(SiCO、SiCOH等)等構成的層間絕緣膜202，於層間絕緣膜202以規定圖案形成溝槽203，在溝槽203之底部與基體201上之下部構造(未圖示)之間以規定間隔形成有通孔204的晶圓W(步驟11，圖11(a))。 First, as in Step 1 of the first embodiment , an interlayer insulating film composed of SiO 2 film, Low-k film (SiCO, SiCOH, etc.) is prepared on the substrate 201 with a lower structure. 202. A trench 203 is formed in a predetermined pattern in the interlayer insulating film 202, and a wafer W with through holes 204 is formed at a predetermined interval between the bottom of the trench 203 and the upper and lower structures (not shown) of the base 201 (step 11 , Figure 11(a)).

接著，必要時，對該晶圓W進行作為前處理的脫氣(degas)製程或前洗淨(預清洗(pre-clean)製程之後，為了與Ru膜之良好密接性目的而在包含溝槽203或通孔204之表面的整面形成底層膜211之成膜(步驟12，圖11(b))。 Then, if necessary, the wafer W is subjected to a degassing process or a pre-cleaning (pre-cleaning) process as a pre-treatment, and a groove is included for the purpose of good adhesion with the Ru film. 203 or the entire surface of the through hole 204 is formed to form the underlying film 211 (step 12, FIG. 11(b)).

底層膜211只要能與Ru膜具有良好密接性者即 可，可以適合使用習知Cu配線形成時作為Cu膜之阻障膜使用的TiN膜、Ta膜、TaN膜、TaAlN膜及第1實施形態使用的TiON膜等。底層膜211之厚度以0.1~10nm為較好，0.5~5nm為更好。底層膜可以藉由ALD、CVD、離子化PVD(Ionized physical vapor deposition；iPVD)等成膜。TiN膜、TaN膜、TiON膜藉由ALD成膜為較好，Ta膜則藉由iPVD成膜為較好。 As long as the underlying film 211 has good adhesion to the Ru film, TiN film, Ta film, TaN film, TaAlN film and the first embodiment can be suitably used as a barrier film of Cu film when forming Cu wiring. Used TiON film, etc. The thickness of the underlying film 211 is preferably 0.1-10 nm, more preferably 0.5-5 nm. The underlying film can be formed by ALD, CVD, ionized physical vapor deposition (iPVD), etc. The TiN film, TaN film, and TiON film are preferably formed by ALD, and the Ta film is preferably formed by iPVD.

之後，例如藉由化學蒸鍍法(CVD)形成Ru膜206而在溝槽203及通孔204內填埋Ru膜206(步驟13，圖11(c))。此時之Ru膜之成膜係和第1實施形態的步驟3同樣地進行。 After that, the Ru film 206 is formed by, for example, chemical vapor deposition (CVD), and the Ru film 206 is buried in the trench 203 and the through hole 204 (Step 13, FIG. 11(c)). The Ru film formation system at this time is performed in the same manner as in Step 3 of the first embodiment.

Ru膜206之形成後，和第1實施形態同樣地，必要時進行退火處理(步驟14，圖11(d))，使Ru膜206穩定化。 After the formation of the Ru film 206, as in the first embodiment, annealing treatment is performed if necessary (step 14, FIG. 11(d)) to stabilize the Ru film 206.

之後，藉由包含Ar電漿處理之除去處理，將表面之Ru膜206及底層膜211除去使平坦化(步驟15，圖11(e))。據此而在溝槽203及通孔204內形成由底層膜211及Ru膜206構成的Ru配線212。 After that, by a removal treatment including Ar plasma treatment, the Ru film 206 and the underlying film 211 on the surface are removed and planarized (Step 15, FIG. 11(e)). Accordingly, the Ru wiring 212 composed of the underlying film 211 and the Ru film 206 is formed in the trench 203 and the through hole 204.

習知Cu配線中，在溝槽填埋Cu膜之後，將表面之阻障膜或Cu膜除去而進行平坦化時係使用CMP。但是，Ru係貴金屬離子化傾向較低，因此Ru膜難以藉由CMP除去，在溝槽填埋Ru膜之後之平坦化若僅藉由CMP進行則需要花大量時間。 In the conventional Cu wiring, after the trench is filled with the Cu film, the barrier film or the Cu film on the surface is removed for planarization using CMP. However, the Ru-based noble metal has a low ionization tendency, so the Ru film is difficult to remove by CMP, and it takes a lot of time to perform planarization after the trench is filled with the Ru film only by CMP.

於此，本實施形態中，平坦化處理係使用Ar 電漿處理。藉由Ar電漿可以有效除去表面之Ru膜206及底層膜211。 Here, in this embodiment, Ar plasma treatment is used for the planarization treatment. The Ru film 206 and the underlying film 211 on the surface can be effectively removed by Ar plasma.

Ar電漿處理以Ar離子濺鍍為較佳。Ar離子濺鍍係在保持於真空的腔室內生成氬(Ar)電漿，將電漿中之Ar離子引入配置於腔室內的晶圓，藉由此時之Ar離子之衝撃以物理方式除去對象物。Ar離子之濺鍍效果高，因此可以容易除去Ru膜等，可於短時間進行平坦化處理。 Ar plasma treatment is preferably Ar ion sputtering. Ar ion sputtering generates argon (Ar) plasma in a chamber kept in a vacuum. Ar ions in the plasma are introduced into the wafers placed in the chamber, and the object is physically removed by the impact of Ar ions. Things. The sputtering effect of Ar ion is high, so the Ru film can be easily removed, and the planarization treatment can be performed in a short time.

又，上述專利文獻2揭示在Ru膜之成膜之後進行平坦化之例，該例中除CMP以外亦揭示回蝕刻(Etch-back)法，但Ru膜作為SN電極使用，關於製造Ru配線之平坦化處理則未記載。其他，再公表專利97/35341號公報雖記載藉由Ar離子濺鍍對Ru進行乾蝕刻，但其揭示者為形成上部金屬電極之異方性蝕刻，係和製造Ru配線之平坦化處理無關之技術。 In addition, the above-mentioned Patent Document 2 discloses an example of planarization after the formation of the Ru film. In this example, in addition to CMP, the etch-back method is also disclosed. However, the Ru film is used as an SN electrode. The flattening treatment is not described. In addition, although the Republished Table Patent No. 97/35341 describes dry etching of Ru by Ar ion sputtering, the disclosure is anisotropic etching for forming the upper metal electrode, which has nothing to do with the planarization process for manufacturing Ru wiring. technology.

平坦化處理可以僅藉由Ar電漿處理進行，但僅進行Ar電漿處理之情況下，有時處理後表面變粗糙無法獲得所要之表面平滑性。 The planarization treatment can be performed only by the Ar plasma treatment, but in the case of only the Ar plasma treatment, the surface may become rough after the treatment and the desired surface smoothness may not be obtained.

此情況下，作為平坦化處理較好是進行Ar離子濺鍍之後，進行CMP。亦即藉由Ar電漿處理進行有效處理之後，再細部進行CMP，據此可以獲得所要之表面平滑性。該情況下，CMP僅使用於細部處理，研磨量為數nm左右即夠。因此，平坦化處理無需花費長時間。 In this case, as the planarization treatment, Ar ion sputtering is preferably performed and then CMP is performed. That is, after effective treatment by Ar plasma treatment, CMP is performed in detail to obtain the desired surface smoothness. In this case, CMP is only used for detailed processing, and a polishing amount of about several nanometers is sufficient. Therefore, the flattening process does not need to take a long time.

[Ar電漿處理裝置] [Ar plasma processing device]

接著，對進行此種Ar電漿處理的裝置例進行說明。圖12係平坦化處理使用的Ar電漿處理裝置之Ar離子濺鍍裝置之一例的斷面圖。 Next, an example of an apparatus for performing such Ar plasma treatment will be described. FIG. 12 is a cross-sectional view of an example of an Ar ion sputtering apparatus of the Ar plasma processing apparatus used for the planarization process.

於此，示出使用ICP(Inductively Coupled Plasma)電漿濺鍍裝置作為Ar離子濺鍍裝置的例。 Here, an example in which an ICP (Inductively Coupled Plasma) plasma sputtering device is used as the Ar ion sputtering device is shown.

如圖12所示，該Ar離子濺鍍裝置400具有由鋁等之金屬構成的接地之腔室401，於腔室401之底部設置排氣口402及氣體導入口403。排氣口402與排氣管404連接，排氣管404與進行壓力調整的節流閥及真空泵等所構成的排氣機構405連接。又，氣體導入口403與氣體供給配管406連接，氣體供給配管406係與供給Ar氣體及N2氣體等氣體之氣體供給機構407連接。 As shown in FIG. 12, the Ar ion sputtering apparatus 400 has a grounded chamber 401 made of metal such as aluminum, and an exhaust port 402 and a gas inlet 403 are provided at the bottom of the chamber 401. The exhaust port 402 is connected to an exhaust pipe 404, and the exhaust pipe 404 is connected to an exhaust mechanism 405 constituted by a throttle valve and a vacuum pump for pressure adjustment. In addition, the gas inlet 403 is connected to a gas supply pipe 406, and the gas supply pipe 406 is connected to a gas supply mechanism 407 that supplies gases such as Ar gas and N 2 gas.

於腔室401內設置用於載置被處理基板亦即晶圓W之導電性材料所構成的平台410。於平台410設置調溫機構(均未圖示)用於對晶圓吸附用之靜電吸盤及晶圓進行調溫。於平台410之下面之中央設置構成為圓筒狀的支柱411。支柱411之下部貫穿形成於腔室401之底部之中心部的插通孔412並向下方延伸。 A platform 410 made of a conductive material for placing the wafer W, which is the substrate to be processed, is provided in the chamber 401. A temperature adjustment mechanism (not shown) is provided on the platform 410 to adjust the temperature of the electrostatic chuck for wafer adsorption and the wafer. At the center of the bottom of the platform 410, a pillar 411 formed in a cylindrical shape is provided. The lower part of the pillar 411 penetrates the insertion hole 412 formed at the center of the bottom of the chamber 401 and extends downward.

支柱411可以藉由升降機構(未圖示)升降，據此可以使平台410升降。在平台410與腔室401之底部之間以圍繞支柱411的方式設置波紋管413。 The pillar 411 can be raised and lowered by a lifting mechanism (not shown), and the platform 410 can be raised and lowered accordingly. A bellows 413 is provided between the platform 410 and the bottom of the chamber 401 so as to surround the pillar 411.

平台410與供電線414連接，供電線414通過支柱411之內部向下方延伸。供電線414與偏壓用高頻電源415連接，由偏壓用高頻電源415透過平台410對晶圓W施 加例如13.56MHz之高頻偏壓。 The platform 410 is connected to a power supply line 414, and the power supply line 414 extends downward through the inside of the pillar 411. The power supply line 414 is connected to a high-frequency bias power supply 415, and the high-frequency bias power supply 415 applies a high-frequency bias voltage of, for example, 13.56 MHz to the wafer W through the stage 410.

於腔室401之底部，朝上方垂直地設置例如3個(僅圖示2個)支撐銷416，支撐銷416插通於設置在平台410的銷插通孔(未圖示)，下降平台410時，成為以支撐銷416之上端支撐晶圓W之狀態而使晶圓W之搬送為可能。 At the bottom of the chamber 401, three (only two shown) support pins 416 are vertically arranged upward, for example, the support pins 416 are inserted into pin insertion holes (not shown) provided on the platform 410, and the platform 410 is lowered. At this time, the wafer W is supported by the upper end of the support pin 416, so that the wafer W can be transported.

於腔室401之下部側壁設置對晶圓W進行搬出入之搬出入口417，搬出入口417藉由柵閥418進行開關。 A loading/unloading inlet 417 for loading and unloading the wafer W is provided on the lower side wall of the chamber 401, and the loading/unloading inlet 417 is opened and closed by a gate valve 418.

另外，於腔室401之天井部氣密地設置由介電質構成的透過板420，於該透過板420的上面側設置電漿產生源421用於在腔室401內之處理空間S產生Ar氣體之電漿。電漿產生源421具有：沿著透過板420的上面設置的感應線圈422；及與該感應線圈422連接的電漿生成用高頻電源423。由電漿生成用高頻電源423將例如13.56MHz之高頻電力施加於感應線圈422，據此而經由透過板420在處理空間S形成感應電場。 In addition, a permeable plate 420 made of a dielectric is airtightly arranged on the patio portion of the chamber 401, and a plasma generation source 421 is provided on the upper side of the permeable plate 420 for generating Ar in the processing space S in the chamber 401 Plasma of gas. The plasma generation source 421 has an induction coil 422 provided along the upper surface of the transmission plate 420 and a high-frequency power supply 423 for plasma generation connected to the induction coil 422. The high-frequency power of, for example, 13.56 MHz is applied to the induction coil 422 from the high-frequency power supply 423 for plasma generation, and an induced electric field is formed in the processing space S via the transmission plate 420 accordingly.

腔室401之上部成為傾斜部401a，成為於其內側安裝有構成為斷面朝內側傾斜之環狀(截頭圓錐殼狀)的靶，又，設有對靶施加直流電壓的直流電源及設於靶之外周側的磁鐵，構成為PVD裝置，進行Ar離子濺鍍時彼等並非必要，因此省略圖示及說明。 The upper part of the chamber 401 becomes an inclined portion 401a, and a target formed in a ring shape (frustum-conical shell) with a cross section inclined inward is mounted on the inside of the chamber 401. In addition, a DC power supply and equipment for applying a DC voltage to the target are installed. The magnets on the outer peripheral side of the target are configured as PVD devices, and they are not necessary for Ar ion sputtering, so the illustration and description are omitted.

Ar離子濺鍍裝置400具有對該各構成部例如排氣機構405或氣體供給機構407之閥、偏壓用高頻電源415、電漿生成用高頻電源423、升降機構等進行控制的控制部430。 The Ar ion sputtering device 400 has a control unit that controls the various components such as the valve of the exhaust mechanism 405 or the gas supply mechanism 407, the high-frequency power supply 415 for bias, the high-frequency power supply 423 for plasma generation, the lifting mechanism, etc. 430.

此種Ar離子濺鍍裝置400中，由氣體供給機構407將Ar氣體供給至腔室401內，由高頻電源423將高頻電力施加於感應線圈422，據此於腔室401內之處理空間S產生Ar電漿，並且由偏壓用高頻電源415對平台410施加偏壓用之高頻電力而將Ar離子引入至晶圓W，對晶圓W表面實施Ar離子濺鍍處理。 In this Ar ion sputtering apparatus 400, Ar gas is supplied into the chamber 401 by the gas supply mechanism 407, and high-frequency power is applied to the induction coil 422 by the high-frequency power supply 423, thereby in the processing space in the chamber 401 S generates Ar plasma, and high-frequency power for bias is applied to the stage 410 from the bias high-frequency power supply 415 to introduce Ar ions into the wafer W, and Ar ion sputtering is performed on the surface of the wafer W.

Ar離子濺鍍裝置400中的Ar離子濺鍍處理可以使用以下範圍之條件。 The Ar ion sputtering process in the Ar ion sputtering apparatus 400 can use the conditions in the following range.

壓力：1~10mTorr(0.13~1.3Pa) Pressure: 1~10mTorr(0.13~1.3Pa)

電漿生成用高頻電力：0.5~3kW High frequency power for plasma generation: 0.5~3kW

偏壓用高頻電力：0.4~2kW High frequency power for bias voltage: 0.4~2kW

溫度：10~55℃ Temperature: 10~55℃

[成膜系統] [Film forming system]

本實施形態中，Ar離子濺鍍裝置不被系統整合而獨立設置時，可以適用於第1實施形態中圖7之成膜系統。該情況下，除了將TiON膜成膜裝置11適當替換為形成TiN膜、Ta膜、TaN膜、TaAlN膜、TiON膜等之任意底層膜之裝置以外，均可以是和圖7之成膜系統相同構成。 In this embodiment, when the Ar ion sputtering device is not integrated with the system but is installed independently, it can be applied to the film forming system of FIG. 7 in the first embodiment. In this case, except that the TiON film forming apparatus 11 is appropriately replaced with an apparatus for forming any underlying film of TiN film, Ta film, TaN film, TaAlN film, TiON film, etc., it can be the same as the film forming system of FIG. 7 constitute.

另外，將Ar離子濺鍍裝置進行系統整合之情況下，可以使用圖13例示之成膜系統500。 In addition, in the case of system integration of the Ar ion sputtering apparatus, the film forming system 500 illustrated in FIG. 13 can be used.

成膜系統500具有：底層膜成膜及Ru膜成膜之用的第1處理部501；Ar離子濺鍍之用的第2處理部502；及搬出入部503。 The film forming system 500 includes a first processing section 501 for forming an underlying film and Ru film forming; a second processing section 502 for Ar ion sputtering; and a carry-out section 503.

第1處理部501具有：第1真空搬送室511；及與該第1真空搬送室511之壁部連接的2個底層膜成膜裝置512a、512b及2個Ru膜成膜裝置514a、514b。底層膜成膜裝置512a及Ru膜成膜裝置514a，與底層膜成膜裝置512b及Ru膜成膜裝置514b係呈線對稱之位置配置。 The first processing unit 501 has a first vacuum transfer chamber 511, and two underlying film forming apparatuses 512a and 512b and two Ru film forming apparatuses 514a and 514b connected to the wall of the first vacuum transfer chamber 511. The underlying film forming device 512a and the Ru film forming device 514a are arranged in a line-symmetrical position with the underlying film forming device 512b and the Ru film forming device 514b.

第1真空搬送室511之其他壁部係與進行晶圓W之脫氣處理的脫氣室505a、505b連接。又，在脫氣室505a與505b之間之壁部連接有在第1真空搬送室511與後述之第2真空搬送室521之間進行晶圓W之交接的交接室505。 The other walls of the first vacuum transfer chamber 511 are connected to degassing chambers 505a and 505b in which the wafer W is degassed. In addition, to the wall between the degassing chambers 505a and 505b, a transfer chamber 505 for transferring the wafer W between the first vacuum transfer chamber 511 and the second vacuum transfer chamber 521 described later is connected.

底層膜成膜裝置512a、512b、Ru膜成膜裝置514a、514b、脫氣室505a、505b及交接室505，係透過柵閥G與第1真空搬送室511之各邊連接。 The underlayer film forming devices 512a, 512b, Ru film forming devices 514a, 514b, degassing chambers 505a, 505b, and transfer chamber 505 are connected to each side of the first vacuum transfer chamber 511 through a gate valve G.

第1真空搬送室511內被保持於規定之真空氛圍，於其中設置對晶圓W進行搬送的第1搬送機構516。該第1搬送機構516具有：旋轉．伸縮部517；及設於其前端的2個晶圓搬送臂部518a、518b。第1搬送機構516係對底層膜成膜裝置512a、512b、Ru膜成膜裝置514a、514b、脫氣室505a、505b及交接室505進行晶圓W之搬出入。 The inside of the first vacuum transfer chamber 511 is maintained in a predetermined vacuum atmosphere, and a first transfer mechanism 516 that transfers the wafer W is provided therein. The first conveying mechanism 516 has: rotating. Telescopic part 517; and two wafer transfer arm parts 518a, 518b provided at the front end. The first transport mechanism 516 carries the wafer W into and out of the substrate film forming apparatuses 512a and 512b, the Ru film forming apparatuses 514a and 514b, the degassing chambers 505a and 505b, and the delivery chamber 505.

第2處理部502具有：第2真空搬送室521；及與該第2真空搬送室521之對向之壁部連接的2個Ar離子濺鍍裝置522a、522b。 The second processing unit 502 has: a second vacuum transfer chamber 521; and two Ar ion sputtering apparatuses 522a and 522b connected to the opposite wall of the second vacuum transfer chamber 521.

第2真空搬送室521之第1處理部501側之2個壁部分別與上述脫氣室505a、505b連接，脫氣室505a與505b之間之壁部係與上述交接室505連接。亦即交接室505以及 脫氣室505a及505b均設於第1真空搬送室511與第2真空搬送室521之間。另外，第2真空搬送室521之搬出入部503側之2個壁部分別與可以進行大氣搬送及真空搬送的加載鎖定室506a、506b連接。 The two walls of the second vacuum transfer chamber 521 on the side of the first processing section 501 are connected to the degassing chambers 505a and 505b, respectively, and the wall between the degassing chambers 505a and 505b is connected to the transfer chamber 505. That is, the transfer chamber 505 and the degassing chambers 505a and 505b are all provided between the first vacuum transfer chamber 511 and the second vacuum transfer chamber 521. In addition, the two walls of the second vacuum transfer chamber 521 on the side of the carry-out/in-port 503 are respectively connected to load lock chambers 506a and 506b that can perform air transport and vacuum transport.

Ar離子濺鍍裝置522a、522b、脫氣室505a、505b及加載鎖定室506a、506b係透過柵閥G與第2真空搬送室521之各壁部連接。又，交接室505不透過柵閥而與第2真空搬送室521連接。 Ar ion sputtering devices 522a, 522b, degassing chambers 505a, 505b, and load lock chambers 506a, 506b are connected to the walls of the second vacuum transfer chamber 521 through a gate valve G. In addition, the transfer chamber 505 is connected to the second vacuum transfer chamber 521 without passing through the gate valve.

第2真空搬送室521內被保持於規定之真空氛圍，於其中設置對晶圓W進行搬送的第2搬送機構526。該第2搬送機構526具有旋轉．伸縮部527，及設於其前端的2個晶圓搬送臂部528a、528b。第2真空搬送室521對Ar離子濺鍍裝置522a、522b、脫氣室505a、505b、加載鎖定室506a、506b及交接室505進行晶圓W之搬出入。 The inside of the second vacuum transfer chamber 521 is maintained in a predetermined vacuum atmosphere, and a second transfer mechanism 526 that transfers the wafer W is provided therein. The second conveying mechanism 526 has rotation. The telescopic part 527, and two wafer transfer arm parts 528a, 528b provided at the front end thereof. The second vacuum transfer chamber 521 carries the wafer W into and out of the Ar ion sputtering devices 522a and 522b, the degassing chambers 505a and 505b, the load lock chambers 506a and 506b, and the delivery chamber 505.

搬出入部503，係隔著上述加載鎖定室506a、506b而設於第2處理部502之相反側，具有與加載鎖定室506a、506b連接的大氣搬送室531。在加載鎖定室506a、506b與大氣搬送室531之間之壁部設有柵閥G。在大氣搬送室531之連接有加載鎖定室506a、506b的壁部之對向之壁部設有2個連接埠532、533，該2個連接埠532、533將收納晶圓W的晶圓傳送盒C予以連接。又，在大氣搬送室531之側面設置對晶圓W進行對準的對準腔室534。在大氣搬送室531內設有大氣搬送用搬送機構536，該大氣搬送用搬送機構536對晶圓傳送盒C進行晶圓W之搬出入及對加載鎖定 室506a、506b進行晶圓W之搬出入。該大氣搬送用搬送機構536具有2個多關節臂部，可以沿著晶圓傳送盒C之配列方向在軌條538上行走，在各自之前端之臂部537上載置晶圓W而進行其之搬送。 The carry-out/in section 503 is provided on the opposite side of the second processing section 502 with the load lock chambers 506a and 506b interposed therebetween, and has an atmospheric transfer chamber 531 connected to the load lock chambers 506a and 506b. A gate valve G is provided on the wall between the load lock chambers 506a and 506b and the atmosphere transfer chamber 531. Two connection ports 532 and 533 are provided on the opposite wall of the atmospheric transfer chamber 531 to which the load lock chambers 506a and 506b are connected. The two connection ports 532 and 533 transfer the wafer containing the wafer W Box C is connected. In addition, an alignment chamber 534 for aligning the wafer W is provided on the side of the atmospheric transfer chamber 531. In the atmospheric transfer chamber 531, an atmospheric transfer mechanism 536 is provided. The atmospheric transfer mechanism 536 carries out the loading and unloading of the wafer W into and out of the wafer transfer cassette C and the loading and unloading of the wafer W into and out of the load lock chambers 506a and 506b. . The atmospheric transport transport mechanism 536 has two articulated arms, which can travel on rails 538 along the arrangement direction of the wafer transfer cassette C, and carry out wafers W on the arms 537 at the respective front ends. Transport.

該成膜系統500具有整體控制部540。整體控制部540具有：具有CPU(電腦)的主控制部，該CPU(電腦)對底層膜成膜裝置512a、512b、Ru膜成膜裝置514a、514b、Ar離子濺鍍裝置522a、522b之各構成部、真空搬送室511、521之排氣機構或搬送機構516、526、脫氣室505a、505b、加載鎖定室506a、506b之排氣機構或氣體供給機構、大氣搬送室531之搬送機構536、柵閥G之驅動系等進行控制；輸入裝置(鍵盤、滑鼠等)；輸出裝置(印表機等)；顯示裝置(顯示器等)；及記憶裝置(記憶媒體)。整體控制部540之主控制部，例如係依據內建於記憶裝置的記憶媒體、或設定於記憶裝置的記憶媒體所記憶的處理配方，使成膜系統500執行規定之動作。 The film forming system 500 has an overall control unit 540. The overall control unit 540 has: a main control unit with a CPU (computer), which controls each of the underlying film forming devices 512a, 512b, Ru film forming devices 514a, 514b, and Ar ion sputtering devices 522a, 522b Component part, exhaust mechanism or transport mechanism 516, 526 of vacuum transfer chamber 511, 521, exhaust mechanism or gas supply mechanism of degassing chamber 505a, 505b, load lock chamber 506a, 506b, and transport mechanism 536 of atmospheric transfer chamber 531 , The drive system of the gate valve G, etc. to control; input devices (keyboard, mouse, etc.); output devices (printers, etc.); display devices (displays, etc.); and memory devices (memory media). The main control unit of the overall control unit 540, for example, causes the film forming system 500 to perform predetermined actions based on a storage medium built in the storage device or a processing recipe stored in a storage medium set in the storage device.

又，底層膜成膜裝置512a、512b係形成TiN膜、Ta膜、TaN膜、TaAlN膜、TiON膜等所構成的底層膜者，可以使用和第1實施形態的TiON膜成膜裝置11同樣之ALD裝置、與ALD裝置同樣構成之CVD裝置或iPVD裝置。作為iPVD裝置，可以使用在上述Ar離子濺鍍裝置400安裝由欲成膜之材料構成的靶之構成之裝置。又，Ru膜成膜裝置514a、514b可以使用和圖9所示第1實施形態的Ru膜成膜裝置13同樣之裝置。另外，Ar離子濺鍍裝置522a、522b可 以使用和圖12所示Ar離子濺鍍裝置400同樣之裝置。 In addition, the underlying film forming apparatuses 512a and 512b are capable of forming underlying films composed of TiN film, Ta film, TaN film, TaAlN film, TiON film, etc., which can be the same as the TiON film forming apparatus 11 of the first embodiment. ALD device, CVD device or iPVD device with the same configuration as ALD device. As the iPVD device, a device in which a target made of a material to be formed into a film is attached to the Ar ion sputtering device 400 described above can be used. In addition, as the Ru film forming apparatuses 514a and 514b, the same apparatus as the Ru film forming apparatus 13 of the first embodiment shown in FIG. 9 can be used. In addition, the Ar ion sputtering devices 522a and 522b can be the same as the Ar ion sputtering device 400 shown in Fig. 12.

接著，對以上構成的成膜系統500之動作進行說明。以下之處理動作係依據整體控制部540中之記憶媒體所記憶的處理配方被執行。 Next, the operation of the film forming system 500 configured as described above will be described. The following processing actions are executed according to the processing recipe stored in the storage medium in the overall control unit 540.

首先，藉由大氣搬送用搬送機構536由晶圓傳送盒C取出晶圓W，將其搬送至加載鎖定室506a或506b，將該加載鎖定室減壓至和第2真空搬送室521同一程度之真空度之後，藉由第2搬送機構526將加載鎖定室之晶圓W搬送至脫氣室505a或505b，進行晶圓W之脫氣處理。之後，藉由第1搬送機構516取出脫氣室之晶圓W，搬入底層膜成膜裝置512a或512b，形成由TiN膜、Ta膜、TaN膜、TaAlN膜、TiON膜等構成之底層膜。底層膜係於ALD、CVD或iPVD進行成膜。底層膜成膜後，藉由第1搬送機構516將晶圓W搬送至Ru膜成膜裝置514a或514b，藉由CVD進行Ru膜之成膜，對形成於晶圓W的溝槽及通孔進行填埋。 First, the wafer W is taken out from the wafer transfer cassette C by the atmospheric transport transport mechanism 536 and transported to the load lock chamber 506a or 506b, and the load lock chamber is depressurized to the same level as the second vacuum transfer chamber 521 After the vacuum degree, the wafer W in the load lock chamber is transported to the degassing chamber 505a or 505b by the second transport mechanism 526, and the wafer W is degassed. After that, the wafer W in the degassing chamber is taken out by the first transport mechanism 516 and carried into the underlayer film forming device 512a or 512b to form an underlayer film composed of TiN film, Ta film, TaN film, TaAlN film, TiON film, etc. The underlying film is formed by ALD, CVD or iPVD. After the underlayer film is formed, the wafer W is transported to the Ru film forming apparatus 514a or 514b by the first transport mechanism 516, and the Ru film is formed by CVD, and the grooves and through holes formed in the wafer W Landfill.

Ru膜成膜後，藉由第1搬送機構516將晶圓W由Ru膜成膜裝置514a或514b搬送至交接室505，之後，藉由第2搬送機構526取出晶圓W，將其搬入Ar離子濺鍍裝置522a或522b。接著，藉由Ar離子濺鍍裝置522a或522b對晶圓W進行平坦化處理。於平坦化處理之前，將晶圓W搬送至脫氣室505a、505b等可以加熱晶圓W的適當的裝置而進行退火處理亦可。 After the Ru film is formed, the wafer W is transported from the Ru film forming apparatus 514a or 514b to the transfer chamber 505 by the first transport mechanism 516, and then the wafer W is taken out by the second transport mechanism 526 and transported into the Ar Ion sputtering device 522a or 522b. Next, the wafer W is planarized by the Ar ion sputtering device 522a or 522b. Before the planarization process, the wafer W may be transported to an appropriate device capable of heating the wafer W such as degassing chambers 505a, 505b, and an annealing process may be performed.

平坦化處理之後，藉由第2搬送機構526將晶圓W搬送至加載鎖定室506a或506b，使該加載鎖定室回復 大氣壓之後，藉由大氣搬送用搬送機構536取出晶圓W，使其回至晶圓傳送盒C。在晶圓傳送盒內之晶圓W之數量範圍內重複進行此一處理。 After the planarization process, the wafer W is transferred to the load lock chamber 506a or 506b by the second transfer mechanism 526, and the load lock chamber is returned to the atmospheric pressure, and then the wafer W is taken out by the atmospheric transfer transfer mechanism 536 and returned To wafer transfer box C. This process is repeated within the range of the number of wafers W in the wafer transfer box.

依據此種成膜系統500，無需開放大氣，可於真空中連續進行底層膜成膜、Ru膜之成膜、平坦化處理，可以防止氧化而且可以高速獲得Ru配線。 According to this film forming system 500, it is not necessary to open the atmosphere, and the underlying film forming, Ru film forming, and planarization can be continuously performed in vacuum, oxidation can be prevented, and Ru wiring can be obtained at high speed.

[實驗例] [Experimental example]

接著，對第2實施形態的實驗例進行說明。 Next, an experimental example of the second embodiment will be described.

於此，針對在Si基體上之層間絕緣膜形成有寬度約20nm之溝槽的晶圓，藉由iPVD形成約0.5nm之由TaN膜構成的底層膜之後，藉由CVD形成厚度20nm之Ru膜，填埋溝槽。此時之SEM照片如圖14所示。由該SEM照片可知，在晶圓表面形成有Ru膜，在溝槽內填埋有Ru膜。 Here, for a wafer in which a trench with a width of about 20 nm is formed on the interlayer insulating film on a Si substrate, a base film of about 0.5 nm is formed of a TaN film by iPVD, and a Ru film of a thickness of 20 nm is formed by CVD , Fill the trench. The SEM photo at this time is shown in Figure 14. From this SEM photograph, it can be seen that a Ru film is formed on the surface of the wafer, and the Ru film is buried in the trench.

之後，進行Ar離子濺鍍，除去晶圓表面之Ru膜及TaN膜。此時之條件設為，壓力：2.5mTorr(0.33Pa)，電漿生成用高頻電力：1kW，偏壓用高頻電力：1kW，溫度：10℃。此時之SEM照片如圖15所示。由該SEM照片可知，晶圓表面之Ru膜及TaN膜被除去，Ru膜僅填埋於溝槽內。據此可以確認，藉由Ar離子濺鍍可以實施平坦化處理。 After that, Ar ion sputtering is performed to remove the Ru film and TaN film on the wafer surface. The conditions at this time are as follows: pressure: 2.5 mTorr (0.33 Pa), high-frequency power for plasma generation: 1 kW, high-frequency power for bias: 1 kW, and temperature: 10°C. The SEM photo at this time is shown in Figure 15. It can be seen from the SEM photograph that the Ru film and TaN film on the wafer surface are removed, and the Ru film is only buried in the trench. From this, it was confirmed that the planarization treatment can be performed by Ar ion sputtering.

接著，針對各種寬度之溝槽，藉由iPVD形成0.5nm厚度之TaN膜作為底層膜，之後，形成厚度20nm之Ru膜填埋溝槽之後，藉由Ar離子濺鍍進行平坦化而形成 Ru配線，對電氣特性進行確認。 Next, for trenches of various widths, a TaN film with a thickness of 0.5 nm was formed as an underlying film by iPVD, and a Ru film with a thickness of 20 nm was formed to fill the trenches, and then planarized by Ar ion sputtering to form Ru wiring , To confirm the electrical characteristics.

首先，說明測定配線電阻的結果。於此，將基於Ar離子濺鍍的Ru膜濺鍍量以Ta膜換算設為80nm及120nm時之配線電阻進行測定。圖16表示溝槽寬度與配線電阻之關係的圖。如該圖所示，和濺鍍量為80nm比較，濺鍍量為120nm時配線電阻較高，另外，顯示出配線寬度越小配線電阻越高的傾向，確認了形成有健全的Ru配線。 First, the result of measuring the wiring resistance will be described. Here, the sputtering amount of the Ru film by Ar ion sputtering was measured as the wiring resistance at 80 nm and 120 nm in terms of Ta film. Fig. 16 is a graph showing the relationship between trench width and wiring resistance. As shown in this figure, compared with the sputtering amount of 80 nm, the wiring resistance is higher when the sputtering amount is 120 nm. In addition, the wiring resistance tends to be higher as the wiring width is smaller, which confirms the formation of sound Ru wiring.

接著，說明測定洩漏電流的結果。於此，針對配線寬度為32nm、37nm、42nm之情況測定洩漏電流。圖17表示施加電壓與洩漏電流之關係的圖。如該圖所示，隨著施加電壓上升，洩漏電流亦增加，但即使施加30V時洩漏電流亦在1×10-8A以下，確認了配線之間被良好絕緣。 Next, the result of measuring the leakage current will be described. Here, the leakage current was measured when the wiring width was 32 nm, 37 nm, and 42 nm. Fig. 17 is a graph showing the relationship between the applied voltage and the leakage current. As shown in the figure, as the applied voltage increases, the leakage current also increases, but even when 30V is applied, the leakage current is still below 1×10 -8 A, confirming that the wiring is well insulated.

<其他之適用> <Other applicable>

以上，說明本發明實施形態，但本發明不限定於上述實施形態，在本發明技術思想之範圍內可以進行各種變形。例如上述實施形態說明的成膜系統、TiON膜成膜裝置、Ru膜成膜裝置、作為Ar電漿處理裝置之Ar離子濺鍍裝置僅為例示，並不限定於本實施形態。特別是，作為Ar電漿處理裝置雖例示ICP電漿濺鍍裝置，但不限定於此，亦可以是使用平行平板型等其他電漿源進行Ar電漿處理者。 The embodiments of the present invention have been described above, but the present invention is not limited to the above-mentioned embodiments, and various modifications can be made within the scope of the technical idea of the present invention. For example, the film forming system, the TiON film forming device, the Ru film forming device, and the Ar ion sputtering device as an Ar plasma processing device described in the above embodiment are only examples and are not limited to this embodiment. In particular, although an ICP plasma sputtering device is exemplified as an Ar plasma processing device, it is not limited to this, and it may be one that performs Ar plasma processing using other plasma sources such as a parallel plate type.

又，上述實施形態中說明針對形成有溝槽及 通孔的層間絕緣膜形成底層膜，之後藉由填埋Ru膜來製造Ru配線，但不限定於此，只要是對具有凹部的基板形成底層膜，之後，藉由填埋Ru膜來製造Ru配線之情況均可以適用。 In addition, in the above-mentioned embodiment, it is described that an underlayer film is formed for the interlayer insulating film formed with trenches and vias, and then Ru film is filled to produce Ru wiring, but it is not limited to this, as long as the underlayer is formed on a substrate with recessed portions It can be applied to the case of manufacturing Ru wiring by embedding the Ru film afterwards.

又，被處理基板雖例示半導體晶圓，但本發明原理上不限定於此，例如亦可以是以液晶顯示裝置用基板為代表的FPD用基板等之其他基板。 In addition, although a semiconductor wafer is exemplified as the substrate to be processed, the present invention is not limited to this in principle. For example, other substrates such as FPD substrates typified by substrates for liquid crystal display devices may also be used.

201‧‧‧基體 201‧‧‧Matrix

202‧‧‧層間絕緣膜 202‧‧‧Interlayer insulation film

203‧‧‧溝槽 203‧‧‧Groove

204‧‧‧通孔 204‧‧‧Through hole

205‧‧‧TiON膜 205‧‧‧TiON film

206‧‧‧Ru膜 206‧‧‧Ru film

207‧‧‧Ru配線 207‧‧‧Ru wiring

W‧‧‧半導體晶圓 W‧‧‧Semiconductor Wafer

Claims (17)

一種釕配線，其特徵為：在基板表面之規定之膜所形成的凹部具有：作為底層膜而被形成的TiON膜；及在上述TiON膜之上以填埋上述凹部的方式而形成的釕膜；上述TiON膜之氧含量為50at%以上。 A ruthenium wiring characterized in that a recess formed by a predetermined film on the surface of a substrate has: a TiON film formed as an underlying film; and a ruthenium film formed on the TiON film to fill the recess ; The oxygen content of the above-mentioned TiON film is more than 50at%. 如申請專利範圍第1項之釕配線，其中上述規定之膜為層間絕緣膜，於上述層間絕緣膜形成有溝槽及通孔作為上述凹部。 For example, the ruthenium wiring in the first item of the patent application, wherein the above-mentioned prescribed film is an interlayer insulating film, and grooves and through holes are formed in the interlayer insulating film as the recesses. 一種釕配線的製造方法，係針對表面具有形成有凹部的規定之膜的基板，填埋上述凹部來製造釕配線者，其特徵為具有：至少在上述凹部之表面形成作為底層膜的TiON膜之工程；及在上述TiON膜之上以填埋上述凹部的方式形成釕膜之工程；形成上述TiON膜之工程，係藉由如下進行：將基板配置於處理容器內，將上述處理容器內保持於減壓狀態，在規定之處理溫度下，以重複X次交替地進行對上述處理容器內供給Ti含有氣體的步驟及對上述處理容器內供給氮化氣體的步驟來形成單位TiN膜之後，對上述處理容器內供給氧化劑使上述單位TiN膜氧化的一連串之處理設為1個循 環，並以成為所要之膜厚的方式重複進行複數個該循環；藉由X之次數來調整上述TiON膜中的氧含量，由此而對作用於上述TiON膜的應力進行控制。 A method for manufacturing ruthenium wiring is a method of manufacturing ruthenium wiring by filling the recesses on a substrate with a predetermined film formed on the surface of the recesses. The method is characterized by forming a TiON film as an underlying film on at least the surface of the recesses. The process; and the process of forming a ruthenium film on the above-mentioned TiON film by filling the above-mentioned recesses; the process of forming the above-mentioned TiON film is carried out by arranging a substrate in a processing container, and holding the inside of the processing container in In a reduced pressure state, at a predetermined processing temperature, the step of supplying Ti-containing gas into the processing container and the step of supplying nitriding gas into the processing container are alternately performed X times to form a unit TiN film, and then the above-mentioned A series of treatments for oxidizing the above-mentioned unit TiN film by supplying an oxidant in the treatment container is set to 1 cycle. The cycle is repeated so as to become the desired film thickness; the oxygen content in the TiON film is adjusted by the number of times X, thereby controlling the stress acting on the TiON film. 如申請專利範圍第3項之釕配線的製造方法，其中上述規定之膜係層間絕緣膜，於上述層間絕緣膜形成有作為上述凹部之溝槽及通孔。 Such as the manufacturing method of ruthenium wiring in the third item of the scope of patent application, wherein the above-mentioned prescribed film-based interlayer insulating film is formed with trenches and through holes as the recesses in the interlayer insulating film. 如申請專利範圍第3或4項之釕配線的製造方法，其中另具有：形成上述釕膜填埋上述凹部之後，將表面之上述釕膜及上述TiON膜除去使平坦化之工程。 For example, the manufacturing method of ruthenium wiring of the third or fourth patent application includes a process of removing and planarizing the ruthenium film and the TiON film on the surface after forming the ruthenium film to fill the recess. 如申請專利範圍第5項之釕配線的製造方法，其中上述平坦化之工程，係藉由CMP研磨上述表面之上述釕膜及上述TiON膜來進行。 Such as the manufacturing method of ruthenium wiring in the 5th patent application, wherein the above-mentioned planarization process is performed by polishing the above-mentioned ruthenium film and the above-mentioned TiON film on the surface by CMP. 如申請專利範圍第5項之釕配線的製造方法，其中上述平坦化之工程，係藉由包含氬電漿處理之處理除去上述表面之上述釕膜及上述TiON膜來進行。 Such as the manufacturing method of ruthenium wiring in the 5th patent application, wherein the above-mentioned planarization process is performed by removing the above-mentioned ruthenium film and the above-mentioned TiON film on the above-mentioned surface by a treatment including argon plasma treatment. 如申請專利範圍第7項之釕配線的製造方法，其中上述平坦化之工程，係藉由氬電漿處理除去上述表面之上述釕膜及上述TiON膜之後，藉由CMP研磨來進行。 Such as the manufacturing method of ruthenium wiring of the seventh item in the scope of patent application, wherein the above-mentioned planarization process is performed by CMP polishing after removing the above-mentioned ruthenium film and the above-mentioned TiON film on the above-mentioned surface by argon plasma treatment. 如申請專利範圍第7項之釕配線的製造方法，其中上述氬電漿處理係氬離子濺鍍處理。 For example, the manufacturing method of ruthenium wiring in the 7th item of the scope of patent application, wherein the above-mentioned argon plasma treatment is argon ion sputtering treatment. 如申請專利範圍第5項之釕配線的製造方法，其中另具有：形成上述釕膜之後，於上述平坦化之前，實施退火處理之工程。 For example, the manufacturing method of ruthenium wiring of the fifth item of the scope of patent application, which additionally includes: after forming the ruthenium film, before the planarization, an annealing process is performed. 如申請專利範圍第3或4項之釕配線的製造方法，其中上述TiON膜之氧含量設為50at%以上。 For example, the manufacturing method of ruthenium wiring in the third or fourth item of the scope of patent application, wherein the oxygen content of the above-mentioned TiON film is set to 50at% or more. 如申請專利範圍第3或4項之釕配線的製造方法，其中上述Ti含有氣體係TiCl4氣體，上述氮化氣體係NH3氣體。 For example, the manufacturing method of ruthenium wiring of item 3 or 4 in the scope of patent application, wherein the above-mentioned Ti contains the gas system TiCl 4 gas, and the above-mentioned nitriding gas system NH 3 gas. 如申請專利範圍第3或4項之釕配線的製造方法，其中上述氧化劑可以使用由O2氣體、O3氣體、H2O、NO2構成之群選擇的含氧氣體或將上述含氧氣體電漿化者。 For example, the manufacturing method of ruthenium wiring in the third or fourth patent application, wherein the above-mentioned oxidant can be an oxygen-containing gas selected from the group consisting of O 2 gas, O 3 gas, H 2 O, and NO 2 or the above-mentioned oxygen-containing gas Plasmaizer. 如申請專利範圍第3或4項之釕配線的製造方法，其中上述處理溫度為300~500℃之範圍。 For example, the manufacturing method of ruthenium wiring in item 3 or 4 of the scope of patent application, wherein the above-mentioned processing temperature is in the range of 300~500℃. 如申請專利範圍第3或4項之釕配線的製造方法，其中上述釕膜係藉由CVD形成。 Such as the manufacturing method of ruthenium wiring in the third or fourth patent application, wherein the ruthenium film is formed by CVD. 如申請專利範圍第15項之釕配線的製造方法，其中藉由CVD形成上述釕膜時，成膜原料係使用釕羰基(ruthenium carbonyl)。 For example, the method for manufacturing ruthenium wiring in the 15th patent application, wherein when the ruthenium film is formed by CVD, ruthenium carbonyl is used as the film forming raw material. 如申請專利範圍第16項之釕配線的製造方法，其中形成上述釕膜時之處理溫度係130~250℃之範圍。 Such as the manufacturing method of ruthenium wiring of the 16th patent application, wherein the processing temperature when forming the ruthenium film is in the range of 130~250°C.
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