TWI741934B

TWI741934B - Optical apparatus, optical system, time-of-flight system and three-dimensional imaging system

Info

Publication number: TWI741934B
Application number: TW110101691A
Authority: TW
Inventors: 那允中; 梁哲夫
Original assignee: 光程研創股份有限公司
Priority date: 2016-02-12
Filing date: 2017-02-09
Publication date: 2021-10-01
Also published as: TW202341451A; TW201740546A; TWI806127B; TW202127639A; TWI720124B; TW202145544A

Abstract

An apparatus including a semiconductor substrate; an absorption layer coupled to the semiconductor substrate, the absorption layer including a photodiode region configured to absorb photons and to generate photo-carriers from the absorbed photons; one or more first switches controlled by a first control signal, the one or more first switches configured to collect at least a portion of the photo-carriers based on the first control signal; and one or more second switches controlled by a second control signal, the one or more second switches configured to collect at least a portion of the photo-carriers based on the second control signal, where the second control signal is different from the first control signal.

Description

光學裝置、光學系統、時差測距系統及立體取像系統Optical device, optical system, time difference ranging system and stereo imaging system

本發明是關於光學裝置，且特別是有關於高速光感測裝置。 The present invention relates to optical devices, and particularly to high-speed light sensing devices.

光感測器主要用以將在自由空間中(或光學介質中)傳遞且耦合於其上之光信號轉換成為電信號，以供進行後續處理。 The optical sensor is mainly used to convert the optical signal transmitted in a free space (or in an optical medium) and coupled to it into an electrical signal for subsequent processing.

根據本發明，由一立體物體反射的光可被一取像系統中的複數光電二極體所感測。所述的光電二極體將感測到的光轉換為複數電荷。每個光電二極體可包含二群開關，所述的兩群開關用以收集前述電荷。用以收集電荷的所述的二群開關可依時序切換，如此一來，取像系統變可依感測到的光判斷相位資訊。 According to the present invention, the light reflected by a three-dimensional object can be sensed by a plurality of photodiodes in an imaging system. The photodiode converts the sensed light into complex charges. Each photodiode may include two groups of switches, and the two groups of switches are used to collect the aforementioned charges. The two groups of switches used to collect the charge can be switched in time sequence, so that the imaging system can determine the phase information based on the sensed light.

取像系統可利用影像資訊來分析關於立體物體的特性，包含深度資訊及一材料組成。取像系統也可利用相位資訊來進行眼部追蹤、手勢辨識(gesture recognition)、立體物件掃描/影像擷取及/或擴增/虛擬實境應用(augmented/virtual reality applications)。 The imaging system can use the image information to analyze the characteristics of the three-dimensional object, including depth information and a material composition. The imaging system can also use phase information for eye tracking, gesture recognition, 3D object scanning/image capture, and/or augmented/virtual reality applications.

本發明提供一種光學裝置，其包含一半導體基板；一鍺矽層耦合於半導體基板，鍺矽層包含一光電二極體區，用以吸收複數光子並產生複數光載子；一或多個第一開關，一第一控制信號所述的一或多個第一開關，所述的一或多個開關依據第一控制信號收集至少一部分的光載子；以及一或多個第二開關，一第二控制信號控制所述的一或多個第二開關，所述的一或多個第二開關依據第二控制信號收集至少一部分的光載子。所述的一或多個第一開關包含一第一p型摻雜區，第一p型摻雜區位於鍺矽層中，其中第一控制信號控制第一p型摻雜區；以及一第一n型摻雜區，第一n型摻雜區位於鍺矽層中，其中第一n型摻雜區耦接至一第一讀出整合電路。所述的一或多個第二開關包含一第二p型摻雜區，第二p型摻雜區位於鍺矽層中，其中第二控制信號控制第二p型摻雜區；以及一第二n型摻雜區，第二n型摻雜區位於鍺矽層中，其中第二n型摻雜區耦接於第二讀出積體電路。 The present invention provides an optical device, which includes a semiconductor substrate; a germanium silicon layer is coupled to the semiconductor substrate, and the germanium silicon layer includes a photodiode region for absorbing multiple photons And generate a plurality of photocarriers; one or more first switches, one or more first switches according to a first control signal, and the one or more switches collect at least a part of the photocarriers according to the first control signal And one or more second switches, a second control signal controls the one or more second switches, the one or more second switches collect at least a part of the photocarriers according to the second control signal . The one or more first switches include a first p-type doped region, the first p-type doped region is located in the germanium silicon layer, wherein the first control signal controls the first p-type doped region; and a second An n-type doped region, the first n-type doped region is located in the germanium silicon layer, and the first n-type doped region is coupled to a first readout integrated circuit. The one or more second switches include a second p-type doped region, the second p-type doped region is located in the germanium silicon layer, wherein the second control signal controls the second p-type doped region; and a first Two n-type doped regions, the second n-type doped region is located in the germanium silicon layer, and the second n-type doped region is coupled to the second readout integrated circuit.

在本發明之一實施方式中可選擇性地包含一或多個下述特徵。鍺矽層包含一第三n型摻雜區及一第四n型摻雜區，其中第一p型摻雜區的至少一部分可形成於第三n型摻雜區中，第二p型摻雜區之至少一部份可形成於第四n型摻雜區中。第一p型摻雜區的至少一部分及第二p型摻雜區的至少一部分可形成於第三n型摻雜區中。半導體基板可包含一第三p型摻雜區及一或多個n型摻雜區，鍺矽層可設置在第三p型摻雜區上方，以及第三p型摻雜區可短路連接於所述的一或多個n型摻雜區。 One or more of the following features can be optionally included in an embodiment of the present invention. The germanium silicon layer includes a third n-type doped region and a fourth n-type doped region, wherein at least a part of the first p-type doped region can be formed in the third n-type doped region, and the second p-type doped region At least a part of the impurity region may be formed in the fourth n-type doped region. At least a part of the first p-type doped region and at least a part of the second p-type doped region may be formed in the third n-type doped region. The semiconductor substrate may include a third p-type doped region and one or more n-type doped regions, the germanium-silicon layer may be disposed above the third p-type doped region, and the third p-type doped region may be short-circuited to The one or more n-type doped regions.

第一控制信號可為一固定偏壓，第二控制信號可為一可調式偏壓，且第二控制信號之可調式偏壓大於第一控制信號之固定偏壓。鍺矽層所吸收之光子可來自於一立體物體之一表面反射，所述的一或多個第一開關收集之部分光子以及由所述的一或多個第二開關收集之部分光子可利用一時差測距系統以分析立體物體之深度資訊或一材料組成。 The first control signal can be a fixed bias, the second control signal can be an adjustable bias, and the adjustable bias of the second control signal is greater than the fixed bias of the first control signal Pressure. The photons absorbed by the germanium silicon layer can be reflected from a surface of a three-dimensional object, and part of the photons collected by the one or more first switches and part of the photons collected by the one or more second switches can be used A time difference ranging system analyzes the depth information of a three-dimensional object or a material composition.

根據本發明另提供一種光學裝置，其包含：一半導體基板；一吸收層，耦合於半導體基板，吸收層包含一光電二極體區，光電二極體區用以吸收複數光子並產生複數光載子；一或多個第一開關，一第一控制信號控制所述的一或多個第一開關，所述的一或多個第一開關依據第一控制信號來收集至少一部分的光載子；以及一或多個第二開關，一第二控制信號控制所述的一或多個第二開關，所述的一或多個第二開關依據第二控制信號來收集至少一部分的光載子。所述的一或多個第一開關包含：一第一p型摻雜區，位於半導體基板中，第一控制信號控制第一p型摻雜區；以及一第一n型摻雜區，位於半導體基板中，第一n型摻雜區耦接於一第一讀出積體電路。所述的一或多個第二開關包含：一第二p型摻雜區，位於半導體基板中，第二控制信號控制第二p型摻雜區；以及第二n型摻雜區，位於半導體基板中，其中第二n型摻雜區耦接於一第二讀出積體電路。 According to the present invention, another optical device is provided, which includes: a semiconductor substrate; an absorption layer coupled to the semiconductor substrate, the absorption layer includes a photodiode region, the photodiode region is used to absorb multiple photons and generate multiple light carriers One or more first switches, a first control signal controls the one or more first switches, and the one or more first switches collect at least a part of the photocarriers according to the first control signal And one or more second switches, a second control signal controls the one or more second switches, and the one or more second switches collect at least a part of the photocarriers according to the second control signal . The one or more first switches include: a first p-type doped region located in the semiconductor substrate, and a first control signal controls the first p-type doped region; and a first n-type doped region located in In the semiconductor substrate, the first n-type doped region is coupled to a first readout integrated circuit. The one or more second switches include: a second p-type doped region located in the semiconductor substrate, the second control signal controls the second p-type doped region; and a second n-type doped region located in the semiconductor substrate In the substrate, the second n-type doped region is coupled to a second readout integrated circuit.

在本發明之一實施方式中可選擇性地包含一或多個下述特徵。半導體基板可包含一第三n型摻雜區及一第四n型摻雜區，第一p型摻雜區之至少一部分可形成於第三n型摻雜區中，以及第二p型摻雜區之至少一部分可形成於第四n型摻雜區中。半導體基板可包含一第三n型摻雜區，第一p型摻雜區之至少一部分及第二p型摻雜區之至少一部分可形成於第三n型摻雜區中。半導體基板可包含一或多個p型井區。 One or more of the following features can be optionally included in an embodiment of the present invention. The semiconductor substrate may include a third n-type doped region and a fourth n-type doped region, at least a part of the first p-type doped region may be formed in the third n-type doped region, and a second p-type doped region At least a part of the impurity region may be formed in the fourth n-type doped region. The semiconductor substrate may include a The third n-type doped region, at least a part of the first p-type doped region and at least a part of the second p-type doped region may be formed in the third n-type doped region. The semiconductor substrate may include one or more p-type well regions.

第一控制信號可為一固定偏壓，第二控制信號可為一可調式偏壓，且第二控制信號之可調式偏壓大於第一控制信號之固定偏壓。鍺矽層所吸收之光子可來自於一立體物體之一表面反射，所述的一或多個第一開關收集之部分光子以及由所述的一或多個第二開關收集之部分光子可利用一時差測距系統以分析立體物體之深度資訊或一材料組成。 The first control signal may be a fixed bias voltage, the second control signal may be an adjustable bias voltage, and the adjustable bias voltage of the second control signal is greater than the fixed bias voltage of the first control signal. The photons absorbed by the germanium silicon layer can be reflected from a surface of a three-dimensional object, and part of the photons collected by the one or more first switches and part of the photons collected by the one or more second switches can be used A time difference ranging system analyzes the depth information of a three-dimensional object or a material composition.

根據本發明又提供一種光學裝置，包含：一半導體基板；一吸收層，耦合於半導體基板，吸收層包含一光電二極體區，光電二極體區用以吸收複數光子並產生複數光載子；一或多個第一開關，一第一控制信號控制所述的一或多個第一開關，所述的一或多個第一開關依據第一控制信號來收集至少一部分的光載子；以及一或多個第二開關，一第二控制信號控制所述的一或多個第二開關，所述的一或多個第二開關依據第二控制信號來收集至少一部分的光載子。所述的一或多個第一開關包含：多個第一p型摻雜區，位於半導體基板中，第一控制信號控制第一p型摻雜區；以及一第一n型摻雜區，位於半導體基板中，第一n型摻雜區耦接於一第一讀出積體電路。所述的一或多個第二開關包含：多個第二p型摻雜區，位於半導體基板中，第二控制信號控制第二p型摻雜區；以及一第二n型摻雜區，位於半導體基板中，其中第二n型摻雜區耦接於一第二讀出積體電路。 According to the present invention, there is further provided an optical device, including: a semiconductor substrate; an absorption layer coupled to the semiconductor substrate, the absorption layer includes a photodiode region, the photodiode region is used to absorb multiple photons and generate multiple photocarriers One or more first switches, a first control signal controls the one or more first switches, and the one or more first switches collect at least a part of the photocarriers according to the first control signal; And one or more second switches, a second control signal controls the one or more second switches, and the one or more second switches collect at least a part of the photocarriers according to the second control signal. The one or more first switches include: a plurality of first p-type doped regions located in the semiconductor substrate, and a first control signal controls the first p-type doped regions; and a first n-type doped region, Located in the semiconductor substrate, the first n-type doped region is coupled to a first readout integrated circuit. The one or more second switches include: a plurality of second p-type doped regions located in the semiconductor substrate, and the second control signal controls the second p-type doped regions; And a second n-type doped region located in the semiconductor substrate, wherein the second n-type doped region is coupled to a second readout integrated circuit.

在本發明之一實施方式中可選擇性地包含一或多個下述特徵。半導體基板可包含一第三n型摻雜區，第一p型摻雜區之至少一部分可形成於第三n型摻雜區中，第二p型摻雜區之至少一部分可形成於第三n型摻雜區中。第一p型摻雜區及第二p型摻雜區可沿著半導體基板的一第一平面呈交叉排列，第一n型摻雜區及第二n型摻雜區可沿著半導體基板的一第二平面呈交叉排列，第二平面不同於第一平面。在多個第一p型摻雜區中的任一p型摻雜區可排列在多個第一n型摻雜區的一個n型摻雜區上方，且第二p型摻雜區中的任一p型摻雜區可排列在多個第二n型摻雜區中的一個n型摻雜區上方。半導體基板可包含一或多個p型井區。 One or more of the following features can be optionally included in an embodiment of the present invention. The semiconductor substrate may include a third n-type doped region, at least a part of the first p-type doped region may be formed in the third n-type doped region, and at least a part of the second p-type doped region may be formed in the third In the n-type doped region. The first p-type doped region and the second p-type doped region can be arranged in a cross along a first plane of the semiconductor substrate, and the first n-type doped region and the second n-type doped region can be arranged along a first plane of the semiconductor substrate. A second plane is arranged in a cross, and the second plane is different from the first plane. Any p-type doped region in the plurality of first p-type doped regions may be arranged above one n-type doped region of the plurality of first n-type doped regions, and the second p-type doped region Any p-type doped region may be arranged above one of the plurality of second n-type doped regions. The semiconductor substrate may include one or more p-type well regions.

本發明更提供一種時差測距系統，包含：一光源；以及一影像感測器，包含複數像素，像素製作於一半導體基板上。每個像素包含：一鍺矽層，耦合於半導體基板，鍺矽層包含一光電二極體區，光電二極體區用以吸收複數光子並產生複數光載子；一或多個第一開關，一第一控制信號控制所述的一或多個第一開關，所述的一或多個第一開關依據第一控制信號來收集一部分的光載子；以及一或多個第二開關，一第二控制信號控制所述的一或多個第二開關，所述的一或多個第二開關依據第二控制信號來收集一部分的光載子，其中第二控制信號不同於第一控制信號。 The present invention further provides a time difference ranging system, including: a light source; and an image sensor, including a plurality of pixels, the pixels are fabricated on a semiconductor substrate. Each pixel includes: a germanium silicon layer coupled to the semiconductor substrate, the germanium silicon layer includes a photodiode region, the photodiode region is used to absorb multiple photons and generate multiple photocarriers; one or more A first switch, a first control signal controls the one or more first switches, the one or more first switches collect a part of the photocarriers according to the first control signal; and one or more The second switch, a second control signal controls the one or more second switches, and the one or more second switches collect a part of the photocarriers according to the second control signal, wherein the second control signals are different In the first control signal.

在本發明之一實施方式中可選擇性地包含一或多個下述特徵；光源用以發射複數光脈衝，光脈衝之一工作週期小於50%，且每個光脈衝具有一相同能量。 An embodiment of the present invention may optionally include one or more of the following features: the light source is used to emit a plurality of light pulses, one of the light pulses has a duty cycle of less than 50%, and each light pulse has the same energy.

本發明還提供一種光學裝置，包含：一半導體基板；一鍺矽層，耦合於半導體基板，鍺矽層包含一光電二極體區，光電二極體區用以吸收複數光子並產生複數光載子；一或多個第一開關，一第一控制信號控制所述的一或多個第一開關，所述的一或多個第一開關依據第一控制信號來收集一部分的光載子；以及一或多個第二開關，一第二控制信號控制所述的一或多個第二開關，所述的一或多個第二開關依據第二控制信號來收集一部分的光載子，第二控制信號不同於第一信號。所述的一或多個第一開關包含：一第一p型摻雜區，位於鍺矽層中，第一控制信號控制第一p型摻雜區；以及一第一n型摻雜區，位於半導體基板中，第一n型摻雜區耦接於一第一讀出積體電路。所述的一或多個第二開關包含：一第二p型摻雜區，位於鍺矽層中，第二控制信號控制第二p型摻雜區；以及一第二n型摻雜區，位於半導體基板中，其中第二n型摻雜區耦接於一第二讀出積體電路。 The present invention also provides an optical device, including: a semiconductor substrate; a germanium silicon layer coupled to the semiconductor substrate, the germanium silicon layer includes a photodiode region, the photodiode region is used to absorb multiple photons and generate multiple light carriers One or more first switches, a first control signal controls the one or more first switches, and the one or more first switches collect a part of the photocarriers according to the first control signal; And one or more second switches, a second control signal controls the one or more second switches, the one or more second switches collect a part of the photocarriers according to the second control signal, the first The second control signal is different from the first signal. The one or more first switches include: a first p-type doped region located in the germanium silicon layer, and a first control signal controls the first p-type doped region; and a first n-type doped region, Located in the semiconductor substrate, the first n-type doped region is coupled to a first readout integrated circuit. The one or more second switches include: a second p-type doped region located in the germanium silicon layer, the second control signal controls the second p-type doped region; and a second n-type doped region, Located in the semiconductor substrate, the second n-type doped region is coupled to a second readout integrated circuit.

在本發明之一實施方式中可選擇性地包含一或多個下述特徵。鍺矽層可包含一第三n型摻雜區及一第四n型摻雜區，第一p型摻雜區之至少一部分可形成於第三n型摻雜區中，第二p型摻雜區之至少一部分可形成於第四n型摻雜區中。鍺矽層可包含一第三n型摻雜區，第一p型摻雜區之至少一部分及第二p型摻雜區之至少一部分可形成於第三n型摻雜區中。半導體基板可包含一或多個p型井區。 One or more of the following features can be optionally included in an embodiment of the present invention. The germanium-silicon layer may include a third n-type doped region and a fourth n-type doped region, at least a part of the first p-type doped region may be formed in the third n-type doped region, and the second p-type doped region At least a part of the impurity region may be formed in the fourth n-type doped region. The silicon germanium layer may include a third n-type doped region, and at least a part of the first p-type doped region and at least a part of the second p-type doped region may be formed in the third n-type doped region. The semiconductor substrate may include one or more p-type well regions.

在本發明之一實施方式中可選擇性地包含一或多個下述特點。鍺為一種對紅外光具有高吸收係數的材料，藉此可降低對紅外光吸收係數不佳之材料(例如矽)在基板深處所產生復合較慢的光生載子的問題。對一的具有p型摻雜區及n型摻雜區，且分別製作在不同深度的光電二極體來說，光載子傳輸距離受限於吸收材料的深度而非寬度；因此，若使用具有短吸收長度的吸收材料，則p型摻雜區及n型摻雜區之間的距離可被縮短，如此一來，小偏壓也可創造出強電場，進而增加操作速度。在一光電二極體中，兩群開關可***或垂直排列在交錯排列中，如此的時差測距系統可收集不同光相位的光載子。操作速度的增加允許在時差測距系統利用高調變頻率，進而可增加深度解析。在時差測距系統中，光脈衝的工作週期降低可讓光學脈衝的峰值強度增加，如此一來，可在維持相同功率損耗的調件下提升時差測距系統的訊雜比。這可讓光脈衝在沒脈衝形狀不歪曲的條件下降低光脈衝的工作週期。 One or more of the following features can be optionally included in an embodiment of the present invention. Germanium is a material with a high absorption coefficient for infrared light, which can reduce the problem of slow recombination of photo-generated carriers in the depths of the substrate caused by materials with poor absorption coefficient for infrared light (such as silicon). For a photodiode with a p-type doped region and an n-type doped region and are fabricated at different depths, the photocarrier transmission distance is limited by the depth of the absorbing material rather than the width; therefore, if you use With an absorbing material with a short absorption length, the distance between the p-type doped region and the n-type doped region can be shortened. In this way, a small bias voltage can also create a strong electric field, thereby increasing the operating speed. In a photodiode, two groups of switches can be inserted or arranged vertically in a staggered arrangement, such a time difference ranging system can collect different light Phase photocarriers. The increase in operating speed allows the use of high modulation frequencies in the time difference ranging system, which in turn can increase the depth of resolution. In the time difference ranging system, the reduction of the duty cycle of the optical pulse can increase the peak intensity of the optical pulse. As a result, the signal-to-noise ratio of the time difference ranging system can be improved while maintaining the same power loss adjustment components. This allows the light pulse to reduce the duty cycle of the light pulse without the pulse shape being distorted.

本發明一或多種實現方式細節將配合下列圖式說明。由本發明之詳細說明、圖式及專利範圍，可更明瞭本發明其他可能的特徵及優點。 The details of one or more implementation manners of the present invention will be described in conjunction with the following drawings. From the detailed description, drawings, and patent scope of the present invention, other possible features and advantages of the present invention can be more clearly understood.

100、160、170、180、200、250、260、270、300、360、370、380、400、450、460、470、480:雙開關光電二極體 100, 160, 170, 180, 200, 250, 260, 270, 300, 360, 370, 380, 400, 450, 460, 470, 480: double switch photodiode

102、202、302、402:基板 102, 202, 302, 402: substrate

106、206、306、406:吸收層 106, 206, 306, 406: absorption layer

108、208、308a、308b、408:第一開關 108, 208, 308a, 308b, 408: the first switch

110、210、310a、310b、410:第二開關 110, 210, 310a, 310b, 410: second switch

112、212、312、412:光信號 112, 212, 312, 412: optical signal

116、214、216、314、316、416:外部控制 116, 214, 216, 314, 316, 416: external control

122、222、322、422:第一控制信號 122, 222, 322, 422: the first control signal

124、224、324、424:第一讀出電路 124, 224, 324, 424: first readout circuit

132、232、332、432:第二控制信號 132, 232, 332, 432: second control signal

134、234、334、434:第二讀出電路 134, 234, 334, 434: second readout circuit

126、136、226、236、326a、326b、336a、336b、426、436:n型摻雜區 126, 136, 226, 236, 326a, 326b, 336a, 336b, 426, 436: n-type doped regions

128、138、209、228、238、309、328a、328b、338a、338b、428、438:p型摻雜區 128, 138, 209, 228, 238, 309, 328a, 328b, 338a, 338b, 428, 438: p-type doped regions

142、144、152、154、156、244、252、254、344、452、454、456、458:n型井區 142, 144, 152, 154, 156, 244, 252, 254, 344, 452, 454, 456, 458: n-type well area

246、248、346、348、446、448:p型井區 246, 248, 346, 348, 446, 448: p-type well area

362:第一平面 362: first plane

364:第二平面 364: second plane

502:傳送單元 502: Transmission Unit

504:接收單元 504: receiving unit

506:處理單元 506: Processing Unit

510:目標物體 510: Target Object

512:光脈衝 512: light pulse

514:反射光脈衝 514: reflected light pulse

圖1A、圖1B、圖1C及圖1D分別繪示一雙開關光電二極體之示意圖；圖2A、圖2B、圖2C及圖2D分別繪示一雙開關光電二極體之示意圖；圖3A、圖3B、圖3C及圖3D分別繪示一雙開關光電二極體之示意圖；圖4A、圖4B、圖4C、圖4D及圖4E分別繪示一雙開關光電二極體之示意圖；圖5A繪示一取像系統之方塊圖；圖5B及圖5C繪示利用一取像系統判斷一物體特性之技術之示意圖；以及圖6繪示利用一取像系統判斷一物體特性之流程圖。 Figure 1A, Figure 1B, Figure 1C, and Figure 1D respectively show a schematic diagram of a dual-switch photodiode; Figure 2A, Figure 2B, Figure 2C, and Figure 2D respectively show a schematic diagram of a dual-switch photodiode; Figure 3A , Figures 3B, 3C, and 3D respectively show schematic diagrams of a dual-switch photodiode; Figures 4A, 4B, 4C, 4D, and 4E show schematic diagrams of a dual-switch photodiode, respectively; 5A shows a block diagram of an imaging system; FIGS. 5B and 5C show schematic diagrams of the technique of using an imaging system to determine the characteristics of an object; and FIG. 6 illustrates a flowchart of using an imaging system to determine the characteristics of an object.

本揭示內容的一或更多個實施例會透過範例圖解在附圖的圖式之中而沒有限制意義，其中，相同的元件符號表示相同的元件。此些圖式未必依照比例繪製。 One or more embodiments of the present disclosure will be illustrated in the drawings of the drawings through examples without limiting meaning, in which the same component symbols represent the same components. These drawings are not necessarily drawn to scale.

光電二極體可用以感測光信號，並將所感測到的光信號轉換為電信號，以供其它電路進行後續信號處理。在時差測距(time-of-flight；簡稱TOF)應用時，立體物體的深度資訊可利用一傳輸光脈衝及一感測光脈衝間之一相位差進行測定。舉例來說，一二維陣列的像素可用以重建一立體物體之一立體影像；其中，每個像素可包含用以取得立體物體相位資訊的一或多個光電二極體。在某些實施方式中，時差測距應用使用具有近紅外光波段的光源；舉例來說，具有波長為850nm、940nm或1050nm的發光二極體。雖然一些光電二極體以矽作為吸收材料，但矽對近紅外波段的光信號的吸收度並不佳。更具體言之，光載子由矽基板的深處(例如深度大於10μm處)生成，這些光載子可緩慢地漂移及/或擴散至光電二極體接面，而這使得裝置的操作速度。再者，在常態使用時，會施加一小振幅電壓以控制光電二極體的操作來降低功率損耗。對一大吸收區(例如直徑10μm)而言，小振幅電壓可建立橫跨大吸收區的一個小的橫向場/縱向場，這會影響光載子掠過吸收區的漂移速度。裝置的操作速度就可以被近一步的限制。針對利用近紅外光波段之時差測距應用，本發明提出一種雙開關光電二極體設計結構及/或利用鍺矽作為一吸收材料的雙開關光電二極體。在本文中，所使用的術語「光電二極體(photodiode)」可以作為術語「光學感測器(optical sensor)」的代稱；其次，所使用的術語「鍺矽(germanium-silicon；分子式GeSi)」所指的鍺矽合金中，鍺含量為10%至100%，意即矽含量為0%至90%。在本文中，鍺矽層可利用全面式磊晶成長(blanket epitaxy)技術、選擇性磊晶成長(selective epitaxy)技術或其它技術來實現。又，含有鍺矽材料的一吸收層可形成於一平面、一平台頂面或一溝槽底面，並至少部分環繞於一絕緣物(例如：氧化物、氮化物)、一半導體(例如鍺、矽)，或其等之組合。一應變超晶格(strained super lattice)結構或一多量子井結構可包含多層例如是具有不同矽、鍺含量之選擇性矽鍺層。 The photodiode can be used to sense optical signals and convert the sensed optical signals into electrical signals for subsequent signal processing by other circuits. In time-of-flight (TOF) applications, the depth information of a three-dimensional object can be measured using a phase difference between a transmitted light pulse and a sensing light pulse. For example, a two-dimensional array of pixels can be used to reconstruct a three-dimensional image of a three-dimensional object; wherein each pixel can include one or more photodiodes for obtaining phase information of the three-dimensional object. In some embodiments, the time difference ranging application uses a light source with a near-infrared light band; for example, a light-emitting diode with a wavelength of 850 nm, 940 nm, or 1050 nm. Although some photodiodes use silicon as an absorbing material, silicon does not absorb light signals in the near-infrared band well. More specifically, photocarriers are generated from deep parts of the silicon substrate (for example, at a depth greater than 10μm). These photocarriers can slowly drift and/or diffuse to the photodiode junction, which makes the device's operation speed . Furthermore, in normal use, a small amplitude voltage is applied to control the operation of the photodiode to reduce power loss. For a large absorption region (for example, a diameter of 10 μm), a small amplitude voltage can establish a small lateral/longitudinal field across the large absorption region, which will affect the drift speed of photocarriers passing through the absorption region. The operating speed of the device can be further restricted. Aiming at the application of time difference ranging using near-infrared light, the present invention proposes a dual-switch photodiode design structure and/or a dual-switch photodiode using germanium silicon as an absorbing material. In this article, the term "photodiode" used can be used as a synonym for the term "optical sensor"; secondly, the term "germanium-silicon (germanium-silicon; molecular formula GeSi)" is used. In the germanium-silicon alloy referred to, the germanium content is 10% to 100%, which means that the silicon content is 0% to 90%. In this article, the germanium-silicon layer can use blanket epitaxy technology, select It can be achieved by selective epitaxy technology or other technologies. In addition, an absorber layer containing germanium-silicon material can be formed on a plane, a top surface of a platform, or a bottom surface of a trench, and at least partly surrounds an insulator (e.g., oxide, nitride), a semiconductor (e.g., germanium, Silicon), or a combination thereof. A strained super lattice structure or a multi-quantum well structure may include multiple layers, such as selective silicon germanium layers with different silicon and germanium contents.

圖1繪示一雙開關光電二極體100之示意圖，其用以將一光信號轉換為一電信號。雙開關光電二極體100包含一吸收層106，吸收層106形成於一基板102上。基板102可為適合將半導體裝置製作於其上之基板。舉例來說，基板102可為一矽基板。吸收層106包含一第一開關108及一第二開關110。 FIG. 1 shows a schematic diagram of a dual-switch photodiode 100, which is used to convert an optical signal into an electrical signal. The double-switch photodiode 100 includes an absorption layer 106 formed on a substrate 102. The substrate 102 may be a substrate suitable for fabricating a semiconductor device thereon. For example, the substrate 102 may be a silicon substrate. The absorption layer 106 includes a first switch 108 and a second switch 110.

一般來說，吸收層106接收一光信號112，並將光信號112轉換為複數電信號。吸收層106可選擇使對需求波長的光信號具有高吸收係數。若光信號112為紅外光，吸收層106可為一鍺矽平台；其中，鍺矽會吸收在光信號112中的光子，並產生電子電洞對。可依製程條件及應用領域來決定鍺矽平台中的鍺含量及矽含量。在某些實施方式中，吸收層106經設計使具有一厚度t。舉例來說，對波長為850奈米(nm)的光信號112來說，鍺矽平台的厚度約為1微米(μm)，以使其具有相當的量子效率。在某些實施方式中，吸收層106的表面可經設計使具有特定形狀；舉例來說，鍺矽平台的形狀可依光信號112在鍺矽台面的空間分佈而為圓形、方形、或矩形。在某些實施方式中，吸收層106可經設計以具有一側向尺寸大小以接收光信號112。舉例來說，鍺矽台面可為圓形，且其側向尺寸d的範圍可介於1μm至50μm。 Generally, the absorption layer 106 receives an optical signal 112 and converts the optical signal 112 into a complex electrical signal. The absorption layer 106 can be selected to have a high absorption coefficient for the optical signal of the required wavelength. If the optical signal 112 is infrared light, the absorption layer 106 can be a germanium silicon platform; wherein the germanium silicon absorbs the photons in the optical signal 112 and generates electron-hole pairs. The germanium content and silicon content in the germanium silicon platform can be determined according to the process conditions and application fields. In some embodiments, the absorption layer 106 is designed to have a thickness t. For example, for an optical signal 112 with a wavelength of 850 nanometers (nm), the thickness of the germanium-silicon platform is about 1 micrometer (μm), so that it has a considerable quantum efficiency. In some embodiments, the surface of the absorption layer 106 can be designed to have a specific shape; for example, the shape of the germanium silicon platform can be circular, square, or rectangular according to the spatial distribution of the light signal 112 on the germanium silicon platform . In some embodiments, the absorbent layer 106 can be designed to have a lateral dimension to The light signal 112 is received. For example, the germanium silicon mesa can be circular, and its lateral dimension d can range from 1 μm to 50 μm.

一第一開關108及一第二開關110製作在吸收層106中，第一開關108耦接於一第一控制信號122及一第一讀出電路124；第二開關110耦接於一第二控制信號132及一第二讀出電路134。第一讀出電路124或第二讀出電路134依據第一控制信號122及第二控制信號132的控制來決定收集電子或電洞。 A first switch 108 and a second switch 110 are fabricated in the absorption layer 106. The first switch 108 is coupled to a first control signal 122 and a first readout circuit 124; the second switch 110 is coupled to a second Control signal 132 and a second readout circuit 134. The first readout circuit 124 or the second readout circuit 134 decides to collect electrons or holes according to the control of the first control signal 122 and the second control signal 132.

在某些實施方式中，第一開關108及第二開關110用以收集複數電子；在前述條件下，第一開關108包含一p型摻雜區128及一n型摻雜區126。舉例來說，p型摻雜區128可具有一p+摻雜，其活化雜質濃度(activated dopant concentration)可為製程所能達成的最高雜質濃度；例如當吸收層106為鍺且於其中摻雜硼時，p+摻雜的最高濃度可為5x10²⁰cm^-3。在某些實施方式中，p型摻雜區128的摻雜濃度可低於5x10²⁰cm^-3，藉以在增加接觸電阻值的條件下簡化製作複雜度。一n型摻雜區126可具有一n+摻雜，其活化雜質濃度可為製程所能達成的最高雜質濃度；例如當吸收層106為鍺且摻雜磷時，n+摻雜的最高濃度可為1x10²⁰cm^-3。在某些實施方式中，n型摻雜區126的摻雜濃度可低於1x10²⁰cm^-3，藉以在增加接觸電阻值的條件下簡化製作複雜度。p型摻雜區128及n型摻雜區126間的距離可依製程條件來設計；一般來說，p型摻雜區128及n型摻雜區126間的距離愈近，則產生光載子的切換效率愈高。第二開關110 包含一p型摻雜區138及一n型摻雜區136，p型摻雜區138類似於p型摻雜區128，且n型摻雜區136類似於n型摻雜區126。 In some embodiments, the first switch 108 and the second switch 110 are used to collect multiple electrons; under the aforementioned conditions, the first switch 108 includes a p-type doped region 128 and an n-type doped region 126. For example, the p-type doped region 128 may have a p+ doping, and its activated dopant concentration may be the highest impurity concentration achievable by the process; for example, when the absorber layer 106 is germanium and boron is doped therein At this time, the highest concentration of p+ doping can be 5x10 ²⁰ cm ^-3 . In some embodiments, the doping concentration of the p-type doped region 128 may be lower than 5× ^{10 20} cm ⁻³ , thereby simplifying the manufacturing complexity while increasing the contact resistance. An n-type doped region 126 can have an n+ doping, and its activation impurity concentration can be the highest impurity concentration achievable by the process; for example, when the absorber layer 106 is germanium and doped with phosphorus, the highest n+ doping concentration can be 1x10 ²⁰ cm ^-3 . In some embodiments, the doping concentration of the n-type doped region 126 can be lower than 1×10 ²⁰ cm ⁻³ , so as to simplify the manufacturing complexity while increasing the contact resistance. The distance between the p-type doped region 128 and the n-type doped region 126 can be designed according to the process conditions; in general, the closer the distance between the p-type doped region 128 and the n-type doped region 126, the light carrier The switching efficiency of the child is higher. The second switch 110 includes a p-type doped region 138 and an n-type doped region 136, the p-type doped region 138 is similar to the p-type doped region 128, and the n-type doped region 136 is similar to the n-type doped region 126.

在某些實施方式中，p型摻雜區128耦接於第一控制信號122；舉例來說，p型摻雜區128可耦接於一電壓源，其中第一控制信號122可為電壓源提供之一交流電壓信號。在某些實施方式中，n型摻雜區126耦接於讀出電路124。讀出電路124可為由一重置閘極(reset gate)、一源極隨耦器(source-follower)及一選擇閘極(selection gate)所構成之一三電晶體結構(three-transistor)或其它用以處理電荷的電路。在某些實施方式中，讀出電路124可製作在基板102上。在某些實施方式中，讀出電路124可製作在另一基板上，並與雙開關光電二極體100利用晶片/晶圓接合或堆疊技術形成共同封裝。 In some embodiments, the p-type doped region 128 is coupled to the first control signal 122; for example, the p-type doped region 128 can be coupled to a voltage source, wherein the first control signal 122 can be a voltage source Provide an AC voltage signal. In some embodiments, the n-type doped region 126 is coupled to the readout circuit 124. The readout circuit 124 may be a three-transistor structure composed of a reset gate, a source-follower and a selection gate. Or other circuits used to process charge. In some embodiments, the readout circuit 124 can be fabricated on the substrate 102. In some embodiments, the readout circuit 124 can be fabricated on another substrate and form a common package with the dual-switch photodiode 100 using chip/wafer bonding or stacking technology.

p型摻雜層138耦接於第二控制信號132。舉例來說，p型摻雜區138可耦接於一電壓源；其中，第二控制信號132可為一交流電壓信號，且相位相反於第一控制信號122的交流電壓信號。在某些實施方式中，n型摻雜區136可耦接於讀出電路134。讀出電路134可類似於讀出電路124。 The p-type doped layer 138 is coupled to the second control signal 132. For example, the p-type doped region 138 may be coupled to a voltage source; wherein, the second control signal 132 may be an AC voltage signal, and an AC voltage signal whose phase is opposite to the first control signal 122. In some embodiments, the n-type doped region 136 can be coupled to the readout circuit 134. The readout circuit 134 may be similar to the readout circuit 124.

第一控制信號122及第二控制信號132用以控制由吸收光子所生成的複數電子的收集。舉例來說，若第一控制信號122不同於第二控制信號132，p型摻雜區128及p型摻雜區138間會建立一電場，且自由電子繪依據前述電場的方向而向p型摻雜區128或p型摻雜區138漂移。在某些實施方式中，第一控制信號122可固定於一電壓值Vi，第二控制信號132可在電壓值為Vi±△V之間交替。偏壓值的方向決定電子的漂移方向。據此，當其中之一開關(例如為第一開關)導通(意即電子往p型摻雜區128漂移)時，另一開關(例如為第二開關110)截止(意即電子由p型摻雜區138阻擋)。在某些實施方式中，第一控制信號122及第二控制信號132可具有不同電壓值。 The first control signal 122 and the second control signal 132 are used to control the collection of complex electrons generated by the absorption of photons. For example, if the first control signal 122 is different from the second control signal 132, an electric field will be established between the p-type doped region 128 and the p-type doped region 138, and the free electrons will be drawn to the p-type according to the direction of the aforementioned electric field. The doped region 128 or the p-type doped region 138 drifts. In some embodiments, the first control signal 122 can be fixed at a voltage Value Vi, the second control signal 132 can alternate between the voltage value Vi±ΔV. The direction of the bias value determines the drift direction of electrons. Accordingly, when one of the switches (for example, the first switch) is turned on (that is, electrons drift to the p-type doped region 128), the other switch (for example, the second switch 110) is turned off (that is, the electrons are switched from the p-type doped region 128). The doped region 138 is blocked). In some embodiments, the first control signal 122 and the second control signal 132 may have different voltage values.

一般而言，一p型摻雜區及一n型摻雜區的費米能階差異會在此二區之間創造一電場。在第一開關108中，一電場會建立在p型摻雜區128及n型摻雜區126之間；相同地，在第二開關110中，一電場會建立在p型摻雜區138及n型摻雜區136之間。當第一開關108導通，而第二開關110截止時，電子受到p型摻雜區128吸引，在p型摻雜區128及n型摻雜區126之間的電場進一步讓電子向n型摻雜區126傳遞。讀出電路124可接著處理由n型摻雜區126所收集到的電荷。在另一方面，當第二開關110導通，而第一開關108截止時，p型摻雜區138收集電子；在p型摻雜區138及n型摻雜區136之間的電場讓電子向n型摻雜區138傳遞。讀出電路134接著可處理由n型摻雜區136收集的電子。 Generally speaking, the Fermi level difference between a p-type doped region and an n-type doped region creates an electric field between the two regions. In the first switch 108, an electric field is established between the p-type doped region 128 and the n-type doped region 126; similarly, in the second switch 110, an electric field is established between the p-type doped region 138 and the n-type doped region 126. Between n-type doped regions 136. When the first switch 108 is turned on and the second switch 110 is turned off, electrons are attracted by the p-type doped region 128, and the electric field between the p-type doped region 128 and the n-type doped region 126 further allows the electrons to be doped to the n-type Miscellaneous area 126 passes. The readout circuit 124 can then process the charges collected by the n-type doped region 126. On the other hand, when the second switch 110 is turned on and the first switch 108 is turned off, the p-type doped region 138 collects electrons; the electric field between the p-type doped region 138 and the n-type doped region 136 allows the electrons to The n-type doped region 138 is transferred. The readout circuit 134 can then process the electrons collected by the n-type doped region 136.

在某些實施方式中，可施加一電壓在一開關的p型摻雜區及n型摻雜區之間，以讓開關操作在突崩機制中來增加雙開關光電二極體100的靈敏度。舉例來說，當p型摻雜區128及n型摻雜區126之間的距離約為100奈米時，可施加低於7伏特的電壓以在p型摻雜區128及n型摻雜區126之間創造突崩增益。 In some embodiments, a voltage can be applied between the p-type doped region and the n-type doped region of a switch to allow the switch to operate in a sudden avalanche mechanism to increase the sensitivity of the dual-switch photodiode 100. For example, when the distance between the p-type doped region 128 and the n-type doped region 126 is about 100 nanometers, a voltage lower than 7 volts can be applied to the p-type doped region 128 and the n-type doped region. Create sudden collapse gain between areas 126.

在某些實施方式中，基板102可耦接於一外部控制116。舉例來說，基板102可耦接至地端。在某些實施方式中，基板102可浮接或不耦接於任何的外部控制。 In some embodiments, the substrate 102 can be coupled to an external control 116. For example, the substrate 102 may be coupled to ground. In some embodiments, the substrate 102 may be floating or not coupled to any external control.

圖1B繪示用以將光信號轉換為電信號之雙開關光電二極體160之示意圖。雙開關光電二極體160類似於圖1A所繪示之雙開關光電二極體100，然其第一開關108及第二開關110分別更包含一n型井區152及一n型井區154。此外，吸收層106可為一p型摻雜區。在某些實施方式中，n型井區152及154的摻雜程度可由10¹⁵cm^-3至10¹⁷cm^-3，吸收層106的摻雜程度可由10¹⁴cm^-3至10¹⁶cm^-3。 FIG. 1B shows a schematic diagram of a dual-switch photodiode 160 used to convert optical signals into electrical signals. The dual-switch photodiode 160 is similar to the dual-switch photodiode 100 shown in FIG. 1A, but the first switch 108 and the second switch 110 further include an n-type well region 152 and an n-type well region 154, respectively . In addition, the absorption layer 106 may be a p-type doped region. In some embodiments, the doping level of the n-type well regions 152 and 154 can be from 10 ¹⁵ cm ^-3 to 10 ¹⁷ cm ^-3 , and the doping level of the absorption layer 106 can be from 10 ¹⁴ cm ^-3 to 10 ¹⁶ cm ^-3. .

p型摻雜區128、n型井區152、p型摻雜吸收層106、n型井區154及p型摻雜區138的排列形成一PNPNP接面結構。一般來說，PNPNP接面結構可降低了從第一控制信號122至第二控制信號132的一導通電流，或選擇性地降低從第二控制信號132至第一控制信號122的導通電流。n型摻雜區126、p型摻雜吸收層106及n型摻雜區136的排列形成NPN接面結構。一般來說，NPN接面結構可降低從第一讀出電路124至第二讀出電路134的電荷耦合，或選擇性地降低從第二讀出電路134往第一讀出電路124的電荷耦合。 The arrangement of the p-type doped region 128, the n-type well region 152, the p-type doped absorber layer 106, the n-type well region 154, and the p-type doped region 138 forms a PNPNP junction structure. Generally speaking, the PNPNP junction structure can reduce a conduction current from the first control signal 122 to the second control signal 132, or selectively reduce the conduction current from the second control signal 132 to the first control signal 122. The arrangement of the n-type doped region 126, the p-type doped absorption layer 106, and the n-type doped region 136 forms an NPN junction structure. Generally speaking, the NPN junction structure can reduce the charge coupling from the first readout circuit 124 to the second readout circuit 134, or selectively reduce the charge coupling from the second readout circuit 134 to the first readout circuit 124 .

在某些實施方式中，p型摻雜區128可完全形成在n型井區152內。在某些實施方式中，p型摻雜區128可部分形成在n型井區152中。舉例來說，p型摻雜區128的一部分可藉由佈植p型雜質於n型井區152中來實現，p型摻雜區128的另一部分可藉由佈植p型雜質於吸收層106中來實現。相同地，在某些實施方式中，p型摻雜區128可完全形成於n型井區154中。在某些其它實施方式中，p型摻雜區138可部分形成在n型井區154中。 In some embodiments, the p-type doped region 128 may be completely formed in the n-type well region 152. In some embodiments, the p-type doped region 128 may be partially formed in the n-type well region 152. For example, a part of the p-type doped region 128 can be implemented by implanting p-type impurities in the n-type well region 152, and another part of the p-type doped region 128 can be implemented by implanting p-type impurities in the absorber layer. 106 to achieve. Similarly, in some embodiments, the p-type doped region 128 may It is completely formed in the n-type well area 154. In certain other embodiments, the p-type doped region 138 may be partially formed in the n-type well region 154.

圖1C繪示用以將一光信號轉換為一電信號之雙開關光電二極體170之示意圖。雙開關光電二極體170與圖1A所繪示的雙開關二極體100類似，然雙開關光電二極體170的吸收層106更包含一n型井區156。此外，吸收層106可為一p型摻雜區。在某些實施方式中，n型井區156的摻雜程度可由10¹⁵cm^-3至10¹⁷cm^-3。吸收層106的摻雜程度可由10¹⁴cm³至10¹⁶cm^-3。 FIG. 1C shows a schematic diagram of a dual-switch photodiode 170 used to convert an optical signal into an electrical signal. The dual-switch photodiode 170 is similar to the dual-switch diode 100 shown in FIG. 1A, but the absorption layer 106 of the dual-switch photodiode 170 further includes an n-type well region 156. In addition, the absorption layer 106 may be a p-type doped region. In some embodiments, the doping level of the n-type well region 156 may be 10 ¹⁵ cm ^-3 to 10 ¹⁷ cm ^-3 . The doping degree of the absorption layer 106 can be 10 ¹⁴ cm ³ to 10 ¹⁶ cm ^-3 .

p型摻雜區128、n型井區156及p型摻雜區138的排列形成一PNP接面結構。一般來說，PNP接面結構可減少由第一控制信號122向第二控制信號132的傳導電流，或選擇性地減少由第二控制信號132往第一控制信號122的傳導電流。n型摻雜區126、p型摻雜吸收層106及n型摻雜區136的排列形成一NPN接面結構。一般來說，NPN接面結構可減少從第一讀出電路124向第二讀出電路134的電荷耦合，或選擇性地減少由第二讀出電路134往第一讀出電路124的電荷耦合。在某些實施方式中，若n型井區156的深度夠深，n型摻雜區126、p型摻雜區106、n型井區156、p型摻雜吸收層106及n型摻雜區136的排列可形成NPNPN接面結構，藉以更進一步地減少由第一讀出電路124往第二讀出電路134的一電荷耦合，或選擇性地減少由第二讀出電路134往第一讀出電路124的電荷耦合。 The arrangement of the p-type doped region 128, the n-type well region 156, and the p-type doped region 138 forms a PNP junction structure. Generally speaking, the PNP junction structure can reduce the conduction current from the first control signal 122 to the second control signal 132 or selectively reduce the conduction current from the second control signal 132 to the first control signal 122. The arrangement of the n-type doped region 126, the p-type doped absorption layer 106, and the n-type doped region 136 forms an NPN junction structure. Generally speaking, the NPN junction structure can reduce the charge coupling from the first readout circuit 124 to the second readout circuit 134, or selectively reduce the charge coupling from the second readout circuit 134 to the first readout circuit 124 . In some embodiments, if the depth of the n-type well region 156 is deep enough, the n-type doped region 126, the p-type doped region 106, the n-type well region 156, the p-type doped absorption layer 106, and the n-type doped region The arrangement of the regions 136 can form a NPNPN junction structure, thereby further reducing a charge coupling from the first readout circuit 124 to the second readout circuit 134, or selectively reduces the flow from the second readout circuit 134 to the first The charge of the readout circuit 124 is coupled.

在某些實施方式中，p型摻雜區128及138可完全形成在n型井區156中。在某些實施方式中，p型摻雜區128及138可部分形成在n型井區156中。舉例來說，p型摻雜區128的一部分可藉由佈植p型雜質於n型井區156中來實現，而p型摻雜區128的另一部分可藉由佈植p型雜質於吸收層106中來實現。 In some embodiments, the p-type doped regions 128 and 138 may be completely formed in the n-type well region 156. In some embodiments, the p-type doped regions 128 and 138 may be partially formed in the n-type well District 156. For example, a part of the p-type doped region 128 can be implemented by implanting p-type impurities in the n-type well region 156, and another part of the p-type doped region 128 can be implemented by implanting p-type impurities in the absorption Layer 106 to achieve.

圖1D繪示用以將光信號轉換為電信號之雙開關光電二極體180之示意圖。雙開關光電二極體180與圖1A所繪示的雙開關光電二極體100類似，然雙開關光電二極體180更包含一p型井區104、n型井區142及144。在某些實施方式中，n型井區142及144的摻雜程度可從10¹⁶cm^-3至10²⁰cm^-3，p型井區104的摻雜程度可為10¹⁶cm^-3至10²⁰cm^-3。 FIG. 1D shows a schematic diagram of a dual-switch photodiode 180 used to convert optical signals into electrical signals. The dual-switch photodiode 180 is similar to the dual-switch photodiode 100 shown in FIG. 1A, but the dual-switch photodiode 180 further includes a p-type well 104 and n-type wells 142 and 144. In some embodiments, the doping level of the n-type well regions 142 and 144 can be from 10 ¹⁶ cm ^-3 to 10 ²⁰ cm ^-3 , and the doping level of the p-type well region 104 can be from 10 ¹⁶ cm ^-3 to 10 ²⁰ cm ^-3 .

在某些實施方式中，吸收層106可不吸收入射光信號112中的全部光子。舉例來說，若鍺矽平台不會吸收入射NIR光信號112中的全部光子，則NIR光信號112便可進入矽基板102；矽基板102可吸收穿透基板的光子並產生深層地復合較慢的光生載子，這些復合較慢的光載子會對雙開關光電二極體的操作速度產生負面反應。 In some embodiments, the absorption layer 106 may not absorb all photons in the incident optical signal 112. For example, if the germanium-silicon platform does not absorb all the photons in the incident NIR optical signal 112, the NIR optical signal 112 can enter the silicon substrate 102; the silicon substrate 102 can absorb the photons that penetrate the substrate and produce deep recombination. These photocarriers with slower recombination will have a negative reaction to the operating speed of the dual-switch photodiode.

為了移除前述復合較慢的光載子，雙開關光電二極體180可包含使n型井區142和144與p型井區104短路的接點。舉例來說，前述接點可利用一矽化製程(silicide process)或沉積金屬墊連接於p型井區104及n型井區142、144。在n型井區142、144和p型井區104之間的短路允許於基板102中產生的光載子在短路接點上復合，進而提升雙開關光電二極體的操作速度。在某些實施方式中，p型井區104用以縮小在吸收層106及基板102之間圍繞界面缺陷的電場，藉以減少裝置漏電流。 In order to remove the aforementioned slower recombination photocarriers, the dual-switch photodiode 180 may include contacts that short-circuit the n-type well regions 142 and 144 and the p-type well region 104. For example, the aforementioned contacts may be connected to the p-type well region 104 and the n-type well regions 142, 144 by using a silicide process or deposited metal pads. The short circuit between the n-type well regions 142, 144 and the p-type well region 104 allows photocarriers generated in the substrate 102 to recombine on the short-circuit contacts, thereby increasing the operating speed of the dual-switch photodiode. In some embodiments, the p-type well region 104 is used to reduce the electric field surrounding the interface defect between the absorber layer 106 and the substrate 102, thereby reducing device leakage current.

雖然在圖1A-1D中並未示出，但在某些實施方式中，光信號可由雙開關光電二極體的基板102的背側抵達雙開關光電二極體。一或多個光學元件可製作在基板102的背側以對光信號進行聚焦、準直、散焦、濾光或其它功能。 Although not shown in FIGS. 1A-1D, in some embodiments, the optical signal may reach the dual-switch photodiode from the backside of the substrate 102 of the dual-switch photodiode. One or more optical elements can be fabricated on the back side of the substrate 102 to focus, collimate, defocus, filter, or perform other functions on the optical signal.

雖然在圖1A-1D中並未示出，但在某些實施方式中，第一開關108及第二開關110可選擇性地經製作而改以收集電洞而非電子。在前述狀況下，p摻雜區128及p型摻雜區138可利用n型摻雜區來取代，n型摻雜區126及n型摻雜區136可利用p型摻雜區來取代，n型井區142、144、152、154及156可利用p型井區來取代，p型井區104可利用n型井區來取代。 Although not shown in FIGS. 1A-1D, in some embodiments, the first switch 108 and the second switch 110 can be selectively manufactured to collect holes instead of electrons. Under the aforementioned conditions, the p-doped region 128 and the p-type doped region 138 can be replaced by an n-type doped region, and the n-type doped region 126 and the n-type doped region 136 can be replaced by a p-type doped region. The n-type well regions 142, 144, 152, 154, and 156 can be replaced by p-type well regions, and the p-type well region 104 can be replaced by n-type well regions.

雖然在圖1A-1D中並未示出，但在某些實施方式中，可在製作雙開關光電二極體100、160、170及180之後，將吸收層106接合於一基板。基板可為允許光電號112傳輸至雙開關光電二極體的任意材料。舉例來說，基板可為聚合物或玻璃。在某些實施方式中，一或多個光學元件可製作在承載基板上以對光信號進行聚焦、準直、散焦、濾光或其它功能。 Although not shown in FIGS. 1A-1D, in some embodiments, the absorption layer 106 can be bonded to a substrate after the dual-switch photodiodes 100, 160, 170, and 180 are fabricated. The substrate can be any material that allows the photoelectric signal 112 to be transmitted to the dual-switch photodiode. For example, the substrate may be polymer or glass. In some embodiments, one or more optical elements can be fabricated on the carrier substrate to focus, collimate, defocus, filter, or perform other functions on the optical signal.

雖然在圖1A-1D中並未示出，但在某些實施方式中，雙開關光電二極體100、160、170及180可(例如利用金屬對金屬接合、氧化物對氧化物接合、混合接合)而與一第二基板接合；第二基板上可具有控制信號之電路及/或讀出電路及/或相位鎖相迴路(phase lock loop；簡稱PLL)及/或類比數位轉換器。一金屬層可沉積於雙開關光電二極體的頂部以做為一反射器而反射從背側入射的光信號。一氧化層可設在金屬層及吸收層之間以增加反射率。金屬層也可做為晶圓接合程序時的接合層。在某些實施方式中，可加入類似於第一開關108和第二開關110的一或多個開關以接合控制信號/讀出電路。 Although not shown in FIGS. 1A-1D, in some embodiments, the dual-switch photodiodes 100, 160, 170, and 180 can be used (for example, metal-to-metal bonding, oxide-to-oxide bonding, mixed Bonding) and bonding with a second substrate; the second substrate may have a control signal circuit and/or a readout circuit and/or a phase lock loop (PLL) and/or an analog-to-digital converter. A metal layer can be deposited on the top of the dual-switch photodiode to act as a reflector to reflect the light signal incident from the back side. An oxide layer can be provided between the metal layer and the absorption layer to increase the reflectivity. The metal layer can also be used as the bonding layer during the wafer bonding process. In some embodiments, one or more switches similar to the first switch 108 and the second switch 110 may be added to engage the control signal/readout circuit.

雖然在圖1A-1D中並未示出，但在某些實施方式中，吸收層106可部分或完全地嵌入或凹入在基板102中以緩和表面形貌(surface topography)且便於製作。前述技術係揭示於美國專利申請號15/228,282，專利名稱為「Germanium-Silicon Light Sensing Apparatus」之專利申請案中。 Although not shown in FIGS. 1A-1D, in some embodiments, the absorption layer 106 may be partially or completely embedded or recessed in the substrate 102 to ease the surface topography and facilitate fabrication. The aforementioned technology is disclosed in a patent application named "Germanium-Silicon Light Sensing Apparatus" in US Patent Application No. 15/228,282.

圖2A繪示用以將一光信號轉換為一電信號之雙開關光電二極體200之示意圖。在圖2A中，第一開關208及第二開關210製作於一基板202上。雙開關光電二極體200包含一吸收層206，其製作於基板202上。基板202可為任何適合製作半導體裝置於其上之基板；舉例來說，基板202可為一矽基板。 FIG. 2A shows a schematic diagram of a dual-switch photodiode 200 used to convert an optical signal into an electrical signal. In FIG. 2A, the first switch 208 and the second switch 210 are fabricated on a substrate 202. The double-switch photodiode 200 includes an absorption layer 206 which is fabricated on the substrate 202. The substrate 202 can be any substrate suitable for fabricating a semiconductor device thereon; for example, the substrate 202 can be a silicon substrate.

一般來說，吸收層206接收一光信號212並將其轉換為電信號。吸收層206類似於吸收層106。在某些實施方式中，吸收層206可包含一p型摻雜區209。p型摻雜區209可斥拒從吸收層206往基板202的光電子，藉以增加操作速度。舉例來說，p型摻雜區209可具有p+摻雜。p+摻雜濃度可為製程能達到的最高雜質濃度；例如當吸收層206為鍺且雜質為硼時，p+摻雜的最高濃度為5x10²⁰cm^-3。在某些實施方式中，p型摻雜區209的摻雜濃度可低於5x10²⁰cm^-3，藉以在增加接觸電阻值的條件下簡化製作複雜度。 Generally, the absorption layer 206 receives an optical signal 212 and converts it into an electrical signal. The absorption layer 206 is similar to the absorption layer 106. In some embodiments, the absorption layer 206 may include a p-type doped region 209. The p-type doped region 209 can repel the photoelectrons from the absorption layer 206 to the substrate 202, thereby increasing the operating speed. For example, the p-type doped region 209 may have p+ doping. The p+ doping concentration can be the highest impurity concentration that can be achieved by the process; for example, when the absorption layer 206 is germanium and the impurity is boron, the highest p+ doping concentration is 5× ^{10 20} cm ⁻³ . In some embodiments, the doping concentration of the p-type doped region 209 can be lower than 5× ^{10 20} cm ⁻³ , so as to simplify the manufacturing complexity while increasing the contact resistance.

第一開關208及第二開關210可製作在基板202中。第一開關208耦接於一第一控制信號222及一第一讀出電路224。第二開關210耦接於一第二控制信號232及一第二讀出電路234。第一控制信號222及第二控制信號232控制第一讀出電路224或第二讀出電路234因收集吸收光子而產生的電子或電洞。第一控制信號222類似於第一控制信號122，第二控制信號232類似於第二控制信號132；第一讀出電路224類似於第一讀出電路124，第二讀出電路234類似於第二讀出電路134。 The first switch 208 and the second switch 210 can be fabricated in the substrate 202. The first switch 208 is coupled to a first control signal 222 and a first readout circuit 224. The second switch 210 is coupled to a second control signal 232 and a second readout circuit 234. The first control signal 222 and the second control signal 232 control the first readout circuit 224 or the second readout circuit 234 to collect electrons or holes generated by the absorption of photons. The first control signal 222 is similar to the first control signal 122, the second control signal 232 is similar to the second control signal 132; the first readout circuit 224 is similar to the first readout circuit 124, and the second readout circuit 234 is similar to the first Two readout circuit 134.

在某些實施方式中，第一開關208及第二開關210可用以收集吸收層206產生的複數電子。在前述條件下，第一開關208包含一p型摻雜區228及一n型摻雜區226。舉例來說，p型摻雜區228可具有一p+摻雜；其中，p+摻雜的活化雜質濃度為製程所能達到的最大摻雜濃度，例如當基板202為矽質基板且雜質為硼時，p+摻雜的最高濃度為2x10²⁰cm^-3。在某些實施方式中，p型摻雜區228的摻雜濃度可低於2x10²⁰cm^-3，藉以在增加接觸電阻值的條件下簡化製作複雜度。n型摻雜區226可具有一n+摻雜；其中，n+摻雜的活化雜質濃度為製程所能達到的最大摻雜濃度，例如當基板202為矽質基板且雜質為磷時，n+摻雜的最高濃度為5x10²⁰cm^-3。在某些實施方式中，n型摻雜區226的摻雜濃度可低於5x10²⁰cm^-3，藉以在增加接觸電阻值的條件下簡化製作複雜度。p型摻雜區228及n型摻雜區226之間的距離可依製程條件來設計。p型摻雜區228及n型摻雜區226之間的距離愈短，產生光載子的切換效率愈高。第二開關210包含一p型摻雜區238及一n型摻雜區236。p型摻雜區238類似於p型摻雜區228，n型摻雜區236類似於n型摻雜區226。 In some embodiments, the first switch 208 and the second switch 210 can be used to collect the complex electrons generated by the absorption layer 206. Under the aforementioned conditions, the first switch 208 includes a p-type doped region 228 and an n-type doped region 226. For example, the p-type doped region 228 may have a p+ doping; wherein the activation impurity concentration of the p+ doping is the maximum doping concentration that can be achieved by the process, for example, when the substrate 202 is a silicon substrate and the impurity is boron , The highest concentration of p+ doping is 2x10 ²⁰ cm ^-3 . In some embodiments, the doping concentration of the p-type doped region 228 can be lower than 2×10 ²⁰ cm ⁻³ , so as to simplify the manufacturing complexity while increasing the contact resistance. The n-type doped region 226 may have an n+ doping; wherein the activation impurity concentration of the n+ doping is the maximum doping concentration that can be achieved by the process, for example, when the substrate 202 is a silicon substrate and the impurity is phosphorus, the n+ doping The highest concentration is 5x10 ²⁰ cm ^-3 . In some embodiments, the doping concentration of the n-type doped region 226 can be lower than 5× ^{10 20} cm ⁻³ , thereby simplifying the manufacturing complexity while increasing the contact resistance. The distance between the p-type doped region 228 and the n-type doped region 226 can be designed according to process conditions. The shorter the distance between the p-type doped region 228 and the n-type doped region 226, the higher the switching efficiency of generating photocarriers. The second switch 210 includes a p-type doped region 238 and an n-type doped region 236. The p-type doped region 238 is similar to the p-type doped region 228, and the n-type doped region 236 is similar to the n-type doped region 226.

在某些實施方式中，p型摻雜區228耦接於第一控制信號222。n型摻雜區226耦接於讀出電路224。p型摻雜區238耦接於第二控制信號232。n型摻雜區236耦接於讀出電路234。第一控制信號222及第二控制信號232用以控制吸收光子所產生的電子的收集。舉例來說，吸收層206吸收光信號212中的複數光子並生成電子電洞對，所述的電子電洞對漂移或擴散進入基板202。當施加電壓時，若第一控制信號222不同於第二控制信號232，p型摻雜區228及p型摻雜區238之間會建立一電場，且自由電子會依據電場的方向從吸收層206往p型摻雜區228或p型摻雜區238漂移。在某些實施方式中，第一控制信號222可固定在一電壓值Vi，且第二控制信號可在電壓值為Vi±△V之間交替。偏壓值會決定電子的漂移方向。據此，當其中之一開關(例如為第一開關208)導通(即電子往p型摻雜區228漂移)時，另一開關(例如為第二開關210)截止(即電子由p型摻雜區238阻擋)。在某些實施方式中，第一控制信號222及第二控制信號232可具有不同的電壓值。 In some embodiments, the p-type doped region 228 is coupled to the first control signal 222. The n-type doped region 226 is coupled to the readout circuit 224. The p-type doped region 238 is coupled to the second control signal 232. The n-type doped region 236 is coupled to the readout circuit 234. The first control signal 222 and the second control signal 232 are used to control the collection of electrons generated by the absorption of photons. For example, the absorption layer 206 absorbs the complex number of photons in the optical signal 212 and generates electron-hole pairs, which drift or diffuse into the substrate 202. When a voltage is applied, if the first control signal 222 is different from the second control signal 232, an electric field will be established between the p-type doped region 228 and the p-type doped region 238, and free electrons will move from the absorber layer according to the direction of the electric field. 206 drifts toward the p-type doped region 228 or the p-type doped region 238. In some embodiments, the first control signal 222 may be fixed at a voltage value Vi, and the second control signal may alternate between the voltage value Vi±ΔV. The bias value determines the direction of electron drift. Accordingly, when one of the switches (for example, the first switch 208) is turned on (that is, electrons drift to the p-type doped region 228), the other switch (for example, the second switch 210) is turned off (that is, the electrons are doped by the p-type The miscellaneous area 238 is blocked). In some embodiments, the first control signal 222 and the second control signal 232 may have different voltage values.

在第一開關208中，電場建立在p型摻雜區228及n型摻雜區226之間。相同地，在第二開關210中，電場建立在p型摻雜區238及n型摻雜區236之間。當第一開關208導通而第二開關210截止時，電子受到p型摻雜區228吸引，在p型摻雜區228及n型摻雜區226之間的電場進一步讓電子向n型摻雜區226傳遞。讀出電路224可接著能處理由n型摻雜區226所收集到電荷。相反地，當第二開關210導通而第一開關208截止時，電子受到p型摻雜區238吸引，在p型摻雜區238及n型摻雜區236之間的電場進一步讓電子向n型摻雜區236傳遞。讀出電路234可接著能夠處理由n型摻雜區236所收集到的電荷。 In the first switch 208, an electric field is established between the p-type doped region 228 and the n-type doped region 226. Similarly, in the second switch 210, an electric field is established between the p-type doped region 238 and the n-type doped region 236. When the first switch 208 is turned on and the second switch 210 is turned off, electrons are attracted by the p-type doped region 228, and the electric field between the p-type doped region 228 and the n-type doped region 226 further allows the electrons to be doped to the n-type Zone 226 passes. The readout circuit 224 can then be The reason is that the charges collected in the n-type doped region 226 are collected. Conversely, when the second switch 210 is turned on and the first switch 208 is turned off, electrons are attracted by the p-type doped region 238, and the electric field between the p-type doped region 238 and the n-type doped region 236 further allows the electrons to move toward the n-type doped region. The type doped region 236 is transferred. The readout circuit 234 may then be able to process the charge collected by the n-type doped region 236.

在某些實施方式中，可施加一電壓在一開關的p型摻雜區及n型摻雜區之間，以讓開關操作在突崩機制中來增加雙開關光電二極體200的靈敏度。舉例來說，當p型摻雜區228及n型摻雜區229之間的距離約為100奈米時，可施加低於7伏特的電壓以在p型摻雜區228及n型摻雜區226之間創造突崩增益。 In some embodiments, a voltage may be applied between the p-type doped region and the n-type doped region of a switch to allow the switch to operate in a sudden collapse mechanism to increase the sensitivity of the dual-switch photodiode 200. For example, when the distance between the p-type doped region 228 and the n-type doped region 229 is about 100 nanometers, a voltage lower than 7 volts can be applied to the p-type doped region 228 and the n-type doped region 228 Create sudden collapse gain between areas 226.

在某些實施方式中，p型摻雜區209可耦接於一外部控制214。舉例來說，p型摻雜區209可耦接於地端。在某些實施方式中，p型摻雜區209可浮接或不耦接於任何外部控制。在某些實施方式中，基板202可耦接於一外部控制216；舉例來說，基板202可耦接於地端。在某些實施方式中，基板202可浮接或不耦接於任何外部控制。 In some embodiments, the p-type doped region 209 can be coupled to an external control 214. For example, the p-type doped region 209 can be coupled to the ground. In some embodiments, the p-type doped region 209 may be floating or not coupled to any external control. In some embodiments, the substrate 202 can be coupled to an external control 216; for example, the substrate 202 can be coupled to ground. In some embodiments, the substrate 202 may be floating or not coupled to any external control.

圖2B繪示用以將一光信號轉換為一電信號之一雙開關光電二極體250之示意圖。雙開關光電二極體250類似於圖2A所繪示的光電二極體200，但雙開關光電二極體250的第一開關208及第二開關210更分別包含一n型井區252及一n型井區254。此外，吸收層206可為一p型摻雜區，基板202可為一p型摻雜基板。在某些實施方式中，n型井區252和254的摻雜程度可由10¹⁵cm^-3至10¹⁷cm^-3。吸收層206及基板202的摻雜程度可由10¹⁴cm^-3至10¹⁶cm^-3。 FIG. 2B shows a schematic diagram of a dual-switch photodiode 250 used to convert an optical signal into an electrical signal. The dual-switch photodiode 250 is similar to the photodiode 200 shown in FIG. 2A, but the first switch 208 and the second switch 210 of the dual-switch photodiode 250 further include an n-type well 252 and a n-type well area 254. In addition, the absorption layer 206 may be a p-type doped region, and the substrate 202 may be a p-type doped substrate. In some embodiments, the doping level of the n-type well regions 252 and 254 can be 10 ¹⁵ cm ^-3 to 10 ¹⁷ cm ^-3 . The doping level of the absorption layer 206 and the substrate 202 can be 10 ¹⁴ cm ^-3 to 10 ¹⁶ cm ^-3 .

p型摻雜區228、n型井區252、p型摻雜基板202、n型井區254及p型摻雜區238的排列形成一PNPNP接面結構。一般來說，PNPNP接面結構可減少從第一控制信號222往第二控制信號232之一導通電流，或選擇性地減少由第二控制信號232往第一控制信號222之導通電流。n型摻雜區226、p型摻雜基板202及n型摻雜區236的排列形成一NPN接面結構。一般來說，NPN接面結構可減少從第一讀出電路224往第二讀出電路234的電荷耦合，或選擇性地減少從第二讀出電路234往第一讀出電路224的電荷耦合。 The arrangement of the p-type doped region 228, the n-type well region 252, the p-type doped substrate 202, the n-type well region 254, and the p-type doped region 238 forms a PNPNP junction structure. Generally speaking, the PNPNP junction structure can reduce the conduction current from the first control signal 222 to the second control signal 232, or selectively reduce the conduction current from the second control signal 232 to the first control signal 222. The arrangement of the n-type doped region 226, the p-type doped substrate 202, and the n-type doped region 236 forms an NPN junction structure. Generally speaking, the NPN junction structure can reduce the charge coupling from the first readout circuit 224 to the second readout circuit 234, or selectively reduce the charge coupling from the second readout circuit 234 to the first readout circuit 224 .

在某些實施方式中，p型摻雜區228完全形成在n型井區252中。在某些實施方式中，p型摻雜區228可部分形成於n型井區252中。舉例來說，p型摻雜區228的一部分可藉由佈值p型雜質於n型井區252中來實現，p型摻雜區228的另一部份可藉由佈植p型雜質於基板202中來實現。相同地，在某些實施方式中，p型摻雜區238可完全形成在n型井區254。在某些實施方式中，p型摻雜區238可部分形成於n型井區254中。 In some embodiments, the p-type doped region 228 is completely formed in the n-type well region 252. In some embodiments, the p-type doped region 228 may be partially formed in the n-type well region 252. For example, a part of the p-type doped region 228 can be implemented by implanting p-type impurities in the n-type well region 252, and another part of the p-type doped region 228 can be implemented by implanting p-type impurities in the n-type well region 252. Implementation in the substrate 202. Similarly, in some embodiments, the p-type doped region 238 may be completely formed in the n-type well region 254. In some embodiments, the p-type doped region 238 may be partially formed in the n-type well region 254.

圖2C繪示用以將光信號轉換為電信號之雙開關光電二極體260之示意圖。雙開關光電二極體260類似於圖2A所繪示的雙開關光電二極體200，但雙開關光電二極體260的基板202更包含一n型井區244。此外，吸收層206可為一p型摻雜區，基板202可為一p型摻雜基板。在某些實施方式中，n型井區244的摻雜程度可由10¹⁵cm^-3至10¹⁷cm^-3，吸收層206及基板202的摻雜程度可由10¹⁴cm^-3至10¹⁶cm^-3。 FIG. 2C shows a schematic diagram of a dual-switch photodiode 260 used to convert optical signals into electrical signals. The dual-switch photodiode 260 is similar to the dual-switch photodiode 200 shown in FIG. 2A, but the substrate 202 of the dual-switch photodiode 260 further includes an n-type well 244. In addition, the absorption layer 206 may be a p-type doped region, and the substrate 202 may be a p-type doped substrate. In certain embodiments, the doping level of the n-type well region 244 may be 10 ¹⁵ cm ^-3 to 10 ¹⁷ cm ^-3, the absorbent layer 206 and the substrate 202 doping level may be 10 ¹⁴ cm ^-3 to 10 ¹⁶ cm ^{- 3} .

p型摻雜區228、n型井區244及p型摻雜區238的排列形成一PNP接面結構。PNP接面結構可減少從第一控制信號222至第二控制信號232之一導通電流，或可選擇性地減少由第二控制信號232往第一控制信號222之導通電流。n型摻雜區226、p型摻雜基板202及n型摻雜區236的排列形成一NPN接面結構。一般來說，NPN接面結構可降低由第一讀出電路224往第二讀出電路234之電荷耦合，或可選擇性地降低由第二讀出電路234往第一讀出電路224之電荷耦合。在某些實施方式中，若n型井區244的深度夠深，n型摻雜區226、p型摻雜基板202、n型井區244、p型摻雜基板202及n型摻雜區236的排列可形成一NPNPN接面結構，以更進一步地降低由第一讀出電路224往第二讀出電路234之一電荷耦合，或可選擇性地降低由第二讀出電路234往第一讀出電路224之電荷耦合。在某些實施方式中，n型井區244可有效地降低電子所能察覺到之由吸收層206往基板202流動時的潛在能障。 The arrangement of the p-type doped region 228, the n-type well region 244, and the p-type doped region 238 forms a PNP junction structure. The PNP junction structure can reduce the conduction current from one of the first control signal 222 to the second control signal 232, or can selectively reduce the conduction current from the second control signal 232 to the first control signal 222. The arrangement of the n-type doped region 226, the p-type doped substrate 202, and the n-type doped region 236 forms an NPN junction structure. Generally speaking, the NPN junction structure can reduce the charge coupling from the first readout circuit 224 to the second readout circuit 234, or can selectively reduce the charge from the second readout circuit 234 to the first readout circuit 224 coupling. In some embodiments, if the depth of the n-type well region 244 is deep enough, the n-type doped region 226, the p-type doped substrate 202, the n-type well region 244, the p-type doped substrate 202, and the n-type doped region The arrangement of 236 can form a NPNPN junction structure to further reduce the charge coupling from the first readout circuit 224 to the second readout circuit 234, or can selectively reduce the charge coupling from the second readout circuit 234 to the second readout circuit 234. Charge coupling of a readout circuit 224. In some embodiments, the n-type well region 244 can effectively reduce the potential energy barrier that electrons can perceive when flowing from the absorption layer 206 to the substrate 202.

在某些實施方式中，p型摻雜區228及238完全位於n型井區244中。在某些實施方式中，p型摻雜區228和238可部分形成在n型井區244中；舉例來說，p型摻雜區228的一部分可藉由佈植p型雜質於n型井區244中來實現，p型摻雜區228的另一部分可藉由佈植p型雜質於基板202中來實現。 In some embodiments, the p-type doped regions 228 and 238 are completely located in the n-type well region 244. In some embodiments, the p-type doped regions 228 and 238 may be partially formed in the n-type well region 244; for example, a part of the p-type doped region 228 may be implanted by p-type impurities in the n-type well region. In the region 244, another part of the p-type doped region 228 can be realized by implanting p-type impurities in the substrate 202.

圖2D繪示用以將一光信號轉換為一電信號之一雙開關光電二極體270之示意圖。雙開關光電二極體270類似於圖2A所繪示的雙開關光電二極體200，但雙開關光電二極體270更包含一或多個p型井區 246及一或多個p型井區248。在某些實施方式中，一或多個p型井區246及一或多個p型井區246可為一環狀結構之一部分，前述的環狀結構圍繞第一開關208及第二開關210。在某些實施方式中，p型井區246和248的摻雜程度可由10¹⁵cm^-3至10²⁰cm^-3。前述的一或多個p型井區246和248用以分隔相鄰像素的複數光電子。 2D shows a schematic diagram of a dual-switch photodiode 270 used to convert an optical signal into an electrical signal. The dual-switch photodiode 270 is similar to the dual-switch photodiode 200 shown in FIG. 2A, but the dual-switch photodiode 270 further includes one or more p-type well regions 246 and one or more p-type wells. District 248. In some embodiments, the one or more p-type well regions 246 and the one or more p-type well regions 246 may be part of a ring structure that surrounds the first switch 208 and the second switch 210 . In some embodiments, the doping level of the p-type well regions 246 and 248 can be 10 ¹⁵ cm ^-3 to 10 ²⁰ cm ^-3 . The aforementioned one or more p-type well regions 246 and 248 are used to separate the complex photoelectrons of adjacent pixels.

雖然在圖2A-2D中並未示出，但在某些實施方式中，一光信號可由雙開關光電二極體的基板202的背側入射。一或多個光學構件可製作在基板202的背側以對光信號進行聚焦、準直、散焦、濾光或其它功能。 Although not shown in FIGS. 2A-2D, in some embodiments, an optical signal may be incident on the backside of the substrate 202 of the dual-switch photodiode. One or more optical components may be fabricated on the back side of the substrate 202 to focus, collimate, defocus, filter, or perform other functions on the optical signal.

雖然在圖2A-2D中並未示出，但在某些實施方式中，第一開關208及第二開關210可選擇性地經製作而改以收集電洞而非電子；在前述狀況下，p型摻雜區228、p型摻雜區238及p型摻雜區209可以n型摻雜區來取代，n型摻雜區226及n型摻雜區236可以p型摻雜區來取代，n型井區252、254及244可利用p型井區來取代，p型井區246和248可利用n型井區來取代。 Although not shown in FIGS. 2A-2D, in some embodiments, the first switch 208 and the second switch 210 can be selectively manufactured to collect holes instead of electrons; under the aforementioned conditions, The p-type doped region 228, the p-type doped region 238, and the p-type doped region 209 can be replaced by an n-type doped region, and the n-type doped region 226 and the n-type doped region 236 can be replaced by a p-type doped region. , The n-type well regions 252, 254, and 244 can be replaced by p-type well regions, and the p-type well regions 246 and 248 can be replaced by n-type well regions.

雖然在圖2A-2D中並未示出，但在某些實施方式中，在完成製作雙開關光電二極體200、250、260及270之後，吸收層209可接合於一基板。承載基板可為允許光信號212傳輸至雙開關光電二極體的任何材料。舉例來說，一或多個光學元件可製作於承載基板上以對光信號212進行聚焦、準直、散焦、濾光或其它功能。 Although not shown in FIGS. 2A-2D, in some embodiments, after the dual-switch photodiodes 200, 250, 260, and 270 are fabricated, the absorption layer 209 may be bonded to a substrate. The carrier substrate can be any material that allows the optical signal 212 to be transmitted to the dual-switch photodiode. For example, one or more optical elements can be fabricated on the carrier substrate to focus, collimate, defocus, filter, or perform other functions on the optical signal 212.

雖然在圖2A-2D中並未示出，但在某些實施方式中，雙開關光電二極體200、250、260及270可(例如利用金屬對金屬接合、氧化物對氧化物接合、混合接合)而與一第二基板接合；第二基板上具有供控制信號之電路及/或讀出電路及/或相位鎖相迴路及/或類比數位轉換器。一金屬層可沉積於雙開關光電二極體的頂部以做為一反射器來反射從背側入射的光信號。一氧化層可設在金屬層及吸收層之間以增加反射率。金屬層也可做為晶圓接合程序時的接合層。在某些實施方式中，可加入類似於第一開關208和第二開關210的一或多個開關以接合控制信號/讀出電路。 Although not shown in FIGS. 2A-2D, in some embodiments, the dual-switch photodiodes 200, 250, 260, and 270 can be used (for example, metal-to-metal bonding, oxide For oxide bonding, hybrid bonding) and bonding with a second substrate; the second substrate has a circuit for control signals and/or a readout circuit and/or a phase-locked loop and/or an analog-to-digital converter. A metal layer can be deposited on the top of the dual-switch photodiode to act as a reflector to reflect the light signal incident from the back side. An oxide layer can be provided between the metal layer and the absorption layer to increase the reflectivity. The metal layer can also be used as the bonding layer during the wafer bonding process. In some embodiments, one or more switches similar to the first switch 208 and the second switch 210 may be added to engage the control signal/readout circuit.

雖然在圖2A-2D中並未示出，但在某些實施方式中，吸收層206可部分地或完全地嵌入或凹入在基板202中以緩和表面形貌且便於製作。前述技術係揭示於美國專利申請號15/228,282，專利名稱為「Germanium-Silicon Light Sensing Apparatus」之專利申請案中。 Although not shown in FIGS. 2A-2D, in some embodiments, the absorption layer 206 may be partially or completely embedded or recessed in the substrate 202 to ease the surface topography and facilitate fabrication. The aforementioned technology is disclosed in a patent application named "Germanium-Silicon Light Sensing Apparatus" in US Patent Application No. 15/228,282.

圖3A繪示用以將一光信號轉換為一電信號之一雙開關光電二極體300之示意圖。在圖3A中，第一開關308a和308b，以及第二開關310a和310b垂直地製作於一基板302上。雙開關光電二極體100或雙開關光電二極體200的一個特徵為具有較大的光學窗尺寸d，電子由其中之一開關漂移或擴散至另一開關的光電子傳輸時間長，這會影響光電二極體的操作速度。雙開關光電二極體300藉由垂直排列p型摻雜區及n型摻雜區，可進一步提升操作速度。藉由垂直排列，光電子傳輸距離將由原本由吸收層的光學窗尺寸d(例如約10μm)縮減為吸收層的厚度t(例如約1μm)。雙開關光電二極體300 包含一吸收層306，其製作於一基板302上。基板302可為任何合適於製作半導體裝置於其上之基板，例如：一矽基板。 FIG. 3A shows a schematic diagram of a dual-switch photodiode 300 used to convert an optical signal into an electrical signal. In FIG. 3A, the first switches 308a and 308b, and the second switches 310a and 310b are vertically fabricated on a substrate 302. One feature of the double-switch photodiode 100 or the double-switch photodiode 200 is that it has a large optical window size d. The electrons drift or diffuse from one switch to the other switch have a long transmission time of photoelectrons, which will affect the photoelectricity. The operating speed of the diode. The dual-switch photodiode 300 can further increase the operating speed by vertically arranging the p-type doped region and the n-type doped region. With the vertical arrangement, the photoelectron transmission distance is reduced from the original optical window size d (for example, about 10 μm) of the absorption layer to the thickness t (for example, about 1 μm) of the absorption layer. Double switch photodiode 300 It includes an absorption layer 306, which is fabricated on a substrate 302. The substrate 302 can be any suitable substrate for fabricating a semiconductor device thereon, such as a silicon substrate.

一般來說，吸收層306接收一光信號312，並將光信號312轉換為複數電信號。吸收層306類似於吸收層206。在某些實施方式中，吸收層306可包含一p型摻雜區309，p型摻雜區309類似於p型摻雜區209。 Generally, the absorption layer 306 receives an optical signal 312 and converts the optical signal 312 into a complex electrical signal. The absorption layer 306 is similar to the absorption layer 206. In some embodiments, the absorption layer 306 may include a p-type doped region 309, which is similar to the p-type doped region 209.

第一開關308a及308b，以及第二開關310a及310b皆製作於基板302中。在此要特別注意的是，雖然圖3A僅繪示出兩個第一開關308a及308b及兩個第二開關310a及310b，然而第一開關及第二開關的數目並不以此限。第一開關308a及308b耦接於一第一控制信號322及一第一第一讀出電路324。第二開關310a及310b可耦接於一第二控制信號332及一第二讀出電路334。 The first switches 308a and 308b and the second switches 310a and 310b are all fabricated in the substrate 302. It should be noted here that although FIG. 3A only shows two first switches 308a and 308b and two second switches 310a and 310b, the number of first switches and second switches is not limited to this. The first switches 308a and 308b are coupled to a first control signal 322 and a first first readout circuit 324. The second switches 310a and 310b can be coupled to a second control signal 332 and a second readout circuit 334.

一般來說，第一控制信號322及第二控制信號332控制由第一讀出電路324或第二讀出電路334所收集之電子或電洞，前述的電子或電洞由吸收層306吸收之光子所產生。第一控制信號322類似於第一控制信號122，第二控制信號332類似於第二控制信號132，第一讀出電路324類似於第一讀出電路124，第二讀出電路334類似於第二讀出電路134。在某些實施方式中，第一開關308a及308b，以及第二開關310a及310b可製作以收集吸收層306產生的電子。在這樣的條件下，第一開關308a及308b分別包含p型摻雜區328a、328b及n型摻雜區326a、326b。舉例來說，p型摻雜區328a及328b可具有一p+摻雜；其中，活化雜質濃度可為製程所能達成的最高雜質濃度，例如當基板302為矽且雜質為硼時，p+摻雜的最高濃度可為2x10²⁰cm^-3。在某些實施方式中，p型摻雜區328a及328b的摻雜濃度可低於2x10²⁰cm^-3，藉以在增加接觸電阻值的條件下簡化製作複雜度。n型摻雜區326a及326b可具有一n+摻雜；其中，活化雜質濃度可為製程所能達成的最高雜質濃度，例如當基板302為矽且雜質為磷時，n+摻雜的最高濃度可為5x10²⁰cm^-3。在某些實施方式中，n型摻雜區326a及326b的摻雜濃度可低於5x10²⁰cm^-3，藉以在增加接觸電阻值的條件下簡化製作複雜度。p型摻雜區328a及n型摻雜區326a之間的距離可依製程條件來設計。舉例來說，p型摻雜區328a及n型摻雜區326a之間的距離可依佈植雜質的能量來控制。一般來說，當p型摻雜區328a/328b及n型摻雜區326a/326b之間的距離愈靠近，產生光載子的切換效率愈高。第二開關310a及310b分別包含p型摻雜區338a及338b，以及n型摻雜區336a及336b。p型摻雜區338a/338b類似於p型摻雜區328a/328b，n型摻雜區336a/336b類似於n型摻雜區326a/326b。 Generally speaking, the first control signal 322 and the second control signal 332 control the electrons or holes collected by the first readout circuit 324 or the second readout circuit 334, and the aforementioned electrons or holes are absorbed by the absorption layer 306. Generated by photons. The first control signal 322 is similar to the first control signal 122, the second control signal 332 is similar to the second control signal 132, the first readout circuit 324 is similar to the first readout circuit 124, and the second readout circuit 334 is similar to the first Two readout circuit 134. In some embodiments, the first switches 308 a and 308 b and the second switches 310 a and 310 b can be fabricated to collect electrons generated by the absorption layer 306. Under such conditions, the first switches 308a and 308b respectively include p-type doped regions 328a, 328b and n-type doped regions 326a, 326b. For example, the p-type doped regions 328a and 328b may have a p+ doping; wherein, the activation impurity concentration may be the highest impurity concentration achievable by the process. For example, when the substrate 302 is silicon and the impurity is boron, p+ doping The highest concentration can be 2x10 ²⁰ cm ^-3 . In some embodiments, the doping concentration of the p-type doped regions 328a and 328b can be lower than 2×10 ²⁰ cm ⁻³ , so as to simplify the manufacturing complexity while increasing the contact resistance. The n-type doped regions 326a and 326b may have an n+ doping; wherein, the activation impurity concentration may be the highest impurity concentration achievable by the process. For example, when the substrate 302 is silicon and the impurity is phosphorus, the highest n+ doping concentration may be It is 5x10 ²⁰ cm ^-3 . In some embodiments, the doping concentration of the n-type doped regions 326a and 326b can be lower than 5× ^{10 20} cm ⁻³ , so as to simplify the manufacturing complexity while increasing the contact resistance. The distance between the p-type doped region 328a and the n-type doped region 326a can be designed according to process conditions. For example, the distance between the p-type doped region 328a and the n-type doped region 326a can be controlled according to the energy of the implanted impurities. Generally speaking, as the distance between the p-type doped regions 328a/328b and the n-type doped regions 326a/326b is closer, the switching efficiency for generating photocarriers is higher. The second switches 310a and 310b include p-type doped regions 338a and 338b, and n-type doped regions 336a and 336b, respectively. The p-type doped regions 338a/338b are similar to the p-type doped regions 328a/328b, and the n-type doped regions 336a/336b are similar to the n-type doped regions 326a/326b.

在某些實施方式中，p型摻雜區328a及328b耦接於第一控制信號322。n型摻雜區326a及326b耦接於讀出電路324。p型摻雜區338a及338b可耦接於第二控制信號332。n型摻雜區336a及336b耦接於讀出電路334。第一控制信號322及第二控制信號332用以控制由所吸收之光子所產生之電子的收集。舉例來說，當吸收層306吸收光信號312中的光子時，所生成的電子電洞對係漂移或擴散至基板302。當施加電壓時，若第一控制信號322不同於第二控制信號 332，在p型摻雜區309及p型摻雜區328a/328b或p型摻雜區338a/338b之間會建立複數電場，且從吸收層306來的電子會依據電場方向而向p型摻雜區328a/328b或p型摻雜區338a/338b漂移。在某些實施方式中，第一控制信號322可固定在一電壓值Vi，第二控制信號332可在電壓值為Vi±△V之間交替。偏壓值的方向決定電子的漂移方向。藉此，當一群開關(例如為第一開關308a及308b)導通(即電子往p型摻雜區328a和328b漂移)時，另一開關(例如為第二開關310a和310b)截止(即電子由p型摻雜區338a和338b阻擋)。在某些實施方式中，第一控制信號322及第二控制信號332可為不同電壓值。 In some embodiments, the p-type doped regions 328 a and 328 b are coupled to the first control signal 322. The n-type doped regions 326a and 326b are coupled to the readout circuit 324. The p-type doped regions 338a and 338b can be coupled to the second control signal 332. The n-type doped regions 336a and 336b are coupled to the readout circuit 334. The first control signal 322 and the second control signal 332 are used to control the collection of electrons generated by the absorbed photons. For example, when the absorption layer 306 absorbs photons in the optical signal 312, the generated electron-hole pairs drift or diffuse to the substrate 302. When voltage is applied, if the first control signal 322 is different from the second control signal 332. A complex electric field will be established between the p-type doped region 309 and the p-type doped region 328a/328b or the p-type doped region 338a/338b, and the electrons from the absorber layer 306 will move toward the p-type according to the direction of the electric field. The doped regions 328a/328b or the p-type doped regions 338a/338b drift. In some embodiments, the first control signal 322 may be fixed at a voltage value Vi, and the second control signal 332 may alternate between the voltage value Vi±ΔV. The direction of the bias value determines the drift direction of electrons. Thereby, when a group of switches (for example, the first switches 308a and 308b) are turned on (that is, electrons drift to the p-type doped regions 328a and 328b), another switch (for example, the second switches 310a and 310b) is turned off (that is, the electrons Blocked by p-type doped regions 338a and 338b). In some embodiments, the first control signal 322 and the second control signal 332 may have different voltage values.

在每一第一開關308a/308b中，電場係建立於p型摻雜區328a/328b及n型摻雜區326a/326b之間。相同地，在每一第二開關310a/310b中，電場係建立在p型摻雜區338a/338b及n型摻雜區336a/336b之間。當第一開關308a和308b導通而第二開關310a和310b截止時，電子受到p型摻雜區328a和328b吸引，在p型摻雜區328a及n型摻雜區326a之間的電場更進一步讓電子往n型摻雜區326a傳遞；相同地，p型摻雜區328b及n型摻雜區326b之間的電場亦讓電子往n型摻雜區326b傳遞。讀出電路324接著能處理由n型摻雜區326a和326b所收集到的電荷。相反地，當第二開關310a和310b導通而第一開關308a和308b截止時，電子受到p型摻雜區338a和338b吸引，在p型摻雜區338a及n型摻雜區336a之間的電場進一步讓電子往n型摻雜區336a傳遞；相同地，p型摻雜區338b及n型摻雜區336b之間的電場亦讓電子往n型摻雜區336b傳遞。讀出電路334接著能處理由n型摻雜區336a和336b所收集到的電荷。 In each of the first switches 308a/308b, an electric field is established between the p-type doped regions 328a/328b and the n-type doped regions 326a/326b. Similarly, in each of the second switches 310a/310b, an electric field is established between the p-type doped regions 338a/338b and the n-type doped regions 336a/336b. When the first switches 308a and 308b are turned on and the second switches 310a and 310b are turned off, electrons are attracted by the p-type doped regions 328a and 328b, and the electric field between the p-type doped region 328a and the n-type doped region 326a is further increased The electrons are transferred to the n-type doped region 326a; similarly, the electric field between the p-type doped region 328b and the n-type doped region 326b also allows electrons to be transferred to the n-type doped region 326b. The readout circuit 324 can then process the charges collected by the n-type doped regions 326a and 326b. Conversely, when the second switches 310a and 310b are turned on and the first switches 308a and 308b are turned off, electrons are attracted by the p-type doped regions 338a and 338b. The electric field further allows electrons to pass to the n-type doped region 336a; similarly, the gap between the p-type doped region 338b and the n-type doped region 336b The electric field also allows electrons to pass to the n-type doped region 336b. The readout circuit 334 can then process the charges collected by the n-type doped regions 336a and 336b.

在某些實施方式中，可施加一電壓在一開關的p型摻雜區及n型摻雜區之間，以讓開關操作在崩潰區來增加雙開關光電二極體300的靈敏度。舉例來說，當p型摻雜區328a及n型摻雜區326a之間的距離約為100奈米時，可施加低於7伏特的電壓以在p型摻雜區328a及n型摻雜區326a之間創造突崩增益。 In some embodiments, a voltage can be applied between the p-type doped region and the n-type doped region of a switch to allow the switch to operate in the breakdown region to increase the sensitivity of the dual-switch photodiode 300. For example, when the distance between the p-type doped region 328a and the n-type doped region 326a is about 100 nm, a voltage lower than 7 volts can be applied to the p-type doped region 328a and the n-type doped region 328a A sudden collapse gain is created between areas 326a.

在某些實施方式中，p型摻雜區309可耦接於一外部控制314；舉例來說，p型摻雜區309可耦接於地端。在某些實施方式中，p型摻雜區309可浮接或不耦接於任何外部控制。在某些實施方式中，基板302可耦接於一外部控制316；舉例來說，基板302可耦接於地端。在某些實施方式中，基板302可浮接或不耦接於任何外部控制。 In some embodiments, the p-type doped region 309 can be coupled to an external control 314; for example, the p-type doped region 309 can be coupled to ground. In some embodiments, the p-type doped region 309 may be floating or not coupled to any external control. In some embodiments, the substrate 302 can be coupled to an external control 316; for example, the substrate 302 can be coupled to ground. In some embodiments, the substrate 302 may be floating or not coupled to any external control.

圖3B繪示用以將一光信號轉換為一電信號之雙開關光電二極體360之示意圖。雙開關光電二極體360類似於圖3A所繪示的雙開關光電二極體360，但雙開關光電二極體360更包含一n型井區344。此外，吸收層306可為一p型摻雜區，基板可為一p型摻雜基板。在某些實施方式中，n型井區344的摻雜程度可由10¹⁵cm^-3至10¹⁷cm^-3，基板302的摻雜程度可由10¹⁴cm³至10¹⁶cm^-3。 FIG. 3B shows a schematic diagram of a dual-switch photodiode 360 used to convert an optical signal into an electrical signal. The dual-switch photodiode 360 is similar to the dual-switch photodiode 360 shown in FIG. 3A, but the dual-switch photodiode 360 further includes an n-type well region 344. In addition, the absorption layer 306 may be a p-type doped region, and the substrate may be a p-type doped substrate. In some embodiments, the doping degree of the n-type well region 344 can be 10 ¹⁵ cm ^-3 to 10 ¹⁷ cm ^-3 , and the doping degree of the substrate 302 can be 10 ¹⁴ cm ³ to 10 ¹⁶ cm ^-3 .

p型摻雜區328a、n型井區344及p型摻雜區338a的排列形成一PNP接面結構；相同地，p型摻雜區328b、n型井區344及p型摻雜區338b也排列成一PNP接面結構。一般來說，PNP接面結構可減少了由第一控制信號322向第二控制信號332的傳導電流，或可選擇性地減少了由第二控制信號332往第一控制信號322的傳導電流。n型摻雜區326a、p型摻雜基板302及n型摻雜區336a的排列形成一NPN接面結構；相同地，n型摻雜區326b、p型摻雜基板302及n型摻雜區336b也排列成一NPN接面結構。一般來說，NPN接面結構可減少了從第一讀出電路324向第二讀出電路334的電荷耦合，或可選擇性地減少由第二讀出電路334往第一讀出電路324的電荷耦合。在某些實施方式中，n型井區344可有效地降低電子所能察覺到之由吸收層306往基板302流動時的潛在能障。 The arrangement of the p-type doped region 328a, the n-type well region 344 and the p-type doped region 338a forms a PNP junction structure; similarly, the p-type doped region 328b, the n-type well region 344 and the p-type doped region 338b Also arranged in a PNP junction structure. Generally speaking, the PNP junction structure can reduce the conduction current from the first control signal 322 to the second control signal 332, or can be selectively The ground reduces the conduction current from the second control signal 332 to the first control signal 322. The arrangement of the n-type doped region 326a, the p-type doped substrate 302, and the n-type doped region 336a forms an NPN junction structure; similarly, the n-type doped region 326b, the p-type doped substrate 302, and the n-type doped region Region 336b is also arranged in an NPN junction structure. Generally speaking, the NPN junction structure can reduce the charge coupling from the first readout circuit 324 to the second readout circuit 334, or can selectively reduce the charge coupling from the second readout circuit 334 to the first readout circuit 324. Charge coupled. In some embodiments, the n-type well region 344 can effectively reduce the potential energy barrier that electrons can perceive when flowing from the absorber layer 306 to the substrate 302.

在某些實施方式中，p型摻雜區328a、338a、328b及338b係完全形成在n型井區344中。在某些實施方式中，p型摻雜區328a、338a、328b和338b可部分形成在n型井區344中。舉例來說，p型摻雜區328a的一部分可藉由佈植p型雜質於n型井區344中來實現，p型摻雜區328a的另一部分可藉由佈植p型雜質於基板302中來實現。 In some embodiments, the p-type doped regions 328a, 338a, 328b, and 338b are completely formed in the n-type well region 344. In some embodiments, the p-type doped regions 328a, 338a, 328b, and 338b may be partially formed in the n-type well region 344. For example, a part of the p-type doped region 328a can be realized by implanting p-type impurities in the n-type well region 344, and another part of the p-type doped region 328a can be realized by implanting p-type impurities on the substrate 302. To achieve.

圖3C繪示用以將一光信號轉換為一電信號之一雙開關光電二極體370之示意圖。雙開關光電二極體370類似於圖3A所繪示的雙開關光電二極體30，但雙開關光電二極體370更包含一或多個p型井區346及一或多個p型井區348。在某些實施方式中，一或多個p型井區346及一或多個p型井區348可為一環狀結構之一部分，前述的環狀結構圍繞第一開關308a、308b及第二開關310a、310b。在某些實施方式中，一或多個p型井區的摻雜程度可由10¹⁵cm^-3至10²⁰cm^-3。前述的一或多個p型井區346和348用以分隔相鄰像素的複數光電子。 FIG. 3C shows a schematic diagram of a dual-switch photodiode 370 used to convert an optical signal into an electrical signal. The dual-switch photodiode 370 is similar to the dual-switch photodiode 30 shown in FIG. 3A, but the dual-switch photodiode 370 further includes one or more p-type well regions 346 and one or more p-type wells. District 348. In some embodiments, the one or more p-type well regions 346 and the one or more p-type well regions 348 may be part of a ring structure that surrounds the first switch 308a, 308b and the second switch 308a, 308b. Switches 310a, 310b. In some embodiments, the doping level of one or more p-type well regions may range from 10 ¹⁵ cm ^-3 to 10 ²⁰ cm ^-3 . The aforementioned one or more p-type well regions 346 and 348 are used to separate the complex photoelectrons of adjacent pixels.

圖3D繪示一雙開關光電二極體380之剖視圖。在圖3D中，第一開關308a和308b的p型摻雜區328a和328b，以及第二開關310a和310b的p型摻雜區338a和338b可交叉地排列在基板302的一第一平面362上。圖3D更繪示了第一開關308a和308b的n型摻雜區326a和326b，以及第二開關310a和310b的n型摻雜區336a和336b可交叉地排列在基板302的一第二平面364。 FIG. 3D shows a cross-sectional view of a dual-switch photodiode 380. In FIG. 3D, the p-type doped regions 328a and 328b of the first switches 308a and 308b, and the p-type doped regions 338a and 338b of the second switches 310a and 310b may be arranged crosswise on a first plane 362 of the substrate 302 superior. FIG. 3D further illustrates that the n-type doped regions 326a and 326b of the first switches 308a and 308b, and the n-type doped regions 336a and 336b of the second switches 310a and 310b can be arranged crosswise on a second plane of the substrate 302 364.

雖然在圖3A-3D中並未示出，但在某些實施方式中，光信號可由雙開關光電二極體的背側的基板302抵達雙開關光電二極體。一或多個光學元件可製作在基板302的背側以對光信號進行聚焦、準直、散焦、濾光或其它功能。 Although not shown in FIGS. 3A-3D, in some embodiments, the optical signal can reach the dual-switch photodiode from the substrate 302 on the back side of the dual-switch photodiode. One or more optical elements can be fabricated on the back side of the substrate 302 to focus, collimate, defocus, filter, or perform other functions on the optical signal.

雖然在圖3A-3D中並未示出，但在某些實施方式中，第一開關308a和308b，以及第二開關310a和310b可選擇性地經製作以收集電洞而非電子。在前述狀況下，p型摻雜區328a和328b、p型摻雜區338a和338b，以及p型摻雜區309可利用n型摻雜區來取代，n型摻雜區326a和326b，以及n型摻雜區336a和336b可利用p型摻雜區來取代，n型井區344可利用p型井區來取代，p型井區346、348可利用n型井區來取代。 Although not shown in FIGS. 3A-3D, in some embodiments, the first switches 308a and 308b, and the second switches 310a and 310b can be selectively fabricated to collect holes instead of electrons. Under the aforementioned conditions, the p-type doped regions 328a and 328b, the p-type doped regions 338a and 338b, and the p-type doped region 309 can be replaced with n-type doped regions, the n-type doped regions 326a and 326b, and The n-type doped regions 336a and 336b can be replaced by p-type doped regions, the n-type well region 344 can be replaced by p-type well regions, and the p-type well regions 346 and 348 can be replaced by n-type well regions.

雖然在圖3A-3D中並未示出，但在某些實施方式中，在完成製作雙開關光電二極體300、360、370及380之後，吸收層306可接合於一基板。承載基板可為允許光信號312傳輸至雙開關光電二極體的任意材料。舉例來說，一或多個光學元件可製作於承載基板上以對光信號312進行聚焦、準直、散焦、濾光或其它功能。 Although not shown in FIGS. 3A-3D, in some embodiments, after the dual-switch photodiodes 300, 360, 370, and 380 are fabricated, the absorption layer 306 may be bonded to a substrate. The carrier substrate can be any material that allows the optical signal 312 to be transmitted to the dual-switch photodiode. For example, one or more optical elements can be fabricated on the carrier substrate to focus, collimate, defocus, filter, or perform other functions on the optical signal 312.

雖然在圖3A-3D中並未示出，但在某些實施方式中，雙開關光電二極體300、360、370及380可(例如利用金屬對金屬接合、氧化物對氧化物接合、混合接合)而與一第二基板接合；第二基板上可具有控制信號之電路及/或讀出電路及/或相位鎖相迴路及/或類比數位轉換器。一金屬層可沉積於雙開關光電二極體的頂部以做為一反射器而反射從背側入射的光信號。一氧化層可設在金屬層及吸收層之間以增加反射率。金屬層也可做為晶圓接合程序時的接合層。在某些實施方式中，可加入類似於第一開關308a(或308b)和第二開關310a(或310b)的一或多個開關以接合控制信號/讀出電路。 Although not shown in FIGS. 3A-3D, in some embodiments, the dual-switch photodiodes 300, 360, 370, and 380 can be (for example, metal-to-metal bonding, oxide-to-oxide bonding, mixed Bonding) to bond with a second substrate; the second substrate may have a control signal circuit and/or a readout circuit and/or a phase-locked loop and/or an analog-to-digital converter. A metal layer can be deposited on the top of the dual-switch photodiode to act as a reflector to reflect the light signal incident from the back side. An oxide layer can be provided between the metal layer and the absorption layer to increase the reflectivity. The metal layer can also be used as the bonding layer during the wafer bonding process. In some embodiments, one or more switches similar to the first switch 308a (or 308b) and the second switch 310a (or 310b) may be added to engage the control signal/readout circuit.

雖然在圖3A-3D中並未示出，但在某些實施方式中，吸收層306可部分或完全地嵌入或凹入在基板302中以緩和表面形貌且便於製作。前述技術係揭示於美國專利申請號15/228,282，專利名稱為「Germanium-Silicon Light Sensing Apparatus」之專利申請案中。 Although not shown in FIGS. 3A-3D, in some embodiments, the absorption layer 306 may be partially or completely embedded or recessed in the substrate 302 to ease the surface topography and facilitate fabrication. The aforementioned technology is disclosed in a patent application named "Germanium-Silicon Light Sensing Apparatus" in US Patent Application No. 15/228,282.

圖4A繪示用以將一光信號轉換為一電信號之一雙開關光電二極體400之示意圖。雙開關光電二極體400包含一吸收層406，吸收層406製作於一基板402上。基板402可為任何適合將半導體裝置製作於其上的基板，例如可為一矽基板。吸收層406包含一第一開關408及一第二開關410。 4A shows a schematic diagram of a dual-switch photodiode 400 used to convert an optical signal into an electrical signal. The double-switch photodiode 400 includes an absorption layer 406, and the absorption layer 406 is fabricated on a substrate 402. The substrate 402 can be any substrate suitable for fabricating a semiconductor device on it, for example, a silicon substrate. The absorption layer 406 includes a first switch 408 and a second switch 410.

一般來說，吸收層406接收一光信號412，並將光信號412轉換為複數電信號。吸收層406可選擇對需求波段具有高吸收率。對紅外光(Near-Infrared；簡稱NIR)波長來說，吸收層406可為一鍺矽平台；其中，鍺矽吸收光信號412中的光子並產生電子電洞對。在鍺矽平台中，鍺和矽的含量可依特定製程或應用來調整。在某些實施方式中，吸收層406經設計使具有厚度t。舉例來說，對850nm波長來說，鍺矽平台約為1微米，藉以使具有實質上的量子效率。在某些實施方式中，吸收層406的表面經設計使具有特殊形狀。舉例來說，鍺矽平台的形狀可依光信號412在鍺矽台面的空間分佈而為圓形、方形或矩形。在某些實施方式中，吸收層406可經設計以具有一側向尺寸大小以接收光信號412。舉例來說，鍺矽台面可為圓形，且其側向尺寸d的範圍可介於1微米至50微米。 Generally, the absorption layer 406 receives an optical signal 412 and converts the optical signal 412 into a complex electrical signal. The absorption layer 406 can be selected to have a high absorption rate for the demand band. For Near-Infrared (NIR) wavelengths, the absorption layer 406 can be a germanium silicon platform; Among them, the germanium silicon absorbs the photons in the light signal 412 and generates electron-hole pairs. In the germanium silicon platform, the content of germanium and silicon can be adjusted according to a specific process or application. In some embodiments, the absorption layer 406 is designed to have a thickness t. For example, for a wavelength of 850nm, the germanium silicon platform is about 1 micron, so that it has substantial quantum efficiency. In some embodiments, the surface of the absorption layer 406 is designed to have a special shape. For example, the shape of the germanium silicon mesa can be circular, square or rectangular according to the spatial distribution of the optical signal 412 on the germanium silicon mesa. In some embodiments, the absorption layer 406 may be designed to have a lateral dimension to receive the optical signal 412. For example, the germanium silicon mesa can be circular, and its lateral dimension d can range from 1 micrometer to 50 micrometers.

第一開關408及第二開關410製作在吸收層406及基板402中。第一開關408耦接於一第一控制信號422及一第一讀出電路424。第二開關410耦接於一第二控制信號432及一第二讀出電路434。一般來說，第一控制信號422及第二控制信號432控制第一讀出電路424或第二讀出電路434所收集之因吸收光子所產生之電子或電洞。 The first switch 408 and the second switch 410 are fabricated in the absorption layer 406 and the substrate 402. The first switch 408 is coupled to a first control signal 422 and a first readout circuit 424. The second switch 410 is coupled to a second control signal 432 and a second readout circuit 434. Generally, the first control signal 422 and the second control signal 432 control the electrons or holes generated by the absorption of photons collected by the first readout circuit 424 or the second readout circuit 434.

在某些實施方式中，第一開關408及第二開關410經設計以收集電子。在前述狀況下，第一開關408包含一p型摻雜區428及一n型摻雜區426，p型摻雜區428佈植於吸收層406中，n型摻雜區426佈植於基板402中。舉例來說，p型摻雜區428可具有一p+摻雜，其活化雜質濃度為製程所能達成的最高雜質濃度；例如當吸收層106為鍺且雜質為硼時，p+摻雜的最高濃度可為5x10²⁰cm^-3。在某些實施方式中，p型摻雜區428的摻雜濃度可低於5x10²⁰cm^-3，藉以在增加接觸電阻值的條件下簡化製作複雜度。n型摻雜區426可具有一n+摻雜，其活化雜質濃度為製程所能達成的最高雜質濃度；例如當基板402為矽且雜質為磷時，n+摻雜的最高濃度可為5x10²⁰cm^-3。在某些實施方式中，n型摻雜區426的摻雜濃度可低於5x10²⁰cm^-3，藉以在增加接觸電阻值的條件下簡化製作複雜度。p型摻雜區428及n型摻雜區426間的距離可依製程條件來設計；一般來說，p型摻雜區428及n型摻雜區426之間的距離愈近，則產生複數光載子的切換效率愈高。第二開關410包含一p型摻雜區438及一n型摻雜區436，p型摻雜區438類似於p型摻雜區428，且n型摻雜區436類似於n型摻雜區426。 In some embodiments, the first switch 408 and the second switch 410 are designed to collect electrons. Under the aforementioned conditions, the first switch 408 includes a p-type doped region 428 and an n-type doped region 426. The p-type doped region 428 is implanted in the absorber layer 406, and the n-type doped region 426 is implanted on the substrate. 402 in. For example, the p-type doped region 428 may have a p+ doping, the activation impurity concentration of which is the highest impurity concentration achievable by the process; for example, when the absorber layer 106 is germanium and the impurity is boron, the highest concentration of p+ doping It can be 5x10 ²⁰ cm ^-3 . In some embodiments, the doping concentration of the p-type doped region 428 can be lower than 5× ^{10 20} cm ⁻³ , so as to simplify the manufacturing complexity while increasing the contact resistance. The n-type doped region 426 may have an n+ doping, and its activation impurity concentration is the highest impurity concentration achievable by the process; for example, when the substrate 402 is silicon and the impurity is phosphorus, the maximum n+ doping concentration may be 5x10 ²⁰ cm ^-3 . In some embodiments, the doping concentration of the n-type doped region 426 can be lower than 5× ^{10 20} cm ⁻³ , so as to simplify the manufacturing complexity while increasing the contact resistance. The distance between the p-type doped region 428 and the n-type doped region 426 can be designed according to the process conditions; in general, the closer the distance between the p-type doped region 428 and the n-type doped region 426, the more complex The switching efficiency of photocarriers is higher. The second switch 410 includes a p-type doped region 438 and an n-type doped region 436, the p-type doped region 438 is similar to the p-type doped region 428, and the n-type doped region 436 is similar to the n-type doped region 426.

在某些實施方式中，p型摻雜區428耦接於第一控制信號422。舉例來說，p型摻雜區48可耦接於一電壓源；其中，第一控制信號422可為電壓源提供之一交流電壓信號。在某些實施方式中，n型摻雜區426耦接於讀出電路424。讀出電路424可為由一重置閘極、一源極隨耦器及一選擇閘極所構成之一三電晶體結構或其它用以處理自由載子的電路。在某些實施方式中，讀出電路424可製作於基板402上。在某些實施方式中，讀出電路424可製作在另一基板上，並與雙開關光電二極體400利用晶片/晶圓接合或堆疊技術形成共同封裝。 In some embodiments, the p-type doped region 428 is coupled to the first control signal 422. For example, the p-type doped region 48 can be coupled to a voltage source; wherein, the first control signal 422 can provide an AC voltage signal for the voltage source. In some embodiments, the n-type doped region 426 is coupled to the readout circuit 424. The readout circuit 424 can be a tri-transistor structure composed of a reset gate, a source follower, and a select gate or other circuits for processing free carriers. In some embodiments, the readout circuit 424 can be fabricated on the substrate 402. In some embodiments, the readout circuit 424 can be fabricated on another substrate and form a common package with the dual-switch photodiode 400 using chip/wafer bonding or stacking technology.

p型摻雜區438耦接於第二控制信號432。舉例來說，p型摻雜區438可耦接於一電壓源；其中，第二控制信號462可為電壓源提供之一交流電壓信號，且其相位相反於第一控制信號422。在某些實施方式中，n型摻雜區436耦接於讀出電路434，讀出電路434可類似於讀出電路424。 The p-type doped region 438 is coupled to the second control signal 432. For example, the p-type doped region 438 can be coupled to a voltage source; wherein, the second control signal 462 can provide an AC voltage signal for the voltage source, and its phase is opposite to the first control signal 422. In some implementations In the formula, the n-type doped region 436 is coupled to the readout circuit 434, and the readout circuit 434 can be similar to the readout circuit 424.

第一控制信號422及第二控制信號432用以控制由吸收光子所產生的電子的收集。舉例來說，當施加電壓時，若第一控制信號422不同於第二控制信號432，在p型摻雜區428及p型摻雜區438之間會建立一電場，且自由電子依據電場方向而向p型摻雜區428或p型摻雜區438漂移。在某些實施方式中，第一控制信號422可固定在一電壓值Vi，第二控制信號432可在電壓值為Vi±△V之間交替。偏壓值的方向決定電子的漂移方向。當一開關(例如為第一開關408)導通(即電子往p型摻雜區428漂移)時，另一開關(例如為第二開關410)截止(即電子由p型摻雜區438阻擋)。在某些實施方式中，第一控制信號422及第二控制信號432可具有不同電壓值。 The first control signal 422 and the second control signal 432 are used to control the collection of electrons generated by the absorption of photons. For example, when a voltage is applied, if the first control signal 422 is different from the second control signal 432, an electric field is established between the p-type doped region 428 and the p-type doped region 438, and the free electrons depend on the direction of the electric field. And drift to the p-type doped region 428 or the p-type doped region 438. In some embodiments, the first control signal 422 may be fixed at a voltage value Vi, and the second control signal 432 may alternate between the voltage value Vi±ΔV. The direction of the bias value determines the drift direction of electrons. When one switch (for example, the first switch 408) is turned on (that is, electrons drift to the p-type doped region 428), the other switch (for example, the second switch 410) is turned off (that is, the electrons are blocked by the p-type doped region 438) . In some embodiments, the first control signal 422 and the second control signal 432 may have different voltage values.

一般而言，一p型摻雜區及一n型摻雜區的費米能階差異會在此二區之間建立一電場。在第一開關中408，電場會建立在p型摻雜區428及n型摻雜區426之間；相同地，在第二開關410中，電場會建立在p型摻雜區438及n型摻雜區436之間。當第一開關408導通，而第二開關410截止時，電子受到p型摻雜區428吸引，在p型摻雜區428及n型摻雜區426的電場進一步讓電子往n型摻雜區426傳遞。讀出電路424可接著處理由n型摻雜區426所收集的電荷。另一方面，當第二開關410導通，而第一開關408截止時，電子被p型摻雜區438所吸引，在p型摻雜區438及n型摻雜區436之間的電場進一步讓電子往n型摻雜區436傳遞。讀出電路434可接著處理由n型摻雜區436所收集的電荷。 Generally speaking, the Fermi level difference between a p-type doped region and an n-type doped region will establish an electric field between the two regions. In the first switch 408, an electric field is established between the p-type doped region 428 and the n-type doped region 426; similarly, in the second switch 410, an electric field is established between the p-type doped region 438 and the n-type doped region Between the doped regions 436. When the first switch 408 is turned on and the second switch 410 is turned off, electrons are attracted by the p-type doped region 428, and the electric field in the p-type doped region 428 and the n-type doped region 426 further allows the electrons to go to the n-type doped region. 426 passed. The readout circuit 424 can then process the charges collected by the n-type doped region 426. On the other hand, when the second switch 410 is turned on and the first switch 408 is turned off, electrons are attracted by the p-type doped region 438, and the electric field between the p-type doped region 438 and the n-type doped region 436 further allows The electrons are transferred to the n-type doped region 436. The readout circuit 434 may then process the charges collected by the n-type doped region 436.

在某些實施方式中，基板402耦接於一外部控制416。舉例來說，基板402可耦接於地端。在某些實施方式中，基板402可浮接或不耦接於任何的外部控制。 In some embodiments, the substrate 402 is coupled to an external control 416. For example, the substrate 402 can be coupled to the ground. In some embodiments, the substrate 402 may be floating or not coupled to any external control.

圖4B繪示用以將一光信號轉換為一電信號之一雙開關光電二極體450之示意圖。雙開關光電二極體450類似於圖4A所繪示的雙開關光電二極體400，但第一開關408及第二開關410更分別包含一n型井區452及一n型井區454。此外，吸收層406可為一p型摻雜層，基板402可為一p型摻雜基板。在某些實施方式中，n型井區452的摻雜程度可由10¹⁵cm^-3至10¹⁷cm³，基板402的摻雜程度可由10¹⁴cm^-3至10¹⁶cm³。 4B shows a schematic diagram of a dual-switch photodiode 450 used to convert an optical signal into an electrical signal. The dual-switch photodiode 450 is similar to the dual-switch photodiode 400 shown in FIG. 4A, but the first switch 408 and the second switch 410 further include an n-type well region 452 and an n-type well region 454, respectively. In addition, the absorption layer 406 may be a p-type doped layer, and the substrate 402 may be a p-type doped substrate. In some embodiments, the doping level of the n-type well region 452 can be 10 ¹⁵ cm ^-3 to 10 ¹⁷ cm ³ , and the doping level of the substrate 402 can be 10 ¹⁴ cm ^-3 to 10 ¹⁶ cm ³ .

p型摻雜區428、n型井區452、p型摻雜吸收層406、n型井區454及p型摻雜區438的排列形成一PNPNP接面結構。一般來說，PNPNP接面結構可降低從第一控制信號422至第二控制信號432的一導通電流，或者可選擇性降低了從第二控制信號432至第一控制信號422的導通電流。 The arrangement of the p-type doped region 428, the n-type well region 452, the p-type doped absorber layer 406, the n-type well region 454, and the p-type doped region 438 forms a PNPNP junction structure. Generally speaking, the PNPNP junction structure can reduce a conduction current from the first control signal 422 to the second control signal 432, or can selectively reduce the conduction current from the second control signal 432 to the first control signal 422.

n型摻雜區426、p型摻雜基板402及n型摻雜區436的排列形成一NPN接面結構。一般來說，NPN接面結構可降低從第一讀出電路424至第二讀出電路434的電荷耦合，或可選擇性的降低從第二讀出電路434往第一讀出電路424的電荷耦合。 The arrangement of the n-type doped region 426, the p-type doped substrate 402, and the n-type doped region 436 forms an NPN junction structure. Generally speaking, the NPN junction structure can reduce the charge coupling from the first readout circuit 424 to the second readout circuit 434, or can selectively reduce the charge from the second readout circuit 434 to the first readout circuit 424 coupling.

在某些實施方式中，p型摻雜區428可完全形成在n型井區452內。在某些實施方式中，p型摻雜區428可部分形成在n型井區452中；舉例來說，p型摻雜區428的一部分可藉由佈植p型雜質於n型井區452中來實現，p型摻雜區128的另一部分可藉由佈植p型雜質於吸收層406來實現。相同地，在某些實施方式中，p型摻雜區428可完全形成於n型井區454。在某些實施方式中，p型摻雜區438可部分形成於n型井區454中。 In some embodiments, the p-type doped region 428 may be completely formed in the n-type well region 452. In some embodiments, the p-type doped region 428 may be partially formed in the n-type well region 452; for example, a part of the p-type doped region 428 may be implanted by p-type impurities in the n-type well region 452. To achieve this, another part of the p-type doped region 128 can be achieved by implanting p-type impurities in the absorption layer 406. Similarly, in some embodiments, the p-type doped region 428 may be completely formed in the n-type well region 454. In some embodiments, the p-type doped region 438 may be partially formed in the n-type well region 454.

圖4C繪示用以將一光信號轉換為一電信之一雙開關光電二極體460之示意圖。雙開關光電二極體460與圖4A所繪示的雙開關二極體400類似，但雙開關光電二極體460更包含一n型井區456。此外，吸收層406可為一p型摻雜區，基板402可為一p型摻雜基板。在某些實施方式中，n型井區456的摻雜程度可由10¹⁵cm^-3至10¹⁷cm^-3。吸收層406及基板402的摻雜程度可由10¹⁴cm³至10¹⁶cm^-3。 4C shows a schematic diagram of a dual-switch photodiode 460 used to convert an optical signal into a telecommunication. The dual-switch photodiode 460 is similar to the dual-switch diode 400 shown in FIG. 4A, but the dual-switch photodiode 460 further includes an n-type well region 456. In addition, the absorption layer 406 may be a p-type doped region, and the substrate 402 may be a p-type doped substrate. In some embodiments, the doping level of the n-type well region 456 may be 10 ¹⁵ cm ^-3 to 10 ¹⁷ cm ^-3 . The doping level of the absorption layer 406 and the substrate 402 can be 10 ¹⁴ cm ³ to 10 ¹⁶ cm ^-3 .

p型摻雜區428、n型井區456及p型摻雜區438的排列形成一PNP接面結構。一般來說，PNP接面結構可減少由第一控制信號422向第二控制信號432的傳導電流，或可選擇性地減少由第二控制信號432往第一控制信號422的傳導電流。 The arrangement of the p-type doped region 428, the n-type well region 456 and the p-type doped region 438 forms a PNP junction structure. Generally speaking, the PNP junction structure can reduce the conduction current from the first control signal 422 to the second control signal 432, or can selectively reduce the conduction current from the second control signal 432 to the first control signal 422.

n型摻雜區426、p型摻雜吸收層406及n型摻雜區436的排列形成一NPN接面結構。一般來說，NPN接面結構可減少從第一讀出電路424向第二讀出電路434的電荷耦合，或可選擇性地減少由第二讀出電路434往第一讀出電路424的電荷耦合。 The arrangement of the n-type doped region 426, the p-type doped absorption layer 406, and the n-type doped region 436 forms an NPN junction structure. Generally speaking, the NPN junction structure can reduce the charge coupling from the first readout circuit 424 to the second readout circuit 434, or can selectively reduce the charge from the second readout circuit 434 to the first readout circuit 424 coupling.

在某些實施方式中，p型摻雜區428和438可完全形成在n型井區456內。在某些實施方式中，p型摻雜區428和438可部分形成在n型井區456中；舉例來說，p型摻雜區428的一部分可藉由佈植p型雜質於n型井區456中來實現，p型摻雜區428的另一部分可藉由佈植p型雜質於吸收層406來實現。 In some embodiments, the p-type doped regions 428 and 438 may be completely formed in the n-type well region 456. In some embodiments, the p-type doped regions 428 and 438 may be partially formed in the n-type well region 456; for example, a part of the p-type doped region 428 may be implanted by p-type impurities in the n-type well. In the region 456, another part of the p-type doped region 428 can be realized by implanting p-type impurities in the absorption layer 406.

圖4D繪示用以將一光信號轉換為一電信號之一雙開關光電二極體470之示意圖。雙開關光電二極體470類似於圖4C所繪示的雙開關光電二極體460，但雙開關光電二極體470的n型井區458由吸收層406延伸至基板402。此外，吸收層406可為一p型摻雜區，基板402可以為p型摻雜基板。在某些實施方式中，n型井區456的摻雜程度可由10¹⁵cm^-3至10¹⁷cm^-3。吸收層406及基板402的摻雜程度可由10¹⁴cm^-3至10¹⁶cm^-3。 4D shows a schematic diagram of a dual-switch photodiode 470 used to convert an optical signal into an electrical signal. The double-switch photodiode 470 is similar to the double-switch photodiode 460 shown in FIG. 4C, but the n-type well region 458 of the double-switch photodiode 470 extends from the absorption layer 406 to the substrate 402. In addition, the absorption layer 406 may be a p-type doped region, and the substrate 402 may be a p-type doped substrate. In some embodiments, the doping level of the n-type well region 456 may be 10 ¹⁵ cm ^-3 to 10 ¹⁷ cm ^-3 . The doping level of the absorption layer 406 and the substrate 402 can be 10 ¹⁴ cm ^-3 to 10 ¹⁶ cm ^-3 .

p型摻雜區428、n型井區458及p型摻雜區438的排列形成一PNP接面結構，這可進一步地減少由第一控制信號422向第二控制信號432的一傳導電流，或可選擇性地減少由第二控制信號432往第一控制信號422的傳導電流。n型摻雜區426、p型摻雜基板402及n型井區458、p型摻雜基板402及n型摻雜區436形成一NPNPN接面結構，藉此可減少由第一讀出電路424向第二讀出電路434的電荷耦合，或可選擇性地減少由第二讀出電路434往第一讀出電路424的電荷耦合。在某些實施方式中，n型井區458可有效地降低電子所能察覺到之由吸收層406往基板402流動時的潛在能障。 The arrangement of the p-type doped region 428, the n-type well region 458 and the p-type doped region 438 forms a PNP junction structure, which can further reduce a conduction current from the first control signal 422 to the second control signal 432. Or, the conduction current from the second control signal 432 to the first control signal 422 can be selectively reduced. The n-type doped region 426, the p-type doped substrate 402 and the n-type well region 458, the p-type doped substrate 402 and the n-type doped region 436 form an NPNPN junction structure, thereby reducing the number of first readout circuits The charge coupling from 424 to the second readout circuit 434 or the charge coupling from the second readout circuit 434 to the first readout circuit 424 can be selectively reduced. In some embodiments, the n-type well region 458 can effectively reduce the potential energy barrier that electrons can perceive when flowing from the absorber layer 406 to the substrate 402.

圖4E繪示用以將一光信號轉換為一電信號之一雙開關光電二極體480之示意圖。雙開關光電二極體480類似於圖4A所繪示的雙開關光電二極體400，但雙開關光電二極體480更包含一或多個p型井區446及一或多個p型井區448。在某些實施方式中，一或多個p型井區446及一或多個p型井區448可為一環狀結構之一部分，前述的環狀結構圍繞第一開關408及第二開關410。在某些實施方式中，p型井區446和448的摻雜程度可由10¹⁵cm^-3至10²⁰cm^-3。前述的一或多個p型井區446和448用以分隔相鄰像素的複數光電子。 4E shows a schematic diagram of a dual-switch photodiode 480 used to convert an optical signal into an electrical signal. The dual-switch photodiode 480 is similar to the dual-switch photodiode 400 shown in FIG. 4A, but the dual-switch photodiode 480 further includes one or more p-type well regions 446 and one or more p-type wells. District 448. In some embodiments, the one or more p-type well regions 446 and the one or more p-type well regions 448 may be part of a ring structure that surrounds the first switch 408 and the second switch 410 . In some embodiments, the doping level of the p-type well regions 446 and 448 may be 10 ¹⁵ cm ^-3 to 10 ²⁰ cm ^-3 . The aforementioned one or more p-type well regions 446 and 448 are used to separate the complex photoelectrons of adjacent pixels.

雖然在圖4A-4E中並未示出，但在某些實施方式中，光信號可由雙開關光電二極體的基板402的背側抵達雙開關光電二極體。一或多個光學元件可製作在基板402的背側以對光信號進行聚焦、準直、散焦、濾光或其它功能。 Although not shown in FIGS. 4A-4E, in some embodiments, the optical signal can reach the dual-switch photodiode from the backside of the substrate 402 of the dual-switch photodiode. One or more optical elements can be fabricated on the back side of the substrate 402 to focus, collimate, defocus, filter, or perform other functions on the optical signal.

雖然在圖4A-4E中並未示出，但在某些實施方式中，第一開關408及第二開關410可選擇性地經製作而改以收集電洞而非電子。在前述狀況下，p型摻雜區428及p型摻雜區438可利用n型摻雜區來取代，n型摻雜區426及n型摻雜區436可利用p型摻雜區來取代，n型井區452、454、456及458可利用p型井區來取代，p型井區446及448可利用n型井區來取代。 Although not shown in FIGS. 4A-4E, in some embodiments, the first switch 408 and the second switch 410 can be selectively manufactured to collect holes instead of electrons. Under the aforementioned conditions, the p-type doped region 428 and the p-type doped region 438 can be replaced by an n-type doped region, and the n-type doped region 426 and the n-type doped region 436 can be replaced by a p-type doped region. , The n-type well regions 452, 454, 456, and 458 can be replaced by p-type well regions, and the p-type well regions 446 and 448 can be replaced by n-type well regions.

雖然在圖4A-4E中並未示出，但在某些實施方式中，可在製作雙開關光電二極體400、450、460、470及480之後，將吸收層406接合於一基板。基板可為允許光電號412傳輸至雙開關光電二極體的任意材料。舉例來說，基板可為聚合物或玻璃。在某些實施方式中，一或多個光學元件可製作在承載基板上以對光信號進行聚焦、準直、散焦、濾光或其它功能。 Although not shown in FIGS. 4A-4E, in some embodiments, the absorption layer 406 may be bonded to a substrate after the dual-switch photodiodes 400, 450, 460, 470, and 480 are fabricated. The substrate can be any material that allows the photoelectric signal 412 to be transmitted to the dual-switch photodiode. For example, the substrate may be polymer or glass. In some embodiments Among them, one or more optical elements can be fabricated on the carrier substrate to focus, collimate, defocus, filter, or perform other functions on the optical signal.

雖然在圖4A-4E中並未示出，但在某些實施方式中，雙開關光電二極體400、450、460、470及480可(例如利用金屬對金屬接合、氧化物對氧化物接合、混合接合)而與一第二基板接合；第二基板上可具有控制信號之電路及/或讀出電路及/或相位鎖相迴路及/或類比數位轉換器。一金屬層可沉積於雙開關光電二極體的頂部以做為一反射器而反射從背側入射的光信號。一氧化層可設在金屬層及吸收層之間以增加反射率。金屬層也可做為晶圓接合程序時的接合層。在某些實施方式中，可加入類似於第一開關408和第二開關410的一或多個開關以接合控制信號/讀出電路。 Although not shown in FIGS. 4A-4E, in some embodiments, the dual-switch photodiodes 400, 450, 460, 470, and 480 can be used (for example, metal-to-metal bonding, oxide-to-oxide bonding , Hybrid bonding) and bonding with a second substrate; the second substrate may have a control signal circuit and/or a readout circuit and/or a phase-locked loop and/or an analog-to-digital converter. A metal layer can be deposited on the top of the dual-switch photodiode to act as a reflector to reflect the light signal incident from the back side. An oxide layer can be provided between the metal layer and the absorption layer to increase the reflectivity. The metal layer can also be used as the bonding layer during the wafer bonding process. In some embodiments, one or more switches similar to the first switch 408 and the second switch 410 may be added to engage the control signal/readout circuit.

雖然在圖4A-4E中並未示出，但在某些實施方式中，吸收層406可部分或完全地嵌入或凹入在基板402中以緩和表面形貌(surface topography)且便於製作。前述技術係揭示於美國專利申請號15/228,282，專利名稱為「Germanium-Silicon Light Sensing Apparatus」之專利申請案中。 Although not shown in FIGS. 4A-4E, in some embodiments, the absorption layer 406 may be partially or completely embedded or recessed in the substrate 402 to ease the surface topography and facilitate fabrication. The aforementioned technology is disclosed in a patent application named "Germanium-Silicon Light Sensing Apparatus" in US Patent Application No. 15/228,282.

圖5A繪示取像系統500之示意圖，其用以判斷一目標物體510的特性。目標物體510可為一立體物體。取像系統500可包含一傳送單元502、一接收單元504及一處理單元506。一般來說，傳送單元502朝向目標物體510發光脈衝512；傳送單元502可包含一或多個光源、控制電路及/或光學元件。舉例來說，傳送單元502可包含一或多個NIR發光二極體或雷射；其中，光脈衝512可由一準直透鏡進行準直後再向自由空間傳遞。 FIG. 5A shows a schematic diagram of an imaging system 500 used to determine the characteristics of a target object 510. The target object 510 may be a three-dimensional object. The image capturing system 500 may include a transmitting unit 502, a receiving unit 504, and a processing unit 506. Generally, the transmitting unit 502 emits light pulses 512 toward the target object 510; the transmitting unit 502 may include one or more light sources, control circuits, and/or optical elements. For example, the transmitting unit 502 may include One or more NIR light-emitting diodes or lasers; among them, the light pulse 512 can be collimated by a collimating lens and then transmitted to the free space.

接收單元504接收由目標物體510反射的反射光脈衝514。接收單元504可包含一或多個光電二極體、控制電路及/或光學元件。舉例來說，接收單元504可包含一影像感測器；其中，影像測測器包含製造在一半導體基板上的複數像素，每個像素可包含一或多個多閘極光電二極體以供感測反射光脈衝514，反射光脈衝514被聚焦在雙開關光電二極體上。每個雙開關光電二極體可以為本發明所揭示的雙開關光電二極體。 The receiving unit 504 receives the reflected light pulse 514 reflected by the target object 510. The receiving unit 504 may include one or more photodiodes, control circuits, and/or optical elements. For example, the receiving unit 504 may include an image sensor; where the image sensor includes a plurality of pixels fabricated on a semiconductor substrate, and each pixel may include one or more multi-gate photodiodes for The reflected light pulse 514 is sensed, and the reflected light pulse 514 is focused on the dual-switch photodiode. Each double-switch photodiode can be the double-switch photodiode disclosed in the present invention.

處理單元506處理由接收單元504產生的光載子並判定目標物體510的特性。處理單元506可包含控制電路、一或多個處理器及/或運算儲存介面，其中運算儲存介面用以儲存對應於所感測之目標物體510特性的指令。舉例來說，處理單元506可包含讀出電路及處理器，其中處理器可處理關於用以判斷目標物體510特性之光載子的資訊。在某些實施方式中，目標物體510的特性可為目標物體510的深度資訊。在某些實施方式中，目標物體510的特性可以是目標物體510的材料組成。 The processing unit 506 processes the photocarriers generated by the receiving unit 504 and determines the characteristics of the target object 510. The processing unit 506 may include a control circuit, one or more processors, and/or a computing storage interface, where the computing storage interface is used to store instructions corresponding to the characteristics of the target object 510 sensed. For example, the processing unit 506 may include a readout circuit and a processor, where the processor may process information about photocarriers used to determine the characteristics of the target object 510. In some embodiments, the characteristic of the target object 510 may be the depth information of the target object 510. In some embodiments, the characteristic of the target object 510 may be the material composition of the target object 510.

圖5B繪示依照本發明之一用以判定目標物體510特性之技術之示意圖。傳送單元502可產生光脈衝512，其中，光脈衝512經調變使具有一頻率fm及50%的工作週期。接收單元504可接收反射光脈衝514；所述反射光脈衝514具有一相位移Φ。雙開關電二極體經控制以讓一第一讀出電路讀取經收集的電荷Q1，並使一第二讀出電路讀取經收集電荷Q2；其中，電荷Q1與光脈衝具有相同相位(同步)，電荷Q2與光脈衝具有相反相位。在某些實施方式中，在取像系統500及目標物體510之間的距離D滿足下式：

；其中c為光速。 FIG. 5B shows a schematic diagram of a technique for determining the characteristics of a target object 510 according to the present invention. The transmitting unit 502 can generate a light pulse 512, wherein the light pulse 512 is modulated to have a frequency fm and a duty cycle of 50%. The receiving unit 504 can receive the reflected light pulse 514; the reflected light pulse 514 has a phase shift Φ. The double-switch electric diode is controlled to allow a first readout circuit to read the collected charge Q1, and a second readout circuit to read the collected charge Q2; wherein the charge Q1 and the light pulse have the same phase ( Synchronous), the charge Q2 has the opposite phase to the light pulse. In some embodiments, the distance D between the imaging system 500 and the target object 510 satisfies the following equation:

; Where c is the speed of light.

圖5C繪示另一用以判定一目標物體510特性之技術之示意圖。傳送單元502可發射光脈衝512；其中，所述光脈衝512經調變使具有一頻率fm及50%的工作週期。藉由一因數N來減少光脈衝512的工作週期，同時以此因數N增加光脈衝的強度，則可在維持取像系統500實質上相同功率損耗的條件下，讓所接收到的反射光脈衝514的訊雜比增強。這使得取像系統500的頻寬增加，藉此可讓光脈衝在沒脈衝形狀不歪曲的條件下降低光脈衝的工作週期。接收單元504可接收反射光脈衝514；所述的反射光脈衝514具有一相位移Φ。多閘極光電二極體經控制使一第一讀出電路讀取經收集的電荷Q1’，且一第二讀出電路讀取經收集的電荷Q2’；其中，電荷Q1’的相位相同於光脈衝的相位，電荷Q2’的相位不同於光脈衝的相位。在某些實施方式中，在取像系統1800及目標物體1810之間的距離D滿足下式：

。 FIG. 5C shows a schematic diagram of another technique for determining the characteristics of a target object 510. The transmitting unit 502 can emit a light pulse 512; wherein the light pulse 512 is modulated to have a frequency fm and a duty cycle of 50%. By reducing the duty cycle of the light pulse 512 by a factor N, and increasing the intensity of the light pulse by this factor N, the received reflected light pulse can be maintained while maintaining substantially the same power loss of the imaging system 500 The signal-to-noise ratio of 514 is enhanced. This increases the bandwidth of the imaging system 500, thereby reducing the duty cycle of the light pulse without the pulse shape being distorted. The receiving unit 504 can receive the reflected light pulse 514; the reflected light pulse 514 has a phase shift Φ. The multi-gate photodiode is controlled so that a first readout circuit reads the collected charge Q1', and a second readout circuit reads the collected charge Q2'; wherein, the phase of the charge Q1' is the same as The phase of the light pulse, the phase of the charge Q2' is different from the phase of the light pulse. In some embodiments, the distance D between the imaging system 1800 and the target object 1810 satisfies the following equation:

.

圖6繪示使用一取像系統感測一物體特性之流程圖。流程600可在例如是取像系統500上執行。 FIG. 6 shows a flow chart of using an imaging system to sense the characteristics of an object. The process 600 may be executed on the imaging system 500, for example.

系統接受反射光(步驟602)。舉例來說，傳送單元502可向目標物體510發射一為NIR波段的光脈衝512。接收單元504接收經由目標物體510反射後之為NIR波段的反射光脈衝514。 The system receives the reflected light (step 602). For example, the transmitting unit 502 can transmit a light pulse 512 in the NIR band to the target object 510. The receiving unit 504 receives the reflected light pulse 514 in the NIR band after being reflected by the target object 510.

系統確測定位資訊(步驟604)。舉例來說，接收單元504可包含一影像感測器；其中，影像感測器包含製造在半導體基板上的多個像素。每個像素可包含供感測反射光脈衝514的一或多個雙開關光電二極體。雙開關光電二極體可為在本發明中所揭示的任一雙開關光電二極體；其中，相位資訊可利用在圖5B或圖5C所述的技術來測定。 The system determines the position information (step 604). For example, the receiving unit 504 may include an image sensor; where the image sensor includes a plurality of pixels fabricated on a semiconductor substrate. Each pixel may include one or more dual-switch photodiodes for sensing the reflected light pulse 514. The double-switch photodiode can be any double-switch photodiode disclosed in the present invention; wherein the phase information can be measured using the technique described in FIG. 5B or FIG. 5C.

系統測定物體特性(步驟606)。舉例來說，處理單元506可依據如圖5B或圖5C所述的相位資訊技術測定目標物體510的深度資訊。 The system determines the characteristics of the object (step 606). For example, the processing unit 506 may determine the depth information of the target object 510 according to the phase information technology as described in FIG. 5B or FIG. 5C.

在某些實施方式中，影像感測器包含複數像素，其等製作於一半導體基板上，且每個像素可包含一或多個雙開關光電二極體100、160、170、180、200、250、260、270、300、360、370、380、400、450、460、470及480以感測圖5A及圖5B所繪示的反射光。相鄰二像素可以絕緣物(例如氧化層或氮化層)分隔、佈植分隔(例如利用p+或n+區以阻隔電子或電洞)，或本質嵌入能障(例如利用鍺矽異質介面)來實現。 In some embodiments, the image sensor includes a plurality of pixels, which are fabricated on a semiconductor substrate, and each pixel may include one or more dual-switch photodiodes 100, 160, 170, 180, 200, 250, 260, 270, 300, 360, 370, 380, 400, 450, 460, 470, and 480 to sense the reflected light shown in FIGS. 5A and 5B. Adjacent two pixels can be separated by insulators (such as oxide or nitride layers), separated by implants (such as using p+ or n+ regions to block electrons or holes), or intrinsically embedded in energy barriers (such as using germanium-silicon heterogeneous interface). accomplish.

本文雖然已經參考特定的示範性實施例說明過本揭示內容；不過，應該確認的係，本發明並不受限於所述的實施例，相反地，亦能夠以落在隨附申請專利範圍的精神和範疇裡面的修正例及變更例來實行。例如在前所揭示的流程可重新排序、增加或移除步驟。 Although the present disclosure has been described herein with reference to specific exemplary embodiments; however, it should be confirmed that the present invention is not limited to the described embodiments, on the contrary, It can also be implemented with amendments and alterations that fall within the spirit and scope of the attached patent application. For example, the previously disclosed process can be reordered, added or removed steps.

為了便於描述和說明，在本文的多個實施方式中，是使用二維剖面以做為說明依據；然而，只要在三維結構中存在相對應的二維剖面，其三維變化也應當包括在本發明的範圍內。 For ease of description and explanation, in many embodiments herein, a two-dimensional section is used as the basis for explanation; however, as long as there is a corresponding two-dimensional section in the three-dimensional structure, its three-dimensional change should also be included in the present invention. In the range.

雖然本文包含許多細節，但這是作為對特定實施例的特定特徵的描述，不應被用來限制本發明。在本文中，單獨實施例中描述的某些特徵可以只在單個實施例中實現，但在單獨實施例中描述的特徵也可以在多個實施例中單獨或以組合方式來實現。 Although this document contains many details, this is as a description of specific features of specific embodiments and should not be used to limit the present invention. Herein, certain features described in a single embodiment may be implemented only in a single embodiment, but the features described in a single embodiment may also be implemented in multiple embodiments alone or in combination.

相同地，雖然在圖示敘述特定次序之操作，該些操作可依其他特定次序或序列次序操作，或依據圖示次序操作以達成所需功效。在特定狀況下，多工或是平行處理可達成具體優點。此外，不同系統元件在不同實施例可能彼此分開，但不應視為該些元件必須在所有實施例彼此分開。 Similarly, although operations in a specific order are described in the diagrams, these operations can be performed in other specific orders or sequential orders, or performed in the order of the diagrams to achieve the desired effect. Under certain conditions, multiple tasks or parallel processing can achieve specific advantages. In addition, different system elements may be separated from each other in different embodiments, but it should not be considered that these elements must be separated from each other in all embodiments.

本發明雖然敘述特定實施例，但是其他實施例仍在本發明範圍內。例如在專利範圍內界定之操作可由不同次序操作，仍可達成所需功效。 Although specific embodiments of the present invention are described, other embodiments are still within the scope of the present invention. For example, the operations defined in the scope of the patent can be performed in a different order, and the desired effect can still be achieved.

100…雙開關光電二極體 102…基板 106…吸收層 108…第一開關 110…第二開關 112…光信號 116…外部控制 122…第一控制信號 124…第一讀出電路 132…第二控制信號 134…第二讀出電路 126、136…n型摻雜區 128、138…p型摻雜區 100...Double switch photodiode 102...Substrate 106...absorbent layer 108...First switch 110...Second switch 112... Optical signal 116...External control 122...The first control signal 124...First readout circuit 132...Second control signal 134...Second readout circuit 126, 136...n-type doped region 128, 138...p-type doped regions

Claims

一種光學裝置，包含：一半導體基板；一鍺矽平台，由該半導體基板支撐且與該半導體基板直接接觸，該鍺矽平台包含一光電二極體區，該光電二極體區用以吸收多個光子並產生複數光載子；一或多個第一開關，由一第一控制信號控制，所述的一或多個第一開關依據該第一控制信號以收集至少一部份的該等光載子；以及一或多個第二開關，由一第二控制信號控制，所述的一或多個第二開關依據該第二控制信號收集至少一部分的該等光載子，其中該第一控制信號不同於該第二控制信號，其中，所述的一或多個第一開關包含：一第一p型摻雜區，位於該鍺矽平台中，該第一控制信號控制該第一p型摻雜區；以及一第一n型摻雜區，位於該鍺矽平台中，該第一n型摻雜區耦接於一第一讀出積體電路；其中，所述的一或多個第二開關包含：一第二p型摻雜區，位於該鍺矽平台中，該第二控制信號控制該第二p型摻雜區；以及一第二n型摻雜區，位於該鍺矽平台中，該第二n型摻雜區耦接於一第二讀出積體電路。 An optical device comprising: a semiconductor substrate; a germanium silicon platform supported by the semiconductor substrate and in direct contact with the semiconductor substrate, the germanium silicon platform including a photodiode region, the photodiode region for absorbing One or more first switches are controlled by a first control signal, and the one or more first switches collect at least a part of the first control signal according to the first control signal. Photocarriers; and one or more second switches controlled by a second control signal, and the one or more second switches collect at least a part of the photocarriers according to the second control signal, wherein the first A control signal is different from the second control signal, wherein the one or more first switches include: a first p-type doped region located in the germanium silicon platform, and the first control signal controls the first p-type doped region; and a first n-type doped region located in the germanium silicon platform, the first n-type doped region is coupled to a first readout integrated circuit; wherein, the one or The plurality of second switches includes: a second p-type doped region located in the germanium silicon platform, the second control signal controls the second p-type doped region; and a second n-type doped region located in the silicon germanium platform In the germanium silicon platform, the second n-type doped region is coupled to a second readout integrated circuit.

如請求項1所述的光學裝置，其中該鍺矽平台包含一第三n型摻雜區及一第四n型摻雜區，其中該第一p型摻雜區的至少一部分形成於該第三n型摻雜區中，以及其中該第二p型摻雜區之至少一部份形成於該第四n型摻雜區中。 The optical device described in claim 1, The silicon germanium platform includes a third n-type doped region and a fourth n-type doped region, wherein at least a part of the first p-type doped region is formed in the third n-type doped region, and wherein At least a part of the second p-type doped region is formed in the fourth n-type doped region.

如請求項1所述的光學裝置，其中該鍺矽平台包含一第三n型摻雜區，以及其中該第一p型摻雜區的至少一部分及該第二p型摻雜區的至少一部分形成於該第三n型摻雜區中。 The optical device according to claim 1, wherein the germanium silicon platform includes a third n-type doped region, and wherein at least a part of the first p-type doped region and at least a part of the second p-type doped region Formed in the third n-type doped region.

如請求項1所述的光學裝置，其中該半導體基板包含一第三p型摻雜區及一或多個n型摻雜區，其中該鍺矽平台設置在該第三p型摻雜區上方。 The optical device according to claim 1, wherein the semiconductor substrate includes a third p-type doped region and one or more n-type doped regions, wherein the germanium silicon platform is disposed above the third p-type doped region .

如請求項4所述的光學裝置，該第三p型摻雜區短路連接於所述的一或多個n型摻雜區。 In the optical device according to claim 4, the third p-type doped region is short-circuited to the one or more n-type doped regions.

一種光學裝置，包含：一半導體基板，其包含一凹部；一鍺矽平台，至少部分地嵌入在該凹部中且與該半導體基板直接接觸，該鍺矽平台包含一光電二極體區，該光電二極體區用以吸收多個光子並產生複數光載子；一或多個第一開關，由一第一控制信號控制，所述的一或多個第一開關依據該第一控制信號以收集至少一部份的該等光載子；以及一或多個第二開關，由一第二控制信號控制，所述的一或多個第二開關依據該第二控制信號收集至少一部分的該等光載子，其中該第一控制信號不同於該第二控制信號，其中，所述的一或多個第一開關包含：一第一p型摻雜區，位於該鍺矽平台中，該第一控制信號控制該第一p型摻雜區；以及一第一n型摻雜區，位於該鍺矽平台中，該第一n型摻雜區耦接於一第一讀出積體電路；其中，所述的一或多個第二開關包含：一第二p型摻雜區，位於該鍺矽平台中，該第二控制信號控制該第二p型摻雜區；以及一第二n型摻雜區，位於該鍺矽平台中，該第二n型摻雜區耦接於一第二讀出積體電路。 An optical device comprising: a semiconductor substrate including a recess; a germanium silicon platform at least partially embedded in the recess and in direct contact with the semiconductor substrate, the germanium silicon platform including a photodiode region, the photoelectric The diode region is used to absorb multiple photons and generate multiple photocarriers; one or more first switches are controlled by a first control signal, and the one or more first switches are Collecting at least a part of the photocarriers; and one or more second switches controlled by a second control signal, and the one or more second switches collect at least a part of the photocarriers according to the second control signal Equal photocarriers, where the first control signal is different from the second control signal, Wherein, the one or more first switches include: a first p-type doped region located in the germanium silicon platform, the first control signal controls the first p-type doped region; and a first n Type doped region located in the germanium-silicon platform, the first n-type doped region is coupled to a first readout integrated circuit; wherein, the one or more second switches include: a second p Type doped region located in the silicon germanium platform, the second control signal controls the second p-type doped region; and a second n-type doped region located in the silicon germanium platform, the second n-type doped region The miscellaneous region is coupled to a second readout integrated circuit.

如請求項6所述的光學裝置，其中該鍺矽平台包含一第三n型摻雜區及一第四n型摻雜區，其中該第一p型摻雜區的至少一部分形成於該第三n型摻雜區中，以及其中該第二p型摻雜區之至少一部份形成於該第四n型摻雜區中。 The optical device according to claim 6, wherein the germanium-silicon platform includes a third n-type doped region and a fourth n-type doped region, wherein at least a part of the first p-type doped region is formed in the first Among the three n-type doped regions, at least a part of the second p-type doped region is formed in the fourth n-type doped region.

如請求項6所述的光學裝置，其中該鍺矽平台包含一第三n型摻雜區，以及其中該第一p型摻雜區的至少一部分及該第二p型摻雜區的至少一部分形成於該第三n型摻雜區中。 The optical device according to claim 6, wherein the germanium-silicon platform includes a third n-type doped region, and wherein at least a part of the first p-type doped region and at least a part of the second p-type doped region Formed in the third n-type doped region.

如請求項6所述的光學裝置，其中該半導體基板包含一第三p型摻雜區及一或多個n型摻雜區，其中該鍺矽平台設置在該第三p型摻雜區上方。 The optical device according to claim 6, wherein the semiconductor substrate includes a third p-type doped region and one or more n-type doped regions, wherein the germanium silicon platform is disposed above the third p-type doped region .

如請求項9所述的光學裝置，該第三p型摻雜區短路連接於所述的一或多個n型摻雜區。 In the optical device according to claim 9, the third p-type doped region is short-circuited to the one or more n-type doped regions.

一種時差測距系統，包含：一光源，用以產生複數光子；以及一影像感測器，包含複數像素，該等像素由一半導體基板支撐，其中各該像素包含：一吸收層，其由該半導體基板支撐，該半導體基板和該吸收層包含不同的材料組成，該吸收層包含一光電二極體區，該光電二極體區用以吸收該複數光子並產生複數光載子；一或多個第一開關，一第一控制信號控制所述的一或多個第一開關，所述的一或多個第一開關依據該第一控制信號來收集至少一第一部分的該複數光載子；以及一或多個第二開關，一第二控制信號控制所述的一或多個第二開關，所述的一或多個第二開關依據該第二控制信號來收集至少一第二部分的該等光載子，其中該第二控制信號不同於該第一控制信號，且該第一部分的該複數光載子與該第二部分的該複數光載子為同一類型。 A time difference ranging system includes: a light source for generating a plurality of photons; and an image sensor including a plurality of pixels, the pixels are supported by a semiconductor substrate, wherein each of the pixels includes: an absorbing layer, which is supported by a semiconductor substrate. Supported by a semiconductor substrate, the semiconductor substrate and the absorption layer comprise different material compositions, the absorption layer comprises a photodiode region, and the photodiode region is used to absorb the plurality of photons and generate a plurality of photocarriers; one or more A first switch, a first control signal controls the one or more first switches, and the one or more first switches collect at least a first part of the plurality of photocarriers according to the first control signal And one or more second switches, a second control signal controls the one or more second switches, and the one or more second switches collect at least a second part according to the second control signal Wherein the second control signal is different from the first control signal, and the complex photocarriers of the first part and the complex photocarriers of the second part are of the same type.

如請求項11所述的時差測距系統，其中該吸收層包含一鍺矽層。 The time difference ranging system according to claim 11, wherein the absorption layer includes a germanium silicon layer.

如請求項11所述的時差測距系統，其中該半導體基板包含一矽基板。 The time difference ranging system according to claim 11, wherein the semiconductor substrate includes a silicon substrate.

如請求項11所述的時差測距系統，其中該一或多個第一開關耦接於一第一讀出積體電路，該一或多個第二開關耦接於一第二讀出積體電路，其中該光源用以發射複數光脈衝，該等光脈衝之一工作週期小於50%，其中於操作時，該第一讀出積體電路讀取經該一或多個第一開關收集的電荷(Q1)，該第二讀出電路讀取經該一或多個第二開關收集的電荷(Q2)；其中，該電荷(Q1)與該等光脈衝具有相同相位，該電荷(Q2)與該等光脈衝具有相反相位。 The time difference ranging system according to claim 11, wherein the one or more first switches are coupled to a first readout integrated circuit, and the one or more second switches are coupled to a second readout product Body circuit, wherein the light source is used to emit a plurality of light pulses, one of the light pulses has a duty cycle less than 50%, and during operation, the first readout integrated circuit reads collected by the one or more first switches The charge (Q1) of the second readout circuit reads the charge (Q2) collected by the one or more second switches; wherein, the charge (Q1) has the same phase as the light pulses, and the charge (Q2) ) Has the opposite phase to the light pulses.

如請求項14所述的時差測距系統，其中各該光脈衝具有一相同能量。 The time difference ranging system according to claim 14, wherein each of the light pulses has the same energy.

如請求項14所述的時差測距系統，其中由該光源產生的該複數光子具有紅外光波長。 The time difference ranging system according to claim 14, wherein the complex number of photons generated by the light source has an infrared light wavelength.

一種光學裝置，包含：一吸收層，包含一光電二極體區，該光電二極體區用以吸收多個光子並產生複數光載子；一或多個第一開關，由一第一控制信號控制，所述的一或多個第一開關依據該第一控制信號以收集至少一第一部份的該等光載子；以及一或多個第二開關，由一第二控制信號控制，所述的一或多個第二開關依據該第二控制信號收集至少一第二部分的該等光載子，其中該第一控制信號不同於該第二控制信號，且該第一部分的該複數光載子與該第二部分的該複數光載子為同一類型；其中，所述的一或多個第一開關包含：一第一井區，其具有第一型態；第一摻雜區，其具有與該第一型態相反的第二型態，該第一摻雜區的至少一部分形成於該第一井區中，且該第一摻雜區由該第一控制信號控制；一第二摻雜區，其具有該第一型態且耦接於一第一讀出積體電路；以及其中，所述的一或多個第二開關包含：一第二井區，其具有該第一型態；第三摻雜區，其具有與該第二型態，該第三摻雜區的至少一部分形成於該第二井區中，且該第三摻雜區由該第二控制信號控制；以及一第四摻雜區，其具有該第一型態且耦接於一第二讀出積體電路。 An optical device, comprising: an absorption layer, comprising a photodiode region, the photodiode region is used to absorb a plurality of photons and generate a plurality of photocarriers; one or more first switches, controlled by a first Signal control. The one or more first switches collect at least a first part of the photocarriers according to the first control signal; and one or more second switches are controlled by a second control signal , The one or more second switches collect at least one second part of the photocarriers according to the second control signal, wherein the first control signal is different from the second control signal, and the first part of the The plurality of photocarriers and the plurality of photocarriers of the second part are of the same type; wherein, the one or more first switches include: a first well region having a first type; A first doped region having a second type opposite to the first type, at least a part of the first doped region is formed in the first well region, and the first doped region is formed by the first Control signal control; a second doped region having the first type and coupled to a first readout integrated circuit; and wherein the one or more second switches include: a second well Region, which has the first type; a third doped region, which has the second type, at least a part of the third doped region is formed in the second well region, and the third doped region Controlled by the second control signal; and a fourth doped region having the first type and coupled to a second readout integrated circuit.

如請求項17所述的光學裝置，其中該第一井區與該第二井區重疊。 The optical device according to claim 17, wherein the first well area overlaps the second well area.

如請求項17所述的光學裝置，其中該吸收層包含該第一井區以及該第二井區。 The optical device according to claim 17, wherein the absorption layer includes the first well region and the second well region.

如請求項17所述的光學裝置，其中該吸收層包含該第一摻雜區以及該第二摻雜區。 The optical device according to claim 17, wherein the absorption layer includes the first doped region and the second doped region.

如請求項17所述的光學裝置，該第一型態為n型，第二型態為p型。 The optical device according to claim 17, wherein the first type is n-type and the second type is p-type.

如請求項17所述的光學裝置，該第一型態為p型，第二型態為n型。 The optical device according to claim 17, wherein the first type is p-type and the second type is n-type.

一種立體取像系統，包含：一傳送單元，其包含一光源用以產生複數光子以及將該複數光子導向一目標物體；一接收單元，其包含一影像感測器，該影像感測器包含由一矽基板支撐的複數像素，該複數像素的每個像素包含一吸收層，其包含與該矽基板不同的材料組成，該吸收層包含一光電二極體區，該光電二極體區用以吸收多個該等光子並產生複數光載子；其中該複數像素的每一被設置為至少部分經由該目標物體反射後之該等光子可以藉由該矽基板傳送至該吸收層的該光電二極體區；其中該吸收層大致上吸收近紅外光區域的光子，且該矽基板大致上吸收相較於該近紅外光區域短的波長區域的光子。 A stereo imaging system, including: A transmitting unit including a light source for generating a plurality of photons and guiding the plurality of photons to a target object; a receiving unit including an image sensor including a plurality of pixels supported by a silicon substrate, Each pixel of the plurality of pixels includes an absorption layer, which includes a different material composition from the silicon substrate, and the absorption layer includes a photodiode region for absorbing a plurality of the photons and generating A plurality of photocarriers; wherein each of the plurality of pixels is set to be at least partially reflected by the target object and the photons can be transmitted to the photodiode region of the absorption layer by the silicon substrate; wherein the absorption layer Substantially absorb photons in the near-infrared light region, and the silicon substrate generally absorbs photons in a shorter wavelength region than the near-infrared light region.

如請求項23所述的立體取像系統，其中該光源產生的該複數光子具有該矽基板不吸收或是部分吸收的一波長。 The stereoscopic imaging system according to claim 23, wherein the complex photons generated by the light source have a wavelength that is not absorbed or partially absorbed by the silicon substrate.

如請求項23所述的立體取像系統，該光源包含一發光二極體或雷射。 According to the three-dimensional imaging system of claim 23, the light source includes a light emitting diode or a laser.

如請求項23所述的立體取像系統，更包含一處理單元，用以處理該接收單元產生的該等光載子並判定該目標物體的特性。 The stereoscopic imaging system according to claim 23 further includes a processing unit for processing the photocarriers generated by the receiving unit and determining the characteristics of the target object.

如請求項23所述的立體取像系統，其中該目標物體的特性包含深度資訊或一材料組成資訊。 The three-dimensional imaging system according to claim 23, wherein the characteristic of the target object includes depth information or a material composition information.

一種光學裝置，包含：一半導體基板，其具有一第一材料組成；一吸收層，其由該半導體基板支撐，且具有與該第一材料組成不同之一第二材料組成，其中該吸收層用以吸收位在第一波段的入射光並產生複數光載子；一第一開關，其與該吸收層耦接並包含：一第一端點，該第一端點用以接收一第一控制信號；以及一第二端點，該第二端點用以收集至少部分的該複數光載子；以及一第一讀出電路，其與該第一開關的該第二端點耦接，用以讀出由該第一開關的該第二端點收集的該等光載子。 An optical device, comprising: a semiconductor substrate having a first material composition; An absorption layer, which is supported by the semiconductor substrate and has a second material composition different from the first material composition, wherein the absorption layer is used to absorb incident light in the first wavelength band and generate plural photocarriers; The first switch is coupled to the absorption layer and includes: a first terminal for receiving a first control signal; and a second terminal for collecting at least Part of the plurality of photocarriers; and a first readout circuit, which is coupled to the second terminal of the first switch, for reading the collected by the second terminal of the first switch Photocarrier.

如請求項28所述的光學裝置，其中該第一材料組成包含矽。 The optical device according to claim 28, wherein the first material composition includes silicon.

請求項28所述的光學裝置，其中該第二材料組成包含鍺。 The optical device of claim 28, wherein the second material composition includes germanium.

如請求項28所述的光學裝置，其中該第一波段包含近紅外光。 The optical device according to claim 28, wherein the first wavelength band includes near-infrared light.

如請求項28所述的光學裝置，其更包含一金屬層，其位於該吸收層之上。 The optical device according to claim 28, further comprising a metal layer on the absorption layer.

如請求項28所述的光學裝置，其中該第一端點包含一第一p型摻雜區域，且該第二端點包含一第一n型摻雜區域。 The optical device according to claim 28, wherein the first terminal includes a first p-type doped region, and the second terminal includes a first n-type doped region.

如請求項33所述的光學裝置，其中整個該第一p型摻雜區域或部分該第一p型摻雜區域形成於一n型井區中。 The optical device according to claim 33, wherein the entire first p-type doped region or a part of the first p-type doped region is formed in an n-type well region.

如請求項28所述的光學裝置，其中該吸收層嵌入於該半導體基板中。 The optical device according to claim 28, wherein the absorption layer is embedded in the semiconductor substrate.

一種光學系統，其包含：一光源，用以產生位在第一波段內的複數光子；以及一影像感測器，其包含由一半導體基板支撐的複數像素，該半導體基板具有一第一材料組成，其中該複數像素的每個像素包含：一吸收層，其由該半導體基板支撐，且具有一與該第一材料組成不同之一第二材料組成，其中該吸收層用以吸收位在該第一波段的入射光並產生複數光載子；一或多個第一開關，其與一第一積體電路耦接且由一第一控制信號控制，所述的一或多個第一開關中的每一第一開關依據該第一控制信號收集至少一第一部分的該複數光載子；以及一或多個第二開關，其與一第二積體電路耦接且由一第二控制信號控制，所述的一或多個第二開關中的每一第二開關依據該第二控制信號收集至少一第二部分的該複數光載子；其中該第一部分的該複數光載子與該第一部分的該複數光載子為同一類型。 An optical system, comprising: a light source for generating complex photons in a first waveband; and An image sensor including a plurality of pixels supported by a semiconductor substrate, the semiconductor substrate having a first material composition, wherein each pixel of the plurality of pixels includes: an absorption layer supported by the semiconductor substrate and having A composition of a second material that is different from the composition of the first material, wherein the absorption layer is used to absorb incident light in the first wavelength band and generate a plurality of photocarriers; one or more first switches are combined with a first An integrated circuit is coupled to and controlled by a first control signal, and each of the one or more first switches collects at least a first part of the plurality of photocarriers according to the first control signal; And one or more second switches, which are coupled to a second integrated circuit and controlled by a second control signal, and each of the one or more second switches is controlled according to the second control signal The signal collects at least a second portion of the complex photocarriers; wherein the complex photocarriers of the first portion and the complex photocarriers of the first portion are of the same type.

如請求項36所述的光學系統，其中該第二材料組成包含鍺。 The optical system according to claim 36, wherein the second material composition includes germanium.

如請求項36所述的光學系統，其更包含一金屬層，其位於該吸收層之上。 The optical system according to claim 36, further comprising a metal layer on the absorption layer.

如請求項36所述的光學系統，其中該吸收層嵌入於該半導體基板中。The optical system according to claim 36, wherein the absorption layer is embedded in the semiconductor substrate.