TWI740933B

TWI740933B - Surface functionalization and passivation with a control layer

Info

Publication number: TWI740933B
Application number: TW106113905A
Authority: TW
Inventors: 吉田尚美; 董琳; 安德魯Ｃ古莫; 潔西卡Ｓ卡契; 瑪利艾德莫斯; 史蒂芬沃夫
Original assignee: 美商應用材料股份有限公司; 加州大學董事會
Priority date: 2017-04-26
Filing date: 2017-04-26
Publication date: 2021-10-01
Also published as: TW201842534A

Abstract

Embodiments described herein relate to semiconductor and metal substrate surface preparation and controlled growth methods. An example application is formation of an atomic layer deposition (ALD) control layer as a diffusion barrier or gate dielectric layer and subsequent ALD processing. Embodiments described herein are believed to be advantageously utilized concerning gate oxide deposition, diffusion barrier deposition, surface functionalization, surface passivation, and oxide nucleation, among other processes. More specifically, embodiments described herein provide for silicon nitride ALD processes which functionalize, passivate, and nucleate a SiNx monolayer at temperatures below about 300°C.

Description

利用控制層進行的表面官能化和鈍化Surface functionalization and passivation using the control layer

本揭示之實施例一般係關於半導體裝置及半導體裝置形成方法。更特别地，本文所述之實施例係關於採用控制層進行的表面官能化及鈍化。The embodiments of the present disclosure generally relate to semiconductor devices and semiconductor device formation methods. More specifically, the embodiments described herein relate to surface functionalization and passivation using a control layer.

在半導體製造製程中，官能化一般係涉及使基板表面對原子層沉積(atomic layer deposition; ALD)前驅物具有反應性的製程或材料。鈍化一般包括在基板材料表面上形成單層或薄控制層，此使費米能階(Fermi level)係不固定的。單層成核被稱為在每個單位單元中ALD製程之起始。In the semiconductor manufacturing process, functionalization generally involves a process or material that makes the surface of the substrate reactive to atomic layer deposition (ALD) precursors. Passivation generally includes the formation of a single layer or a thin control layer on the surface of the substrate material, which makes the Fermi level not fixed. Single-layer nucleation is called the start of the ALD process in each unit cell.

現有氮化矽ALD製程通常於相對高溫（針對基於電漿之處理而言，高於約310℃）進行。眾多氮化矽ALD製程進一步採用高溫退火（＞350℃）以達成具有高品質電氣性質的化學計量Si-N_x 膜。然而，高溫製造製程可超過高級節點裝置中的材料之熱預算，此使裝置製造更加困難並且增加裝置故障的機率。此外，歸因於大前驅物體積及長前驅物脈衝時間，習知ALD製程可係無效的。The existing silicon nitride ALD process is usually performed at a relatively high temperature (above about 310°C for plasma-based processing). Many silicon nitride ALD processes further use high-temperature annealing (>350°C) to achieve a stoichiometric Si-N _x film with high-quality electrical properties. However, high-temperature manufacturing processes can exceed the thermal budget of materials in advanced node devices, which makes device manufacturing more difficult and increases the probability of device failure. In addition, due to the large precursor volume and long precursor pulse time, the conventional ALD process may be ineffective.

由此，在本領域中需要用於半導體裝置製造的改良之方法及材料。Therefore, there is a need in the art for improved methods and materials for semiconductor device manufacturing.

在一個實施例中，提供了一種基板處理方法。該方法包括藉由在反應腔室環境中將基板表面暴露至肼(N₂ H₄ )材料以及在反應腔室環境中將基板表面暴露至氯化矽材料來官能化基板表面。重複將基板表面暴露至肼材料以及將基板表面暴露至氯化矽材料，將反應腔室環境維持於低於約300℃的溫度並且在基板表面上形成SiN_x 封端層。In one embodiment, a substrate processing method is provided. The method includes functionalizing the substrate surface by exposing the substrate surface to a hydrazine (N ₂ H ₄ ) material in a reaction chamber environment and exposing the substrate surface to a silicon chloride material in the reaction chamber environment. Exposing the surface of the substrate to the hydrazine material and the surface of the substrate to the silicon chloride material are repeated to maintain the reaction chamber environment at a temperature lower than about 300° C. and form a SiN _x capping layer on the surface of the substrate.

在另一實施例中，提供了一種基板處理方法。該方法包括在反應腔室環境中將基板暴露至氫以預清潔基板、在第一暴露操作中將基板暴露至肼材料、以及在第二暴露操作中將基板暴露至氯化矽材料。在第三暴露操作中將基板暴露至肼材料並且在第三暴露操作中採用之肼材料的量小於在第一暴露操作中採用之肼的量。亦在第四暴露操作中將基板暴露至氯化矽材料並且在第四暴露操作中採用之氯化矽材料的量小於在第二暴露操作中採用之氯化矽材料的量。重複第三暴露操作及第四暴露操作，將反應腔室環境維持於低於約300℃的溫度，以及在基板上形成SiN_x 封端層。In another embodiment, a substrate processing method is provided. The method includes exposing the substrate to hydrogen in a reaction chamber environment to pre-clean the substrate, exposing the substrate to a hydrazine material in a first exposure operation, and exposing the substrate to a silicon chloride material in a second exposure operation. The substrate is exposed to the hydrazine material in the third exposure operation and the amount of hydrazine material used in the third exposure operation is less than the amount of hydrazine used in the first exposure operation. The substrate is also exposed to the silicon chloride material in the fourth exposure operation and the amount of silicon chloride material used in the fourth exposure operation is less than the amount of silicon chloride material used in the second exposure operation. The third exposure operation and the fourth exposure operation are repeated to maintain the reaction chamber environment at a temperature lower than about 300° C., and a SiN _x capping layer is formed on the substrate.

在又一實施例中，提供了一種基板處理方法。該方法包括將反應腔室環境加熱至高於約100℃的溫度以及在反應腔室環境中預清潔基板。藉由將基板暴露至肼(N₂ H₄ )材料官能化基板表面，吹掃反應腔室，以及在反應腔室環境中將基板暴露至Si₂ Cl₆ 材料。按順序重複將基板暴露至肼材料、吹掃反應腔室環境、以及將基板暴露至Si₂ Cl₆ 材料，將反應腔室環境維持於低於約300℃的溫度，以及在基板表面上形成SiN_x 封端層。In yet another embodiment, a substrate processing method is provided. The method includes heating the reaction chamber environment to a temperature higher than about 100°C and pre-cleaning the substrate in the reaction chamber environment. The surface of the substrate is functionalized by exposing the substrate to a hydrazine (N ₂ H ₄ ) material, the reaction chamber is purged, and the substrate is exposed to the Si ₂ Cl ₆ material in the environment of the reaction chamber. Repeatedly exposing the substrate to the hydrazine material, purging the reaction chamber environment, and exposing the substrate to the Si ₂ Cl ₆ material in sequence, maintaining the reaction chamber environment at a temperature below about 300°C, and forming SiN on the substrate surface _x end-blocking layer.

本揭示涉及半導體及金屬基板表面製備及受控生長的方法。一種示例應用係形成原子層沉積(atomic layer deposition; ALD)控制層以作為擴散阻障層或閘極介電層以及隨後ALD處理。據信本文所述之實施例將有利地就閘極氧化物沉積、擴散阻障層沉積、表面官能化、表面鈍化、及氧化物成核、以及其他製程而言採用。The present disclosure relates to methods for the surface preparation and controlled growth of semiconductors and metal substrates. An example application is the formation of an atomic layer deposition (ALD) control layer as a diffusion barrier or gate dielectric layer and subsequent ALD processing. It is believed that the embodiments described herein will be advantageously employed in terms of gate oxide deposition, diffusion barrier layer deposition, surface functionalization, surface passivation, and oxide nucleation, among other processes.

本文所述之實施例提供了低於約300℃（例如，約275℃）官能化、鈍化、及成核單層的氮化矽ALD製程，該製程與習知氮化矽ALD製程相比處於有利地降低之沉積溫度。The embodiments described herein provide a single-layer silicon nitride ALD process with functionalization, passivation, and nucleation below about 300°C (for example, about 275°C), which is in comparison with the conventional silicon nitride ALD process. Advantageously reduce the deposition temperature.

可採用本文所述之ALD製程而在Si-N_x 膜沉積之後無需高溫後退火，此當與習知ALD製程相比時賦能了降低之處理溫度。本文所述之實施例賦能高通量處理並且在ALD半循環反應期間採用無水含氮前驅物（無水肼）以防止不期望之氧及碳污染。根據本文所提供之實施例形成的氮化矽控制層適用於成核閘極氧化物ALD的各種金屬ALD前驅物或適用於在降低之溫度利用氯矽烷或矽烷前驅物成核進一步矽生長。The ALD process described herein can be used _{without the need for high-temperature post-annealing after the deposition of the Si-N x} film, which enables a lower processing temperature when compared with the conventional ALD process. The embodiments described herein enable high-throughput processing and use anhydrous nitrogen-containing precursor (anhydrous hydrazine) during the ALD half-cycle reaction to prevent undesired oxygen and carbon pollution. The silicon nitride control layer formed according to the embodiments provided herein is suitable for nucleating various metal ALD precursors of gate oxide ALD or for nucleating further silicon growth using chlorosilane or silane precursor at a reduced temperature.

在一個實施例中，提供了一種用於使用Si₂ Cl₆ 及N₂ H₄ 沉積氮化矽控制層以用作擴散阻障層或閘極介電層的ALD方法。在某些實施例中，氮化矽控制層可能係非晶氮化矽材料。在另一實施例中，SiN控制層可在用於半導體表面上之隨後ALD製程的製備中採用。In one embodiment, _{an ALD method for depositing a silicon nitride control layer using Si 2} Cl ₆ and N ₂ H ₄ as a diffusion barrier layer or a gate dielectric layer is provided. In some embodiments, the silicon nitride control layer may be an amorphous silicon nitride material. In another embodiment, the SiN control layer can be used in the preparation of the subsequent ALD process on the semiconductor surface.

例如，氮化矽ALD製程可低於約300℃（諸如低於約275℃）官能化、鈍化、及/或成核單層。本文所述之ALD製程採用具有縮短之循環長度及降低之基板溫度的Si₂ Cl₆ 及肼脈衝。在一個實施例中，肼係源自肼有機溶劑混合物的蒸汽，在膜沉積期間用以保持SiN_x 表面不具有或實質上不具有不期望之氧污染物。此外，可沉積SiN_x ALD膜而不形成不期望之氯化銨類晶體副產物。For example, the silicon nitride ALD process can functionalize, passivate, and/or nucleate monolayers below about 300°C (such as below about 275°C). _{The ALD process described herein uses Si 2} Cl ₆ and hydrazine pulses with shortened cycle length and reduced substrate temperature. In one embodiment, the hydrazine is derived from the vapor of the hydrazine organic solvent mixture to keep the SiN _x surface free or substantially free of undesirable oxygen contaminants during film deposition. In addition, SiN _x ALD films can be deposited without the formation of undesirable ammonium chloride-based crystal by-products.

本文所述之ALD氮化矽生長製程在半循環前驅物脈衝之間採用吹掃操作以從反應腔室移除過量未反應之前驅物。例如，吹掃操作可在半循環脈衝之間採用惰性氣體（諸如氬或類似者）來吹掃反應腔室。就在ALD生長之前亦採用高真空基準壓力來降低或消除在ALD氮化矽生長期間碳及氧的存在。在某些實施例中，反應腔室裝配有蒸發器，該蒸發器具有防止或實質上防止將除肼蒸汽之外的材料傳遞至反應腔室的膜。The ALD silicon nitride growth process described herein uses a purge operation between half-cycle precursor pulses to remove excess unreacted precursor from the reaction chamber. For example, the purge operation may use an inert gas (such as argon or the like) to purge the reaction chamber between half-cycle pulses. Just before ALD growth, a high vacuum reference pressure is also used to reduce or eliminate the presence of carbon and oxygen during ALD silicon nitride growth. In certain embodiments, the reaction chamber is equipped with an evaporator with a membrane that prevents or substantially prevents the transfer of materials other than hydrazine vapor to the reaction chamber.

在一個實施例中，ALD SiN_x 單層或多層可在各種基板材料上形成，諸如砷化銦鎵(InGaAs)、銻化銦鎵(InGaSb)、氮化銦鎵(InGaN)、鍺矽(SiGe)、鍺、矽、及改變允許組成之其他基板。預期ALD SiN_x 材料可在金屬基板上形成。In one embodiment, ALD SiN _x single layer or multiple layers can be formed on various substrate materials, such as indium gallium arsenide (InGaAs), indium gallium antimonide (InGaSb), indium gallium nitride (InGaN), silicon germanium (SiGe ), germanium, silicon, and other substrates whose composition can be changed. It is expected that the ALD SiN _x material can be formed on a metal substrate.

在操作中，藉由於約275℃給料N₂ H₄ 之高壓脈衝來由-NH_x 封端官能化基板表面。隨後，於約275℃給料Si₂ Cl₆ 以經由產生氣態HCl副產物在半導體表面上產生Si-N_x 封端層。可重複循環給料製程以產生期望的預定厚度之已沉積Si-N_x 覆蓋層。 _{In operation, the substrate surface was functionalized by -NH x} end-capping due to a high voltage pulse of _{N 2} H ₄ feeding at about 275°C. _{Subsequently, Si 2} Cl ₆ was fed at about 275° C. to _{produce a Si-N x} capping layer on the semiconductor surface through the generation of gaseous HCl by-products. The cyclic feeding process can be repeated to produce a desired predetermined thickness of the deposited Si-N _x cover layer.

本文所述之氮化矽ALD製程係基於在約275℃之基板溫度經由使用-N-H_x 基團之表面封端，利用基板半導體或金屬表面位點进行的肼(N₂ H₄ )之飽和半循環反應。一旦表面由-N-H_x 封端，第二半循環反應就藉由引入氯矽烷前驅物以產生飽和-N-Si-Cl_x 封端層及氣態HCl解吸附副產物來起始。氯矽烷前驅物包括但不限於SiCl₄ 、Si₂ Cl₆ 、及Si₃ Cl₈ 。預期Si_x Cl_y H_z （其中y＞z）之前驅物可根據本文所述之實施例使用。The silicon nitride ALD process described in this article is based on the use _{of surface capping with -NH x} groups at a substrate temperature of about 275°C, and the use of semiconductor or metal surface sites on the substrate to perform hydrazine (N ₂ H ₄ ) saturation. Loop reaction. Once the surface terminated by a -NH _x, second half-cycle to the reaction by the introduction of chlorine to produce a silane-precursor saturated -N-Si-Cl _x capping layer, and a gaseous by-product HCl desorption initiated. The chlorosilane precursors include but are not limited to SiCl ₄ , Si ₂ Cl ₆ , and Si ₃ Cl ₈ . It is expected that the Si _x Cl _y H _z (where y>z) precursor can be used according to the embodiments described herein.

根據本文所述之實施例形成的氮化矽鈍化層用於若干目的。應注意，膜可含有氧並且氧可增強一些電氣性質，因此在某些實施例中膜可表示為SiO_y N_x 。將基板之懸鍵轉移至矽，該等懸鍵隨後由氮、氧、及/或氫鈍化，進而使表面電氣鈍化。使用-NH_x （及/或OH）封端的氮化矽（或氮氧化矽）沉積之覆蓋層亦可與氧化劑諸如無水HOOH(g)反應以產生Si-N-OH及Si-OH封端層。封端層可與幾乎任何金屬ALD前驅物反應，因此，消除金屬前驅物成核（例如，利用三甲基鋁預給料）的採用、減少等效氧化物厚度(equivalent oxide thickness; EOT)、以及降低與介面層相關的邊界俘獲密度及固定電荷或甚至氧化物與非矽半導體的直接結合。相同過程可用於其他晶面諸如In_x Ga_l-x As(ll0)、In_x Ga_l-x Sb(ll0)、In_x Ga_l-x N(ll0)、SiGe(00l)、及SiGe(ll0)。The silicon nitride passivation layer formed according to the embodiments described herein serves several purposes. It should be noted that the film can contain oxygen and oxygen can enhance some electrical properties, so in some embodiments the film can be expressed as SiO _y N _x . The dangling bonds of the substrate are transferred to silicon, and the dangling bonds are then passivated by nitrogen, oxygen, and/or hydrogen, thereby electrically passivating the surface. The capping layer deposited with silicon nitride (or silicon oxynitride) capped with -NH _x (and/or OH) can also react with oxidants such as anhydrous HOOH(g) to produce Si-N-OH and Si-OH capping layers . The capping layer can react with almost any metal ALD precursor, thus eliminating the use of metal precursor nucleation (for example, using trimethylaluminum pre-feeding), reducing the equivalent oxide thickness (EOT), and Reduce the boundary trap density associated with the interface layer and the fixed charge or even the direct bonding of oxides and non-silicon semiconductors. The same process can be used for other crystal planes such as In _x Ga _lx As (110), In _x Ga _lx Sb (110), In _x Ga _lx N (110), SiGe (00l), and SiGe (110).

SiO_y N_x 覆蓋層亦可用作通道擴散阻障層，例如，在InGaAs上以防止In/Ga擴散至閘極氧化物中或在SiGe或Ge上以防止Ge擴散至閘極氧化物中。在SiGe或Ge上，SiO_y N_x 覆蓋層可產生與閘極氧化物的無Ge介面。SiO_y N_x 覆蓋層亦可在進一步金屬氧化物半導體(metal oxide semiconductor; MOS)裝置處理操作期間用於擴散阻障層應用。由於氮化矽係固有寬的能帶間隙的半導體材料，Si-N_x 控制層可進一步直接用作閘極介電材料。實驗The SiO _y N _x capping layer can also be used as a channel diffusion barrier, for example, on InGaAs to prevent In/Ga from diffusing into the gate oxide or on SiGe or Ge to prevent Ge from diffusing into the gate oxide. On SiGe or Ge, the SiO _y N _x capping layer can create a Ge-free interface with the gate oxide. The SiO _y N _x capping layer can also be used for diffusion barrier applications during further metal oxide semiconductor (MOS) device processing operations. Since silicon nitride is a semiconductor material with inherently wide band gap, the Si-N _x control layer can be directly used as a gate dielectric material. experiment

在一個實施例中，在SiGe上之氮化矽ALD製程開始於p型Si_0.5 Ge_0.5 (110)表面經歷異位濕式有機清潔，該有機清潔利用在丙酮中十分鐘超音波降解處理、接著在IPA中十分鐘超音波降解處理、以及接著在水中十分鐘超音波降解處理。隨後將樣本浸入含有2% HF/水溶液（溶液頂部上具有甲苯層）的燒杯中持續2分鐘。在2分鐘之後，將樣本穿過甲苯層拉出並在甲苯層從表面蒸發之前將樣本快速轉移至超高真空(ultra high vacuum; UHV)腔室中。完成此製程以防止樣本在2% HF浸入之後暴露於空氣中。一旦樣本在UHV中，於30°之掠射角利用單色鋁通道X射線源系統獲取表面之X射線光電子光譜學(X-ray photoelectron spectroscopy; XPS)光譜。In one embodiment, the silicon nitride ALD process on SiGe starts with the p-type Si _0.5 Ge _0.5 (110) surface undergoes ex-situ wet organic cleaning, which uses ultrasonic degradation treatment in acetone for ten minutes, followed by Ten minutes of ultrasonic degradation treatment in IPA, and then ten minutes of ultrasonic degradation treatment in water. The sample was then immersed in a beaker containing a 2% HF/water solution (with a toluene layer on top of the solution) for 2 minutes. After 2 minutes, the sample was pulled through the toluene layer and quickly transferred to an ultra high vacuum (UHV) chamber before the toluene layer evaporated from the surface. This process is completed to prevent the sample from being exposed to air after being immersed in 2% HF. Once the sample is in the UHV, the monochromatic aluminum channel X-ray source system is used to obtain the X-ray photoelectron spectroscopy (XPS) spectrum of the surface at a glancing angle of 30°.

接下來，按順序給料樣本315 MegaLangmuir無水肼、接著21 MegaLangmuir Si₂ Cl₆ 、3 MegaLangmuir無水肼、及均於275℃之樣本溫度給料之17次氮化矽ALD循環。此處每次氮化矽ALD循環包括於275℃之3 MegaLangmuir Si₂ Cl₆ 接著3 MegaLangmuir肼。在每次給料及17次氮化矽ALD循環之後，獲取表面之XPS光譜以與加載之SiGe(110)表面相比較。Next, the sample 315 MegaLangmuir anhydrous hydrazine was fed sequentially, followed by 21 MegaLangmuir Si ₂ Cl ₆ , 3 MegaLangmuir anhydrous hydrazine, and 17 silicon nitride ALD cycles fed at a sample temperature of 275°C. Here, each silicon nitride ALD cycle includes 3 MegaLangmuir Si ₂ Cl ₆ followed by 3 MegaLangmuir hydrazine at 275°C. After each feeding and 17 silicon nitride ALD cycles, the XPS spectrum of the surface was acquired to compare with the loaded SiGe (110) surface.

第1圖圖示，針對濕式清潔的加載之Si_0.5 Ge_0.5 (110)表面、315 MegaLangmuir肼給料之表面、額外21 MegaLangmuir Si₂ Cl₆ 給料之表面、以及額外17次氮化矽ALD循環給料之表面的Ge 3d、Si 2p及Cl 2p與0 1s，C 1s、及N 1s峰的雙峰對來記錄經斯科菲爾德(Schofield)光致電離橫截面相對靈敏度因素矯正的XPS原始計數。全部給料於275℃之基板溫度進行。 _{Figure 1 shows the surface of Si 0.5} Ge _0.5 (110) loaded for wet cleaning, the surface of 315 MegaLangmuir hydrazine feed, the surface of additional 21 MegaLangmuir Si ₂ Cl ₆ feed, and the additional 17 times of silicon nitride ALD cycle feed The double-peak pairs of Ge 3d, Si 2p, and Cl 2p on the surface and 0 1s, C 1s, and N 1s peaks are used to record the raw counts of XPS corrected by the relative sensitivity factor of Schofield photoionization cross-section. All feeding was performed at a substrate temperature of 275°C.

加載之SiGe(110)表面含有大量(50%)碳污染物及少量(＜10%)氧污染物。此係歸因於在蝕刻掉非所要之表面污染物或在將樣本轉移至真空中期間保護已蝕刻表面不受污染方面未完全優化的異位濕式清潔過程。然而，實務上，預期原位表面清潔技術（諸如SICONI®製程及原子氫清潔）可使SiGe(110)表面不具有氧及碳污染物。SICONI®製程獲自加利福尼亞州圣克拉拉市的應用材料公司（Applied Materials，Inc.，Santa Clara，CA）。可以看到，初始315 MegaLangmuir肼給料能夠從表面移除超過一半的碳污染物並且亦產生如藉由存在N 1s訊號所看到的-N-H_x 表面封端。The loaded SiGe (110) surface contains a large amount (50%) of carbon pollutants and a small amount (<10%) of oxygen pollutants. This is due to an ex-situ wet cleaning process that is not fully optimized in terms of etching away unwanted surface contaminants or protecting the etched surface from contamination during the transfer of the sample into a vacuum. However, in practice, it is expected that in-situ surface cleaning technologies (such as the SICONI® process and atomic hydrogen cleaning) can make the SiGe (110) surface free of oxygen and carbon contaminants. The SICONI® process was obtained from Applied Materials, Inc. (Santa Clara, CA) in Santa Clara, California. It can be seen that the initial 315 MegaLangmuir hydrazine feedstock was able to remove more than half of the carbon contaminants from the surface and also produced -NH _x surface capping as seen by the presence of the N 1s signal.

接下來，藉由給料21 MegaLangmuir Si₂ Cl₆ 接著3 MegaLangmuir肼、及17次氮化矽循環，看到Si 2p及N 1s矯正之峰面積的大幅度增加，以及Ge 3d基板峰及C 1s與0 1s表面污染物峰的減少。結果與發生的氮化矽ALD沉積一致，且不表示不期望之污染物在氮化矽膜內沉積。Next, by feeding 21 MegaLangmuir Si ₂ Cl ₆ followed by 3 MegaLangmuir hydrazine, and 17 silicon nitride cycles, we saw a substantial increase in the area of the corrected peak area of Si 2p and N 1s, as well as the Ge 3d substrate peak and C 1s and 0 1s Reduction of surface contamination peaks. The result is consistent with the silicon nitride ALD deposition that occurred and does not indicate that undesirable contaminants are deposited in the silicon nitride film.

已發現，當反應腔室及前驅物線係於25℃並且採用渦輪分子泵以從反應腔室泵出氣體副產物及未反應之前驅物時，ALD製程產生非所要之氯化銨類粉末副產物。此藉由在17次氮化矽ALD循環之後在ALD反應腔室中並且在樣本表面上明顯看到白色粉末而得以發現。在17次氮化矽循環之後的XPS結果亦顯示殘留氯訊號，此可歸因於在ALD製程之後白色粉末餘留在樣本表面上。此外，於室溫，肼及Si₂ Cl₆ 可黏在腔室壁上並且反應以形成非所要之粉末副產物，因此採用測試以決定採用以避免粉末副產物之不期望形成的腔室溫度及泵送設置。It has been found that when the reaction chamber and precursor line are at 25°C and a turbomolecular pump is used to pump out gas by-products and unreacted precursors from the reaction chamber, the ALD process produces undesirable ammonium chloride-based powder by-products. product. This was discovered by clearly seeing white powder in the ALD reaction chamber and on the sample surface after 17 silicon nitride ALD cycles. The XPS results after 17 silicon nitride cycles also showed residual chlorine signals, which can be attributed to the white powder remaining on the sample surface after the ALD process. In addition, at room temperature, hydrazine and Si ₂ Cl ₆ can stick to the wall of the chamber and react to form undesired powder by-products. Therefore, tests are used to determine the chamber temperature and temperature to avoid undesired formation of powder by-products. Pumping settings.

測試腔室設置包括具有附接之前驅物給料線的ALD腔室，該前驅物給料線連接至乾式泵，並且完整腔室、前驅物給料線、及至乾式泵的連接線全部加熱12小時至125℃。採用12小時之加熱時間以確保全部不銹鋼真空部件達到＞100℃之溫度、確保兩種前驅物均不黏在腔室壁上以及消除氯化銨類粉末副產物的形成。當進行ALD製程並且將若干次氮化矽ALD循環引入腔室中時（＞100次循環，其中每次循環由3 MegaLangmuir肼接著3 MegaLangmuir Si₂ Cl₆ 組成），在ALD腔室、前驅物給料線、或連接至乾式泵的線中未偵測到粉末。在某些實施例中，在循環ALD給料之前進行腔室調節，此藉由確保全部不銹鋼在給料之前高於100℃來有效消除粉末副產物之非所要形成。在上文所述之實例中氮化矽製程在Si_.5 Ge (110)上進行，但據信ALD製程將有利地在利用SiGe(001)及III-V基板之結晶面的情況下採用。The test chamber setup includes an ALD chamber with an attached precursor feed line connected to the dry pump, and the complete chamber, precursor feed line, and connection line to the dry pump are all heated for 12 hours to 125 hours ℃. A heating time of 12 hours is used to ensure that all stainless steel vacuum components reach a temperature of >100°C, to ensure that the two precursors do not stick to the chamber wall, and to eliminate the formation of ammonium chloride powder by-products. When the ALD process is carried out and several silicon nitride ALD cycles are introduced into the chamber (>100 cycles, where each cycle consists of 3 MegaLangmuir hydrazine followed by 3 MegaLangmuir Si ₂ Cl ₆ ), the ALD chamber and the precursor are fed No powder was detected in the line, or the line connected to the dry pump. In some embodiments, the chamber adjustment is performed before the ALD feed is recycled, which effectively eliminates the undesired formation of powder by-products by ensuring that all stainless steel is above 100°C before the feed. In the example described above, the silicon nitride process is performed on Si _.5 Ge (110), but it is believed that the ALD process will be advantageously used in the case of using SiGe (001) and the crystal face of the III-V substrate.

在熱壁設置的情況下，對Si_.5 Ge_.5 (110)表面進行ALD飽和研究。為了由不具有非所要之烴污染物的SiGe表面開始，在製備腔室中使用熱氣體裂化器於330℃進行初始原子氫清潔。給料1800 Langmuir原子氫並且從表面移除幾乎全部碳。一般而言，第2圖圖示了在原子H清潔及N₂ H₄ 預脈衝之後於285℃在Si_0.5 Ge_0.5 (110)表面上Si₂ Cl₆ 及N₂ H₄ 的SiN_x ALD半循環飽和給料之資料。更特別地，第2圖圖示了在於330℃之初始1800 原子氫清潔、於285℃在Si_.5 Ge_.5 (110)上肼預脈衝氮化（400 MegaLangmuir）、1X Si₂ Cl₆ 給料(13.5 MegaLangmuir)、3X Si₂ Cl₆ 給料(40.5 MegaLangmuir)、1X N₂ H₄ (20 MegaLangmuir)、以及3X N₂ H₄ (60 MegaLangmuir)之後的XPS結果。In the case of the hot wall setting, the ALD saturation study was carried out _{on the Si .5} Ge _{.5 (110) surface.} In order to start from the SiGe surface with no undesirable hydrocarbon contaminants, a hot gas cracker was used in the preparation chamber to perform initial atomic hydrogen cleaning at 330°C. Feed 1800 Langmuir atomic hydrogen and remove almost all carbon from the surface. In general, Figure 2 illustrates the SiN _x ALD half cycle _{of Si 2} Cl ₆ and N ₂ H ₄ _{on the Si 0.5} Ge _0.5 (110) surface at 285°C after _{atomic H cleaning and N 2} H _{4 pre-pulse} Saturated feed data. More specifically, Figure 2 illustrates the initial 1800 atomic hydrogen cleaning at 330°C, hydrazine pre-pulse nitridation (400 MegaLangmuir) _{on Si .5} Ge _.5 _{(110) at 285°C, 1X Si 2} Cl ₆ feed XPS results after (13.5 MegaLangmuir), 3X Si ₂ Cl ₆ feed (40.5 MegaLangmuir), 1X N ₂ H ₄ (20 MegaLangmuir), and 3X N ₂ H ₄ (60 MegaLangmuir).

SiCl_x 及NH_x 覆蓋均在1X脈衝之後飽和，表示ALD製程於285℃發生，如由Si 2p或N 1s XPS矯正之峰面積無進一步增加所表示。由此，根據本文所述之實施例的ALD生長技術賦能在某些實施例中約285℃的降低之生長溫度，並且該ALD生長技術藉由使用N₂ H₄ 之最具反應性之可能形式（其係無水N₂ H₄ ）賦能減少之循環時間。無水N₂ H₄ 保持Si-N_x 表面在膜沉積期間不具有非所要之氧污染物，進而允許採用較低處理溫度。如第1圖及第2圖所示，基於N₂ H₄ 之SiN_x ALD可在H清潔及濕式清潔之SiGe上沉積。Both SiCl _x and NH _x coverage were saturated after the 1X pulse, indicating that the ALD process occurred at 285°C, as indicated by no further increase in the peak area corrected by Si 2p or N 1s XPS. Thus, the ALD growth technology according to the embodiments described herein enables a reduced growth temperature of about 285°C in some embodiments, and the ALD growth technology has the most reactive possibility _{by using N 2} H ₄ The form (which is anhydrous N ₂ H ₄ ) enables reduced cycle time. Anhydrous N ₂ H ₄ keeps the Si-N _x surface free of undesirable oxygen contaminants during film deposition, thereby allowing lower processing temperatures. As shown in Fig. 1 and Fig. ₂ , SiN _x ALD based on N 2 H ₄ can be deposited on SiGe for H cleaning and wet cleaning.

隨後，SiN_x ALD過程在H清潔之Si.7Ge_.3 (001)上進行以闡明ALD製程獨立於結晶面定向工作。第3圖圖示了在於330℃初始1800原子氫清潔、於285℃在Si_.7 Ge_.3 (001)上肼預脈衝氮化步驟(400 MegaLangmuir)、1X Si₂ Cl₆ 給料(13.5 MegaLangmuir)、3X Si₂ Cl₆ 給料(40.5 MegaLangmuir)、1X N₂ H₄ (20 MegaLangmuir)、及3X N₂ H₄ (60 MegaLangmuir)之後的XPS結果。SiCl_x 及NH_x 覆蓋均在1X脈衝之後飽和，表示ALD製程於285℃發生，如由Si 2p或N 1s XPS矯正之峰面積無進一步增加所表示。Then, SiN _x ALD process to clarify an ALD thread is independent of the crystal plane orientation of the cleaning work on H Si.7Ge _.3 (001). Figure 3 illustrates the initial 1800 atomic hydrogen cleaning at 330°C, the hydrazine pre-pulse nitridation step _{on Si .7} Ge _.3 _{(001) at 285°C (400 MegaLangmuir), 1X Si 2} Cl ₆ feed (13.5 MegaLangmuir) , XPS results after 3X Si ₂ Cl ₆ feeding (40.5 MegaLangmuir), 1X N ₂ H ₄ (20 MegaLangmuir), and 3X N ₂ H ₄ (60 MegaLangmuir). Both SiCl _x and NH _x coverage were saturated after the 1X pulse, indicating that the ALD process occurred at 285°C, as indicated by no further increase in the peak area corrected by Si 2p or N 1s XPS.

亦收集並分析在於330℃之1800 Langmuir原子氫給料、於285℃之額外400 MegaLangmuir H₄ N₂ 給料之後，並且在於285℃之額外20次SiN_x ALD循環之後在加載之濕式清潔之Si_0.5 Ge_0.5 (110)、Si_0.5 Ge_0.5 (001)、及Si_0.7 Ge_0.3 (001)表面上針對Si 2p、N 1s、及Ge 2p峰的原始XPS峰面積資料（未圖示）。在Si_0.5 Ge_0.5 (110)上，大幅度位移之Si 2p峰（總Si 2p訊號之68%）表示位於101.7 eV之結合能的SiO_x N_y ，並且N 1s峰位於397.7 eV。於1219.1 eV看到少量較高結合能Ge 2p分量，表示在初始H₄ N₂ 給料之後的GeO_x N_y 表面結合，其中與結合至鍺的氮（Ge 2p總矯正之峰面積訊號的15%）相比，發現略多氮結合至矽（Si 2p總矯正之峰面積訊號的25%）。在20次SiN_x ALD循環之後，Ge 2p訊號之強度減少到原來的五分之一，表示已沉積之SiN_x 層用作防止鍺向外擴散至表面的擴散阻障層。由此，沉積之SiN_x 膜可在某些實施方式中用作擴散阻障層。The 1800 Langmuir atomic hydrogen feed at 330°C, the additional 400 MegaLangmuir H ₄ N ₂ feed at 285°C, and the wet clean Si _0.5 _{after loading after 20 additional SiN x ALD cycles at 285°C were also collected and analyzed.} Original XPS peak area data for Si 2p, N 1s, and Ge 2p peaks on Ge _0.5 (110), Si _0.5 Ge _0.5 (001), and Si _0.7 Ge _{0.3 (001) surfaces (not shown).} On Si _0.5 Ge _0.5 (110), the greatly shifted Si 2p peak (68% of the total Si 2p signal) represents the binding energy of SiO _x N _y at 101.7 eV, and the N 1s peak is at 397.7 eV. A small amount of Ge 2p component with higher binding energy is seen at 1219.1 eV, indicating that the GeO _x N _y _{surface after initial H 4} N ₂ feeding is bound to the nitrogen bound to germanium (15% of the total corrected peak area signal of Ge 2p) In comparison, it is found that slightly more nitrogen is bound to silicon (25% of the total corrected peak area signal of Si 2p). After 20 SiN _x ALD cycles, the intensity of the Ge 2p signal is reduced to one-fifth of the original, indicating that the deposited SiN _x layer serves as a diffusion barrier layer to prevent germanium from diffusing out to the surface. Thus, the deposited SiN _x film can be used as a diffusion barrier layer in certain embodiments.

在Si_0.5 Ge_0.5 (001)及Si_0.7 Ge_0.3 (001)表面上觀察到可比較之結果，其後初始H₄ N₂ 給料，位於101.7 eV的大幅度位移之SiO_x N_y 峰構成在Si_0.5 Ge_0.5 (001)上總Si 2p訊號之近似70%以及在Si_0.7 Ge_0.3 (001)上總Si 2p訊號之近似60%。在30% Ge及50% Ge SiGe(001)表面上的N1s峰均位於397.7 eV。在初始H₄ N₂ 給料之後，位於結合能1219.1 eV的GeO_x N_y 表面高結合能組成構成在Si_0.5 Ge_0.5 (001)及Si_0.7 Ge_0.3 (001)表面上總Ge 2p訊號的近似15%。在額外20次SiN_x ALD循環之後，在Si_0.7 Ge_0.3 (001)及Si_0.S Ge_0.S (001)表面上Ge 2p訊號之強度分別減少到原來的十分之一及八分之一，表示在較高及較低Ge含量之SiGe(001)表面上，SiO_x N_y 薄膜均產生防止Ge向外擴散至表面的保護性擴散阻障層。Comparable results were observed on the Si _0.5 Ge _0.5 (001) and Si _0.7 Ge _0.3 (001) surfaces. After the initial H ₄ N ₂ _{feeding, the SiO x} N _y peak with a large displacement at 101.7 eV formed in Si _{Approximately 70% of the total Si 2p signal on 0.5} Ge _0.5 (001) and approximately 60% of the total Si 2p signal on Si _0.7 Ge _0.3 (001). The N1s peaks on the 30% Ge and 50% Ge SiGe(001) surfaces are located at 397.7 eV. After the initial H ₄ N ₂ feeding, the high binding energy composition _{of the GeO x} N _y surface with a binding energy of 1219.1 eV constitutes approximately 15 of the total Ge 2p signal _{on the Si 0.5} Ge _0.5 (001) and Si _0.7 Ge _{0.3 (001) surfaces.} %. After 20 additional SiN _x ALD cycles, _{the intensity of the Ge 2p signal on the Si 0.7} Ge _0.3 (001) and Si _0.S Ge _0.S (001) surfaces was reduced to one-tenth and one-eighth, respectively. 1. It means that on the SiGe (001) surface with higher and lower Ge content, the SiO _x N _y film produces a protective diffusion barrier layer that prevents Ge from diffusing out to the surface.

第4A圖至第4C圖圖示了在利用氣態H₄ N₂ 及氣態Si₂ Cl₆ 進行ALD循環之後在Si_0.5 Ge_0.5 (110)（第4A圖）、Si_0.5 Ge_0.5 (001)（第4B圖）、Si_0.7 Ge_0.3 (001)（第4C圖）上的XPS表面組成。在第4A圖至第4C圖中進一步圖示在於330℃之1800 Langmuir原子氫給料、於285℃之400 MegaLangmuir H₄ N₂ 給料之後，並且在於285℃之額外20次SiN_x ALD循環及最後原子氫給料之後針對未位移之Si 2p與未位移之Ge 3d峰之總和標稱化的未位移之Si 2p、未位移之Ge 3d、SiO_x N_y 、GeO_x N_y 、O 1s、C 1s、N 1s、及Cl 2p的XPS矯正之峰面積。Figures 4A to 4C illustrate the results of _{Si 0.5} Ge _0.5 (110) (Figure 4A), Si _0.5 Ge _0.5 (001) (Figure 4A) and Si 0.5 Ge 0.5 (110) (Figure 4A) after the ALD cycle _{using gaseous H 4} N ₂ and gaseous Si ₂ Cl ₆ Figure 4B), _{XPS surface composition on Si 0.7} Ge _0.3 (001) (Figure 4C). Figures 4A to 4C further illustrate the 1800 Langmuir atomic hydrogen feed at 330°C, after the 400 MegaLangmuir H ₄ N ₂ feed at 285°C, and 20 additional SiN _x ALD cycles at 285°C and the final atom After hydrogen feeding, normalized unshifted Si 2p, unshifted Ge 3d, SiO _x N _y , GeO _x N _y , O 1s, C 1s, N for the sum of unshifted Si 2p and unshifted Ge 3d peaks The peak area of XPS correction of 1s and Cl 2p.

第4A圖至第4C圖所示的針對未位移之Si 2p與Ge 3d峰之總和標稱化的XPS矯正之峰面積更明確地顯示了在每個基板上的SiN_x 膜生長並且用於膜厚度及化學計量的定量。在20次ALD循環之後採用最終原子氫給料以藉由誘導氣態HCl解吸附副產物來減少在已沉積膜中之殘留氯物質。等式ln(I/I_o )=-t/A用以計算評估之已沉積SiN_x 膜厚度，其中I係在H₄ N₂ 給料及20次SiN_x ALD循環之後未位移之Si 2p及Ge 3d峰之總和的強度，I_o 係在H₄ N₂ 給料之後未位移之Si 2p及Ge 3d峰之總和的強度，「t」係已沉積SiN_x 層之厚度，並且A係Si 2p及Ge 3d收集之電子的非彈性平均自由徑(2 nm)。評估已沉積膜係在Si_0.5 Ge_0.5 (110)表面上近似0.7 nm厚並且在Si_0.5 Ge_0.5 (001)及Si_0.7 Ge_0.3 (001)表面上近似0.9 nm厚的薄富含矽之SiN_x 膜。The normalized XPS corrected peak area for the sum of the unshifted Si 2p and Ge 3d peaks shown in Figures 4A to 4C more clearly shows the _{growth of the SiN x} film on each substrate and is used for the film thickness And stoichiometric quantification. After 20 ALD cycles, the final atomic hydrogen feed is used to reduce residual chlorine species in the deposited film by inducing gaseous HCl desorption by-products. The equation ln(I/I _o )=-t/A is used to calculate the estimated _{thickness of the deposited SiN x} film, where I is the undisplaced Si 2p and Ge after _{H 4} N ₂ feeding and 20 SiN _{x ALD cycles} The intensity of the sum of 3d peaks, I _o is the intensity of the sum of Si 2p and Ge 3d peaks that are not displaced after H ₄ N ₂ _{feeding, "t" is the thickness of the deposited SiN x} layer, and A is the collection of Si 2p and Ge 3d The inelastic mean free diameter of the electron (2 nm). It is evaluated that the deposited film _{is approximately 0.7 nm thick on the Si 0.5} Ge _0.5 (110) surface and approximately 0.9 nm thick on the Si _0.5 Ge _0.5 (001) and Si _0.7 Ge _0.3 (001) surface, which is a thin silicon-rich SiN _x membrane.

接下來，採用掃描穿隧能譜學(scanning tunneling spectroscopy; STS)量測以探測如第5A圖至第5C圖圖示的SiO_x N_y /SiGe表面之狀態的局部表面密度。第5A圖圖示了p型Si_0.5 Ge_0.5 (110)，第5B圖圖示了p型Si_0.5 Ge_0.5 (001)，並且第5C圖圖示了p型Si_0.7 Ge_0.3 (001)，其中在於330℃之1800 L原子H給料、於285℃之額外400 MegaLangmuir H₄ N₂ 給料、於285℃之額外20次SiN_x ALD循環、以及於285℃之最後1800 L原子H給料之後進行STS量測。應注意能帶間隙俘獲狀態之缺乏表示表面鈍化。Next, scanning tunneling spectroscopy (STS) is used to measure the local surface density _{of the SiO x} N _{y /SiGe surface as shown in FIGS. 5A to 5C.} Figure 5A illustrates p-type Si _0.5 Ge _0.5 (110), Figure 5B illustrates p-type Si _0.5 Ge _0.5 (001), and Figure 5C illustrates p-type Si _0.7 Ge _0.3 (001), where STS is performed after 1800 L atomic H feed at 330℃, additional 400 MegaLangmuir H ₄ N ₂ feed at 285℃, 20 additional SiN _x ALD cycles at 285℃, and the last 1800 L atomic H feed at 285℃ Measurement. It should be noted that the lack of energy band gap capture state indicates surface passivation.

Si_0.5 Ge_0.5 (110)表面含有最薄的已沉積膜（近似0.7 nm）。Si_0.5 Ge_0.5 (110)表面亦具有最大範圍之已量測能帶間隙能，其中曲線之40%顯示對SiGe基板具有更強反射性之狹窄能帶間隙(1±0.02 eV)，並且曲線之60%含有近似1.4±0.02 eV之較大能帶間隙。結果表示在表面上SiN_x 成核及生長的初始1-3個單層期間跨過表面看到的各個氮化物化學計量的存在。據信在(110)表面上之SiO_x N_y ALD成核係更加困難的，因為表面含有較小結構域及增加的無序與粗糙度。Si_0.5 Ge_0.5 (001)及Si_0.7 Ge_0.3 (001)表面含有較厚之沉積的SiO_x N_y 膜（近似0.9 nm），其中表面曲線之10%顯示了平均狹窄能帶間隙(1.1±0.15 eV)並且曲線之90%顯示了測得之在Si_0.5 Ge_0.5 (001)表面上2.1±0.02 eV的平均能帶間隙、及在Si_0.7 Ge_0.3 (001)表面上1.94±0.01 eV的平均能帶間隙。全部表面顯示能帶間隙狀態之缺乏表示表面鈍化而不形成非所要之俘獲缺陷狀態。據信在增加已沉積膜之厚度的情況下，能帶間隙朝向針對化學計量之Si₃ N₄ 膜所期望之能帶間隙增加。The _{surface of Si 0.5} Ge _0.5 (110) contains the thinnest deposited film (approximately 0.7 nm). The _{surface of Si 0.5} Ge _0.5 (110) also has the largest range of measured band gap energy. 40% of the curve shows a narrow band gap (1±0.02 eV) that is more reflective to the SiGe substrate. 60% contains a large band gap of approximately 1.4±0.02 eV. Results are expressed as SiN _x stoichiometric present across the respective surfaces of the nitride seen during the initial nucleation and growth of a monolayer on the surface 1-3. _{It is believed that the nucleation of SiO x} N _y ALD on the (110) surface is more difficult because the surface contains smaller domains and increased disorder and roughness. The _{surface of Si 0.5} Ge _0.5 (001) and Si _0.7 Ge _0.3 (001) contains a thicker deposited SiO _x N _y film (approximately 0.9 nm), and 10% of the surface curve shows an average narrow band gap (1.1±0.15) eV) and 90% of the curve shows the measured average energy band gap of 2.1±0.02 eV _{on the Si 0.5} Ge _0.5 _{(001) surface and 1.94±0.01 eV on the Si 0.7} Ge _0.3 (001) surface. With gaps. The lack of an energy band gap state on the entire surface indicates that the surface is passivated without forming an undesired trapping defect state. It is believed that with increasing the thickness of the deposited film, the band gap increases toward the band gap _{desired for the stoichiometric Si 3} N ₄ film.

在XPS及STS之後，在HfO₂ 沉積之前在Si_0.7 Ge_0.3 (001)及Si_0.5 Ge_0.5 (001)二者上***及不***SiO_x N_y 控制層的情況下製造金屬氧化物半導體電容器(metal oxide semiconductor capacitor; MOSCAP)以研究SiO_x N_y /SiGe介面的電子結構。為了沉積薄SiO_x N_y 擴散阻障層並且仍維持低EOT，採用10-15次SiN_x ALD循環（具有0.2-0.25 nm之評估厚度）。為了決定更多富含矽之SiN_x 膜是否改良介面品質，針對MOSCAP製造研究每次ALD循環具有一半N₂ H₄ 脈衝長度的第二種SiN_x 配方。在每次ALD循環具有一半N₂ H₄ 脈衝長度的20次SiN_x ALD循環之後，隨後製造MOSCAP以達成近似0.2 nm之SiN_x 膜厚度。After XPS and STS, a metal oxide semiconductor capacitor was fabricated with and without the SiO _x N _y control layer inserted on both Si _0.7 Ge _0.3 (001) and Si _0.5 Ge _0.5 _{(001) before HfO 2 deposition (} metal oxide semiconductor capacitor; MOSCAP) to study the electronic structure of the _{SiO x} N _{y /SiGe interface.} In order to deposit a thin SiO _x N _y diffusion barrier layer and still maintain a low EOT, 10-15 SiN _x ALD cycles (with an evaluation thickness of 0.2-0.25 nm) were used. In order to determine whether more silicon-rich SiN _x films improve the interface quality, a second SiN _x formulation _{with half the N 2} H ₄ pulse length per ALD cycle was studied for MOSCAP manufacturing. _{After 20 SiN x} ALD cycles with half the N ₂ H ₄ pulse length per ALD cycle, MOSCAP is then fabricated to achieve a SiN _x film thickness of approximately 0.2 nm.

第6圖圖示了具有藉由分別在循環HF清潔、每次循環具有10 MegaLangmuir H₄ N₂ 脈衝之20次SiNx ALD循環、以及每次循環具有20 MegaLangmuir H₄ N₂ 脈衝之10次SiNx ALD循環之後製造之ALD沉積的40次HfO₂ 循環的Si_0.7 Ge_0.3 (001) MOSCAP之閘極洩漏特性。具有HF清潔之裝置顯示出較高之累積最大電容(C_max )值，在平帶區域附近觀察到大的介面俘獲特徵（被稱為O_it 凸塊）。相比之下，具有SiN_x 介面層之MOSCAP顯示了較小O_it 凸塊以及較小C_max 。較低C_max 與具有充分能帶間隙之SiOxNy層一致以防止電子在SiOxNy層中累積。另外，於介面處添加SiN_x 藉由使累積之最大閘極洩漏降低幾乎一個數量級改良了閘極洩漏特性。儘管具有SiNx層之兩個MOSCAP具有相似C_max 值，但是使用較長H₄ N₂ 脈衝之10次SiN_x ALD循環導致較小O_it 凸塊及最低閘極洩漏，表示具有完全飽和之H₄ N₂ 脈衝的SiN_x ALD配方導致在膜中具有較少氯及較多氮的較佳介面品質。Figure 6 shows a diagram with _{20 SiNx ALD cycles with 10 MegaLangmuir H 4} N ₂ pulses per cycle, and 10 SiNx ALD _{cycles with 20 MegaLangmuir H 4} N _{2 pulses per cycle, respectively.} The gate leakage characteristics of Si _0.7 Ge _0.3 _{(001) MOSCAP for 40 HfO 2} cycles of ALD deposited after the cycle. The device with HF cleaning showed a higher cumulative maximum capacitance (C _max ) value, and large interface trapping features (called O _it bumps) were observed near the flat belt area. In contrast, _{MOSCAP with SiN x} interface layer shows smaller O _it bumps and smaller C _max . The lower C _max is consistent with the SiOxNy layer with sufficient energy band gap to prevent electrons from accumulating in the SiOxNy layer. In addition, adding SiN _x to the interface improves the gate leakage characteristics by reducing the accumulated maximum gate leakage by almost an order of magnitude. Although the two MOSCAPs with SiNx layers have similar C _max values, 10 SiN _x ALD cycles using longer H ₄ N ₂ pulses resulted in smaller O _it bumps and lowest gate leakage, indicating a fully saturated H ₄ The N ₂ pulsed SiN _x ALD formula results in a better interface quality with less chlorine and more nitrogen in the film.

第7圖圖示了分別具有藉由在循環HF清潔之後製造之ALD沉積的45次HfO₂ 循環、以及藉由在每次循環具有10 MegaLangmuir H₄ N₂ 脈衝之20次SiNx ALD循環及每次循環具有20 MegaLangmuir H₄ N₂ 脈衝之15次SiNx ALD循環之後ALD製造沉積的40次HfO₂ 循環的Si_0.5 Ge_0.5 (001) MOSCAP之閘極洩漏特性。 _{Figure 7 illustrates 45 HfO 2} cycles deposited by ALD produced after HF cleaning in the cycle, and 20 SiNx ALD cycles with 10 MegaLangmuir H ₄ N ₂ pulses in each cycle and each cycle. The cycle has the gate leakage characteristics of Si _0.5 Ge _0.5 (001) MOSCAP with 15 SiNx ALD cycles of _{20 MegaLangmuir H 4} N ₂ _{pulses and 40 HfO 2 cycles deposited by ALD manufacturing.}

實驗分析說明了於275℃在半導體及金屬表面上無水肼的自限性及飽和反應。腔室加熱及泵送配置展示出對氯化銨類粉末副產物形成之消除。於275℃對無水肼及Si₂ Cl₆ 的腔室加熱及MegaLangmuir高壓脈衝被顯示為在不同Ge含量之SiGe(001)基板上沉積薄SiN_x 膜，進而用於MOSCAP製造。利用SiO_x N_y 薄膜表面鈍化層在30% Ge及50% Ge含量之SiGe基板上進行MOSCAP製造被顯示以研究介面電氣性質。結果表示可根據本文所述之實施例獲得有益控制層及裝置結構。Experimental analysis shows the self-limiting and saturation reaction of anhydrous hydrazine on semiconductor and metal surfaces at 275°C. The chamber heating and pumping configuration demonstrated the elimination of the formation of ammonium chloride-type powder by-products. The chamber heating of anhydrous hydrazine and Si ₂ Cl ₆ at 275° C. and the MegaLangmuir high-voltage pulses were shown to deposit thin SiN _x films on SiGe (001) substrates with different Ge contents for use in MOSCAP manufacturing. The use of SiO _x N _y thin film surface passivation layer on 30% Ge and 50% Ge content SiGe substrate for MOSCAP manufacturing was shown to study the electrical properties of the interface. The results indicate that beneficial control layers and device structures can be obtained according to the embodiments described herein.

ALD沉積之氮化矽控制層適宜用作半導體官能化保護層同時提供抗氧化及滲碳的真空保護。據信在鰭式場效電晶體(FinFET)上沉積並處理閘極堆疊期間控制層係有利的。藉由產生Si-Nx封端表面，在任何時候均化學地保護半導體基板並且層可在半導體處理工具內轉移。The silicon nitride control layer deposited by ALD is suitable as a semiconductor functionalized protective layer while providing vacuum protection against oxidation and carburization. It is believed that it is advantageous to deposit and process the control layer during the gate stack on FinFET. By creating a Si-Nx terminated surface, the semiconductor substrate is chemically protected at all times and the layer can be transferred within the semiconductor processing tool.

據信本文所述之實施例亦可有利地用於平面MOSFET或全包圍閘極(gate-all-around; GAA)FET閘極介電處理。此外，據信藉由上文所述之實施例提供的Si-N_x 封端可用於MOSFET、FINFET及GAAFET源極及汲極(source and drain; S/D)接觸介面。針對高級節點結構，可應用金屬-絕緣體-半導體(metal-insulator-semiconductor; MIS)觸點以替代用於本文所述之Rc縮放實施例的矽化物觸點，可用以形成用於MIS整合的超薄穿隧金屬氧化物。It is believed that the embodiments described herein can also be advantageously used in planar MOSFET or gate-all-around (GAA) FET gate dielectric processing. In addition, it is believed that the Si-N _x termination provided by the above-described embodiments can be used for source and drain (S/D) contact interfaces of MOSFET, FINFET, and GAAFET. For advanced node structures, metal-insulator-semiconductor (MIS) contacts can be used to replace the silicide contacts used in the Rc scaling embodiment described herein, which can be used to form super-superstructures for MIS integration. Thin tunneling metal oxide.

儘管上文涉及本揭示之實施例，本揭示之其他及進一步實施例可在不脫離本揭示之基本範疇的情況下設計，並且其範疇由隨附申請專利範圍決定。Although the above refers to the embodiments of the present disclosure, other and further embodiments of the present disclosure can be designed without departing from the basic scope of the present disclosure, and the scope is determined by the scope of the attached patent application.

無without

因此，為了能夠詳細理解本揭示之上述特徵所用方式，上文所簡要概述之本揭示之更特定描述可以參考各個實施例進行，所述實施例中的一些圖示於附圖中。然而，應當注意，附圖僅圖示例示性實施例，並且由此不應視為限制本揭示之範疇，並且本揭示可允許其他等效實施例。Therefore, in order to be able to understand in detail the manner in which the above-mentioned features of the present disclosure are used, a more specific description of the present disclosure briefly summarized above may be made with reference to various embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the drawings only illustrate exemplary embodiments, and thus should not be considered as limiting the scope of the present disclosure, and the present disclosure may allow other equivalent embodiments.

第1圖根據本文所述之實施例圖示了ALD生長技術之X射線光電子光譜學(x-ray photoelectron spectroscopy; XPS)資料。Figure 1 illustrates the X-ray photoelectron spectroscopy (XPS) data of the ALD growth technology according to the embodiments described herein.

第2圖根據本文所述之實施例圖示了ALD生長技術之XPS資料。Figure 2 illustrates the XPS data of the ALD growth technology according to the embodiments described herein.

第3圖根據本文所述之實施例圖示了ALD生長技術之XPS資料。Figure 3 illustrates the XPS data of the ALD growth technology according to the embodiments described herein.

第4A圖至第4C圖根據本文所述之實施例圖示了在利用氣態H₄ N₂ 及氣態Si₂ Cl₆ 進行ALD循環之後在各種基板組合物上的XPS表面組合物。Figures 4A to 4C illustrate XPS surface compositions on various substrate compositions after ALD cycles _{using gaseous H 4} N ₂ and gaseous Si ₂ Cl ₆ according to the embodiments described herein.

第5A圖至第5C圖根據本文所述之實施例圖示了SiO_x N_y /SiGe表面之掃描穿隧能譜(scanning tunneling spectroscopy; STS)量測值。Figures 5A to 5C illustrate the scanning tunneling spectroscopy (STS) measurement values of _{the SiO x} N _{y /SiGe surface according to the embodiments described herein.}

第6圖根據本文所述之實施例圖示了金屬氧化物半導體電容器(metal oxide semiconductor capacitor; MOSCAP)之閘極洩漏特性。Figure 6 illustrates the gate leakage characteristics of a metal oxide semiconductor capacitor (MOSCAP) according to the embodiments described herein.

第7圖根據本文所述之實施例圖示了MOSCAP之閘極洩漏特性。Figure 7 illustrates the gate leakage characteristics of MOSCAP based on the embodiments described herein.

為了便於理解，在儘可能的情況下，使用相同附圖標記標示圖中共有的相同要素。可以預期的是，一個實施例之要素及特徵可有益地併入其他實施例中而無需贅述。For ease of understanding, where possible, the same reference numerals are used to denote the same elements in the drawings. It is expected that the elements and features of one embodiment can be beneficially incorporated into other embodiments without repeating them.

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Claims

一種基板處理方法，包含以下步驟：藉由在一反應腔室環境中將該基板表面暴露至肼(N₂ H₄ )材料來官能化一基板表面；在該反應腔室環境中將該基板表面暴露至氯化矽材料；重複將該基板表面暴露至肼材料之步驟以及將該基板表面暴露至氯化矽材料之步驟，其中將該反應腔室環境維持於低於300℃之一溫度；以及在該基板表面上形成一SiN_x 封端層。A substrate processing method comprising the following steps: functionalizing a substrate surface by exposing the substrate surface to a hydrazine (N ₂ H ₄ ) material in a reaction chamber environment; and in the reaction chamber environment Exposing to the silicon chloride material; repeating the steps of exposing the surface of the substrate to the hydrazine material and the step of exposing the surface of the substrate to the silicon chloride material, wherein the reaction chamber environment is maintained at a temperature lower than 300°C; and _{A SiN x} capping layer is formed on the surface of the substrate.

如請求項1所述之方法，其中該重複將該基板表面暴露至肼材料以及將該基板表面暴露至氯化矽材料之步驟係進行直至達成該SiN_x 封端層之一預定厚度。The method according to claim 1, wherein the repeating the steps of exposing the surface of the substrate to the hydrazine material and exposing the surface of the substrate to the silicon chloride material is performed until a predetermined thickness of _{the SiN x capping layer is reached.}

如請求項2所述之方法，其中該SiN_x 封端層每次沉積一個單層直至達成該預定厚度。The method according to claim 2, wherein the SiN _x capping layer is deposited one single layer at a time until the predetermined thickness is reached.

如請求項1所述之方法，進一步包含以下步驟：在該將該基板表面暴露至肼材料之步驟與該將該基板表面暴露至氯化矽材料之步驟之間吹掃該反應腔室環境。The method according to claim 1, further comprising the step of: purging the reaction chamber environment between the step of exposing the surface of the substrate to the hydrazine material and the step of exposing the surface of the substrate to the silicon chloride material.

如請求項4所述之方法，其中該吹掃之步驟包含以下步驟：將一惰性氣體傳遞至該反應腔室環境。The method according to claim 4, wherein the step of purging includes the following steps: delivering an inert gas to the environment of the reaction chamber.

如請求項1所述之方法，其中該基板表面包含砷化銦鎵(InGaAs)、銻化銦鎵(InGaSb)、氮化銦鎵(InGaN)、鍺矽(SiGe)、鍺、矽、金屬基板、及其合金與組合中的一或更多個。The method according to claim 1, wherein the surface of the substrate comprises indium gallium arsenide (InGaAs), indium gallium antimonide (InGaSb), indium gallium nitride (InGaN), silicon germanium (SiGe), germanium, silicon, metal substrate , And one or more of its alloys and combinations.

如請求項1所述之方法，其中將該溫度維持於275℃。The method according to claim 1, wherein the temperature is maintained at 275°C.

如請求項1所述之方法，其中該氯化矽材料包含含Si_x Cl_y H_z 的一材料，其中y＞z。The method according to claim 1, wherein the silicon chloride material comprises a material containing Si _x Cl _y H _z , where y>z.

如請求項8所述之方法，其中該氯化矽材料選自由SiCl₄ 、Si₂ Cl₆ 、及Si₃ Cl₈ 組成之群組。The method according to claim 8, wherein the silicon chloride material is selected from the group consisting of SiCl ₄ , Si ₂ Cl ₆ , and Si ₃ Cl ₈ .

如請求項1所述之方法，進一步包含以下步驟：從該反應腔室環境移除一氣態HCl副產物。The method according to claim 1, further comprising the following steps: removing a gaseous HCl by-product from the environment of the reaction chamber.

一種基板處理方法，包含以下步驟：在一反應腔室環境中將一基板暴露至氫以預清潔該基板；在一第一暴露操作中將該基板暴露至肼材料；在一第二暴露操作中將該基板暴露至氯化矽材料；在一第三暴露操作中將該基板暴露至該肼材料，其中在該第三暴露操作中採用之肼材料之量小於在該第一暴露操作中採用之肼材料之量；在一第四暴露操作中將該基板暴露至該氯化矽材料，其中在該第四暴露操作中採用之氯化矽材料之量小於在該第二暴露操作中採用之氯化矽材料之量；重複該第三暴露操作及該第四暴露操作，其中將該反應腔室環境維持於低於300℃之一溫度；以及在該基板上形成一SiN_x 封端層。A substrate processing method includes the following steps: exposing a substrate to hydrogen in a reaction chamber environment to pre-clean the substrate; exposing the substrate to a hydrazine material in a first exposing operation; and in a second exposing operation Expose the substrate to the silicon chloride material; expose the substrate to the hydrazine material in a third exposure operation, wherein the amount of hydrazine material used in the third exposure operation is less than that used in the first exposure operation The amount of hydrazine material; the substrate is exposed to the silicon chloride material in a fourth exposure operation, wherein the amount of silicon chloride material used in the fourth exposure operation is less than the chlorine used in the second exposure operation The amount of the silicide material; repeat the third exposure operation and the fourth exposure operation, wherein the reaction chamber environment is maintained at a temperature lower than 300°C; and a SiN _x capping layer is formed on the substrate.

如請求項11所述之方法，其中將一基板暴露至氫之步驟包含以下步驟：將1800 Langmuir H傳遞至該反應腔室環境。The method according to claim 11, wherein the step of exposing a substrate to hydrogen comprises the following steps: delivering 1800 Langmuir H to the reaction chamber environment.

如請求項12所述之方法，其中將該反應腔室環境維持於330℃。The method according to claim 12, wherein the reaction chamber environment is maintained at 330°C.

如請求項11所述之方法，其中在該第一暴露操作中採用之肼材料之該量係315 MegaLangmuir。The method of claim 11, wherein the amount of hydrazine material used in the first exposure operation is 315 MegaLangmuir.

如請求項11所述之方法，其中在該第二暴露操作中採用之氯化矽材料之該量係21 MegaLangmuir。The method according to claim 11, wherein the amount of silicon chloride material used in the second exposure operation is 21 MegaLangmuir.

如請求項11所述之方法，其中在該第三暴露操作中採用之肼材料之該量係3 MegaLangmuir。The method according to claim 11, wherein the amount of hydrazine material used in the third exposure operation is 3 MegaLangmuir.

如請求項11所述之方法，其中在該第四暴露操作中採用之氯化矽材料之該量係3 MegaLangmuir。The method according to claim 11, wherein the amount of silicon chloride material used in the fourth exposure operation is 3 MegaLangmuir.

一種基板處理方法，包含以下步驟：將一反應腔室環境加熱至大於100℃之一溫度；在該反應腔室環境中預清潔一基板；藉由將該基板暴露至肼(N₂ H₄ )材料來官能化該基板之一表面；吹掃該反應腔室環境；在該反應腔室環境中將該基板暴露至一Si₂ Cl₆ 材料；按順序重複將該基板暴露至肼材料之步驟、吹掃該反應腔室環境之步驟、以及將該基板暴露至一Si₂ Cl₆ 材料之步驟，其中將該反應腔室環境維持於低於300℃之一溫度；以及在該基板之該表面上形成一SiN_x 封端層。A substrate processing method includes the following steps: heating a reaction chamber environment to a temperature greater than 100°C; pre-cleaning a substrate in the reaction chamber environment; exposing the substrate to hydrazine (N ₂ H ₄ ) Material to functionalize a surface of the substrate; purging the reaction chamber environment; exposing the substrate to a Si ₂ Cl ₆ material in the reaction chamber environment; repeating the steps of exposing the substrate to the hydrazine material in sequence, The step of purging the reaction chamber environment and the step of exposing the substrate to a Si ₂ Cl ₆ material, wherein the reaction chamber environment is maintained at a temperature lower than 300° C.; and on the surface of the substrate A SiN _x capping layer is formed.

如請求項18所述之方法，其中將該溫度維持於275℃。The method according to claim 18, wherein the temperature is maintained at 275°C.

如請求項18所述之方法，進一步包含以下步驟：從該反應腔室環境移除一氣態HCl副產物。The method according to claim 18, further comprising the steps of: removing a gaseous HCl by-product from the reaction chamber environment.