TWI740686B - Boost converter for reducing total harmonic distortion - Google Patents

Boost converter for reducing total harmonic distortion Download PDF

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TWI740686B
TWI740686B TW109136644A TW109136644A TWI740686B TW I740686 B TWI740686 B TW I740686B TW 109136644 A TW109136644 A TW 109136644A TW 109136644 A TW109136644 A TW 109136644A TW I740686 B TWI740686 B TW I740686B
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TW202218300A (en
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詹子增
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宏碁股份有限公司
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Abstract

A boost converter for reducing total harmonic distortion includes a bridge rectifier, a boost inductive circuit, a discharge circuit, a first power switch element, a second power switch element, a PWM (Pulse Width Modulation) IC (Integrated Circuit), a first transformer, a second transformer, and an output stage circuit. The bridge rectifier generates a rectified voltage according to a first input voltage and a second input voltage. The boost inductive circuit is coupled through the discharge circuit to a ground voltage. The first transformer includes a first main coil and a first secondary coil. The first secondary coil generates a first induced voltage. The second transformer includes a second main coil and a second secondary coil. The second secondary coil generates a second induced voltage. The output stage circuit generates an output voltage according to the first induced voltage and the second induced voltage.

Description

降低總諧波失真之升壓轉換器Boost converter to reduce total harmonic distortion

本發明係關於一種升壓轉換器,特別係關於一種可降低總諧波失真之升壓轉換器。The present invention relates to a boost converter, and more particularly to a boost converter capable of reducing total harmonic distortion.

傳統升壓轉換器之操作頻率通常設定為65kHz。若須使用較高之操作頻率,因輸出二極體具有非理想之逆向電流回復特性,則往往造成升壓轉換器承受較大之總諧波失真(Total Harmonic Distortion)。有鑑於此,勢必要提出一種全新之解決方案,以克服先前技術所面臨之困境。The operating frequency of a traditional boost converter is usually set to 65kHz. If a higher operating frequency is required, because the output diode has non-ideal reverse current recovery characteristics, the boost converter often suffers from greater total harmonic distortion (Total Harmonic Distortion). In view of this, it is necessary to propose a new solution to overcome the difficulties faced by the previous technology.

在較佳實施例中,本發明提出一種降低總諧波失真之升壓轉換器,包括:一橋式整流器,根據一第一輸入電位和一第二輸入電位來產生一整流電位;一升壓電感電路,接收該整流電位;一放電電路,其中該升壓電感電路係經由該放電電路耦接至一接地電位;一第一變壓器,包括一第一主線圈和一第一副線圈,其中該第一副線圈係用於產生一第一感應電位;一第二變壓器,包括一第二主線圈和一第二副線圈,其中該第二副線圈係用於產生一第二感應電位;一第一功率切換器,根據一脈衝寬度調變電位來選擇性地將該升壓電感電路經由該第一主線圈耦接至該接地電位;一第二功率切換器,根據該脈衝寬度調變電位來選擇性地將該升壓電感電路經由該第二主線圈耦接至該接地電位;一脈衝寬度調變積體電路,產生該脈衝寬度調變電位;以及一輸出級電路,根據該第一感應電位和該第二感應電位來產生一輸出電位。In a preferred embodiment, the present invention provides a boost converter for reducing total harmonic distortion, including: a bridge rectifier that generates a rectified potential according to a first input potential and a second input potential; and a boost inductor A circuit that receives the rectified potential; a discharge circuit, wherein the boost inductor circuit is coupled to a ground potential via the discharge circuit; a first transformer includes a first main coil and a first auxiliary coil, wherein the second A secondary coil is used to generate a first induced potential; a second transformer includes a second primary coil and a second secondary coil, wherein the second secondary coil is used to generate a second induced potential; a first A power switch that selectively couples the boost inductor circuit to the ground potential via the first main coil according to a pulse width modulated potential; a second power switch that modulates the potential based on the pulse width To selectively couple the boost inductor circuit to the ground potential via the second main coil; a pulse width modulation integrated circuit to generate the pulse width modulation potential; and an output stage circuit according to the first An induced potential and the second induced potential generate an output potential.

為讓本發明之目的、特徵和優點能更明顯易懂,下文特舉出本發明之具體實施例,並配合所附圖式,作詳細說明如下。In order to make the purpose, features and advantages of the present invention more comprehensible, specific embodiments of the present invention are listed below, with the accompanying drawings, and detailed descriptions are as follows.

在說明書及申請專利範圍當中使用了某些詞彙來指稱特定的元件。本領域技術人員應可理解,硬體製造商可能會用不同的名詞來稱呼同一個元件。本說明書及申請專利範圍並不以名稱的差異來作為區分元件的方式,而是以元件在功能上的差異來作為區分的準則。在通篇說明書及申請專利範圍當中所提及的「包含」及「包括」一詞為開放式的用語,故應解釋成「包含但不僅限定於」。「大致」一詞則是指在可接受的誤差範圍內,本領域技術人員能夠在一定誤差範圍內解決所述技術問題,達到所述基本之技術效果。此外,「耦接」一詞在本說明書中包含任何直接及間接的電性連接手段。因此,若文中描述一第一裝置耦接至一第二裝置,則代表該第一裝置可直接電性連接至該第二裝置,或經由其它裝置或連接手段而間接地電性連接至該第二裝置。Certain vocabulary is used to refer to specific elements in the specification and the scope of the patent application. Those skilled in the art should understand that hardware manufacturers may use different terms to refer to the same component. This specification and the scope of the patent application do not use differences in names as a way to distinguish elements, but use differences in functions of elements as a criterion for distinguishing. The terms "including" and "including" mentioned in the entire specification and the scope of the patent application are open-ended terms and should be interpreted as "including but not limited to". The term "approximately" means that within an acceptable error range, those skilled in the art can solve the technical problem within a certain error range and achieve the basic technical effect. In addition, the term "coupling" includes any direct and indirect electrical connection means in this specification. Therefore, if it is described in the text that a first device is coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connection means. Two devices.

第1圖係顯示根據本發明一實施例所述之升壓轉換器100之示意圖。例如,升壓轉換器100可應用於桌上型電腦、筆記型電腦,或一體成形電腦。如第1圖所示,升壓轉換器100包括:一橋式整流器110、一升壓電感電路120、一放電電路130、一第一功率切換器140、一第二功率切換器150、一脈衝寬度調變積體電路160、一第一變壓器170、一第二變壓器180,以及一輸出級電路190。必須注意的是,雖然未顯示於第1圖中,但升壓轉換器100更可包括其他元件,例如:一穩壓器或(且)一負回授電路。Fig. 1 shows a schematic diagram of a boost converter 100 according to an embodiment of the invention. For example, the boost converter 100 can be applied to a desktop computer, a notebook computer, or an integrated computer. As shown in Figure 1, the boost converter 100 includes: a bridge rectifier 110, a boost inductor circuit 120, a discharge circuit 130, a first power switch 140, a second power switch 150, and a pulse width Modulation integrated circuit 160, a first transformer 170, a second transformer 180, and an output stage circuit 190. It should be noted that although not shown in Figure 1, the boost converter 100 may further include other components, such as a voltage regulator or (and) a negative feedback circuit.

橋式整流器110可根據一第一輸入電位VIN1和一第二輸入電位VIN2來產生一整流電位VR。第一輸入電位VIN1和第二輸入電位VIN2皆可來自一外部輸入電源,其中第一輸入電位VIN1和第二輸入電位VIN2之間可形成具有任意頻率和任意振幅之一交流電壓。例如,交流電壓之頻率可約為50Hz或60Hz,而交流電壓之方均根值可由90V至264V,但亦不僅限於此。升壓電感電路120可接收整流電位VR,其中升壓電感電路120係經由放電電路130耦接至一接地電位VSS(例如:0V)。第一變壓器170包括一第一主線圈171和一第一副線圈172,其中第一主線圈171可位於第一變壓器170之一側,而第一副線圈172可位於第一變壓器170之相對另一側。第一功率切換器140可根據一脈衝寬度調變電位VM來選擇性地將升壓電感電路120經由第一主線圈171耦接至接地電位VSS。例如,若脈衝寬度調變電位VM為高邏輯位準,則第一功率切換器140即可將升壓電感電路120經由第一主線圈171耦接至接地電位VSS(亦即,第一功率切換器140可近似於一短路路徑);反之,若脈衝寬度調變電位VM為低邏輯位準,則第一功率切換器140不會將升壓電感電路120經由第一主線圈171耦接至接地電位VSS(亦即,第一功率切換器140可近似於一開路路徑)。作為對第一主線圈171之回應,第一副線圈172可用於產生一第一感應電位VS1。第二變壓器180包括一第二主線圈181和一第二副線圈182,其中第二主線圈181可位於第二變壓器180之一側,而第二副線圈182可位於第二變壓器180之相對另一側。第二功率切換器150可根據脈衝寬度調變電位VM來選擇性地將升壓電感電路120經由第二主線圈181耦接至接地電位VSS。例如,若脈衝寬度調變電位VM為高邏輯位準,則第二功率切換器150即可將升壓電感電路120經由第二主線圈181耦接至接地電位VSS(亦即,第二功率切換器150可近似於一短路路徑);反之,若脈衝寬度調變電位VM為低邏輯位準,則第二功率切換器150不會將升壓電感電路120經由第二主線圈181耦接至接地電位VSS(亦即,第二功率切換器150可近似於一開路路徑)。作為對第二主線圈181之回應,第二副線圈182可用於產生一第二感應電位VS2。脈衝寬度調變積體電路160可產生脈衝寬度調變電位VM。輸出級電路190可根據第一感應電位VS1和第二感應電位VS2來產生一輸出電位VOUT。例如,輸出電位VOUT可大致為一直流電位,其位準可約為400V,但亦不僅限於此。在此設計下,升壓電感電路120和放電電路130可共同形成一阻尼電路,以提供緩衝放電之功能。根據實際量測結果,即使脈衝寬度調變電位VM具有相對較高之操作頻率(例如:高於傳統設計之65kHz甚多),本發明所提之設計方式仍可大幅降低升壓轉換器100之總諧波失真,同時改善整體電路之功率因數。The bridge rectifier 110 can generate a rectified potential VR according to a first input potential VIN1 and a second input potential VIN2. Both the first input potential VIN1 and the second input potential VIN2 can come from an external input power source, wherein an AC voltage having any frequency and any amplitude can be formed between the first input potential VIN1 and the second input potential VIN2. For example, the frequency of the AC voltage can be about 50Hz or 60Hz, and the root mean square value of the AC voltage can be 90V to 264V, but it is not limited to this. The boost inductor circuit 120 can receive the rectified potential VR, wherein the boost inductor circuit 120 is coupled to a ground potential VSS (for example, 0V) via the discharge circuit 130. The first transformer 170 includes a first main coil 171 and a first secondary coil 172. The first primary coil 171 can be located on one side of the first transformer 170, and the first secondary coil 172 can be located on the opposite side of the first transformer 170. One side. The first power switch 140 can selectively couple the boost inductor circuit 120 to the ground potential VSS via the first main coil 171 according to a pulse width modulation potential VM. For example, if the pulse width modulation potential VM is at a high logic level, the first power switch 140 can couple the boost inductor circuit 120 to the ground potential VSS via the first main coil 171 (that is, the first power The switch 140 can be approximated as a short-circuit path); on the contrary, if the pulse width modulation potential VM is at a low logic level, the first power switch 140 will not couple the boost inductor circuit 120 via the first main coil 171 To the ground potential VSS (that is, the first power switch 140 can be approximated as an open path). In response to the first main coil 171, the first auxiliary coil 172 can be used to generate a first induced potential VS1. The second transformer 180 includes a second main coil 181 and a second secondary coil 182. The second primary coil 181 can be located on one side of the second transformer 180, and the second secondary coil 182 can be located on the opposite side of the second transformer 180. One side. The second power switch 150 can selectively couple the boost inductor circuit 120 to the ground potential VSS via the second main coil 181 according to the pulse width modulation potential VM. For example, if the pulse width modulation potential VM is at a high logic level, the second power switch 150 can couple the boost inductor circuit 120 to the ground potential VSS via the second main coil 181 (that is, the second power The switch 150 can be approximated as a short-circuit path); on the contrary, if the pulse width modulation potential VM is at a low logic level, the second power switch 150 will not couple the boost inductor circuit 120 via the second main coil 181 To the ground potential VSS (that is, the second power switch 150 can be approximated as an open path). In response to the second main coil 181, the second auxiliary coil 182 can be used to generate a second induced potential VS2. The pulse width modulation integrated circuit 160 can generate a pulse width modulation potential VM. The output stage circuit 190 can generate an output potential VOUT according to the first induced potential VS1 and the second induced potential VS2. For example, the output potential VOUT can be roughly a DC potential, and its level can be about 400V, but it is not limited to this. Under this design, the boost inductor circuit 120 and the discharge circuit 130 can jointly form a damping circuit to provide a buffer discharge function. According to actual measurement results, even if the pulse width modulation potential VM has a relatively high operating frequency (for example, much higher than the 65kHz of the traditional design), the design method proposed by the present invention can still greatly reduce the boost converter 100 The total harmonic distortion, while improving the power factor of the overall circuit.

以下實施例將介紹升壓轉換器100之詳細結構及操作方式。必須理解的是,這些圖式和敘述僅為舉例,而非用於限制本發明之範圍。The following embodiments will introduce the detailed structure and operation of the boost converter 100. It must be understood that these drawings and descriptions are only examples, and are not used to limit the scope of the present invention.

第2圖係顯示根據本發明一實施例所述之升壓轉換器200之示意圖。在第2圖之實施例中,升壓轉換器200具有一第一輸入節點NIN1、一第二輸入節點NIN2,以及一輸出節點NOUT,並包括:一橋式整流器210、一升壓電感電路220、一放電電路230、一第一功率切換器240、一第二功率切換器250、一脈衝寬度調變積體電路260、一第一變壓器270、一第二變壓器280,以及一輸出級電路290。升壓轉換器200之第一輸入節點NIN1和第二輸入節點NIN2可分別由一外部輸入電源處接收一第一輸入電位VIN1和一第二輸入電位VIN2,而升壓轉換器200之輸出節點NOUT可用於輸出一輸出電位VOUT至一電子裝置(未顯示)。FIG. 2 is a schematic diagram of a boost converter 200 according to an embodiment of the invention. In the embodiment of FIG. 2, the boost converter 200 has a first input node NIN1, a second input node NIN2, and an output node NOUT, and includes: a bridge rectifier 210, a boost inductor circuit 220, A discharge circuit 230, a first power switch 240, a second power switch 250, a pulse width modulation integrated circuit 260, a first transformer 270, a second transformer 280, and an output stage circuit 290. The first input node NIN1 and the second input node NIN2 of the boost converter 200 can receive a first input potential VIN1 and a second input potential VIN2 from an external input power source, respectively, and the output node NOUT of the boost converter 200 It can be used to output an output potential VOUT to an electronic device (not shown).

橋式整流器210包括一第一二極體D1、一第二二極體D2、一第三二極體D3,以及一第四二極體D4。第一二極體D1之陽極係耦接至第一輸入節點NIN1,而第一二極體D1之陰極係耦接至一第一節點N1以輸出一整流電位VR。第二二極體D2之陽極係耦接至第二輸入節點NIN2,而第二二極體D2之陰極係耦接至第一節點N1。第三二極體D3之陽極係耦接至一接地電位VSS,而第三二極體D3之陰極係耦接至第一輸入節點NIN1。第四二極體D4之陽極係耦接至接地電位VSS,而第四二極體D4之陰極係耦接至第二輸入節點NIN2。The bridge rectifier 210 includes a first diode D1, a second diode D2, a third diode D3, and a fourth diode D4. The anode of the first diode D1 is coupled to the first input node NIN1, and the cathode of the first diode D1 is coupled to a first node N1 to output a rectified potential VR. The anode of the second diode D2 is coupled to the second input node NIN2, and the cathode of the second diode D2 is coupled to the first node N1. The anode of the third diode D3 is coupled to a ground potential VSS, and the cathode of the third diode D3 is coupled to the first input node NIN1. The anode of the fourth diode D4 is coupled to the ground potential VSS, and the cathode of the fourth diode D4 is coupled to the second input node NIN2.

升壓電感電路220包括一第一電感器L1和一第二電感器L2。第一電感器L1之第一端係耦接至第一節點N1以接收整流電位VR,而第一電感器L1之第二端係耦接至一第二節點N1。一第一電感電流IL1可流經第一電感器L1。第二電感器L2之第一端係耦接至第一節點N1以接收整流電位VR,而第二電感器L2之第二端係耦接至一第三節點N3。一第二電感電流IL2可流經第二電感器L2。The boost inductor circuit 220 includes a first inductor L1 and a second inductor L2. The first end of the first inductor L1 is coupled to the first node N1 to receive the rectified potential VR, and the second end of the first inductor L1 is coupled to a second node N1. A first inductor current IL1 can flow through the first inductor L1. The first end of the second inductor L2 is coupled to the first node N1 to receive the rectified potential VR, and the second end of the second inductor L2 is coupled to a third node N3. A second inductor current IL2 can flow through the second inductor L2.

第一功率切換器240包括一第一電晶體M1。例如,第一電晶體M1可為一N型金氧半場效電晶體。第一電晶體M1之控制端係用於接收一脈衝寬度調變電位VM,第一電晶體M1之第一端係耦接至一第四節點N4,而第一電晶體M1之第二端係耦接至第二節點N2。脈衝寬度調變電位VM可用於調整第一功率切換器240之責任週期。例如,若脈衝寬度調變電位VM為高邏輯位準,則第一電晶體M1將被致能;反之,若脈衝寬度調變電位VM為低邏輯位準,則第一電晶體M1將被禁能。The first power switch 240 includes a first transistor M1. For example, the first transistor M1 can be an N-type MOSFET. The control terminal of the first transistor M1 is used to receive a pulse width modulation potential VM, the first terminal of the first transistor M1 is coupled to a fourth node N4, and the second terminal of the first transistor M1 It is coupled to the second node N2. The pulse width modulation potential VM can be used to adjust the duty cycle of the first power switch 240. For example, if the pulse width modulation potential VM is at a high logic level, the first transistor M1 will be enabled; conversely, if the pulse width modulation potential VM is at a low logic level, the first transistor M1 will be Was banned.

第二功率切換器250包括一第二電晶體M2。例如,第二電晶體M2可為一N型金氧半場效電晶體。第二電晶體M2之控制端係用於接收脈衝寬度調變電位VM,第二電晶體M2之第一端係耦接至一第五節點N5,而第二電晶體M2之第二端係耦接至第三節點N3。脈衝寬度調變電位VM可用於調整第二功率切換器250之責任週期。例如,若脈衝寬度調變電位VM為高邏輯位準,則第二電晶體M2將被致能;反之,若脈衝寬度調變電位VM為低邏輯位準,則第二電晶體M2將被禁能。The second power switch 250 includes a second transistor M2. For example, the second transistor M2 can be an N-type MOSFET. The control terminal of the second transistor M2 is used to receive the pulse width modulation potential VM, the first terminal of the second transistor M2 is coupled to a fifth node N5, and the second terminal of the second transistor M2 is Coupled to the third node N3. The pulse width modulation potential VM can be used to adjust the duty cycle of the second power switch 250. For example, if the pulse width modulation potential VM is at a high logic level, the second transistor M2 will be enabled; conversely, if the pulse width modulation potential VM is at a low logic level, the second transistor M2 will be Was banned.

脈衝寬度調變積體電路260可產生脈衝寬度調變電位VM。例如,脈衝寬度調變電位VM於升壓轉換器200初始化時可維持於一固定電位,而在升壓轉換器200進入正常使用階段後則可提供週期性之時脈波形。The pulse width modulation integrated circuit 260 can generate a pulse width modulation potential VM. For example, the pulse width modulation potential VM can be maintained at a fixed potential when the boost converter 200 is initialized, and a periodic clock waveform can be provided after the boost converter 200 enters the normal use phase.

放電電路230包括一第一電阻器R1、一第二電阻器R2、一第三電阻器R3、一第一電容器C1,以及一第五二極體D5。第一電阻器R1之第一端係耦接至第二節點N2,而第一電阻器R1之第二端係耦接至一第六節點N6。第二電阻器R2之第一端係耦接至第六節點N6,而第二電阻器R2之第二端係耦接至第三節點N3。在一些實施例中,第一電阻器R1和第二電阻器R2皆具有相對較大之電阻值(例如:至少1MΩ或更大)。第一電容器C1之第一端係耦接至一第七節點N7,而第一電容器C1之第二端係耦接至第六節點N6。第五二極體D5之陽極係耦接至第七節點N7,而第五二極體D5之陰極係耦接至一第八節點N8。第三電阻器R3之第一端係耦接至第八節點N8,而第三電阻器R3之第二端係耦接至接地電位VSS。The discharge circuit 230 includes a first resistor R1, a second resistor R2, a third resistor R3, a first capacitor C1, and a fifth diode D5. The first end of the first resistor R1 is coupled to the second node N2, and the second end of the first resistor R1 is coupled to a sixth node N6. The first end of the second resistor R2 is coupled to the sixth node N6, and the second end of the second resistor R2 is coupled to the third node N3. In some embodiments, both the first resistor R1 and the second resistor R2 have relatively large resistance values (for example, at least 1 MΩ or more). The first terminal of the first capacitor C1 is coupled to a seventh node N7, and the second terminal of the first capacitor C1 is coupled to the sixth node N6. The anode of the fifth diode D5 is coupled to a seventh node N7, and the cathode of the fifth diode D5 is coupled to an eighth node N8. The first end of the third resistor R3 is coupled to the eighth node N8, and the second end of the third resistor R3 is coupled to the ground potential VSS.

第一變壓器270包括一第一主線圈271和一第一副線圈272,其中第一主線圈271可位於第一變壓器270之一側,而第一副線圈272可位於第一變壓器270之相對另一側。第一主線圈271之第一端係耦接至第四節點N4,而第一主線圈271之第二端係耦接至接地電位VSS。第一副線圈272之第一端係耦接至一第九節點N9,而第一副線圈272之第二端係耦接至一第十節點N10以輸出一第一感應電位VS1。The first transformer 270 includes a first main winding 271 and a first secondary winding 272. The first primary winding 271 can be located on one side of the first transformer 270, and the first secondary winding 272 can be located on the opposite side of the first transformer 270. One side. The first end of the first main coil 271 is coupled to the fourth node N4, and the second end of the first main coil 271 is coupled to the ground potential VSS. The first end of the first auxiliary winding 272 is coupled to a ninth node N9, and the second end of the first auxiliary winding 272 is coupled to a tenth node N10 to output a first induced potential VS1.

第二變壓器280包括一第二主線圈281和一第二副線圈282,其中第二主線圈281可位於第二變壓器280之一側,而第二副線圈282可位於第二變壓器280之相對另一側。第二主線圈281具有一第一端和一第二端,其中第二主線圈281之第一端係耦接至第五節點N5,而第二主線圈281之第二端係耦接至接地電位VSS。第二副線圈282之第一端係耦接至第九節點N9,而第二副線圈282之第二端係耦接至一第十一節點N11以輸出一第二感應電位VS2。The second transformer 280 includes a second main coil 281 and a second secondary coil 282. The second primary coil 281 can be located on one side of the second transformer 280, and the second secondary coil 282 can be located on the opposite side of the second transformer 280. One side. The second main coil 281 has a first end and a second end. The first end of the second main coil 281 is coupled to the fifth node N5, and the second end of the second main coil 281 is coupled to the ground The potential VSS. The first end of the second auxiliary coil 282 is coupled to the ninth node N9, and the second end of the second auxiliary coil 282 is coupled to an eleventh node N11 to output a second induced potential VS2.

輸出級電路290包括一第六二極體D6、一第七二極體D7、一第二電容器C2、一第三電容器C3,以及一第四電容器C4。第六二極體D6之陽極係耦接至第十節點N10以接收第一感應電位VS1,而第六二極體D6之陰極係耦接至一第十二節點N12。第二電容器C2之第一端係耦接至第十二節點N12,而第二電容器C2之第二端係耦接至一共同節點NCM。例如,共同節點NCM可視為另一接地電位,其可與前述之接地電位VSS相同或相異。第七二極體D7之陽極係耦接至第十一節點N11以接收第二感應電位VS2,而第七二極體D7之陰極係耦接至輸出節點NOUT。第三電容器C3之第一端係耦接至輸出節點NOUT,而第三電容器C3之第二端係耦接至第十二節點N12。第四電容器C4之第一端係耦接至輸出節點NOUT,而第四電容器C4之第二端係耦接至共同節點NCM。在一些實施例中,第四電容器C4之電位差恰等於第二電容器C2和第三電容器C3兩者之電位差總和。The output stage circuit 290 includes a sixth diode D6, a seventh diode D7, a second capacitor C2, a third capacitor C3, and a fourth capacitor C4. The anode of the sixth diode D6 is coupled to the tenth node N10 to receive the first induced potential VS1, and the cathode of the sixth diode D6 is coupled to a twelfth node N12. The first end of the second capacitor C2 is coupled to the twelfth node N12, and the second end of the second capacitor C2 is coupled to a common node NCM. For example, the common node NCM can be regarded as another ground potential, which may be the same as or different from the aforementioned ground potential VSS. The anode of the seventh diode D7 is coupled to the eleventh node N11 to receive the second induced potential VS2, and the cathode of the seventh diode D7 is coupled to the output node NOUT. The first end of the third capacitor C3 is coupled to the output node NOUT, and the second end of the third capacitor C3 is coupled to the twelfth node N12. The first end of the fourth capacitor C4 is coupled to the output node NOUT, and the second end of the fourth capacitor C4 is coupled to the common node NCM. In some embodiments, the potential difference of the fourth capacitor C4 is exactly equal to the sum of the potential differences between the second capacitor C2 and the third capacitor C3.

在一些實施例中,升壓轉換器200可交替地操作於一第一模式和一第二模式,其操作原理可如下列所述。In some embodiments, the boost converter 200 may alternately operate in a first mode and a second mode, and its operating principle may be as described below.

在第一模式中,脈衝寬度調變電位VM為高邏輯位準,使得第一電晶體M1和第二電晶體M2皆被致能。此時,第一電感器L1和第二電感器L2皆逐漸儲存更多能量,而第一電感電流IL1和第二電感電流IL2皆逐漸變大。另外,第一變壓器270和第二變壓器280則可將輸入能量間接地傳遞至輸出級電路290。由於第一電阻器R1和第二電阻器R2之阻抗遠大於第一副線圈272和第二副線圈282之阻抗,故第五二極體D5將不足以導通,而放電電路230在第一模式中會維持不動作。In the first mode, the pulse width modulation potential VM is at a high logic level, so that both the first transistor M1 and the second transistor M2 are enabled. At this time, both the first inductor L1 and the second inductor L2 gradually store more energy, and the first inductor current IL1 and the second inductor current IL2 both gradually increase. In addition, the first transformer 270 and the second transformer 280 can indirectly transfer the input energy to the output stage circuit 290. Since the impedance of the first resistor R1 and the second resistor R2 is much greater than the impedance of the first secondary coil 272 and the second secondary coil 282, the fifth diode D5 will not be able to conduct, and the discharge circuit 230 is in the first mode The will remain inactive.

在第二模式中,脈衝寬度調變電位VM為低邏輯位準,使得第一電晶體M1和第二電晶體M2皆被禁能。此時,儲存於第一電感器L1和第二電感器L2上之能量將僅能由放電電路230進行釋放。亦即,第五二極體D5足以導通,而放電電路230亦將採取對應動作。必須注意的是,升壓電感電路220和放電電路230之組合可視為一RLC阻尼電路,其可用於緩衝第一電感器L1和第二電感器L2之放電電流。由於輸出級電路290並未直接耦接至升壓電感電路220,故第一電感電流IL1和第二電感電流IL2亦不受到第六二極體D6和第七二極體D7之逆向電流回復特性所影響。In the second mode, the pulse width modulation potential VM is at a low logic level, so that both the first transistor M1 and the second transistor M2 are disabled. At this time, the energy stored in the first inductor L1 and the second inductor L2 can only be released by the discharge circuit 230. That is, the fifth diode D5 is sufficiently turned on, and the discharge circuit 230 will also take corresponding actions. It must be noted that the combination of the boost inductor circuit 220 and the discharge circuit 230 can be regarded as an RLC damping circuit, which can be used to buffer the discharge current of the first inductor L1 and the second inductor L2. Since the output stage circuit 290 is not directly coupled to the boost inductor circuit 220, the first inductor current IL1 and the second inductor current IL2 are not affected by the reverse current recovery characteristics of the sixth diode D6 and the seventh diode D7. Affected.

第3圖係顯示傳統升壓轉換器之電感電流之波形圖,其中橫軸代表時間,而縱軸代表電流值。根據第3圖之量測結果,傳統升壓轉換器因受輸出二極體之非理想特性所干擾,故導致其對應之電感電流容易失真(如第3圖中之虛線框所示)。Figure 3 is a waveform diagram showing the inductor current of a conventional boost converter, where the horizontal axis represents time and the vertical axis represents current value. According to the measurement results in Figure 3, the traditional boost converter is disturbed by the non-ideal characteristics of the output diode, which causes its corresponding inductor current to be easily distorted (as shown by the dashed box in Figure 3).

第4圖係顯示根據本發明一實施例所述之升壓轉換器200之第一電感電流IL1或(且)第二電感電流IL2之波形圖,其中橫軸代表時間,而縱軸代表電流值。根據第4圖之量測結果,即使脈衝寬度調變電位VM具有相對較高之操作頻率,本發明所提之設計方式仍可大幅降低升壓轉換器200之總諧波失真。Fig. 4 shows a waveform diagram of the first inductor current IL1 or (and) the second inductor current IL2 of the boost converter 200 according to an embodiment of the present invention, where the horizontal axis represents time, and the vertical axis represents current value . According to the measurement result in Fig. 4, even if the pulse width modulation potential VM has a relatively high operating frequency, the design method proposed in the present invention can still greatly reduce the total harmonic distortion of the boost converter 200.

在一些實施例中,升壓轉換器200之元件參數可如下列所述。脈衝寬度調變電位VM之操作頻率可介於150kHz至250kHz之間。第一電容器C1之電容值可介於96μF至144μF之間,較佳可為120μF。第二電容器C2之電容值可介於376μF至564μF之間,較佳可為470μF。第三電容器C3之電容值可介於376μF至564μF之間,較佳可為470μF。第四電容器C4之電容值可介於544μF至816μF之間,較佳可為680μF。第一電感器L1之電感值可介於297μH至363μH之間,較佳可為330μH。第二電感器L2之電感值可介於297μH至363μH之間,較佳可為330μH。第一電阻器R1之電阻值可介於2.7MΩ至3.3MΩ之間,較佳可為3MΩ。第二電阻器R2之電阻值可介於2.7MΩ至3.3MΩ之間,較佳可為3MΩ。第三電阻器R3之電阻值可介於0.9KΩ至1.1KΩ之間,較佳可為1KΩ。第一副線圈272對第一主線圈271之匝數比值可介於1至100之間,較佳可約為11。第二副線圈282對第二主線圈281之匝數比值可介於1至100之間,較佳可約為11。以上參數範圍係根據多次實驗結果而得出,其有助於最小化升壓轉換器200之總諧波失真。In some embodiments, the component parameters of the boost converter 200 may be as described below. The operating frequency of the pulse width modulation potential VM can be between 150kHz and 250kHz. The capacitance value of the first capacitor C1 can be between 96 μF and 144 μF, preferably 120 μF. The capacitance value of the second capacitor C2 may be between 376 μF and 564 μF, preferably 470 μF. The capacitance value of the third capacitor C3 may be between 376 μF and 564 μF, preferably 470 μF. The capacitance value of the fourth capacitor C4 may be between 544 μF and 816 μF, preferably 680 μF. The inductance value of the first inductor L1 may be between 297 μH and 363 μH, preferably 330 μH. The inductance value of the second inductor L2 may be between 297 μH and 363 μH, preferably 330 μH. The resistance value of the first resistor R1 may be between 2.7MΩ and 3.3MΩ, and preferably may be 3MΩ. The resistance value of the second resistor R2 may be between 2.7MΩ to 3.3MΩ, and preferably may be 3MΩ. The resistance value of the third resistor R3 may be between 0.9KΩ and 1.1KΩ, and preferably may be 1KΩ. The ratio of the number of turns of the first auxiliary winding 272 to the first main winding 271 may be between 1 and 100, and preferably may be about 11. The ratio of the number of turns of the second auxiliary winding 282 to the second main winding 281 may be between 1 and 100, and preferably may be about 11. The above parameter range is based on the results of many experiments, which helps to minimize the total harmonic distortion of the boost converter 200.

本發明提出一種新穎之升壓轉換器,其包括由升壓電感電路和放電電路所形成之一阻尼電路。根據實際量測結果,使用前述設計之升壓轉換器幾乎可完全消除非理想之總諧波失真,同時提高整體電路之功率因數,故其很適合應用於各種各式之裝置當中。The present invention provides a novel boost converter, which includes a damping circuit formed by a boost inductor circuit and a discharge circuit. According to the actual measurement results, using the boost converter designed as described above can almost completely eliminate the non-ideal total harmonic distortion and improve the power factor of the overall circuit, so it is very suitable for use in various types of devices.

值得注意的是,以上所述之電位、電流、電阻值、電感值、電容值,以及其餘元件參數均非為本發明之限制條件。設計者可以根據不同需要調整這些設定值。本發明之升壓轉換器並不僅限於第1-4圖所圖示之狀態。本發明可以僅包括第1-4圖之任何一或複數個實施例之任何一或複數項特徵。換言之,並非所有圖示之特徵均須同時實施於本發明之升壓轉換器當中。雖然本發明之實施例係使用金氧半場效電晶體為例,但本發明並不僅限於此,本技術領域人士可改用其他種類之電晶體,例如:接面場效電晶體,或是鰭式場效電晶體等等,而不致於影響本發明之效果。It is worth noting that the above-mentioned potential, current, resistance value, inductance value, capacitance value, and other component parameters are not limitations of the present invention. The designer can adjust these settings according to different needs. The boost converter of the present invention is not limited to the state illustrated in Figs. 1-4. The present invention may only include any one or more of the features of any one or more of the embodiments in FIGS. 1-4. In other words, not all the features shown in the figures need to be implemented in the boost converter of the present invention at the same time. Although the embodiment of the present invention uses metal oxide half field effect transistors as an example, the present invention is not limited to this. Those skilled in the art can use other types of transistors, such as junction field effect transistors or fins. Type field effect transistors, etc., without affecting the effect of the present invention.

本發明雖以較佳實施例揭露如上,然其並非用以限定本發明的範圍,任何熟習此項技藝者,在不脫離本發明之精神和範圍內,當可做些許的更動與潤飾,因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention is disclosed as above in the preferred embodiment, it is not intended to limit the scope of the present invention. Anyone who is familiar with the art can make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, The scope of protection of the present invention shall be subject to those defined by the attached patent scope.

100,200:升壓轉換器 110,210:橋式整流器 120,220:升壓電感電路 130,230:放電電路 140,240:第一功率切換器 150,250:第二功率切換器 160,260:脈衝寬度調變積體電路 170,270:第一變壓器 171,271:第一主線圈 172,272:第一副線圈 180,280:第二變壓器 181,281:第二主線圈 182,282:第二副線圈 190,290:輸出級電路 C1:第一電容器 C2:第二電容器 C3:第三電容器 D1:第一二極體 D2:第二二極體 D3:第三二極體 D4:第四二極體 D5:第五二極體 D6:第六二極體 D7:第七二極體 IL1:第一電感電流 IL2:第二電感電流 M1:第一電晶體 M2:第二電晶體 N1:第一節點 N2:第二節點 N3:第三節點 N4:第四節點 N5:第五節點 N6:第六節點 N7:第七節點 N8:第八節點 N9:第九節點 N10:第十節點 N11:第十一節點 N12:第十二節點 NCM:共同節點 NIN1:第一輸入節點 NIN2:第二輸入節點 NOUT:輸出節點 L1:第一電感器 L2:第二電感器 R1:第一電阻器 R2:第二電阻器 R3:第三電阻器 VIN1:第一輸入電位 VIN2:第二輸入電位 VM:脈衝寬度調變電位 VOUT:輸出電位 VR:整流電位 VS1:第一感應電位 VS2:第二感應電位 VSS:接地電位100,200: Boost converter 110, 210: Bridge rectifier 120, 220: Boost inductor circuit 130, 230: discharge circuit 140,240: the first power switch 150, 250: second power switch 160,260: Pulse width modulation integrated circuit 170,270: the first transformer 171,271: the first main coil 172,272: the first secondary coil 180,280: second transformer 181, 281: second main coil 182,282: the second secondary coil 190, 290: output stage circuit C1: The first capacitor C2: second capacitor C3: third capacitor D1: The first diode D2: The second diode D3: The third diode D4: The fourth diode D5: Fifth diode D6: The sixth diode D7: seventh diode IL1: first inductor current IL2: second inductor current M1: The first transistor M2: second transistor N1: the first node N2: second node N3: third node N4: Fourth node N5: fifth node N6: sixth node N7: seventh node N8: The eighth node N9: Ninth node N10: Tenth node N11: The eleventh node N12: Twelfth node NCM: Common Node NIN1: the first input node NIN2: second input node NOUT: output node L1: first inductor L2: second inductor R1: first resistor R2: second resistor R3: third resistor VIN1: the first input potential VIN2: second input potential VM: Pulse width modulation potential VOUT: output potential VR: Rectified potential VS1: First induction potential VS2: second induction potential VSS: Ground potential

第1圖係顯示根據本發明一實施例所述之升壓轉換器之示意圖。 第2圖係顯示根據本發明一實施例所述之升壓轉換器之示意圖。 第3圖係顯示傳統升壓轉換器之電感電流之波形圖。 第4圖係顯示根據本發明一實施例所述之升壓轉換器之第一電感電流或(且)第二電感電流之波形圖。 Figure 1 shows a schematic diagram of a boost converter according to an embodiment of the invention. Figure 2 is a schematic diagram of a boost converter according to an embodiment of the invention. Figure 3 is a waveform diagram showing the inductor current of a conventional boost converter. Fig. 4 shows a waveform diagram of the first inductor current or (and) the second inductor current of the boost converter according to an embodiment of the invention.

100:升壓轉換器 100: Boost converter

110:橋式整流器 110: Bridge rectifier

120:升壓電感電路 120: Boost inductor circuit

130:放電電路 130: discharge circuit

140:第一功率切換器 140: The first power switch

150:第二功率切換器 150: second power switch

160:脈衝寬度調變積體電路 160: Pulse width modulation integrated circuit

170:第一變壓器 170: The first transformer

171:第一主線圈 171: The first main coil

172:第一副線圈 172: The first secondary coil

180:第二變壓器 180: second transformer

181:第二主線圈 181: second main coil

182:第二副線圈 182: The second secondary coil

190:輸出級電路 190: output stage circuit

VIN1:第一輸入電位 VIN1: the first input potential

VIN2:第二輸入電位 VIN2: second input potential

VM:脈衝寬度調變電位 VM: Pulse width modulation potential

VOUT:輸出電位 VOUT: output potential

VR:整流電位 VR: Rectified potential

VS1:第一感應電位 VS1: First induction potential

VS2:第二感應電位 VS2: second induction potential

VSS:接地電位 VSS: Ground potential

Claims (10)

一種降低總諧波失真之升壓轉換器,包括: 一橋式整流器,根據一第一輸入電位和一第二輸入電位來產生一整流電位; 一升壓電感電路,接收該整流電位; 一放電電路,其中該升壓電感電路係經由該放電電路耦接至一接地電位; 一第一變壓器,包括一第一主線圈和一第一副線圈,其中該第一副線圈係用於產生一第一感應電位; 一第二變壓器,包括一第二主線圈和一第二副線圈,其中該第二副線圈係用於產生一第二感應電位; 一第一功率切換器,根據一脈衝寬度調變電位來選擇性地將該升壓電感電路經由該第一主線圈耦接至該接地電位; 一第二功率切換器,根據該脈衝寬度調變電位來選擇性地將該升壓電感電路經由該第二主線圈耦接至該接地電位; 一脈衝寬度調變積體電路,產生該脈衝寬度調變電位;以及 一輸出級電路,根據該第一感應電位和該第二感應電位來產生一輸出電位。 A boost converter for reducing total harmonic distortion, including: A bridge rectifier that generates a rectified potential according to a first input potential and a second input potential; A boost inductance circuit to receive the rectified potential; A discharge circuit, wherein the boost inductor circuit is coupled to a ground potential via the discharge circuit; A first transformer, including a first main coil and a first auxiliary coil, wherein the first auxiliary coil is used to generate a first induced potential; A second transformer, including a second main coil and a second auxiliary coil, wherein the second auxiliary coil is used to generate a second induced potential; A first power switch, which selectively couples the boost inductor circuit to the ground potential via the first main coil according to a pulse width modulation potential; A second power switch for selectively coupling the boost inductor circuit to the ground potential via the second main coil according to the pulse width modulation potential; A pulse width modulation integrated circuit to generate the pulse width modulation potential; and An output stage circuit generates an output potential according to the first induced potential and the second induced potential. 如請求項1所述之升壓轉換器,其中該橋式整流器包括: 一第一二極體,具有一陽極和一陰極,其中該第一二極體之該陽極係耦接至一第一輸入節點以接收該第一輸入電位,而該第一二極體之該陰極係耦接至一第一節點以輸出該整流電位; 一第二二極體,具有一陽極和一陰極,其中該第二二極體之該陽極係耦接至一第二輸入節點以接收該第二輸入電位,而該第二二極體之該陰極係耦接至該第一節點; 一第三二極體,具有一陽極和一陰極,其中該第三二極體之該陽極係耦接至該接地電位,而該第三二極體之該陰極係耦接至該第一輸入節點;以及 一第四二極體,具有一陽極和一陰極,其中該第四二極體之該陽極係耦接至該接地電位,而該第四二極體之該陰極係耦接至該第二輸入節點。 The boost converter according to claim 1, wherein the bridge rectifier includes: A first diode has an anode and a cathode, wherein the anode of the first diode is coupled to a first input node to receive the first input potential, and the first diode of the The cathode is coupled to a first node to output the rectified potential; A second diode has an anode and a cathode, wherein the anode of the second diode is coupled to a second input node to receive the second input potential, and the second diode of the The cathode is coupled to the first node; A third diode having an anode and a cathode, wherein the anode of the third diode is coupled to the ground potential, and the cathode of the third diode is coupled to the first input Node; and A fourth diode having an anode and a cathode, wherein the anode of the fourth diode is coupled to the ground potential, and the cathode of the fourth diode is coupled to the second input node. 如請求項2所述之升壓轉換器,其中該升壓電感電路包括: 一第一電感器,具有一第一端和一第二端,其中該第一電感器之該第一端係耦接至該第一節點以接收該整流電位,而該第一電感器之該第二端係耦接至一第二節點;以及 一第二電感器,具有一第一端和一第二端,其中該第二電感器之該第一端係耦接至該第一節點,而該第二電感器之該第二端係耦接至一第三節點。 The boost converter according to claim 2, wherein the boost inductor circuit includes: A first inductor has a first terminal and a second terminal, wherein the first terminal of the first inductor is coupled to the first node to receive the rectified potential, and the first inductor of the The second terminal is coupled to a second node; and A second inductor has a first end and a second end, wherein the first end of the second inductor is coupled to the first node, and the second end of the second inductor is coupled Connect to a third node. 如請求項3所述之升壓轉換器,其中該第一功率切換器包括: 一第一電晶體,具有一控制端、一第一端,以及一第二端,其中該第一電晶體之該控制端係用於接收該脈衝寬度調變電位,該第一電晶體之該第一端係耦接至一第四節點,而該第一電晶體之該第二端係耦接至該第二節點; 其中該脈衝寬度調變電位之操作頻率係介於150kHz至250kHz之間。 The boost converter according to claim 3, wherein the first power switch includes: A first transistor has a control terminal, a first terminal, and a second terminal. The control terminal of the first transistor is used to receive the pulse width modulation potential. The first terminal is coupled to a fourth node, and the second terminal of the first transistor is coupled to the second node; The operating frequency of the pulse width modulated potential is between 150kHz and 250kHz. 如請求項4所述之升壓轉換器,其中該第二功率切換器包括: 一第二電晶體,具有一控制端、一第一端,以及一第二端,其中該第二電晶體之該控制端係用於接收該脈衝寬度調變電位,該第二電晶體之該第一端係耦接至一第五節點,而該第二電晶體之該第二端係耦接至該第三節點。 The boost converter according to claim 4, wherein the second power switch includes: A second transistor has a control terminal, a first terminal, and a second terminal. The control terminal of the second transistor is used to receive the pulse width modulation potential. The first terminal is coupled to a fifth node, and the second terminal of the second transistor is coupled to the third node. 如請求項3所述之升壓轉換器,其中該放電電路包括: 一第一電阻器,具有一第一端和一第二端,其中該第一電阻器之該第一端係耦接至該第二節點,而該第一電阻器之該第二端係耦接至一第六節點;以及 一第二電阻器,具有一第一端和一第二端,其中該第二電阻器之該第一端係耦接至該第六節點,而該第二電阻器之該第二端係耦接至該第三節點; 其中該第一電阻器和該第二電阻器皆具有相對較大之電阻值。 The boost converter according to claim 3, wherein the discharge circuit includes: A first resistor has a first end and a second end, wherein the first end of the first resistor is coupled to the second node, and the second end of the first resistor is coupled Connected to a sixth node; and A second resistor has a first end and a second end, wherein the first end of the second resistor is coupled to the sixth node, and the second end of the second resistor is coupled Connected to the third node; The first resistor and the second resistor both have relatively large resistance values. 如請求項6所述之升壓轉換器,其中該放電電路更包括: 一第一電容器,具有一第一端和一第二端,其中該第一電容器之該第一端係耦接至一第七節點,而該第一電容器之該第二端係耦接至該第六節點; 一第五二極體,具有一陽極和一陰極,其中該第五二極體之該陽極係耦接至該第七節點,而該第五二極體之該陰極係耦接至一第八節點;以及 一第三電阻器,具有一第一端和一第二端,其中該第三電阻器之該第一端係耦接至該第八節點,而該第三電阻器之該第二端係耦接至該接地電位。 The boost converter according to claim 6, wherein the discharge circuit further includes: A first capacitor has a first terminal and a second terminal, wherein the first terminal of the first capacitor is coupled to a seventh node, and the second terminal of the first capacitor is coupled to the Sixth node A fifth diode having an anode and a cathode, wherein the anode of the fifth diode is coupled to the seventh node, and the cathode of the fifth diode is coupled to an eighth node Node; and A third resistor has a first end and a second end, wherein the first end of the third resistor is coupled to the eighth node, and the second end of the third resistor is coupled Connect to this ground potential. 如請求項5所述之升壓轉換器,其中該第一主線圈具有一第一端和一第二端,該第一主線圈之該第一端係耦接至該第四節點,該第一主線圈之該第二端係耦接至該接地電位,該第一副線圈具有一第一端和一第二端,該第一副線圈之該第一端係耦接至一第九節點,而該第一副線圈之該第二端係耦接至一第十節點以輸出該第一感應電位。The boost converter according to claim 5, wherein the first main coil has a first end and a second end, the first end of the first main coil is coupled to the fourth node, and the first main coil The second end of a main coil is coupled to the ground potential, the first auxiliary coil has a first end and a second end, and the first end of the first auxiliary coil is coupled to a ninth node , And the second end of the first secondary coil is coupled to a tenth node to output the first induced potential. 如請求項8所述之升壓轉換器,其中該第二主線圈具有一第一端和一第二端,該第二主線圈之該第一端係耦接至該第五節點,該第二主線圈之該第二端係耦接至該接地電位,該第二副線圈具有一第一端和一第二端,該第二副線圈之該第一端係耦接至該第九節點,而該第二副線圈之該第二端係耦接至一第十一節點以輸出該第二感應電位。The boost converter according to claim 8, wherein the second main coil has a first end and a second end, the first end of the second main coil is coupled to the fifth node, and the first The second end of the two main coils is coupled to the ground potential, the second auxiliary coil has a first end and a second end, and the first end of the second auxiliary coil is coupled to the ninth node , And the second end of the second secondary coil is coupled to an eleventh node to output the second induced potential. 如請求項9所述之升壓轉換器,其中該輸出級電路包括: 一第六二極體,具有一陽極和一陰極,其中該第六二極體之該陽極係耦接至該第十節點以接收該第一感應電位,而該第六二極體之該陰極係耦接至一第十二節點; 一第二電容器,具有一第一端和一第二端,其中該第二電容器之該第一端係耦接至該第十二節點,而該第二電容器之該第二端係耦接至一共同節點; 一第七二極體,具有一陽極和一陰極,其中該第七二極體之該陽極係耦接至該第十一節點以接收該第二感應電位,而該第七二極體之該陰極係耦接至一輸出節點以輸出該輸出電位; 一第三電容器,具有一第一端和一第二端,其中該第三電容器之該第一端係耦接至該輸出節點,而該第三電容器之該第二端係耦接至該第十二節點;以及 一第四電容器,具有一第一端和一第二端,其中該第四電容器之該第一端係耦接至該輸出節點,而該第四電容器之該第二端係耦接至該共同節點。 The boost converter according to claim 9, wherein the output stage circuit includes: A sixth diode has an anode and a cathode, wherein the anode of the sixth diode is coupled to the tenth node to receive the first induced potential, and the cathode of the sixth diode Is coupled to a twelfth node; A second capacitor has a first terminal and a second terminal, wherein the first terminal of the second capacitor is coupled to the twelfth node, and the second terminal of the second capacitor is coupled to A common node; A seventh diode has an anode and a cathode, wherein the anode of the seventh diode is coupled to the eleventh node to receive the second induced potential, and the seventh diode is The cathode is coupled to an output node to output the output potential; A third capacitor has a first terminal and a second terminal, wherein the first terminal of the third capacitor is coupled to the output node, and the second terminal of the third capacitor is coupled to the first terminal Twelve nodes; and A fourth capacitor has a first terminal and a second terminal, wherein the first terminal of the fourth capacitor is coupled to the output node, and the second terminal of the fourth capacitor is coupled to the common node.
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TWI826135B (en) * 2022-11-22 2023-12-11 宏碁股份有限公司 Boost converter with high conversion efficiency

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TWI784810B (en) * 2021-11-24 2022-11-21 宏碁股份有限公司 Boost power conversion device
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