TWI738387B - Method, system and apparatus for measuring resistance of semiconductor device - Google Patents
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Description
本揭露的實施例是有關於一種半導體元件的電阻值量測方法、系統及裝置。The disclosed embodiments relate to a method, system and device for measuring the resistance of a semiconductor device.
在半導體製程中,需要量測半導體元件的電性(electric property),包括電阻值、電阻率、電導率等,藉以檢測元件缺陷並修改製程。以鰭式場效電晶體(Fin Field Effect Transistor,FinFET)為例,需要量測各個電極(例如金屬閘極、金屬源極、金屬汲極)本身的電阻值,以及磊晶(Epitaxy)層中不同電極之間的電阻值。In the semiconductor manufacturing process, it is necessary to measure the electrical properties of semiconductor components, including resistance, resistivity, conductivity, etc., in order to detect component defects and modify the manufacturing process. Take Fin Field Effect Transistor (FinFET) as an example. It is necessary to measure the resistance value of each electrode (such as metal gate, metal source, metal drain) and the difference in the epitaxy layer. The resistance value between the electrodes.
傳統的電阻值量測方式是利用四點探針(four point probe)量測儀對所要量測的區域進行定位並以探針進行針測。然而,此量測方式需要在測試探頭和待測物之間創建四個接觸點,基於探針的規格限制,對於尺寸較小或結構上較狹窄的區域,將難以實現量測。The traditional resistance measurement method is to use a four-point probe measuring instrument to locate the area to be measured and use a probe for needle measurement. However, this measurement method requires four contact points to be created between the test probe and the object to be measured. Based on the specifications of the probe, it is difficult to achieve measurement for areas with a small size or a narrow structure.
本揭露的實施例提供一種半導體元件電阻值的量測方法,適用於具有處理器的電子裝置。此方法包括下列步驟:移載待測元件至樣品支柱並利用切削裝置將待測元件切削為針尖狀的顯微樣品;利用原子探針分析裝置分析顯微樣品的摻雜(dopant)濃度,獲得摻雜濃度分佈;以及利用線性擬合法產生橫跨摻雜濃度分佈中的關注區域的切線,並分析切線上的摻雜濃度的變化曲線,以量測關注區域的電阻值。The embodiments of the present disclosure provide a method for measuring the resistance of a semiconductor element, which is suitable for electronic devices with processors. This method includes the following steps: transfer the component to be tested to the sample support and use a cutting device to cut the component to be tested into a tip-shaped microscopic sample; use an atom probe analysis device to analyze the dopant concentration of the microscopic sample to obtain Doping concentration distribution; and using a linear fitting method to generate a tangent line across the region of interest in the doping concentration distribution, and analyze the change curve of the doping concentration on the tangent line to measure the resistance value of the region of interest.
本揭露的實施例提供一種半導體元件電阻值的量測系統,其包括移載裝置、切削裝置、原子探針分析裝置及具處理器的量測裝置。移載裝置用以移載待測元件至樣品支柱。切削裝置用以切削待測元件。量測裝置耦接移載裝置、切削裝置及原子探針分析裝置,經配置以:控制移載裝置移載待測元件至樣品支柱,並控制切削裝置將待測元件切削為針尖狀的顯微樣品;控制原子探針分析裝置分析顯微樣品的摻雜濃度,獲得摻雜濃度分佈;以及利用線性擬合法產生橫跨摻雜濃度分佈中的關注區域的切線,並分析切線上的摻雜濃度的變化曲線,以量測關注區域的電阻值。The disclosed embodiment provides a semiconductor element resistance measurement system, which includes a transfer device, a cutting device, an atom probe analysis device, and a measurement device with a processor. The transfer device is used to transfer the component to be tested to the sample support. The cutting device is used to cut the component to be tested. The measurement device is coupled to the transfer device, the cutting device, and the atom probe analysis device, and is configured to: control the transfer device to transfer the component to be tested to the sample support, and control the cutting device to cut the component to be tested into a needle-shaped microscope Sample; control the atom probe analysis device to analyze the doping concentration of the microscopic sample to obtain the doping concentration distribution; and use the linear fitting method to generate a tangent line across the region of interest in the doping concentration distribution, and analyze the doping concentration on the tangent line , To measure the resistance value of the area of interest.
本揭露的實施例提供一種半導體元件電阻值的量測裝置,其包括連接裝置、儲存裝置及處理器。連接裝置用以連接移載裝置、切削裝置與原子探針分析裝置。儲存裝置用以儲存電腦程式。處理器耦接連接裝置及儲存裝置,經配置以載入並執行電腦程式以:控制移載裝置移載待測元件至樣品支柱,並控制切削裝置將待測元件切削為針尖狀的顯微樣品;控制原子探針分析裝置分析顯微樣品的摻雜濃度,獲得摻雜濃度分佈;以及利用線性擬合法產生橫跨摻雜濃度分佈中的關注區域的切線,並分析切線上的摻雜濃度的變化曲線,以量測關注區域的電阻值。The embodiment of the disclosure provides a device for measuring the resistance of a semiconductor element, which includes a connection device, a storage device, and a processor. The connecting device is used for connecting the transfer device, the cutting device and the atom probe analysis device. The storage device is used for storing computer programs. The processor is coupled to the connection device and the storage device, and is configured to load and execute a computer program to: control the transfer device to transfer the component under test to the sample support, and control the cutting device to cut the component under test into a needle-shaped microscopic sample ; Control the atom probe analysis device to analyze the doping concentration of the microscopic sample to obtain the doping concentration distribution; and use the linear fitting method to generate a tangent across the region of interest in the doping concentration distribution, and analyze the doping concentration on the tangent Change the curve to measure the resistance value of the area of interest.
以下公開內容提供用於實施所提供主題的不同特徵的許多不同的實施例或實例。以下闡述元件及排列的具體實例以簡化本發明。當然,這些僅為實例而非旨在進行限制。舉例來說,在以下說明中,將第一特徵形成在第二特徵之上或第二特徵上可包括其中第一特徵與第二特徵被形成為直接接觸的實施例,且也可包括其中第一特徵與第二特徵之間可形成有附加特徵、從而使得第一特徵與第二特徵可不直接接觸的實施例。另外,本發明可能在各種實例中重複使用參考編號及/或字母。此種重複使用是為了簡明及清晰起見,且自身並不表示所討論的各個實施例及/或配置之間的關係。The following disclosure provides many different embodiments or examples for implementing different features of the provided subject matter. Specific examples of elements and arrangements are described below to simplify the present invention. Of course, these are only examples and not intended to be limiting. For example, in the following description, forming the first feature on or on the second feature may include an embodiment in which the first feature and the second feature are formed in direct contact, and may also include the first feature and the second feature. An embodiment in which an additional feature may be formed between a feature and the second feature, so that the first feature and the second feature may not directly contact each other. In addition, the present invention may reuse reference numbers and/or letters in various examples. Such repeated use is for the sake of conciseness and clarity, and does not itself represent the relationship between the various embodiments and/or configurations discussed.
此外,為易於說明,本文中可能使用例如“在……之下”、“在……下方”、“下部”、“在……上方”、“上部”等空間相對性用語來闡述圖中所示一個元件或特徵與另一(其他)元件或特徵的關係。除附圖中所繪示的定向以外,所述空間相對性用語旨在囊括裝置在使用或操作中的不同定向。裝置可具有其他定向(旋轉90度或處於其他定向),且本文中所使用的空間相對性描述語可同樣相應地作出解釋。In addition, for ease of description, this article may use spatially relative terms such as "below", "below", "lower", "above", "upper" and other spatially relative terms to describe the Shows the relationship between one element or feature and another (other) element or feature. In addition to the orientations depicted in the drawings, the spatially relative terms are intended to encompass different orientations of the device in use or operation. The device can have other orientations (rotated by 90 degrees or in other orientations), and the spatially relative descriptors used herein can also be interpreted accordingly.
本揭露實施例是應用原子探針分析技術(Atom Probe Tomography,APT),將要進行電性量測的半導體元件製備成可供原子探針分析裝置進行分析的顯微樣品。之後,使用原子探針分析裝置分析顯微樣品的摻雜(例如硼、磷、鉮等)濃度以獲得摻雜濃度分佈,並利用線性擬合法從摻雜濃度分佈中找出橫跨所要量測區域的濃度曲線,從而根據曲線變化量測出該量測區域的電阻值。In the disclosed embodiment, the Atom Probe Tomography (APT) technology is used to prepare a semiconductor element for electrical measurement into a microscopic sample that can be analyzed by an atom probe analysis device. After that, an atom probe analysis device is used to analyze the dopant (such as boron, phosphorus, arson, etc.) concentration of the microscopic sample to obtain the dopant concentration distribution, and the linear fitting method is used to find the desired measurement across the doping concentration distribution. The concentration curve of the area, and the resistance value of the measurement area is measured according to the curve change.
圖1是根據本揭露實施例所繪示的半導體元件電阻值的量測系統的方塊圖。參照圖1,本實施例的量測系統10包括移載裝置12、切削裝置14、原子探針分析裝置16及量測裝置20,其功能分述如下:FIG. 1 is a block diagram of a system for measuring the resistance of a semiconductor device according to an embodiment of the disclosure. 1, the
移載裝置12例如是顯微操作器(Micromanipulator),其例如可將樣品移載至樣品支柱。所述樣品例如是利用聚焦離子束(Focused Ion Beam,FIB)對待測元件(例如半導體元件)進行挖溝、切割、蝕刻等操作後所獲得的長條狀或薄片狀物件,所述樣品支柱的材質例如是鎢等,在此不設限。在一實施例中,移載裝置12是將樣品薄片焊接到樣品支柱上並切為長條狀,以便後續製作針尖狀的顯微樣品。The
切削裝置14例如是聚焦離子束系統,其採用高能量的鎵離子束(或氦離子束、氖離子束)由上而下對測試樣品進行切削以製作奈米結構物。其中,切削裝置14是利用圖案化的離子束遮罩(mask)來遮蔽聚焦離子束,以保留測試樣品的遮蔽部分而移除未遮蔽部分,從而將測試樣品切削成所要的形狀(如針尖狀)。The
原子探針分析裝置16例如是原子探針層析儀,其例如是在超高真空及液態氮冷卻的條件下,對針尖狀的顯微樣品施加高壓,使得樣品表面的原子形成離子並離開針尖表面,而藉由飛行時間質譜儀(mass spectrometer)測量離子的飛行時間以鑑別其成分。其中,原子探針分析裝置16可藉由對不同元素的原子進行分析,而繪製出樣品中不同元素的原子在納米空間中的分佈圖。The atom
量測裝置20例如是電腦、工作站、伺服器等計算機裝置,其例如是透過有線或無線的方式與移載裝置12、切削裝置14及原子探針分析裝置16連接,以控制移載裝置12、切削裝置14及原子探針分析裝置16的運作並接收資料,從而執行本揭露實施例的電阻值量測方法。The
圖2是根據本發明一實施例所繪示的半導體元件電阻值的量測裝置的方塊圖。請同時參考圖1及圖2,本實施例說明圖1中的量測裝置20的結構。量測裝置20包括連接裝置22、儲存裝置24及處理器26等元件,這些元件的功能分述如下:FIG. 2 is a block diagram of a device for measuring the resistance of a semiconductor device according to an embodiment of the present invention. Please refer to FIG. 1 and FIG. 2 at the same time. This embodiment illustrates the structure of the
連接裝置22例如是用以與移載裝置12、切削裝置14及原子探針分析裝置16連接並傳輸指令或資料的任意的有線或無線的介面裝置。對於有線方式而言,連接裝置可以是通用序列匯流排(universal serial bus,USB)、RS232、通用非同步接收器/傳送器(universal asynchronous receiver/transmitter,UART)、內部整合電路(I2C)或序列周邊介面(serial peripheral interface,SPI),但不限於此。對於無線方式而言,連接裝置可以是支援無線保真(wireless fidelity,Wi-Fi)、RFID、藍芽、紅外線、近場通訊(near-field communication,NFC)或裝置對裝置(device-to-device,D2D)等通訊協定的裝置,亦不限於此。The
儲存裝置24例如是任意型式的固定式或可移動式隨機存取記憶體(Random Access Memory,RAM)、唯讀記憶體(Read-Only Memory,ROM)、快閃記憶體(Flash memory)、硬碟或類似元件或上述元件的組合,而用以儲存可由處理器26執行的電腦程式。The
處理器26例如是中央處理單元(Central Processing Unit,CPU),或是其他可程式化之一般用途或特殊用途的微處理器(Microprocessor)、微控制器(Microcontroller)、數位訊號處理器(Digital Signal Processor,DSP)、可程式化控制器、特殊應用積體電路(Application Specific Integrated Circuits,ASIC)、可程式化邏輯裝置(Programmable Logic Device,PLD)或其他類似裝置或這些裝置的組合,本發明不在此限制。在本實施例中,處理器26可從儲存裝置24載入電腦程式,以執行本揭露實施例的電阻值量測方法。The
詳細來說,圖3是根據本揭露實施例所繪示的半導體元件電阻值的量測方法的流程圖。請同時參照圖1、圖2及圖3,本實施例的方法適用於圖2所示的量測裝置20,以下參照量測系統10及量測裝置20中的各種元件闡述本實施例方法的詳細步驟。In detail, FIG. 3 is a flowchart of a method for measuring the resistance of a semiconductor device according to an embodiment of the disclosure. Please refer to FIG. 1, FIG. 2 and FIG. 3 at the same time. The method of this embodiment is applicable to the
在步驟S202中,量測裝置20的處理器26控制移載裝置12將待測元件移載至樣品支柱,並利用切削裝置14將待測元件切削為針尖狀的顯微樣品。其中,切削裝置14例如是採用高能量的離子束將待測元件切削為針尖狀。而為了避免待測元件在切削過程中受到損壞,本揭露實施例例如是在將待測元件移載至樣品支柱之前,對待測元件進行一連串的處理,以在不破壞待測元件電性的情況下強化待測元件的結構。In step S202, the
詳細而言,圖4是根據本揭露實施例所繪示的半導體元件樣品製備方法的流程圖。請同時參照圖2及圖4,本實施例的方法適用於圖2所示的量測裝置20,其步驟如下:In detail, FIG. 4 is a flowchart of a method for preparing a semiconductor device sample according to an embodiment of the disclosure. Please refer to FIG. 2 and FIG. 4 at the same time. The method of this embodiment is applicable to the measuring
在步驟S402中,處理器26控制晶片去層裝置(未繪示)去層待測元件上的保護層,以露出金屬層。在一些實施例中,處理器26例如是採用化學機械研磨法(Chemical Mechanical Polishing,CMP)去除待測元件上的介電層、沈積層等,以裸露出待測元件的金屬閘極或其他金屬層。在一些實施例中,處理器26例如是採用離子蝕刻的方式去除待測元件上的鈍化層(passivation layer)、絕緣層等,以裸露出待測元件的金屬閘極或其他金屬層。本揭露實施例不限制去層裝置的種類及去層方式。In step S402, the
在一些實施例中,處理器26在對待測元件上的保護層進行研磨時,例如會分析研磨後元件表面的元素組成,從而在所分析的元素組成包括特定元素時,判定已研磨至金屬層,從而控制晶片去層裝置停止研磨。在一些實施例中,處理器26例如是在所分析訊號中出現高頻振盪(High-frequency Oscillation,HfO)時,即判定已研磨到金屬層,從而控制晶片去層裝置停止研磨。In some embodiments, when the
在步驟S404中,處理器26控制蝕刻裝置(未繪示)去除金屬層上的電極接點(contact)。所述蝕刻裝置例如是針對特定材料(例如鎢、鈷)進行蝕刻,以去除材質為該特定材料的電極接點。In step S404, the
在步驟S406中,處理器26控制填充裝置(未繪示)以保護材料填充電極接點去除後所留的空隙。在一些實施例中,處理器26例如是採用物理氣相沉積(Physical Vapor Deposition,PVD)、化學氣相沉積(Chemical Vapor Deposition,CVD)、原子層沉積(Atomic Layer Deposition,ALD)、旋轉塗覆(Spin coating)等技術,以碳、氧或二氧化矽的有機物或ALD的化合物(compounds)等保護材料取代一般金屬閘極的保護材料(如氮化鈦),填充至電極接點去除後所留的空隙,藉此保護填充區域的元件結構在後續切削過程不被破壞。In step S406, the
舉例來說,圖5A至圖5E是根據本揭露實施例所繪示的半導體元件樣品製備方法的範例。其中,圖5A繪示經過完整製程的待測元件50的結構,其中磊晶層EPI上形成有金屬閘極MG和金屬汲極MD,而在金屬閘極MG和金屬汲極MD上則形成有保護層52。本實施例利用晶片去層裝置將待測元件50上的保護層52去層,以露出金屬閘極MG和金屬汲極MD(如圖5B的待測元件50a所示),接著利用蝕刻裝置去除金屬閘極MG、金屬汲極MD的電極接點,而留下空隙54(如圖5C的待測元件50b所示),之後則利用填充裝置以保護材料56填充空隙54(如圖5D的待測元件50c所示),最後則將處理後的待測元件50c進行移載並切削成針尖狀(如圖5D的虛線58所示的形狀)的顯微樣品以利後續分析。For example, FIGS. 5A to 5E are examples of a method for preparing a semiconductor device sample according to an embodiment of the disclosure. 5A shows the structure of the device under
圖6A至圖6D是根據本揭露實施例所繪示的半導體元件的顯微影像。其中,圖6A是圖5C去除電極接點後的待測元件的顯微影像,其中區域62的影像顯示出電極接點去除後留下空隙。圖6B是圖5D填充保護材料後的待測元件的顯微影像,其中區域64的影像顯示出空隙已被保護材料填滿。圖6C是圖5E的待測元件移載至樣品支柱的顯微影像。圖6D則是將待測元件切削成針尖狀的顯微樣品的顯微影像。6A to 6D are microscopic images of the semiconductor device according to an embodiment of the disclosure. Among them, FIG. 6A is a microscopic image of the device under test after the electrode contacts are removed in FIG. 5C, and the image of the
本揭露實施例即針對上述製程所製備的待測元件的顯微樣品進行原子探針分析,以分析出此顯微樣品的摻雜濃度,並據以量測顯微樣品中關注區域(region of interest,ROI)的電阻值。The disclosed embodiment is to perform atom probe analysis on the microscopic sample of the device to be tested prepared by the above-mentioned process to analyze the doping concentration of the microscopic sample, and to measure the region of interest in the microscopic sample according to this method. interest, ROI) resistance value.
回到圖3的流程,在步驟S304中,處理器26利用原子探針分析裝置16分析顯微樣品的摻雜濃度,以獲得摻雜濃度分佈。其中,處理器26例如會參考所要量測區域在待測元件上的相對位置,調整原子探針分析裝置16以針對該量測區域進行摻雜濃度的分析。Returning to the flow of FIG. 3, in step S304, the
舉例來說,圖7是根據本揭露實施例所繪示的半導體元件的顯微影像。請參照圖7,影像70中顯示出半導體元件,包括位於兩側的源/汲極區域(黑色區域)和位於中間的閘極區域(黑色區域)。其中,需要量測電阻值的區域包括源/汲極本身的電阻R
c,以及磊晶層72中閘極的電阻R
ch、閘極延伸區域的電阻R
ext,以及源/汲極與閘極之間的電阻R
sd。
For example, FIG. 7 is a microscopic image of the semiconductor device according to an embodiment of the disclosure. Please refer to FIG. 7, the
為了量測特定區域的電阻值,在一些實施例中,可在製備待測元件的顯微樣品時,即針對該區域對待測元件進行挖溝、切割、蝕刻等操作以獲得長條狀或薄片狀的樣品薄片,從而焊接到樣品支柱上以製備顯微樣品,並用以量測該區域的電阻值。在一些實施例中,則可根據該區域的圖案,從原子探針分析裝置所分析的摻雜濃度分佈中找出符合該圖案的區域,從而進行後續的電阻值量測。In order to measure the resistance value of a specific area, in some embodiments, when preparing a microscopic sample of the device to be tested, operations such as trenching, cutting, and etching can be performed on the device to be tested in the area to obtain a strip or sheet. The sample sheet is welded to the sample support to prepare a microscopic sample and used to measure the resistance value of the area. In some embodiments, according to the pattern of the region, a region conforming to the pattern can be found from the doping concentration distribution analyzed by the atom probe analysis device, so as to perform the subsequent resistance value measurement.
在步驟S306中,處理器26利用線性擬合法產生橫跨摻雜濃度分佈中的關注區域的切線,並分析此切線上的摻雜濃度的變化曲線,以量測出關注區域的電阻值。所述的線性擬合法例如是最小平方線性擬合法(least square linear fitting)。本揭露實施例藉由對摻雜濃度分佈執行此線性擬合法,而能夠透過最小化誤差的平方和的方式找出能夠與此摻雜濃度分佈擬合的最佳線性方程。In step S306, the
舉例來說,圖8是根據本揭露實施例所繪示的摻雜濃度分佈圖。請參照圖8,本實施例的摻雜濃度分佈圖80是以等高線的形式繪製,其例如是以摻雜濃度分佈中的最高濃度作為基準,每隔一定的比例或百分比(例如5%~20%)繪製一條曲線,以顯露摻雜濃度的變化及其與關注區域的分佈。其中,切線82是利用線性擬合法所算出的直線,其路徑會經過摻雜濃度分佈圖80上各個濃度區域,而可視為是與此摻雜濃度分佈圖80擬合的最佳切線。For example, FIG. 8 is a doping concentration distribution diagram drawn according to an embodiment of the present disclosure. Please refer to FIG. 8, the doping
在一些實施例中,對於上述經由線性擬合法所產生的切線,處理器26可進一步藉由計算此切線的長度與摻雜濃度分佈的關係來判斷此切線是否橫跨所要量測的區域(即,關注區域),以獲得準確的量測結果。詳細而言,針對橫跨摻雜濃度分佈的不同區域的多條切線,處理器26例如會計算各個切線在摻雜濃度分佈中的長度與摻雜濃度分佈的長度的比值,並與預設閥值比較,從而在所計算的比值小於等於預設閥值時,將該切線濾除,而僅保留符合要求的切線以進行後續的電阻值量測。所述預設閥值例如是介於0.6至0.9之間的任意值,在此不設限。In some embodiments, for the above-mentioned tangent line generated by the linear fitting method, the
舉例來說,圖9A及圖9B是根據本揭露實施例所繪示的摻雜濃度分佈的擬合切線的校正方法。請參照圖9A及圖9B,本實施例以圖8的摻雜濃度分佈圖80為例,而分別求出可橫跨摻雜濃度分佈圖80的切線84及82。本實施例進一步計算切線84及82在摻雜濃度分佈圖80中的長度X,並計算此長度與摻雜濃度分佈圖80的長度Y的比值,從而判斷所計算的比值是否大於0.7。其中,在圖9A中,切線84的長度X例如為35奈米,而摻雜濃度分佈圖80的長度Y為80奈米,其比值0.43小於0.7,因此可判定切線84並非較佳的擬合線,而可將其濾除。另一方面,在圖9B中,切線82的長度X例如為60奈米,而摻雜濃度分佈圖80的長度Y為80奈米,其比值0.75大於0.7,因此可判定切線82為較佳的擬合線,而可用以進行後續的電阻值量測。藉由上述方法,可快速濾除擬合度不佳的切線,而找出較有機會與摻雜濃度分佈擬合的切線,提高所量測電阻值的準確度。For example, FIG. 9A and FIG. 9B show the method for correcting the fitting tangent of the doping concentration distribution according to the embodiment of the disclosure. Please refer to FIGS. 9A and 9B. In this embodiment, the
在一些實施例中,處理器26例如是利用學習模型辨識摻雜濃度的變化曲線中的特徵,以獲得對應的電阻值。其中,此學習模型例如是利用機器學習(machine learning)演算法建立,而藉由輸入不同測試樣品的摻雜濃度變化曲線及其對應的電阻值,使得學習模型能夠學習這些摻雜濃度變化曲線與對應的電阻值之間的關係,而應用於實際量測。藉此,可實現半導體元件電性的快速量測。In some embodiments, the
綜上所述,本揭露實施例藉由對半導體元件進行摻雜濃度的分析,並以預先訓練的學習模型來解譯分析結果以量測關注區域的電阻值,而不受限於所要量測區域的規格或結構,因此可實現半導體元件電性的快速量測,並自動產生資料回饋到產生以調整或校正製程。In summary, the embodiment of the present disclosure analyzes the doping concentration of the semiconductor device, and interprets the analysis result with a pre-trained learning model to measure the resistance value of the region of interest, and is not limited to the desired measurement. The area specification or structure can thus realize the rapid measurement of the electrical properties of the semiconductor device, and automatically generate data feedback to the generation to adjust or calibrate the process.
根據一些實施例,提供一種半導體元件電阻值的量測方法,適用於具有處理器的電子裝置。此方法包括下列步驟:移載待測元件至樣品支柱並利用切削裝置將待測元件切削為針尖狀的顯微樣品;利用原子探針分析裝置分析顯微樣品的摻雜濃度,獲得摻雜濃度分佈;以及利用線性擬合法產生橫跨摻雜濃度分佈中的關注區域的切線,並分析切線上的摻雜濃度的變化曲線,以量測關注區域的電阻值。According to some embodiments, a method for measuring the resistance of a semiconductor element is provided, which is suitable for an electronic device with a processor. The method includes the following steps: transfer the component to be tested to the sample support and use a cutting device to cut the component to be tested into a tip-shaped microscopic sample; use an atom probe analysis device to analyze the doping concentration of the microscopic sample to obtain the doping concentration Distribution; and using a linear fitting method to generate a tangent line across the region of interest in the doping concentration distribution, and analyze the change curve of the doping concentration on the tangent line to measure the resistance value of the region of interest.
根據一些實施例,提供一種半導體元件電阻值的量測裝置,其包括移載裝置、切削裝置、原子探針分析裝置及處理器。移載裝置用以移載待測元件至樣品支柱。切削裝置用以切削所述待測元件。處理器耦接移載裝置、切削裝置及原子探針分析裝置,經配置以:控制移載裝置移載待測元件至樣品支柱,並控制切削裝置將待測元件切削為針尖狀的顯微樣品;控制原子探針分析裝置分析顯微樣品的摻雜濃度,獲得摻雜濃度分佈;以及利用線性擬合法產生橫跨摻雜濃度分佈中的關注區域的切線,並分析切線上的摻雜濃度的變化曲線,以量測關注區域的電阻值。According to some embodiments, a device for measuring the resistance of a semiconductor element is provided, which includes a transfer device, a cutting device, an atom probe analysis device, and a processor. The transfer device is used to transfer the component to be tested to the sample support. The cutting device is used for cutting the component to be tested. The processor is coupled to the transfer device, the cutting device and the atom probe analysis device, and is configured to: control the transfer device to transfer the component under test to the sample support, and control the cutting device to cut the component under test into a needle-shaped microscopic sample ; Control the atom probe analysis device to analyze the doping concentration of the microscopic sample to obtain the doping concentration distribution; and use the linear fitting method to generate a tangent across the region of interest in the doping concentration distribution, and analyze the doping concentration on the tangent Change the curve to measure the resistance value of the area of interest.
根據一些實施例,提供一種半導體元件電阻值的量測裝置,其包括連接裝置、儲存裝置及處理器。連接裝置用以連接移載裝置、切削裝置與原子探針分析裝置。儲存裝置用以儲存電腦程式。處理器耦接連接裝置及儲存裝置,經配置以載入並執行電腦程式以:控制移載裝置移載待測元件至樣品支柱,並控制切削裝置將待測元件切削為針尖狀的顯微樣品;控制原子探針分析裝置分析顯微樣品的摻雜濃度,獲得摻雜濃度分佈;以及利用線性擬合法產生橫跨摻雜濃度分佈中的關注區域的切線,並分析切線上的摻雜濃度的變化曲線,以量測關注區域的電阻值。According to some embodiments, a device for measuring the resistance of a semiconductor element is provided, which includes a connection device, a storage device, and a processor. The connecting device is used for connecting the transfer device, the cutting device and the atom probe analysis device. The storage device is used for storing computer programs. The processor is coupled to the connection device and the storage device, and is configured to load and execute a computer program to: control the transfer device to transfer the component under test to the sample support, and control the cutting device to cut the component under test into a needle-shaped microscopic sample ; Control the atom probe analysis device to analyze the doping concentration of the microscopic sample to obtain the doping concentration distribution; and use the linear fitting method to generate a tangent across the region of interest in the doping concentration distribution, and analyze the doping concentration on the tangent Change the curve to measure the resistance value of the area of interest.
以上概述了若干實施例的特徵,以使所屬領域中的技術人員可更好地理解本發明的各個方面。所屬領域中的技術人員應理解,其可容易地使用本發明作為設計或修改其他製程及結構的基礎來施行與本文中所介紹的實施例相同的目的及/或實現與本文中所介紹的實施例相同的優點。所屬領域中的技術人員還應認識到,這些等效構造並不背離本發明的精神及範圍,而且他們可在不背離本發明的精神及範圍的條件下對其作出各種改變、代替及變更。The features of several embodiments are summarized above, so that those skilled in the art can better understand the various aspects of the present invention. Those skilled in the art should understand that they can easily use the present invention as a basis for designing or modifying other processes and structures to perform the same purpose as the embodiment described herein and/or achieve the same purpose as the embodiment described herein. Example of the same advantages. Those skilled in the art should also realize that these equivalent structures do not depart from the spirit and scope of the present invention, and they can make various changes, substitutions and alterations to it without departing from the spirit and scope of the present invention.
10:量測系統
12:移載裝置
14:切削裝置
16:原子探針分析裝置
20:量測裝置
22:連接裝置
24:儲存裝置
26:處理器
50、50a、50b、50c:待測元件
52:保護層
54:空隙
56:保護材料
58:虛線
62、64:區域
70:影像
72、EPI:磊晶層
80:摻雜濃度分佈圖
82、84:切線
MG:金屬閘極
MD:金屬汲極
R
c、R
ch、R
ext、R
sd:電阻
S302~S306、S402~S406:步驟
10: Measuring system 12: Transfer device 14: Cutting device 16: Atom probe analysis device 20: Measuring device 22: Connecting device 24: Storage device 26:
圖1是根據本揭露實施例所繪示的半導體元件電阻值的量測系統的方塊圖。 圖2是根據本發明一實施例所繪示的半導體元件電阻值的量測裝置的方塊圖。 圖3是根據本揭露實施例所繪示的半導體元件電阻值的量測方法的流程圖。 圖4是根據本揭露實施例所繪示的半導體元件樣品製備方法的流程圖。 圖5A至圖5E是根據本揭露實施例所繪示的半導體元件樣品製備方法的範例。 圖6A至圖6D是根據本揭露實施例所繪示的半導體元件的顯微影像。 圖7是根據本揭露實施例所繪示的半導體元件的顯微影像。 圖8是根據本揭露實施例所繪示的摻雜濃度分佈圖。 圖9A及圖9B是根據本揭露實施例所繪示的摻雜濃度分佈的擬合切線的校正方法。 FIG. 1 is a block diagram of a system for measuring the resistance of a semiconductor device according to an embodiment of the disclosure. FIG. 2 is a block diagram of a device for measuring the resistance of a semiconductor device according to an embodiment of the present invention. FIG. 3 is a flowchart of a method for measuring the resistance of a semiconductor device according to an embodiment of the disclosure. FIG. 4 is a flowchart of a method for preparing a sample of a semiconductor device according to an embodiment of the disclosure. 5A to 5E are examples of the preparation method of the semiconductor device sample according to the embodiment of the disclosure. 6A to 6D are microscopic images of the semiconductor device according to an embodiment of the disclosure. FIG. 7 is a microscopic image of the semiconductor device according to an embodiment of the disclosure. FIG. 8 is a diagram showing a doping concentration distribution diagram according to an embodiment of the present disclosure. 9A and 9B are a method for correcting the fitting tangent of the doping concentration distribution according to an embodiment of the disclosure.
S302~S306:步驟 S302~S306: steps
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Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW417225B (en) * | 1998-05-21 | 2001-01-01 | Memc Electronic Materials | Process for the preparation of epitaxial wafers for resistivity measurements |
US20110218750A1 (en) * | 2009-09-08 | 2011-09-08 | Georg Fischer Signet Llc | System and method for measuring conductivity/resistivity of water having high purity |
CN103412272A (en) * | 2013-06-17 | 2013-11-27 | 上海晶盟硅材料有限公司 | Standard sheet for calibrating mercury-probe resistivity measuring instrument and mercury-probe resistivity measuring instrument calibration method |
US20140068822A1 (en) * | 2012-09-06 | 2014-03-06 | Imec | Method for Determining Local Resistivity and Carrier Concentration Using Scanning Spreading Resistance Measurement Set-Up |
US20160187414A1 (en) * | 2014-12-30 | 2016-06-30 | United Microelectronics Corp. | Device having finfets and method for measuring resistance of the finfets thereof |
US20160290945A1 (en) * | 2015-03-30 | 2016-10-06 | Hitachi High-Tech Science Corporation | Method for Measuring Spreading Resistance and Spreading Resistance Microscope |
US20180025954A1 (en) * | 2016-07-25 | 2018-01-25 | International Business Machines Corporation | Top contact resistance measurement in vertical fets |
TW201903401A (en) * | 2017-05-04 | 2019-01-16 | 百慕達商亞德諾半導體環球無限公司 | A method for measuring an integrated circuit resistance value of a target resistor by using a magnetizing current, and a sensor medium area circuit for measuring or correcting a resistance value of a target resistor |
TW201909423A (en) * | 2017-07-24 | 2019-03-01 | 美商馬康科技解決方案控股有限公司 | Determination of FET operating temperature using resistance temperature measurement |
CN110289224A (en) * | 2019-06-19 | 2019-09-27 | 上海华力集成电路制造有限公司 | A kind of accurate method for monitoring and improving square resistance and measure stability |
-
2020
- 2020-06-18 TW TW109120504A patent/TWI738387B/en active
Patent Citations (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW417225B (en) * | 1998-05-21 | 2001-01-01 | Memc Electronic Materials | Process for the preparation of epitaxial wafers for resistivity measurements |
US20110218750A1 (en) * | 2009-09-08 | 2011-09-08 | Georg Fischer Signet Llc | System and method for measuring conductivity/resistivity of water having high purity |
US20140068822A1 (en) * | 2012-09-06 | 2014-03-06 | Imec | Method for Determining Local Resistivity and Carrier Concentration Using Scanning Spreading Resistance Measurement Set-Up |
CN103412272A (en) * | 2013-06-17 | 2013-11-27 | 上海晶盟硅材料有限公司 | Standard sheet for calibrating mercury-probe resistivity measuring instrument and mercury-probe resistivity measuring instrument calibration method |
US20160187414A1 (en) * | 2014-12-30 | 2016-06-30 | United Microelectronics Corp. | Device having finfets and method for measuring resistance of the finfets thereof |
US20160290945A1 (en) * | 2015-03-30 | 2016-10-06 | Hitachi High-Tech Science Corporation | Method for Measuring Spreading Resistance and Spreading Resistance Microscope |
US20180025954A1 (en) * | 2016-07-25 | 2018-01-25 | International Business Machines Corporation | Top contact resistance measurement in vertical fets |
TW201903401A (en) * | 2017-05-04 | 2019-01-16 | 百慕達商亞德諾半導體環球無限公司 | A method for measuring an integrated circuit resistance value of a target resistor by using a magnetizing current, and a sensor medium area circuit for measuring or correcting a resistance value of a target resistor |
TW201909423A (en) * | 2017-07-24 | 2019-03-01 | 美商馬康科技解決方案控股有限公司 | Determination of FET operating temperature using resistance temperature measurement |
CN110289224A (en) * | 2019-06-19 | 2019-09-27 | 上海华力集成电路制造有限公司 | A kind of accurate method for monitoring and improving square resistance and measure stability |
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