TWI735592B - 氮化矽膜之處理方法及氮化矽膜之形成方法 - Google Patents
氮化矽膜之處理方法及氮化矽膜之形成方法 Download PDFInfo
- Publication number
- TWI735592B TWI735592B TW106119405A TW106119405A TWI735592B TW I735592 B TWI735592 B TW I735592B TW 106119405 A TW106119405 A TW 106119405A TW 106119405 A TW106119405 A TW 106119405A TW I735592 B TWI735592 B TW I735592B
- Authority
- TW
- Taiwan
- Prior art keywords
- silicon nitride
- nitride film
- microwave
- plasma
- hydrogen
- Prior art date
Links
- 238000012545 processing Methods 0.000 title claims abstract description 64
- 229910052581 Si3N4 Inorganic materials 0.000 title claims abstract description 58
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 title claims abstract description 58
- 238000000034 method Methods 0.000 title claims abstract description 25
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 62
- 239000001257 hydrogen Substances 0.000 claims abstract description 61
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 claims abstract description 57
- 238000005268 plasma chemical vapour deposition Methods 0.000 claims abstract description 23
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 238000003672 processing method Methods 0.000 claims abstract description 17
- YZCKVEUIGOORGS-UHFFFAOYSA-N Hydrogen atom Chemical compound [H] YZCKVEUIGOORGS-UHFFFAOYSA-N 0.000 claims description 6
- 230000001678 irradiating effect Effects 0.000 claims description 6
- 150000002431 hydrogen Chemical class 0.000 claims description 4
- 239000011261 inert gas Substances 0.000 claims description 2
- 239000007789 gas Substances 0.000 description 97
- 230000015572 biosynthetic process Effects 0.000 description 16
- 230000004048 modification Effects 0.000 description 16
- 238000012986 modification Methods 0.000 description 16
- 238000011282 treatment Methods 0.000 description 16
- 239000000523 sample Substances 0.000 description 15
- 238000001039 wet etching Methods 0.000 description 13
- 230000007246 mechanism Effects 0.000 description 12
- 239000000463 material Substances 0.000 description 11
- 239000013078 crystal Substances 0.000 description 10
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 230000035515 penetration Effects 0.000 description 9
- 229910052710 silicon Inorganic materials 0.000 description 9
- 239000010703 silicon Substances 0.000 description 9
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 8
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 8
- 229910007991 Si-N Inorganic materials 0.000 description 8
- 229910006294 Si—N Inorganic materials 0.000 description 8
- 230000005855 radiation Effects 0.000 description 8
- 238000009616 inductively coupled plasma Methods 0.000 description 7
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 7
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 description 6
- 238000001312 dry etching Methods 0.000 description 6
- 238000005530 etching Methods 0.000 description 6
- 229910000077 silane Inorganic materials 0.000 description 6
- 230000008569 process Effects 0.000 description 5
- 229910021529 ammonia Inorganic materials 0.000 description 4
- 239000000919 ceramic Substances 0.000 description 4
- 239000004020 conductor Substances 0.000 description 4
- 229910052757 nitrogen Inorganic materials 0.000 description 4
- 238000009832 plasma treatment Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 238000003860 storage Methods 0.000 description 4
- 239000000498 cooling water Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- PZPGRFITIJYNEJ-UHFFFAOYSA-N disilane Chemical compound [SiH3][SiH3] PZPGRFITIJYNEJ-UHFFFAOYSA-N 0.000 description 3
- 239000002994 raw material Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 229910052734 helium Inorganic materials 0.000 description 2
- 229910052743 krypton Inorganic materials 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 229910052754 neon Inorganic materials 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 229910052724 xenon Inorganic materials 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- 235000010724 Wisteria floribunda Nutrition 0.000 description 1
- 230000001133 acceleration Effects 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 229920001940 conductive polymer Polymers 0.000 description 1
- 238000010494 dissociation reaction Methods 0.000 description 1
- 230000005593 dissociations Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000005121 nitriding Methods 0.000 description 1
- 230000008520 organization Effects 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- -1 polytetrafluoroethylene Polymers 0.000 description 1
- 229920001343 polytetrafluoroethylene Polymers 0.000 description 1
- 239000004810 polytetrafluoroethylene Substances 0.000 description 1
- 230000000644 propagated effect Effects 0.000 description 1
- 230000001902 propagating effect Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000007348 radical reaction Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000002002 slurry Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/34—Nitrides
- C23C16/345—Silicon nitride
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/46—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for heating the substrate
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
- C23C16/511—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges using microwave discharges
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/56—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02205—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02211—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
- H01L21/0234—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour treatment by exposure to a plasma
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
- H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
- H01L21/461—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/469—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers
- H01L21/475—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers using masks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/518—Insulating materials associated therewith the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05H—PLASMA TECHNIQUE; PRODUCTION OF ACCELERATED ELECTRICALLY-CHARGED PARTICLES OR OF NEUTRONS; PRODUCTION OR ACCELERATION OF NEUTRAL MOLECULAR OR ATOMIC BEAMS
- H05H1/00—Generating plasma; Handling plasma
- H05H1/24—Generating plasma
- H05H1/46—Generating plasma using applied electromagnetic fields, e.g. high frequency or microwave energy
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Plasma & Fusion (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Mechanical Engineering (AREA)
- Organic Chemistry (AREA)
- Metallurgy (AREA)
- Materials Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Ceramic Engineering (AREA)
- Analytical Chemistry (AREA)
- Electromagnetism (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Chemical Vapour Deposition (AREA)
- Formation Of Insulating Films (AREA)
- Plasma Technology (AREA)
Abstract
本發明提供一種縱使是藉由低溫下的CVD所成膜之氮化矽膜,仍可改質為所欲特性之氮化矽膜之處理方法。
氮化矽膜之處理方法係於基板上藉由電漿CVD所成膜之氮化矽膜之處理方法,其係對氮化矽膜照射微波氫電漿,而藉由微波電漿中的原子狀氫將氮化矽膜之表面部分的氫予以去除來將該部分改質。
Description
本發明關於一種氮化矽膜之處理方法及氮化矽膜之形成方法。
半導體積體電路裝置中,大多使用氮化矽膜來作為絕緣膜或保護膜等。此般氮化矽膜的製造方法已知有一種使用矽烷(SiH4)、二矽烷(Si2H6)等之矽原料氣體,以及氮氣或氨氣等的含氮氣體之電漿CVD法。
但已知藉由電漿CVD所成膜之氮化矽膜會在膜中含有氫(例如非專利文獻1),因膜中所含的氫而使得膜特性較藉由熱所形成之SiN膜來得低。於是,專利文獻1中提出一種使用微波激發電漿,而藉由將處理溫度、處理氣體的組成比、微波功率、處理壓力界定在特定範圍之電漿CVD來成膜氮化矽膜,藉此降低膜中的氫量之技術。
專利文獻1:日本特開2009-246129號公報
非專利文獻1:富士電機技報Vol.78No.4(2005)第64~67頁
近年來,隨著LSI的高集積化、高性能化,藉由電漿CVD來成膜氮化矽膜時,已被要求以更低溫來進行製程。但是,以低溫來進行成膜時,若僅調整成膜條件仍無法充分地降低膜中的氫,而難以滿足所欲特性。例如,雖被要求以低溫製程來成膜作為硬遮罩使用的氮化矽膜,但若以低溫來成膜,則會難以獲得硬遮罩所要求之濕蝕刻或乾蝕刻時的高耐受性(蝕刻選擇 性)。
因此,本發明係以提供一種縱使是藉由低溫下的CVD所成膜之氮化矽膜而仍可改質為所欲特性之氮化矽膜的處理方法及氮化矽膜的形成方法來作為課題。
為解決上述課題,本發明第1觀點提供一種氮化矽膜之處理方法,係於基板上藉由電漿CVD所成膜之氮化矽膜之處理方法;對該氮化矽膜照射微波氫電漿,而藉由該微波電漿中的原子狀氫將該氮化矽膜之表面部分的氫予以去除來將該表面部分改質。
上述第1觀點中,該氮化矽膜較佳係藉由微波電漿CVD所成膜者。該微波氫電漿可藉由微波來激發氫氣、或氫氣及非活性氣體而生成。
照射該微波氫電漿時的處理溫度較佳為200~500℃。照射該微波氫電漿時的處理壓力較佳為10~100Pa。該氮化矽膜之表面部分的改質部分深度較佳為10nm以上。
該微波氫電漿的照射較佳係藉由RLSA(註冊商標)微波電漿處理裝置而進行。
本發明第2觀點提供一種氮化矽膜之形成方法,係具有以下工序:第1工序,係於基板上藉由電漿CVD來成膜氮化矽膜;以及第2工序,係對所成膜之該氮化矽膜施予如上述第1觀點之氮化矽膜之處理方法所記載的處理。
上述第2觀點中,該第1工序較佳係藉由微波電漿而進行。該第1工序與該第2工序較佳係在相同的微波電漿處理裝置內連續進行。此情況下,該微波電漿處理裝置較佳可使用RLSA(註冊商標)微波電漿處理裝置。較佳係以相同處理溫度來進行該第1工序與該第2工序。
該第1工序的處理溫度較佳為200~500℃。又,該第1工序的處理壓力較佳為10~100Pa。
依據本發明,由於係對氮化矽膜照射微波氫電漿,而藉由微波電漿中 的原子狀氫將氮化矽膜之表面部分的氫予以去除來將該表面部分改質,故可獲得具有所欲特性(例如相對於濕蝕刻及乾蝕刻之高選擇性)之氮化矽膜。
1‧‧‧腔室
2‧‧‧晶座
5‧‧‧加熱器
15‧‧‧氣體導入部
16‧‧‧氣體供應機構
24‧‧‧排氣機構
28‧‧‧微波穿透板
31‧‧‧平面天線
32‧‧‧狹縫
33‧‧‧慢波材
37‧‧‧導波管
38‧‧‧匹配電路
39‧‧‧微波產生裝置
40‧‧‧模式轉換器
50‧‧‧控制部
100‧‧‧微波電漿處理裝置
W‧‧‧半導體晶圓(基板)
圖1為用以說明本發明的原理之圖式。
圖2為將微波電漿的離子能量與感應耦合電漿(ICP)相比較來加以顯示之圖式。
圖3係顯示氮化矽形成方法的一實施型態之流程圖。
圖4係顯示可應用於本發明之微波電漿處理裝置的一例之圖式。
圖5係顯示實驗例中樣品A及樣品B之深度方向的各元素濃度及密度之圖式。
圖6係顯示樣品A及樣品B的濕蝕刻深度與蝕刻率之圖式。
以下,參閱添附圖式來詳細地說明本發明之實施型態。
<SiN膜的處理方法>
首先,針對氮化矽膜之處理方法的實施型態來加以說明。
藉由電漿CVD來成膜氮化矽膜(以下記載為SiN膜)的情況,通常係使用SiH4氣體等的矽烷系氣體來作為矽原料氣體,故原料中會含有氫。又,亦有使用含有氫之NH3氣體來作為含氮氣體的情況。於是,藉由電漿CVD所成膜之SiN膜便會在膜中不可避免地含有氫(H)。
如上所述,近年來,伴隨著LSI的高集積化、高性能化,傾向於以更低溫來成膜SiN膜,伴隨於此,膜中的氫含量會變得更多,而造成膜特性降低。特別是在硬遮罩的用途中,要獲得硬遮罩所要求之濕蝕刻或乾蝕刻時的高耐受性(蝕刻選擇性)會變得困難。然後,若因低溫成膜使得SiN膜中的氫含量變多,如專利文獻1般地僅靠調整成膜時的條件將會難以獲得蝕刻選擇性等的所欲特性。
因此,本實施型態中,係針對於基板表面藉由電漿CVD所成膜之SiN 膜來照射微波氫電漿,藉由電漿中的原子狀氫(氫自由基)來去除SiN膜表面部分的氫(H)而加以改質。
此外,微波氫電漿係一種藉由微波來將僅有氫氣(H2氣體),或是以稀有氣體(例如Ar氣體)來將H2氣體稀釋後的混合氣體激發之電漿。
接下來,將此時的機制顯示於圖1。圖1中,符號101為基板,符號102為藉由電漿CVD所成膜之SiN膜。對SiN膜102照射微波氫電漿的情況,由於微波電漿為低電子溫度但高電子密度的電漿,故可使藉由微波所激發之氫電漿中含有多量的原子狀氫(氫自由基;H*),而成為電漿的離子能量低之狀態,並且可使該值較Si-N鍵結來得要低。於是,藉由對SiN膜照射微波氫電漿,便可在SiN膜的表面部分處,不破壞Si-N鍵結,而是主要藉由電漿中的H*,來從膜中的Si-H鍵結將H作為H2而加以去除。藉此,則SiN膜的表面部分便會被改質為氫含量較少的狀態,且密度亦變高。如此般地,藉由將SiN膜的表面改質,則縱使是以低溫成膜所成膜之SiN膜,仍可使其具有所欲特性(例如相對於濕蝕刻及乾蝕刻之高選擇性)。
此時之表面改質部分的厚度較佳為10nm以上。在此範圍下,便可確保相對於濕蝕刻及乾蝕刻之高選擇性。又,雖無特別的上限,但至30nm左右為實際上的狀況。
作為高密度電漿,已知有一種感應耦合電漿(ICP),由於ICP的離子能量較Si-N鍵結來得大,故要在不破壞SiN膜的Si-N鍵結之情況下來去除膜中的H實為困難。
關於這一點,顯示於圖2。圖2係將微波電漿與ICP的離子能量相比較之圖式。此外,圖2中,橫軸表示壓力,縱軸表示從藉由朗繆爾探針(langmuir probe)所測定的電子溫度經換算後之離子能量。
如圖2所示,可得知相對於ICP的情況,離子能量為約6eV,較Si-N鍵結的3.5eV來得高,而微波電漿的情況,藉由調整壓力,便可使離子能量較Si-N鍵結的3.5eV要小。
過去,氫電漿主要被用於還原處理,但本實施型態之微波氫電漿處理並非還原處理,而是利用電漿中的H*來去除存在於SiN膜中的鍵結H而加以改質,此乃是基於過去所未有之新的構想。
微波氫電漿適合藉由RLSA(註冊商標)微波電漿處理裝置來生成,其係在收納有基板之腔室(處理容器)的上方設置具有狹縫之平面天線,來將從微波產生源所生成之微波透過構成平面天線的狹縫及腔室的頂壁之介電窗導入至腔室,而在介電窗的正下方生成表面波電漿之方式。
藉由RLSA(註冊商標)微波電漿處理裝置所生成之表面波電漿中,微波會作為表面波而僅在介電窗正下方擴散,電漿中的電子雖會在該區域被加速,但藉由使基板位在較存在有表面波之區域要更下方,則在基板的位置處,電子的加速便不會進行,從而可實現低電子溫度的電漿。又,由於可將基板配置在表面波區域的附近,故可以高電漿密度來進行處理。
本實施型態中,為了生成氫電漿而導入的氣體如上所述,雖可為100%H2氣體,但亦可為混合有Ar氣體等的稀有氣體,此情況之稀有氣體的比率較佳為90%(mol%)以下。作為稀有氣體,除了Ar以外,可使用Kr、He、Ne、Xe。
進行微波氫電漿處理時的基板溫度較佳為200~500℃。又,處理壓力較佳為10~100Pa(75~750mTorr)。此係因為從使得離子能量較對象膜的鍵結能量要來得小之觀點來看,處理壓力較低者為佳,又,若考慮了在SiN膜的成膜處理後接著以相同條件來進行微波氫電漿處理的情況,若處理壓力為100Pa左右,則會難以生成適合於成膜的電漿。再者,微波的功率密度較佳為0.01~0.04W/cm2的範圍。又再者,處理時間雖和功率密度有關,但較佳為15~300sec左右。
<SiN膜的形成方法>
接下來,針對SiN膜形成方法的實施型態加以說明。
上述SiN膜的處理方法雖係將藉由電漿CVD所成膜後的SiN膜以微波氫電漿進行處理來去除膜中的氫,但由於微波電漿為低電子溫度且高密度的電漿,故可藉由自由基反應而以低溫來成膜SiN膜。
因此,本實施型態中,如圖3所示,係藉由使用微波電漿之電漿CVD而於基板上成膜SiN膜(步驟1),接下來,對上述方式成膜的SiN膜,如上述般地照射微波氫電漿來進行SiN膜的表面改質(步驟2),以形成所欲特性的SiN膜。
SiN膜的成膜係藉由微波電漿來激發矽烷(SiH4)、二矽烷(Si2H6)等的矽原料氣體,以及氮氣或氨氣等的含氮氣體,並使該等氣體在基板上反應,藉此而進行。作為電漿生成氣體,亦可使用Ar氣體等的稀有氣體。作為稀有氣體,除了Ar以外,可使用Kr、He、Ne、Xe。
微波電漿如上所述,由於係低電子溫度但高電子密度的電漿,故藉由使用微波電漿之電漿CVD來進行步驟1之SiN膜的成膜,便可以低溫來成膜良好膜質的SiN膜。但縱使是藉由使用微波電漿之電漿CVD來進行成膜,在低溫下的成膜中,SiN膜中的H含量仍會變多,而使得蝕刻選擇性等的特性降低。於是,在步驟1的SiN成膜之後,作為步驟2,係藉由上述微波氫電漿的照射來進行表面改質。
如此般地,藉由步驟1之SiN膜的成膜及步驟2的表面改質皆係使用微波電漿,便可以相同裝置來連續進行該等步驟。特別是,較佳係以上述RLSA(註冊商標)微波電漿處理裝置來進行該等工序。
步驟1之SiN膜的成膜時基板溫度及處理壓力係與藉由微波氫電漿所進行之表面改質相同,較佳為200~500℃、10~100Pa(75~750mTorr)。步驟1之SiN膜的成膜及步驟2的表面改質較佳係以相同溫度來進行。
<微波電漿處理裝置>
接下來,針對適合於以上之SiN膜的處理方法或SiN膜的形成方法之微波電漿處理裝置的一例來加以說明。
圖4係顯示適合於本發明之實施型態相關之SiN膜的處理方法或SiN膜的形成方法之微波電漿處理裝置的剖視圖。圖4之微波電漿處理裝置係作為RLSA(註冊商標)微波電漿處理裝置而加以構成。
如圖4所示,微波電漿處理裝置100係具有氣密地構成且接地之略圓筒狀的腔室1。腔室1之底壁1a的略中央部係形成有圓形的開口部10,底壁1a係設置有與該開口部10連通,而朝向下方突出之排氣室11。
腔室1內係設置有用以水平地支撐基板,例如半導體晶圓(以下,記載為「晶圓」)W之AlN等陶瓷所構成的晶座2。該晶座2係藉由從排氣室11的底部中央延伸於上方之圓筒狀的AlN等陶瓷所構成之支撐組件3而被加以支撐。晶座2的外緣部係設置有用以導引晶圓W之導引環4。又,晶座 2係埋入有阻抗加熱型的加熱器5,該加熱器5係藉由來自加熱器電源6的供電來將晶座2加熱而加熱晶圓W。又,晶座2係埋入有電極7,電極7係透過匹配器8而連接有偏壓施加用的高頻電源9。
晶座2係設置有可相對於晶座2表面出沒之晶圓支撐銷(圖中未顯示),其係用以支撐晶圓W並使該晶圓W升降。
腔室1的側壁係設置有呈環狀之氣體導入部15,該氣體導入部15係均等地形成有氣體放射孔15a。該氣體導入部15係連接有氣體供應機構16。
氣體供應機構16具有:會供應作為電漿生成氣體來加以使用之Ar氣體等的稀有氣體之稀有氣體供應源;會供應H2氣體之H2氣體供應源;會供應矽烷(SiH4)、二矽烷(Si2H6)等的矽原料氣體之矽原料氣體供應源;以及會供應氮氣或氨氣等的含氮氣體之含氮氣體供應源。該等氣體係藉由個別的配管而藉由質流控制器等的流量控制器被獨立地進行流量控制,並朝氣體導入部15被供應。此外,以電漿處理裝置100所進行之處理僅有SiN膜的表面改質處理之情況,則氣體供應機構16只要具有H2氣體供應源及稀有氣體供應源即可。
此外,較氣體導入部15要下方處亦可設置有例如噴淋板等其他的氣體導入部,而從其他的氣體導入部來將最好不會因矽原料氣體等的電漿而被完全解離之氣體供應至更接近晶圓W之電子溫度更低的區域。
上述排氣室11的側面係連接有排氣管23,該排氣管23係連接有包含有真空幫浦或自動壓力控制閥等之排氣機構24。藉由使排氣機構24的真空幫浦作動,便可將腔室1內的氣體均勻地朝排氣室11的空間11a內排出,再透過排氣管23被排氣,且藉由自動壓力控制閥來將腔室1內控制為特定的真空度。
腔室1的側壁係設置有在與鄰接於電漿處理裝置100之搬送室(圖中未顯示)之間進行晶圓W的搬出入之搬出入口25,以及開閉該搬出入口25之閘閥26。
腔室1的上部係成為開口部,該開口部的周緣部係成為環狀的支撐部27。於該支撐部27係透過密封組件29而氣密地設置有介電體,例如石英或Al2O3等陶瓷所構成的圓板狀微波穿透板28。於是,腔室1內便會被氣 密地保持。
微波穿透板28的上方係以密著於微波穿透板28之方式而設置有對應於微波穿透板28而呈圓板狀之平面天線31。該平面天線31係卡固於腔室1的側壁上端。平面天線31係由導電性材料構成的圓板所構成。具體來說,係構成為由例如表面鍍有銀或金之銅板或鋁板所構成,且以特定圖案貫穿形成有複數微波放射孔32(狹縫)。作為圖案的範例,可舉出以T字狀地配置之2個微波放射孔32作為一對,而同心圓狀地配置有複數對的微波放射孔32者。微波放射孔32的長度或配列間隔係對應於微波的波長(λg)來決定,例如微波放射孔32係以該等的間隔會成為λg/4、λg/2或λg之方式來加以配置。此外,微波放射孔32亦可為圓形或圓弧狀等其他的形狀。再者,微波放射孔32的配置型態未特別限制,除了同心圓狀以外,亦可例如螺旋狀或放射狀地加以配置。
該平面天線31的上面係密著地設置有慢波材33,該慢波材33係由具有大於真空的介電率之介電體,例如石英、聚四氟乙烯、聚醯亞胺等之樹脂所構成。慢波材33係具有使微波的波長較真空中要短而縮小平面天線31之功能。慢波材33可依其厚度來調整微波的相位,藉由以平面天線31的接合部會成為駐波的「波腹」之方式來調整厚度,便可使微波的放射能量為最大。
此外,平面天線31與微波穿透板28之間,又,慢波材33與平面天線31之間雖係分別為密著配置,但亦可為分離配置。
腔室1的上面係以覆蓋該等平面天線31及慢波材33之方式,而設置有例如鋁或不鏽鋼、銅等金屬材所構成的遮蔽蓋體34。腔室1的上面與遮蔽蓋體34係藉由密封組件35而被加以密封。遮蔽蓋體34係形成有冷卻水流道34a,藉由使冷卻水流通於該冷卻水流道34a,來冷卻遮蔽蓋體34、慢波材33、平面天線31及微波穿透板28。此外,遮蔽蓋體34為接地。
遮蔽蓋體34的上壁中央處係形成有開口部36,該開口部係連接有導波管37。該導波管37的端部係透過匹配電路38而連接有微波產生裝置39。藉此,則藉由微波產生裝置39所產生之例如頻率2.45GHz的微波便會透過導波管37而朝上述平面天線31被傳播。此外,作為微波的頻率,可使用 8.35GHz、1.98GHz、860MHz、915MHz等之各種頻率。
導波管37係具有從上述遮蔽蓋體34的開口部36朝上方延伸之剖面呈圓形的同軸導波管37a,以及透過模式轉換器40而連接於該同軸導波管37a的上端部並延伸於水平方向之矩形導波管37b。矩形導波管37b與同軸導波管37a之間的模式轉換器40係具有能夠將在矩形導波管37b內以TE模式傳播的微波轉換成TEM模式之功能。同軸導波管37a的中心係延伸有內導體41,該內導體41的下端部係連接固定在平面天線31的中心。藉此,則微波便會透過同軸導波管37a的內導體41而朝平面天線31被均勻且有效率地傳播。
微波電漿處理裝置100係具有控制部50。控制部50具有:主控制部,其係具有會控制微波電漿處理裝置100的各構成部(例如微波產生裝置39、加熱器電源6、高頻電源9、排氣機構24、氣體供應機構16的閥體或流量控制器等)之CPU(電腦);輸入裝置(鍵盤、滑鼠等);輸出裝置(印表機等);顯示裝置(顯示器等);以及記憶裝置(記憶媒體)。控制部50的主控制部係依據例如,被記憶在內建於記憶裝置的記憶媒體、或安裝於記憶裝置的記憶媒體之處理配方來使微波電漿處理裝置100實行特定的動作。
接下來,針對上述方式構成之微波電漿處理裝置100中,連續進行SiN膜的成膜與SiN膜的表面改質處理之情況的動作來加以說明。
首先,打開閘閥26來從搬出入口25將待進行氮化處理之晶圓W搬入至腔室1內,並載置於晶座2上。
然後,從氣體供應機構16透過氣體導入部15來將為電漿生成氣體之稀有氣體(例如Ar氣體)導入至腔室1內,並將來自微波產生裝置39之特定功率的微波,經由匹配電路38而引導至導波管37。被引導至導波管37的微波會以TE模式在矩形導波管37b傳播。TE模式的微波係藉由模式轉換器40來模式轉換為TEM模式,則TEM模式的微波便會以TEM模式在同軸導波管37a傳播。然後,TEM模式的微波會穿透慢波材33、平面天線31的狹縫32、及微波穿透板28而被放射至腔室1內。微波會作為表面波而僅擴散至微波穿透板28的正下方區域,來生成表面波電漿。然後,電漿會擴散至下方,則在晶圓W的配置區域處,成為高電子密度且低電子溫度的電 漿。
另一方面,係從高頻電源9來對晶座2施加離子吸引用的高頻偏壓,並進一步地,從氣體供應機構16透過氣體導入部15來將作為處理氣體之矽烷(SiH4)、二矽烷(Si2H6)等的矽原料氣體、以及氮氣或氨氣等的含氮氣體供應至腔室1內。該等處理氣體會因腔室1內的電漿而被激發,並解離成例如SiH或NH等的活性基,該等會在晶圓W上反應而成膜SiN膜。
此外,亦可從設置於較氣體導入部15要更下方處之噴淋板等其他的氣體導入部,來將最好不會因矽原料氣體等的電漿而被完全解離之氣體供應至更接近晶圓W之電子溫度低的區域來抑制解離。
如此般地,藉由使用高電子密度且低電子溫度的微波電漿所進行之電漿CVD來成膜SiN膜,便會以低溫而形成有損傷較少且優質的膜。
使用Ar氣體作為電漿生成氣體,使用SiH4氣體作為Si原料氣體,使用N2氣體作為含氮氣體時的較佳條件如以下所述。
處理溫度(晶座2表面的溫度):200~500℃
處理壓力:10~100Pa(75~750mTorr)
Ar氣體流量:0~1000mL/min(sccm)
SiH4氣體流量:10~200mL/min(sccm)
N2氣體流量:10~200mL/min(sccm)
微波功率密度:0.01~0.04W/cm2
如上所述般地成膜SiN膜後,停止微波的供電及氣體的供應,並在將形成有SiN膜之晶圓W保持於晶座2之狀態下,一邊將腔室1內排氣一邊供應吹淨氣體來將腔室1內吹淨。
接下來,較佳地,係在將晶座2的溫度維持於相同溫度之狀態下,從氣體供應機構16透過氣體導入部15來將H2氣體、或H2氣體及Ar氣體等的稀有氣體導入至腔室1內,並將來自微波產生裝置39之特定功率的微波,經由匹配電路38來引導至導波管37。被引導至導波管37之微波係以TE模式在矩形導波管37b傳播,並藉由模式轉換器40而模式轉換為TEM模式,而在同軸導波管37a傳播。然後,TEM模式的微波會穿透慢波材33、平面天線31的狹縫32、及微波穿透板28,而在微波穿透板28的正下方區 域生成表面波電漿,該電漿會擴散至晶圓配置區域,而於晶圓照射有微波氫電漿。
如上所述地,由於微波電漿為低電子溫度但高電子密度的電漿,故以微波來將H2氣體激發後之微波氫電漿會含有多量的H*,作為低離子能量的電漿而存在。於是,便可以離子能量較Si-N鍵結要低之狀態來將微波氫電漿照射在SiN膜,從而在SiN膜的表面部分處,不會破壞Si-N鍵結,主要係藉由電漿中的H*來從膜中的Si-H鍵結將H作為H2加以去除,而將SiN膜的表面部分改質為氫含量較少的狀態。藉此,則縱使是以低溫成膜所成膜之SiN膜,仍可使其具有所欲特性(例如相對於濕蝕刻及乾蝕刻之高選擇性)。
藉由微波氫電漿照射之表面改質處理的較佳條件如下所述。
處理溫度(晶座2表面的溫度):200~500℃
處理壓力:10~100Pa(75~750mTorr)
Ar氣體流量:0~1000mL/min(sccm)
H2氣體流量:100~1000mL/min(sccm)
Ar氣體流量/H2氣體流量=0~0.9
微波的功率密度:0.01~0.04W/cm2
處理時間:30~600sec
表面改質部分的厚度:10nm以上
如以上所述,由於係藉由相同的微波電漿處理裝置100來連續進行SiN膜的成膜及表面改質處理,故可進行高產能的處理。特別是,藉由以相同溫度來進行該等處理,便可更加提高產能。
此外,在微波電漿處理裝置100中,亦可對預先以其他裝置來成膜有SiN膜之晶圓W而僅進行藉由微波氫電漿之表面改質處理。
<實驗例>
接下來,針對實驗例加以說明。
此處係針對以電漿CVD而於矽晶圓上直接成膜SiN膜之樣品A(無H2電漿處理),與對SiN膜照射微波氫電漿來進行表面改質處理後的樣品B(有H2電漿處理),藉由RBS來測定SiN膜之深度方向的各元素的濃度與密度。 將其結果顯示於圖5。
此外,SiN膜的成膜條件及表面改質處理的條件如以下所述。
(i)SiN膜成膜
Ar氣體流量:600sccm
SiH4氣體流量:50sccm
N2氣體流量:50sccm
微波功率密度:0.02W/cm2
處理時間:60sec
(ii)表面改質處理
處理溫度:320℃
處理壓力:20Pa
H2氣體流量:400sccm
時間:300sec
如圖5所示,可得知相較於直接成膜的樣品A(圖5(a)),照射微波氫電漿來進行表面改質處理後的樣品B(圖5(b))係在表面之10nm左右的範圍中,H濃度較低,而接近Si3N4(N/Si~1.3)組成,且密度亦較高。由此確認了藉由微波氫電漿照射,則SiN膜表面之10nm左右的範圍中,會形成有氫含量較低且密度較高之改質層。
接下來,針對樣品A及樣品B,以0.5%稀氟酸(DHF)來進行濕蝕刻。圖6係顯示此時之濕蝕刻深度與濕蝕刻率的關係。此處係針對樣品B,來求得晶圓之各位置處的蝕刻率,針對樣品A,則求得晶圓一處的蝕刻率。如該圖所示,可得知在樣品B中,較改質層要深之深度10nm以上的部分,濕蝕刻率為0.3~0.5nm/min,但在對應於改質層之到深度10nm左右為止的部分,濕蝕刻率幾乎為0.1~0.2nm/min而急遽降低。相對於此,直接成膜SiN膜之樣品A係在全部的深度部分,濕蝕刻率為0.5nm/min以上。由此確認了可藉由使用微波氫電漿照射之表面改質處理來獲得良好的蝕刻選擇性。
<其他的應用>
以上,雖已參閱添附圖式來針對本發明之實施型態加以說明,惟本發 明並未限制於上述實施型態,可在本發明之思想範疇內做各種變化。例如,上述實施型態中,雖係顯示針對藉由使用微波電漿之電漿CVD所成膜之SiN膜施予表面改質處理的情況,惟SiN膜亦可為藉由使用ICP等其他的電漿之CVD所成膜者。
又,上述實施型態中,作為微波電漿處理裝置,雖係例示RLSA(註冊商標)微波電漿處理裝置,但並未限制於此。
再者,作為成膜有SiN膜之基板,不限於半導體晶圓,而亦可為FPD(平板顯示器)基板或陶瓷基板等其他的基板。
101‧‧‧基板
102‧‧‧SiN膜
Claims (13)
- 一種氮化矽膜之處理方法,係於基板上藉由使用微波電漿之電漿CVD來在低溫下成膜出氮化矽膜;對該氮化矽膜照射微波氫電漿,而藉由該微波電漿中的原子狀氫將該氮化矽膜之表面部分的氫予以去除來將該表面部分改質。
- 如申請專利範圍第1項之氮化矽膜之處理方法,其中該氮化矽膜係藉由微波電漿CVD所成膜者。
- 如申請專利範圍第1或2項之氮化矽膜之處理方法,其中該微波氫電漿係藉由微波來激發氫氣、或氫氣及非活性氣體而加以生成。
- 如申請專利範圍第1或2項之氮化矽膜之處理方法,其中照射該微波氫電漿時的處理溫度為200~500℃。
- 如申請專利範圍第1或2項之氮化矽膜之處理方法,其中照射該微波氫電漿時的處理壓力為10~100Pa。
- 如申請專利範圍第1或2項之氮化矽膜之處理方法,其中該氮化矽膜表面部分的改質部分深度為10nm以上。
- 如申請專利範圍第1或2項之氮化矽膜之處理方法,其中該微波氫電漿的照射係藉由RLSA(註冊商標)微波電漿處理裝置而進行。
- 一種氮化矽膜之形成方法,係具有以下工序:第1工序,係於基板上藉由使用微波電漿之電漿CVD來在低溫下成膜氮化矽膜;以及第2工序,係對所成膜之該氮化矽膜照射微波氫電漿,而藉由該微波電漿中的原子狀氫將該氮化矽膜之表面部分的氫予以去除來將該表面部分改質。
- 如申請專利範圍第8項之氮化矽膜之形成方法,其中該第1工序與該第2工序係在相同的微波電漿處理裝置內連續進行。
- 如申請專利範圍第9項之氮化矽膜之形成方法,其中該微波電漿處理裝置為RLSA(註冊商標)微波電漿處理裝置。
- 如申請專利範圍第9或10項之氮化矽膜之形成方法,其係以相同處理溫度來進行該第1工序與該第2工序。
- 如申請專利範圍第9或10項之氮化矽膜之形成方法,其中該第1工序的處理溫度為200~500℃。
- 如申請專利範圍第9或10項之氮化矽膜之形成方法,其中該第1工序的處理壓力為10~100Pa。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2016-117832 | 2016-06-14 | ||
JP2016117832A JP6742165B2 (ja) | 2016-06-14 | 2016-06-14 | 窒化珪素膜の処理方法および窒化珪素膜の形成方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201812073A TW201812073A (zh) | 2018-04-01 |
TWI735592B true TWI735592B (zh) | 2021-08-11 |
Family
ID=60572380
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW106119405A TWI735592B (zh) | 2016-06-14 | 2017-06-12 | 氮化矽膜之處理方法及氮化矽膜之形成方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US10017853B2 (zh) |
JP (1) | JP6742165B2 (zh) |
KR (1) | KR102009923B1 (zh) |
CN (1) | CN107507774B (zh) |
TW (1) | TWI735592B (zh) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10163623B1 (en) * | 2017-10-31 | 2018-12-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Etch method with surface modification treatment for forming semiconductor structure |
JP6983103B2 (ja) * | 2018-04-23 | 2021-12-17 | 東京エレクトロン株式会社 | 処理装置及び埋め込み方法 |
JP7043704B2 (ja) * | 2018-05-23 | 2022-03-30 | 株式会社エスイー | プラズマ照射装置 |
KR102550099B1 (ko) | 2018-08-23 | 2023-06-30 | 삼성전자주식회사 | 가변 저항 메모리 소자 |
US11437250B2 (en) | 2018-11-15 | 2022-09-06 | Tokyo Electron Limited | Processing system and platform for wet atomic layer etching using self-limiting and solubility-limited reactions |
US11217443B2 (en) * | 2018-11-30 | 2022-01-04 | Applied Materials, Inc. | Sequential deposition and high frequency plasma treatment of deposited film on patterned and un-patterned substrates |
KR20200143254A (ko) * | 2019-06-11 | 2020-12-23 | 에이에스엠 아이피 홀딩 비.브이. | 개질 가스를 사용하여 전자 구조를 형성하는 방법, 상기 방법을 수행하기 위한 시스템, 및 상기 방법을 사용하여 형성되는 구조 |
US11915941B2 (en) | 2021-02-11 | 2024-02-27 | Tokyo Electron Limited | Dynamically adjusted purge timing in wet atomic layer etching |
JP2022166614A (ja) * | 2021-04-21 | 2022-11-02 | 東京エレクトロン株式会社 | 成膜方法及び成膜装置 |
JP7002165B1 (ja) | 2021-06-10 | 2022-01-20 | 株式会社アビット・テクノロジーズ | 基板処理装置及び基板処理方法 |
US11802342B2 (en) | 2021-10-19 | 2023-10-31 | Tokyo Electron Limited | Methods for wet atomic layer etching of ruthenium |
US11866831B2 (en) | 2021-11-09 | 2024-01-09 | Tokyo Electron Limited | Methods for wet atomic layer etching of copper |
JP2024088507A (ja) * | 2022-12-20 | 2024-07-02 | 東京エレクトロン株式会社 | 基板処理方法及び基板処理装置 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201525183A (zh) * | 2013-12-16 | 2015-07-01 | Applied Materials Inc | 介電膜的沉積 |
TW201614728A (en) * | 2014-08-12 | 2016-04-16 | Tokyo Electron Ltd | Substrate processing method |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100833406B1 (ko) * | 2000-03-13 | 2008-05-28 | 다다히로 오미 | 플래시 메모리 소자 및 그 제조 방법, 유전체막의 형성 방법 |
JP4334225B2 (ja) * | 2001-01-25 | 2009-09-30 | 東京エレクトロン株式会社 | 電子デバイス材料の製造方法 |
US7172792B2 (en) * | 2002-12-20 | 2007-02-06 | Applied Materials, Inc. | Method for forming a high quality low temperature silicon nitride film |
US6924241B2 (en) * | 2003-02-24 | 2005-08-02 | Promos Technologies, Inc. | Method of making a silicon nitride film that is transmissive to ultraviolet light |
KR20100014557A (ko) * | 2007-03-26 | 2010-02-10 | 도쿄엘렉트론가부시키가이샤 | 질화 규소막의 형성 방법, 비휘발성 반도체 메모리 장치의 제조 방법, 비휘발성 반도체 메모리 장치 및 플라즈마 처리 장치 |
JP2009246129A (ja) | 2008-03-31 | 2009-10-22 | Tokyo Electron Ltd | プラズマcvd窒化珪素膜の成膜方法及び半導体集積回路装置の製造方法 |
JP2011077322A (ja) * | 2009-09-30 | 2011-04-14 | Tokyo Electron Ltd | 結晶性珪素膜の成膜方法およびプラズマcvd装置 |
JP5941653B2 (ja) * | 2011-02-24 | 2016-06-29 | 東京エレクトロン株式会社 | シリコン窒化膜の成膜方法及びシリコン窒化膜の成膜装置 |
JP6088178B2 (ja) * | 2011-10-07 | 2017-03-01 | 株式会社日立国際電気 | 半導体装置の製造方法、基板処理装置およびプログラム |
JPWO2013137115A1 (ja) * | 2012-03-15 | 2015-08-03 | 東京エレクトロン株式会社 | 成膜方法及び成膜装置 |
US20140273530A1 (en) * | 2013-03-15 | 2014-09-18 | Victor Nguyen | Post-Deposition Treatment Methods For Silicon Nitride |
CN103346080A (zh) * | 2013-07-09 | 2013-10-09 | 上海华力微电子有限公司 | 减少金属硅化物掩模层缺陷的方法 |
US9431268B2 (en) * | 2015-01-05 | 2016-08-30 | Lam Research Corporation | Isotropic atomic layer etch for silicon and germanium oxides |
-
2016
- 2016-06-14 JP JP2016117832A patent/JP6742165B2/ja active Active
-
2017
- 2017-06-02 KR KR1020170068942A patent/KR102009923B1/ko active IP Right Grant
- 2017-06-07 US US15/615,945 patent/US10017853B2/en active Active
- 2017-06-08 CN CN201710427638.7A patent/CN107507774B/zh active Active
- 2017-06-12 TW TW106119405A patent/TWI735592B/zh active
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW201525183A (zh) * | 2013-12-16 | 2015-07-01 | Applied Materials Inc | 介電膜的沉積 |
TW201614728A (en) * | 2014-08-12 | 2016-04-16 | Tokyo Electron Ltd | Substrate processing method |
Also Published As
Publication number | Publication date |
---|---|
KR102009923B1 (ko) | 2019-08-12 |
US10017853B2 (en) | 2018-07-10 |
JP2017224669A (ja) | 2017-12-21 |
TW201812073A (zh) | 2018-04-01 |
JP6742165B2 (ja) | 2020-08-19 |
KR20170141117A (ko) | 2017-12-22 |
CN107507774B (zh) | 2021-02-02 |
US20170356084A1 (en) | 2017-12-14 |
CN107507774A (zh) | 2017-12-22 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI735592B (zh) | 氮化矽膜之處理方法及氮化矽膜之形成方法 | |
JP4435666B2 (ja) | プラズマ処理方法、成膜方法 | |
KR101028625B1 (ko) | 기판의 질화 처리 방법 및 절연막의 형성 방법 | |
JP2007042951A (ja) | プラズマ処理装置 | |
WO2011040455A1 (ja) | 選択的プラズマ窒化処理方法及びプラズマ窒化処理装置 | |
JP5231233B2 (ja) | プラズマ酸化処理方法、プラズマ処理装置、及び、記憶媒体 | |
KR20090009931A (ko) | 플라즈마 cvd 방법, 질화 규소막의 형성 방법 및 반도체장치의 제조 방법 | |
JP4906659B2 (ja) | シリコン酸化膜の形成方法 | |
TW200913071A (en) | Method for pretreating inner space of chamber in plasma nitridation, plasma processing method and plasma processing apparatus | |
JP5231232B2 (ja) | プラズマ酸化処理方法、プラズマ処理装置、及び、記憶媒体 | |
JP5271702B2 (ja) | シリコン酸化膜の形成方法およびシリコン酸化膜の形成装置 | |
JP5425361B2 (ja) | プラズマ表面処理方法、プラズマ処理方法およびプラズマ処理装置 | |
JP5357487B2 (ja) | シリコン酸化膜の形成方法、コンピュータ読み取り可能な記憶媒体およびプラズマ酸化処理装置 | |
JP5291467B2 (ja) | プラズマ酸化処理方法、記憶媒体、及び、プラズマ処理装置 | |
JP2017226894A (ja) | プラズマ成膜方法およびプラズマ成膜装置 |