TWI719476B - Display control system and a timing controller thereof - Google Patents

Display control system and a timing controller thereof Download PDF

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TWI719476B
TWI719476B TW108116491A TW108116491A TWI719476B TW I719476 B TWI719476 B TW I719476B TW 108116491 A TW108116491 A TW 108116491A TW 108116491 A TW108116491 A TW 108116491A TW I719476 B TWI719476 B TW I719476B
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source driver
timing controller
point
control signal
control system
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TW202042208A (en
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謝振威
杜孟樺
陳鵬吉
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奇景光電股份有限公司
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Abstract

A timing controller includes a transmit unit configured to transmit image data to a source driver via a point-to-point interface; and a control unit configured to generate a control signal to the source driver. The control signal becomes de-asserted in a blanking period to notify the source driver of stopping signal transmitting via the point-to-point interface.

Description

顯示控制系統及其時序控制器Display control system and its timing controller

本發明係有關一種顯示器，特別是關於一種可抑制電磁干擾的顯示控制系統與方法。The present invention relates to a display, in particular to a display control system and method capable of suppressing electromagnetic interference.

液晶顯示器(LCD)為平板(flat-panel)顯示器的一種，其使用液晶分子以控制調變光線的強度，以產生影像。液晶顯示器可適用於各種的電子裝置，例如電視、電腦、行動電話等，可應用於室內或室外的場合。A liquid crystal display (LCD) is a type of flat-panel display that uses liquid crystal molecules to control and modulate the intensity of light to produce images. The liquid crystal display can be applied to various electronic devices, such as televisions, computers, mobile phones, etc., and can be applied to indoor or outdoor occasions.

於液晶顯示器中，時序控制器藉由通訊介面以傳送各種控制信號至驅動器，以控制影像的顯示。然而，這些信號的傳送會產生電磁干擾(EMI)，其會影響到週邊的電子裝置(例如行動電話)的正常使用。通常，液晶顯示器在出廠之前，需符合無線廣域網路(wireless wide area network, WWAN)的電磁干擾規範。In the liquid crystal display, the timing controller transmits various control signals to the driver through the communication interface to control the display of the image. However, the transmission of these signals will generate electromagnetic interference (EMI), which will affect the normal use of peripheral electronic devices (such as mobile phones). Generally, before leaving the factory, the LCD must comply with the electromagnetic interference specifications of the wireless wide area network (WWAN).

因此亟需提出一種新穎的顯示控制機制，以降低電磁干擾所產生的影響。Therefore, it is urgent to propose a novel display control mechanism to reduce the influence of electromagnetic interference.

鑑於上述，本發明實施例的目的之一在於提出一種顯示控制系統與方法，可有效達到降低電磁干擾的目的。In view of the foregoing, one of the objectives of the embodiments of the present invention is to provide a display control system and method, which can effectively achieve the purpose of reducing electromagnetic interference.

根據本發明實施例，顯示控制系統包含源極驅動器、時序控制器、點對點介面及輸出控制線。源極驅動器產生影像資料的相應電壓至顯示面板。時序控制器控制源極驅動器。點對點介面設於時序控制器與源極驅動器之間，用以傳送影像資料至源極驅動器。輸出控制線設於時序控制器與源極驅動器之間，用以傳送時序控制器所產生之控制信號至源極驅動器。控制信號於遮沒期間為非主動，以告知源極驅動器此時的點對點介面將停止信號的傳送。According to an embodiment of the present invention, the display control system includes a source driver, a timing controller, a point-to-point interface, and an output control line. The source driver generates the corresponding voltage of the image data to the display panel. The timing controller controls the source driver. The point-to-point interface is arranged between the timing controller and the source driver for transmitting image data to the source driver. The output control line is arranged between the timing controller and the source driver to transmit the control signal generated by the timing controller to the source driver. The control signal is inactive during the masking period to inform the source driver that the point-to-point interface at this time will stop signal transmission.

第一圖顯示本發明實施例之顯示控制系統100的系統方塊圖，用以降低電磁干擾(EMI)，可適用於液晶顯示器。The first figure shows a system block diagram of the display control system 100 according to an embodiment of the present invention, which is used to reduce electromagnetic interference (EMI), which can be applied to liquid crystal displays.

在本實施例中，顯示控制系統100可包含顯示面板11，例如液晶顯示面板，其可包含排列為矩陣形式的複數像素。本實施例之顯示控制系統100可包含閘極驅動器(又稱為掃描驅動器)12，用以依序開啟顯示面板11的至少一列像素。顯示控制系統100可包含源極驅動器(又稱為資料驅動器)13，用以產生影像資料的相應電壓至顯示面板11，以顯示影像於顯示面板11。顯示控制系統100可包含時序控制器(TCON)14，用以控制閘極驅動器12及源極驅動器13。In this embodiment, the display control system 100 may include a display panel 11, such as a liquid crystal display panel, which may include a plurality of pixels arranged in a matrix. The display control system 100 of this embodiment may include a gate driver (also called a scan driver) 12 for sequentially turning on at least one column of pixels of the display panel 11. The display control system 100 may include a source driver (also referred to as a data driver) 13 for generating corresponding voltages of image data to the display panel 11 to display images on the display panel 11. The display control system 100 may include a timing controller (TCON) 14 for controlling the gate driver 12 and the source driver 13.

在本實施例中，顯示控制系統100可包含點對點(point-to-point, P2P)介面101，設於時序控制器14與源極驅動器13之間，用以傳送影像資料至源極驅動器13。在一實施例中，時序控制器14可包含傳送單元141，藉由點對點介面101以傳送影像資料至源極驅動器13的時脈與資料回復(clock and data recovery, CDR)電路131。In this embodiment, the display control system 100 may include a point-to-point (P2P) interface 101 disposed between the timing controller 14 and the source driver 13 for transmitting image data to the source driver 13. In one embodiment, the timing controller 14 may include a transmitting unit 141 to transmit the image data to the clock and data recovery (CDR) circuit 131 of the source driver 13 through the point-to-point interface 101.

根據本實施例的特徵之一，時序控制器14可包含控制單元142，用以產生控制信號C，其藉由輸出控制線102以傳送控制信號C至源極驅動器13的時脈與資料回復(CDR)電路131。According to one of the features of this embodiment, the timing controller 14 may include a control unit 142 for generating a control signal C, which transmits the control signal C to the clock and data recovery of the source driver 13 through the output control line 102 ( CDR) circuit 131.

第二圖顯示本發明實施例之顯示控制方法200的流程圖，可應用於第一圖所示的顯示控制系統100，用以降低電磁干擾。當顯示控制系統100處於(水平/垂直)遮沒(blanking)期間且為第一階段(phase I)時，時序控制器14藉由輸出控制線102以傳送非主動(de-asserted)的控制信號C給源極驅動器13(步驟21)，以告知源極驅動器13此時的點對點(P2P)介面101將不再傳送信號(例如同步用的時脈信號)。在一實施例中，非主動的控制信號C為低位準信號。當控制信號C為非主動(例如低位準)時，時序控制器14關閉點對點(P2P)介面101的信號傳送(步驟22)，因而禁能(disable)第一階段的至少一部份期間。The second figure shows a flowchart of the display control method 200 of the embodiment of the present invention, which can be applied to the display control system 100 shown in the first figure to reduce electromagnetic interference. When the display control system 100 is in the (horizontal/vertical) blanking period and is in the first phase (phase I), the timing controller 14 transmits the de-asserted control signal by outputting the control line 102 C to the source driver 13 (step 21) to inform the source driver 13 that the point-to-point (P2P) interface 101 at this time will no longer transmit signals (for example, a clock signal for synchronization). In one embodiment, the inactive control signal C is a low level signal. When the control signal C is inactive (for example, low level), the timing controller 14 turns off the signal transmission of the P2P interface 101 (step 22), thereby disabling at least a part of the first stage.

第三A圖、第三B圖、第三C圖例示第一圖之點對點(P2P)介面101與輸出控制線102的相應信號時序圖，分別顯示一列、多列及一訊框(frame)的信號。如圖所例示，於遮沒期間的第一階段(的一部份)期間，時序控制器14傳送非主動(例如低位準)的控制信號C給源極驅動器13(步驟21)。與此同時，時序控制器14關閉(或禁能)點對點(P2P)介面101的信號傳送(步驟22)。藉此，可以減弱點對點(P2P)介面101上的電磁干擾強度，進而具有降低電磁干擾的功能。此外，當控制信號C為非主動的同時，控制單元142可關閉傳送單元141，且時脈與資料回復(CDR)電路131也可關閉，因而得以降低功耗。The third A, third B, and third C diagrams illustrate the corresponding signal timing diagrams of the point-to-point (P2P) interface 101 and the output control line 102 in the first diagram, respectively showing one row, multiple rows and a frame (frame) signal. As shown in the figure, during the first stage (part of) of the masking period, the timing controller 14 transmits an inactive (for example, low level) control signal C to the source driver 13 (step 21). At the same time, the timing controller 14 closes (or disables) the signal transmission of the point-to-point (P2P) interface 101 (step 22). In this way, the electromagnetic interference intensity on the point-to-point (P2P) interface 101 can be reduced, thereby having the function of reducing electromagnetic interference. In addition, when the control signal C is inactive, the control unit 142 can turn off the transmission unit 141, and the clock and data recovery (CDR) circuit 131 can also be turned off, thereby reducing power consumption.

第四圖例示未使用本發明實施例之點對點(P2P)介面101的相應信號時序圖。如圖所例示，於第一階段當中，時序控制器14持續傳送信號至源極驅動器13，因此會造成電磁干擾。本發明實施例於第一階段因為關閉(或禁能)了點對點(P2P)介面101的信號傳送(步驟22)，因此可抑制原本的點對點(P2P)介面101之頻段能量，進而達到降低電磁干擾的目的。The fourth figure illustrates the corresponding signal timing diagram of the point-to-point (P2P) interface 101 that does not use the embodiment of the present invention. As shown in the figure, in the first stage, the timing controller 14 continues to transmit signals to the source driver 13, which may cause electromagnetic interference. The embodiment of the present invention disables (or disables) the signal transmission of the point-to-point (P2P) interface 101 in the first stage (step 22), so the original frequency band energy of the point-to-point (P2P) interface 101 can be suppressed, thereby reducing electromagnetic interference the goal of.

回到第二圖所示的流程，於步驟23，顯示控制系統100進入第二階段(phase II)，時序控制器14所傳送的控制信號C變為主動(asserted)，例如高位準，且時序控制器14藉由點對點(P2P)介面101傳送配置控制信號CTR至源極驅動器13，以配置(configure)源極驅動器13。最後，於步驟24，顯示控制系統100進入第三階段(phase III)，時序控制器14傳送一列影像資料至源極驅動器13。Returning to the flow shown in the second figure, in step 23, the display control system 100 enters the second phase (phase II), the control signal C transmitted by the timing controller 14 becomes asserted, such as a high level, and the timing The controller 14 transmits the configuration control signal CTR to the source driver 13 through the point-to-point (P2P) interface 101 to configure the source driver 13. Finally, in step 24, the display control system 100 enters the third phase (phase III), and the timing controller 14 transmits a row of image data to the source driver 13.

以上所述僅為本發明之較佳實施例而已，並非用以限定本發明之申請專利範圍；凡其它未脫離發明所揭示之精神下所完成之等效改變或修飾，均應包含在下述之申請專利範圍內。The above descriptions are only the preferred embodiments of the present invention, and are not intended to limit the scope of patent application of the present invention; all other equivalent changes or modifications made without departing from the spirit of the invention should be included in the following Within the scope of patent application.

100:顯示控制系統 101:點對點介面 102:輸出控制線 11:顯示面板 12:閘極驅動器 13:源極驅動器 131:時脈與資料回復電路 14:時序控制器 141:傳送單元 142:控制單元 C:控制信號 CTR:配置控制信號100: display control system 101: Point-to-point interface 102: output control line 11: Display panel 12: Gate driver 13: Source driver 131: Clock and data recovery circuit 14: Timing controller 141: Transport unit 142: Control Unit C: Control signal CTR: configuration control signal

第一圖顯示本發明實施例之顯示控制系統的系統方塊圖。 第二圖顯示本發明實施例之顯示控制方法的流程圖。 第三A圖、第三B圖、第三C圖例示第一圖之點對點介面與輸出控制線的相應信號時序圖，分別顯示一列、多列及一訊框的信號。 第四圖例示未使用本發明實施例之點對點介面的相應信號時序圖。The first figure shows a system block diagram of a display control system according to an embodiment of the present invention. The second figure shows a flowchart of a display control method according to an embodiment of the present invention. The third diagram A, the third diagram B, and the third diagram C illustrate the corresponding signal timing diagrams of the point-to-point interface and the output control line of the first diagram, respectively showing the signals of one column, multiple columns and one frame. The fourth diagram illustrates the corresponding signal timing diagram of the point-to-point interface that does not use the embodiment of the present invention.

100:顯示控制系統 100: display control system

101:點對點介面 101: Point-to-point interface

102:輸出控制線 102: output control line

11:顯示面板 11: Display panel

12:閘極驅動器 12: Gate driver

13:源極驅動器 13: Source driver

131:時脈與資料回復電路 131: Clock and data recovery circuit

14:時序控制器 14: Timing controller

141:傳送單元 141: Transport unit

142:控制單元 142: Control Unit

C:控制信號 C: Control signal

Claims (11)

一種顯示控制系統，包含： 一源極驅動器，用以產生影像資料的相應電壓至顯示面板； 一時序控制器，用以控制該源極驅動器； 一點對點介面，設於該時序控制器與該源極驅動器之間，用以傳送影像資料至該源極驅動器；及 一輸出控制線，設於該時序控制器與該源極驅動器之間，用以傳送該時序控制器所產生之控制信號至該源極驅動器； 其中該控制信號於遮沒期間為非主動，以告知該源極驅動器此時的該點對點介面將停止信號的傳送。A display control system, including: A source driver for generating the corresponding voltage of the image data to the display panel; A timing controller for controlling the source driver; A point-to-point interface is provided between the timing controller and the source driver for transmitting image data to the source driver; and An output control line, arranged between the timing controller and the source driver, for transmitting the control signal generated by the timing controller to the source driver; The control signal is inactive during the masking period to inform the source driver that the point-to-point interface at this time will stop signal transmission. 根據申請專利範圍第1項所述之顯示控制系統，其中該時序控制器包含： 一控制單元，用以產生該控制信號。According to the display control system described in item 1 of the scope of patent application, the timing controller includes: A control unit is used to generate the control signal. 根據申請專利範圍第2項所述之顯示控制系統，其中該時序控制器包含： 一傳送單元，用以藉由該點對點介面以傳送影像資料至該源極驅動器。According to the display control system described in item 2 of the scope of patent application, the timing controller includes: A transmitting unit is used for transmitting image data to the source driver through the point-to-point interface. 根據申請專利範圍第3項所述之顯示控制系統，其中當該控制信號為非主動時，該控制單元關閉該傳送單元。According to the display control system described in item 3 of the scope of patent application, when the control signal is inactive, the control unit turns off the transmission unit. 根據申請專利範圍第1項所述之顯示控制系統，其中該源極驅動器包含： 一時脈與資料回復電路，用以接收該影像資料及該控制信號。According to the display control system described in item 1 of the scope of patent application, the source driver includes: A clock and data recovery circuit is used to receive the image data and the control signal. 根據申請專利範圍第5項所述之顯示控制系統，其中當該控制信號為非主動時，該時脈與資料回復電路關閉。According to the display control system described in item 5 of the scope of patent application, when the control signal is inactive, the clock and data recovery circuit are turned off. 根據申請專利範圍第1項所述之顯示控制系統，更包含： 一閘極驅動器，受控於該時序控制器，用以依序開啟該顯示面板的至少一列像素。According to the display control system described in item 1 of the scope of patent application, it further includes: A gate driver, controlled by the timing controller, is used to sequentially turn on at least one column of pixels of the display panel. 一種時序控制器，包含： 一傳送單元，藉由點對點介面以傳送影像資料至源極驅動器；及 一控制單元，用以產生控制信號至該源極驅動器； 其中該控制信號於遮沒期間為非主動，以告知該源極驅動器此時的該點對點介面將停止信號的傳送。A timing controller, including: A transmission unit that transmits image data to the source driver through a point-to-point interface; and A control unit for generating control signals to the source driver; The control signal is inactive during the masking period to inform the source driver that the point-to-point interface at this time will stop signal transmission. 根據申請專利範圍第8項所述之時序控制器，其中當該控制信號為非主動時，該控制單元關閉該傳送單元。According to the timing controller described in item 8 of the scope of patent application, when the control signal is inactive, the control unit turns off the transmission unit. 根據申請專利範圍第8項所述之時序控制器，其中該源極驅動器包含： 一時脈與資料回復電路，用以接收該影像資料及該控制信號。According to the timing controller described in item 8 of the scope of patent application, the source driver includes: A clock and data recovery circuit is used to receive the image data and the control signal. 根據申請專利範圍第10項所述之時序控制器，其中當該控制信號為非主動時，該時脈與資料回復電路關閉。According to the timing controller described in item 10 of the scope of patent application, when the control signal is inactive, the clock and data recovery circuit are turned off.
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200841314A (en) * 2007-04-13 2008-10-16 Au Optronics Corp A method for improving the EMI performance of LCD device
TW201033991A (en) * 2009-03-04 2010-09-16 Silicon Works Co Ltd Display driving system with monitoring unit for data driver
TW201117591A (en) * 2009-08-13 2011-05-16 Samsung Electronics Co Ltd Clock and data recovery circuit of a source driver and a display device
US20110115781A1 (en) * 2009-11-18 2011-05-19 Samsung Electronics Co., Ltd Display driver integrated circuits, and systems and methods using display driver integrated circuits
TW201525962A (en) * 2013-12-19 2015-07-01 Fitipower Integrated Tech Inc Display device and method for transmitting and processing clock embedded data
TW201635263A (en) * 2015-03-26 2016-10-01 奇景光電股份有限公司 Signal transmitting and receiving system and associated timing controller of display
CN109036240A (en) * 2017-06-09 2018-12-18 京东方科技集团股份有限公司 Data transmission method, sequence controller, source driving chip and display device

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200841314A (en) * 2007-04-13 2008-10-16 Au Optronics Corp A method for improving the EMI performance of LCD device
TW201033991A (en) * 2009-03-04 2010-09-16 Silicon Works Co Ltd Display driving system with monitoring unit for data driver
TW201117591A (en) * 2009-08-13 2011-05-16 Samsung Electronics Co Ltd Clock and data recovery circuit of a source driver and a display device
US20110115781A1 (en) * 2009-11-18 2011-05-19 Samsung Electronics Co., Ltd Display driver integrated circuits, and systems and methods using display driver integrated circuits
TW201525962A (en) * 2013-12-19 2015-07-01 Fitipower Integrated Tech Inc Display device and method for transmitting and processing clock embedded data
TW201635263A (en) * 2015-03-26 2016-10-01 奇景光電股份有限公司 Signal transmitting and receiving system and associated timing controller of display
CN109036240A (en) * 2017-06-09 2018-12-18 京东方科技集团股份有限公司 Data transmission method, sequence controller, source driving chip and display device

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