TWI715445B - Device capable of compensating for amplitude-modulation to phase-modulation distortion - Google Patents

Device capable of compensating for amplitude-modulation to phase-modulation distortion Download PDF

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TWI715445B
TWI715445B TW109105526A TW109105526A TWI715445B TW I715445 B TWI715445 B TW I715445B TW 109105526 A TW109105526 A TW 109105526A TW 109105526 A TW109105526 A TW 109105526A TW I715445 B TWI715445 B TW I715445B
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TW202027409A (en
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王文山
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瑞昱半導體股份有限公司
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Abstract

Disclosed is a device capable of compensating for amplitude-modulation to phase-modulation distortion. The device includes a transmission circuit, a control circuit, and a calibration circuit. The transmission circuit includes an amplifier circuit, a phase-shift adjustment circuit, and an output circuit. The amplifier circuit is configured to output an amplified signal according to an input signal. The adjustment circuit, set between the amplifier circuit and the output circuit, includes at least one of an adjustable capacitor and an adjustable inductor and is configured to adjust the phase shift of the amplified signal according to a control signal. The output circuit is configured to output an output signal according to the amplified signal. The control circuit is configured to generate the control signal according to the input signal, in which the control signal varies with the input signal. The calibration circuit is configured to output a calibration signal to the control signal according to the relation between the control signal and the output signal.

Description

調幅調相失真之補償裝置Compensation device for AM and phase distortion

本發明是關於失真補償裝置，尤其是關於調幅調相失真之補償裝置。The present invention relates to a distortion compensation device, especially to a compensation device for amplitude and phase modulation distortion.

無線傳收器之功率放大器的輸出會有調幅調相失真（amplitude-modulation to phase-modulation distortion, AM-PM distortion），這會導致頻譜增生（spectral regrowth）的問題。頻譜增生的問題使得本領域人士難以將功率放大器整合至無線傳收器，也會降低無線傳收器之傳送電路的效能。The output of the power amplifier of the wireless transmitter will have amplitude-modulation to phase-modulation distortion (AM-PM distortion), which will cause the problem of spectral regrowth. The problem of spectrum proliferation makes it difficult for those skilled in the art to integrate the power amplifier into the wireless transceiver, and also reduces the performance of the transmission circuit of the wireless transceiver.

解決調幅調相失真之問題的目前技術包括採用笛卡爾回授（Cartesian feedback）技術以及適應性數位預失真技術。笛卡爾回授技術需要額外的回授解調變器以及誤差放大器，會增加電路複雜度與成本；笛卡爾回授可見於坊間之教科書（例如：Behzad Razavi, “Fundamentals of Microelectronics, 2nd Edition”, ISBN-10: 9781118156322/ ISBN-13: 978-1118156322）。適應性數位預失真技術可能需要基頻訊號之頻寬的增加，而導致較高的功耗，且該技術之升頻路徑與降頻路徑之間的耦合效應也可能降低預失真的效果；適應性數位預失真技術可見於專利號5524286之美國專利。Current technologies to solve the problem of AM and phase distortion include the use of Cartesian feedback technology and adaptive digital predistortion technology. Cartesian feedback technology requires additional feedback demodulators and error amplifiers, which will increase circuit complexity and cost; Cartesian feedback can be found in textbooks (for example: Behzad Razavi, "Fundamentals of Microelectronics, 2 nd Edition" , ISBN-10: 9781118156322/ ISBN-13: 978-1118156322). The adaptive digital predistortion technology may require an increase in the bandwidth of the baseband signal, resulting in higher power consumption, and the coupling effect between the up-frequency path and the down-frequency path of this technology may also reduce the effect of the pre-distortion; The sexual digital predistortion technology can be found in the US Patent No. 5524286.

本發明之一目的在於提供一種調幅調相失真之補償裝置，以避免先前技術的問題。An object of the present invention is to provide a compensation device for AM and phase distortion to avoid the problems of the prior art.

依據本發明之一實施例，本發明之調幅調相失真之補償裝置包含一傳送電路、一控制電路以及一校正電路。該傳送電路包含一放大電路、一相移調整電路以及一輸出電路；該放大電路用來依據一輸入訊號輸出一放大訊號；該相移調整電路包含一可調電容與一可調電感的至少其中之一，設於該放大電路與該輸出電路之間，用來依據一控制訊號調整該放大訊號的相移；該輸出電路用來依據該放大訊號輸出一輸出訊號。該控制電路用來依據該輸入訊號產生該控制訊號，其中該控制訊號隨著該輸入訊號而變。該校正電路用來依據該控制訊號之變化與該輸出訊號之變化之間的關係來輸出一校正訊號至該控制電路。本實施例適用於用於通訊裝置之傳送電路或音訊傳送電路。According to an embodiment of the present invention, the compensation device for AM and phase distortion of the present invention includes a transmission circuit, a control circuit and a correction circuit. The transmission circuit includes an amplifying circuit, a phase shift adjusting circuit, and an output circuit; the amplifying circuit is used to output an amplified signal according to an input signal; the phase shift adjusting circuit includes at least one of an adjustable capacitor and an adjustable inductor One is arranged between the amplifying circuit and the output circuit to adjust the phase shift of the amplified signal according to a control signal; the output circuit is used to output an output signal according to the amplified signal. The control circuit is used for generating the control signal according to the input signal, wherein the control signal changes with the input signal. The correction circuit is used to output a correction signal to the control circuit according to the relationship between the change of the control signal and the change of the output signal. This embodiment is suitable for transmission circuits or audio transmission circuits used in communication devices.

有關本發明的特徵、實作與功效，茲配合圖式作較佳實施例詳細說明如下。With regard to the features, implementation and effects of the present invention, preferred embodiments are described in detail as follows in conjunction with the drawings.

本發明揭露一種調幅調相失真（amplitude-modulation to phase-modulation distortion, AM-PM distortion）之補償裝置，能夠應用於通訊裝置之傳送或接收電路以及應用於音訊傳送電路，但不以此為限。該補償裝置具有易於實施、成本經濟以及低功耗等優點。The present invention discloses a compensation device for amplitude-modulation to phase-modulation distortion (AM-PM distortion), which can be applied to transmission or receiving circuits of communication devices and to audio transmission circuits, but is not limited to this . The compensation device has the advantages of easy implementation, economic cost and low power consumption.

圖1顯示本發明之調幅調相失真之補償裝置的一實施例。圖1之調幅調相失真之補償裝置100包含一傳送電路110以及一控制電路120。傳送電路110包含一放大電路112、一相移調整電路114以及一輸出電路116。放大電路112依據一輸入訊號SIN 輸出一放大訊號SAMP ，該輸入訊號SIN 視實施需求可為差動或單端訊號，其可為單一個訊號或由複數個訊號（例如：同相（in-phase）訊號與正交相（quadrature-phase）訊號）組成。相移調整電路114依不同應用包含一可調電容與一可調電感的至少其中之一，設於放大電路114與輸出電路116之間，依據一控制訊號SCTRL 調整該放大訊號SAMP 的相移（phase shift）；舉例而言，該控制訊號SCTRL 包含一控制電壓，該可調電容包含一變容器（varactor），該變容器之電容值隨著該控制電壓而變；另舉例而言，該控制訊號SCTRL 是由數位碼轉換而得的複數個準位的組成，該可調電容包含複數個並聯的電容路徑，每該電容路徑包含一電容元件與一開關，每該開關依據該控制訊號SCTRL 而打開或關閉以決定該電容的電容值。輸出電路116依據該放大訊號SAMP 輸出一輸出訊號SOUT 。控制電路120依據該輸入訊號SIN 產生該控制訊號SCTRL ，該控制訊號SCTRL 隨著該輸入訊號SIN 而變；換言之，不同的輸入訊號SIN 可能分別對應不同的控制訊號SCTRL ，其中該輸入訊號SIN 與該控制訊號SCTRL 的初始關係可選擇性地預存於該控制電路120中，也可選擇性地定期地/不定期地被更新。Fig. 1 shows an embodiment of the compensation device for AM and phase distortion of the present invention. The compensation device 100 for AM and phase distortion in FIG. 1 includes a transmission circuit 110 and a control circuit 120. The transmission circuit 110 includes an amplifier circuit 112, a phase shift adjustment circuit 114, and an output circuit 116. The amplifying circuit 112 outputs an amplified signal S AMP according to an input signal S IN . The input signal S IN can be a differential or single-ended signal depending on the implementation requirements. It can be a single signal or a plurality of signals (for example: in-phase (in -phase) signal and quadrature-phase (quadrature-phase) signal). The phase shift adjustment circuit 114 includes at least one of an adjustable capacitor and an adjustable inductance according to different applications. It is arranged between the amplifying circuit 114 and the output circuit 116, and adjusts the phase of the amplified signal S AMP according to a control signal S CTRL . Shift (phase shift); for example, the control signal S CTRL includes a control voltage, the adjustable capacitor includes a varactor (varactor), the capacitance value of the varactor changes with the control voltage; another example The control signal S CTRL is composed of a plurality of levels converted from a digital code. The adjustable capacitor includes a plurality of capacitor paths connected in parallel. Each capacitor path includes a capacitor element and a switch. Each switch is based on the The control signal S CTRL is turned on or off to determine the capacitance value of the capacitor. The output circuit 116 outputs an output signal S OUT according to the amplified signal S AMP . The control circuit 120 generates the control signal S CTRL according to the input signal S IN , and the control signal S CTRL changes with the input signal S IN ; in other words, different input signals S IN may correspond to different control signals S CTRL , where The initial relationship between the input signal S IN and the control signal S CTRL can be selectively pre-stored in the control circuit 120, or can be selectively updated periodically/irregularly.

圖2顯示圖1之傳送電路110的一實施例。本實施例中，傳送電路110為一無線傳送電路（例如：符合802.11a/b/g/n/ac規範之無線傳送電路、藍牙傳送電路、窄頻物聯網（Narrow Band Internet of Things, NBIOT）傳送電路等等），該輸入訊號SIN （例如：基頻訊號）包含一同相訊號SIN_I 與一正交相訊號SIN_Q ，該放大訊號SAMP 包含一第一放大訊號SAMP_1 與一第二放大訊號SAMP_2 ，該控制訊號SCTRL 包含一第一控制訊號SCTRL_1 與一第二控制訊號SCTRL_2 。FIG. 2 shows an embodiment of the transmission circuit 110 of FIG. 1. In this embodiment, the transmission circuit 110 is a wireless transmission circuit (for example: a wireless transmission circuit that complies with 802.11a/b/g/n/ac specifications, a Bluetooth transmission circuit, and Narrow Band Internet of Things (NBIOT) Transmission circuit, etc.), the input signal S IN (for example: baseband signal) includes an in-phase signal S IN_I and a quadrature-phase signal S IN_Q , and the amplified signal S AMP includes a first amplified signal S AMP_1 and a second The amplification signal S AMP_2 , the control signal S CTRL includes a first control signal S CTRL_1 and a second control signal S CTRL_2 .

如圖2所示，放大電路112包含一振盪源210（例如：頻率合成器（frequency synthesizer））、一第一數位至射頻振幅轉換器（digital-to-RF-amplitude converter, DRAC）220以及一第二DRAC 230。振盪源210提供至少一第一振盪訊號LO1 （例如：頻率為f LO 且相位分別為0度與180度的二振盪訊號）與至少一第二振盪訊號LO2 （例如：頻率為f LO 且相位分別為90度與270度的二振盪訊號）。第一DRAC 220依據該至少一第一振盪訊號LO1 將該同相訊號SIN_I 轉換為該第一放大訊號SAMP_1 。第二DRAC 230依據該至少一第二振盪訊號LO2 將該正交相訊號SIN_Q 轉換為該第二放大訊號SAMP_2 。放大電路112的進一步說明可見於下列文獻：Morteza S. Alavi, Student Member, IEEE, Robert Bogdan Staszewski, Fellow, IEEE, Leo C. N. de Vreede, Senior Member, IEEE, and John R. Long, Member, IEEE, “A Wideband 2 13-bit All-Digital I/Q RF-DAC”, IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 4, APRIL 2014。As shown in FIG. 2, the amplifying circuit 112 includes an oscillation source 210 (for example: a frequency synthesizer), a first digital-to-RF-amplitude converter (DRAC) 220, and a The second DRAC 230. The oscillation source 210 provides at least one first oscillation signal LO 1 (for example: two oscillation signals with a frequency of f LO and phases of 0 degrees and 180 degrees) and at least one second oscillation signal LO 2 (for example: a frequency of f LO and Two oscillating signals with phases of 90 degrees and 270 degrees). The first DRAC 220 converts the in-phase signal S IN_I into the first amplified signal S AMP_1 according to the at least one first oscillating signal LO 1 . The second DRAC 230 converts the quadrature phase signal S IN_Q into the second amplified signal S AMP_2 according to the at least one second oscillation signal LO 2 . A further description of the amplifier circuit 112 can be found in the following documents: Morteza S. Alavi, Student Member, IEEE, Robert Bogdan Staszewski, Fellow, IEEE, Leo CN de Vreede, Senior Member, IEEE, and John R. Long, Member, IEEE, " A Wideband 2 13-bit All-Digital I/Q RF-DAC", IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 62, NO. 4, APRIL 2014.

如圖2所示，相移調整電路114包含一第一諧振電路（resonant circuit）240以及一第二諧振電路250。第一諧振電路240依據該第一控制訊號SCTRL_1 調整該第一放大訊號SAMP_1 的相移。第二諧振電路250依據該第二控制訊號SCTRL_2 調整該第二放大訊號SAMP_2 的相移。第一諧振電路240與第二諧振電路250的每一個包含並聯的一電容與一電感，該電容之值及/或該電感之值可依據該控制訊號SCTRL 而被調整。As shown in FIG. 2, the phase shift adjustment circuit 114 includes a first resonant circuit 240 and a second resonant circuit 250. The first resonance circuit 240 adjusts the phase shift of the first amplification signal S AMP_1 according to the first control signal S CTRL_1 . The second resonance circuit 250 adjusts the phase shift of the second amplified signal S AMP_2 according to the second control signal S CTRL_2 . Each of the first resonance circuit 240 and the second resonance circuit 250 includes a capacitor and an inductance connected in parallel, and the value of the capacitor and/or the value of the inductance can be adjusted according to the control signal S CTRL .

如圖2所示，輸出電路116包含一訊號合成器260將該第一放大訊號SAMP_1 與該第二放大訊號SAMP_2 相加以產生該輸出訊號SOUT 。訊號合成器260單獨而言可為一已知或自行開發的電路，其細節在此省略。As shown in FIG. 2, the output circuit 116 includes a signal synthesizer 260 that adds the first amplified signal S AMP_1 and the second amplified signal S AMP_2 to generate the output signal S OUT . The signal synthesizer 260 alone can be a known or self-developed circuit, and its details are omitted here.

圖3顯示圖1之傳送電路110的另一實施例，可應用於音訊傳送裝置。圖3之實作中，該輸入訊號SIN 為一數位音訊訊號SIN_D ；放大電路112包含一數位至類比轉換器（DAC）310以及一音訊放大器320，其中DAC 310依據該數位音訊訊號SIN_D 產生一類比音訊訊號SIN_A ，音訊放大器320依據該類比音訊訊號SIN_A 產生該放大訊號SAMP ；相移調整電路114包含一可調電容330；輸出電路116包含一輸出接腳340依據該放大訊號SAMP 輸出該輸出訊號SOUT 。FIG. 3 shows another embodiment of the transmission circuit 110 of FIG. 1, which can be applied to an audio transmission device. In the implementation of FIG. 3, the input signal S IN is a digital audio signal S IN_D ; the amplifying circuit 112 includes a digital-to-analog converter (DAC) 310 and an audio amplifier 320, wherein the DAC 310 is based on the digital audio signal S IN_D generating an analog audio signal S IN_A, the audio amplifier 320 according to the class to generate the amplified signal S aMP than the audio signal S IN_A; adjusting the phase shift circuit 114 comprises a variable capacitor 330; an output circuit 116 includes an output pin 340 according to the amplified signal S AMP outputs the output signal S OUT .

圖4顯示圖1之控制電路120的一實施例。圖4之控制電路120包含一計算電路410以及一控制訊號產生電路420。計算電路410依據該輸入訊號SIN （例如：前述同相訊號SIN_I 與正交相訊號SIN_Q ）提供與該輸入訊號SIN 的振幅相關的一計算值SIN_AMP （例如：

Figure 02_image001
）給控制訊號產生電路420。控制訊號產生電路420依據該計算值SIN_AMP 決定該控制訊號SCTRL 之強度（例如：控制電壓的電壓大小）或準位組成（例如：由該計算值SIN_AMP 轉換而得的複數個準位的組成，其中每個準位控制一個開關的啟閉狀態），並輸出該控制訊號SCTRL 至相移調整電路114。值得注意的是，若輸入訊號為單一訊號（例如：圖3之數位音訊訊號SIN_D ）且其振幅可直接地被確定，計算電路410可選擇性地被省略，此時控制訊號產生電路420直接依據該輸入訊號SIN 的振幅決定該控制訊號SCTRL 之強度或準位組成。FIG. 4 shows an embodiment of the control circuit 120 of FIG. 1. The control circuit 120 in FIG. 4 includes a calculation circuit 410 and a control signal generation circuit 420. Computing circuit 410 according to the input signal S IN: providing a calculated value S IN_AMP associated with the amplitude of the input signal S IN (e.g., (e.g., the in-phase signal and quadrature phase signal S IN_I S IN_Q):
Figure 02_image001
) To the control signal generating circuit 420. The control signal generating circuit 420 determines the intensity (for example, the magnitude of the control voltage) or the level composition of the control signal S CTRL according to the calculated value S IN_AMP (for example: a plurality of levels converted from the calculated value S IN_AMP ) In which each level controls the on-off state of a switch), and outputs the control signal S CTRL to the phase shift adjustment circuit 114. It is worth noting that if the input signal is a single signal (for example, the digital audio signal S IN_D in Figure 3) and its amplitude can be directly determined, the calculation circuit 410 can be optionally omitted, and the control signal generation circuit 420 is directly The intensity or level composition of the control signal S CTRL is determined according to the amplitude of the input signal S IN .

圖5顯示圖4之控制訊號產生電路420的一實施例。圖5之控制訊號產生電路420包含一查表電路510、一數位至類比轉換器（DAC）520以及一濾波電路530。查表電路510依據該輸入訊號SIN 的振幅輸出一數位控制訊號SCTRL_D 。DAC 520依據該數位控制訊號SCTRL_D 產生一類比訊號SA 。濾波電路530（例如：低通濾波器）依據該類比訊號SA 產生一濾波訊號作為該控制訊號SCTRL 。值得注意的是，若沒有必要對該類比訊號SA 執行濾波，濾波電路530可選擇性地被省略，此時該類比訊號SA 作為該控制訊號SCTRL 。FIG. 5 shows an embodiment of the control signal generating circuit 420 of FIG. 4. The control signal generating circuit 420 of FIG. 5 includes a look-up circuit 510, a digital-to-analog converter (DAC) 520, and a filter circuit 530. The look-up circuit 510 outputs a digital control signal S CTRL_D according to the amplitude of the input signal S IN . DAC 520 generates an analog signal S A according to the digital control signal S CTRL_D. The filter circuit 530 (for example: low-pass filter) to produce a filtered signal as the control signal S CTRL signal based on such ratio S A. Notably, if the analog signal S A is not necessary to perform filtering, the filter circuit 530 is selectively omitted, than the case such as the signal S A to the control signal S CTRL.

圖6顯示本發明之調幅調相失真之補償裝置的另一實施例。相較於圖1，圖6之調幅調相失真之補償裝置600進一步包含一校正電路610。校正電路610依據該控制訊號SCTRL 之變化與該輸出訊號SOUT 之變化之間的關係來輸出一校正訊號SCAL 至控制電路120，以使控制電路120依據該校正訊號SCAL 決定該輸入訊號SIN 與該控制訊號SCTRL 之間的關係。於一實作範例中，在該輸入訊號SIN 為一特定值的情形下（例如：該輸入訊號SIN 之振幅為一特定振幅時），校正電路610依序執行至少下列步驟（如圖7所示）以判斷該控制訊號SCTRL 之變化與該輸出訊號SIN 之變化之間的關係： 步驟S710：令該控制訊號SCTRL 往一目前方向來變化。舉例而言，該控制訊號SCTRL 是一控制電壓，本步驟令該控制訊號SCTRL 增加/減少一單位的預設電壓；另舉例而言，該控制訊號SCTRL 是複數個準位的組成（例如：00011分別用來控制前述電容路徑中的五個開關，其中準位0用來使開關不導通，準位1用來使開關導通），本步驟改變該控制訊號SCTRL 的一個準位（例如：00011à00111或00111à00011）。 步驟S720：執行一比較作業，以比較源自該輸出訊號SOUT 之一當前值（例如：後述之數位回授訊號SFEEDBACK ）與源自該輸出訊號SOUT 之一先前值（例如：後述之在前數位回授訊號）。該當前值產生於該控制訊號SCTRL 之最近一次的變化後，該先前值產生於該控制訊號SCTRL 之最近一次的變化前。 步驟S730：若該當前值小於該先前值（其意味著增生的訊號變小，亦即AM-PM失真減輕），保持該目前方向不變；若該當前值大於該先前值（其意味著增生的訊號變大，亦即AM-PM失真變嚴重），令該目前方向更新為該目前方向的反相。 步驟S740：依序重複步驟S710至S740直到該目前方向改變達至少N次，接著輸出該校正訊號SCAL 以指出在該輸入訊號SIN 為該特定值的情形下該控制訊號SCTRL 的最佳強度或最佳準位組成，其中該N為正整數。舉例來說，若執行第一次比較作業時，該當前值小於該先前值，代表一開始選擇的控制訊號的變化方向是正確的，則該N為正整數；若執行第一次比較作業時，該當前值大於該先前值，代表一開始選擇的控制訊號的變化方向是錯誤的，則該N為不小於2的正整數。 藉由上述步驟，校正電路610可以找出該輸入訊號SIN 之各個值所對應的該控制訊號SCTRL 的最佳強度或最佳準位組成。Fig. 6 shows another embodiment of the compensation device for AM and phase distortion of the present invention. Compared with FIG. 1, the compensation device 600 for AM and phase distortion compensation in FIG. 6 further includes a correction circuit 610. The correction circuit 610 outputs a correction signal S CAL to the control circuit 120 according to the relationship between the change of the control signal S CTRL and the change of the output signal S OUT , so that the control circuit 120 determines the input signal according to the correction signal S CAL The relationship between S IN and the control signal S CTRL . In an implementation example, when the input signal S IN is a specific value (for example, when the amplitude of the input signal S IN is a specific amplitude), the calibration circuit 610 performs at least the following steps in sequence (as shown in FIG. 7 (Shown) to determine the relationship between the change of the control signal S CTRL and the change of the output signal S IN : Step S710: Make the control signal S CTRL change in a current direction. For example, the control signal S CTRL is a control voltage. In this step, the control signal S CTRL is increased/decreased by a predetermined voltage by one unit; for another example, the control signal S CTRL is composed of a plurality of levels ( For example: 00011 is used to control the five switches in the aforementioned capacitance path, where level 0 is used to make the switch non-conductive, and level 1 is used to make the switch conductive), this step changes a level of the control signal S CTRL ( For example: 00011à00111 or 00111à00011). Step S720: Perform a comparison operation to compare a current value derived from the output signal S OUT (for example: the digital feedback signal S FEEDBACK described below) with a previous value derived from the output signal S OUT (for example: the following The first digital feedback signal). After the current value generating the control signal S CTRL to a change in the latest, before the previous value produced in the last change of the control signal S CTRL. Step S730: If the current value is less than the previous value (which means that the signal of the proliferation becomes smaller, that is, the AM-PM distortion is reduced), keep the current direction unchanged; if the current value is greater than the previous value (which means that the proliferation The signal becomes larger, that is, the AM-PM distortion becomes serious), so that the current direction is updated to the opposite of the current direction. Step S740: Repeat steps S710 to S740 in sequence until the current direction has changed at least N times, and then output the calibration signal S CAL to indicate the best control signal S CTRL under the condition that the input signal S IN is the specific value Intensity or optimal level composition, where N is a positive integer. For example, if the current value is less than the previous value when the first comparison operation is performed, it means that the change direction of the control signal selected at the beginning is correct, then the N is a positive integer; if the first comparison operation is performed , The current value is greater than the previous value, which means that the change direction of the control signal selected at the beginning is wrong, and the N is a positive integer not less than 2. Through the above steps, the correction circuit 610 can find the best intensity or best level composition of the control signal S CTRL corresponding to each value of the input signal S IN .

圖8顯示圖6之校正電路610的一實施例。如圖8所示，校正電路610包含一自混頻混頻器（self-mixing mixer）810以及一適應性校準電路820。自混頻混頻器810依據該輸出訊號SOUT 或其衍生訊號產生一混頻訊號SMIX ，其中該輸出訊號SOUT 或其衍生訊號是同時作為一混頻輸入訊號SMIX_IN 以及一混頻器振盪訊號SMIX_LO ，以供該自混頻混頻器810據以產生該混頻訊號SMIX ，該混頻訊號SMIX 包含增生之訊號（例如：頻率為2f BB 之訊號，其中f BB 為該輸入訊號SIN 的頻率）。適應性校準電路820依據該控制訊號SCTRL 之變化與該混頻訊號SMIX 之變化之間的關係來輸出該校正訊號SCAL 至控制電路120。舉例而言，當該控制訊號SCTRL 增加達一個預設單位，若源自該混頻訊號SMIX 之一當前值小於儲存在適應性校準電路820中源自該混頻訊號SMIX 的一先前值（其產生於該控制訊號SCTRL 改變之前），適應性校準電路820輸出該校正訊號SCAL 以使控制電路120所輸出的該控制訊號SCTRL 再增加達一個預設單位；若該當前值大於該先前值，適應性校準電路820輸出該校正訊號SCAL 以使控制電路120所輸出的該控制訊號SCTRL 減少達一個預設單位。值得注意的是，為使該輸出訊號SOUT 的大小適合給校正電路610來處理，校正電路610可選擇性地包含一電阻（例如：可調電阻）（未顯示於圖），該電阻依據該輸出訊號SOUT 輸出一降壓訊號作為該輸出訊號SOUT 之衍生訊號，以供該自混頻混頻器810依據該降壓訊號產生該混頻訊號SMIX 。FIG. 8 shows an embodiment of the correction circuit 610 of FIG. 6. As shown in FIG. 8, the calibration circuit 610 includes a self-mixing mixer (self-mixing mixer) 810 and an adaptive calibration circuit 820. The self-mixing mixer 810 generates a mixing signal S MIX according to the output signal S OUT or its derivative signal, wherein the output signal S OUT or its derivative signal is simultaneously used as a mixing input signal S MIX_IN and a mixer The oscillating signal S MIX_LO is used by the self-mixing mixer 810 to generate the mixing signal S MIX . The mixing signal S MIX includes an accretionary signal (for example: a signal with a frequency of 2 f BB , where f BB is The frequency of the input signal S IN ). The adaptive calibration circuit 820 outputs the calibration signal S CAL to the control circuit 120 according to the relationship between the change of the control signal S CTRL and the change of the mixing signal S MIX . For example, when the control signal S CTRL to increase up to a predetermined unit, if the one from the current value is smaller than S MIX mixer signal from the mixer is stored in the adaptive calibration signal S MIX circuit 820 in a previously Value (which is generated before the control signal S CTRL changes), the adaptive calibration circuit 820 outputs the correction signal S CAL so that the control signal S CTRL output by the control circuit 120 increases by a preset unit; if the current value When the value is greater than the previous value, the adaptive calibration circuit 820 outputs the calibration signal S CAL to reduce the control signal S CTRL output by the control circuit 120 by a predetermined unit. It is worth noting that, in order to make the size of the output signal S OUT suitable for processing by the correction circuit 610, the correction circuit 610 may optionally include a resistor (for example, an adjustable resistor) (not shown in the figure), and the resistance is based on the The output signal S OUT outputs a step-down signal as a derivative signal of the output signal S OUT for the self-mixing mixer 810 to generate the mixing signal S MIX according to the step-down signal.

圖9a顯示圖8之自混頻混頻器810的一實施例，其中虛線代表寄生電容。由於圖9a所示之各元件為本領域之習知元件，本領域具有通常知識者能依圖9a來瞭解自混頻混頻器810的運作，其細節在此省略。FIG. 9a shows an embodiment of the self-mixing mixer 810 of FIG. 8, where the dashed line represents the parasitic capacitance. Since the components shown in FIG. 9a are conventional components in the art, those skilled in the art can understand the operation of the self-mixing mixer 810 according to FIG. 9a, and the details are omitted here.

圖9b顯示圖8之適應性校準電路820的一實施例。如圖9b所示，適應性校準電路820包含一增益控制器910、一類比至數位轉換器（ADC）920以及一比較暨校準電路930。增益控制器（例如：可變增益放大器（variable gain amplifier, VGA）依據該混頻訊號SMIX 產生一增益控制訊號SGAIN 。ADC 920依據該增益控制訊號SGAIN 產生一數位回授訊號SFEEDBACK 。比較暨校準電路930比較該數位回授訊號SFEEDBACK 以及一在前數位回授訊號（即先前產生的數位回授訊號SFEEDBACK ）以決定並輸出該校正訊號SCAL ；於完成比較該數位回授訊號SFEEDBACK 以及該在前數位回授訊號後，比較暨校準電路930將該數位回授訊號SFEEDBACK 作為該在前數位回授訊號以用於下一輪比較；於一實作範例中，比較暨校準電路930用來執行與圖7之步驟。FIG. 9b shows an embodiment of the adaptive calibration circuit 820 of FIG. 8. As shown in FIG. 9b, the adaptive calibration circuit 820 includes a gain controller 910, an analog-to-digital converter (ADC) 920, and a comparison and calibration circuit 930. A gain controller (for example, a variable gain amplifier (VGA)) generates a gain control signal S GAIN according to the mixing signal S MIX. The ADC 920 generates a digital feedback signal S FEEDBACK according to the gain control signal S GAIN . The comparison and calibration circuit 930 compares the digital feedback signal S FEEDBACK and a previous digital feedback signal (ie, the previously generated digital feedback signal S FEEDBACK ) to determine and output the calibration signal S CAL ; after the completion of the comparison of the digital feedback signal After the signal S FEEDBACK and the previous digital feedback signal, the comparison and calibration circuit 930 uses the digital feedback signal S FEEDBACK as the previous digital feedback signal for the next round of comparison; in an implementation example, the comparison and calibration circuit 930 The calibration circuit 930 is used to perform the steps shown in FIG. 7.

圖10顯示本發明之調幅調相失真之補償裝置的另一實施例。圖10之調幅調相失真之補償裝置1000包含一接收電路1010（例如：符合802.11a/b/g/n/ac規範之無線接收電路、藍牙接收電路、窄頻物聯網（Narrow Band Internet of Things, NBIOT）接收電路等等）以及一控制電路1020（例如：圖4之控制電路120）。接收電路1010包含一輸入電路1012、一相移調整電路1014（例如：可調電容）以及一射頻至基頻接收電路1016。輸入電路1012（例如：一可調電阻或一接腳）依據一射頻訊號SRF 產生一類比接收訊號SRF_A 。相移調整電路1014耦接輸入電路1012，依據一控制訊號SCTRL 調整類比接收訊號SRF_A 的相移。射頻至基頻接收電路1016依據該類比接收訊號SRF_A 產生一數位接收訊號SBB 。控制電路1020依據該數位接收訊號SBB 產生該控制訊號SCTRL ，該控制訊號SCTRL 隨著該數位接收訊號SBB 而變。Fig. 10 shows another embodiment of the compensation device for AM and phase distortion of the present invention. The compensation device 1000 for AM and phase distortion in Fig. 10 includes a receiving circuit 1010 (for example: a wireless receiving circuit conforming to 802.11a/b/g/n/ac specifications, a Bluetooth receiving circuit, and Narrow Band Internet of Things , NBIOT) receiving circuit, etc.) and a control circuit 1020 (for example: the control circuit 120 in Figure 4). The receiving circuit 1010 includes an input circuit 1012, a phase shift adjustment circuit 1014 (for example, an adjustable capacitor), and a radio frequency to baseband receiving circuit 1016. The input circuit 1012 (for example: an adjustable resistor or a pin) generates an analog receiving signal S RF_A according to a radio frequency signal S RF . The phase shift adjustment circuit 1014 is coupled to the input circuit 1012, and adjusts the phase shift of the analog received signal S RF_A according to a control signal S CTRL . The RF-to-baseband receiving circuit 1016 generates a digital receiving signal S BB according to the analog receiving signal S RF_A . The control circuit 1020 generates the control signal S CTRL according to the digital reception signal S BB , and the control signal S CTRL changes with the digital reception signal S BB .

圖11顯示圖10之射頻至基頻接收電路1016的一實施例。圖11之射頻至基頻接收電路1016包含：一混頻器1110依據該類比接收訊號SRF_A 產生一中頻訊號SIF 。一增益控制器1120（例如：可變增益放大器）依據該中頻訊號SIF 產生一增益控制訊號SGAIN ；以及一類比至數位轉換器（ADC）1130依據該增益控制訊號SGAIN 產生該數位接收訊號SBB 。FIG. 11 shows an embodiment of the RF-to-baseband receiving circuit 1016 of FIG. 10. The RF to baseband receiving circuit 1016 of FIG. 11 includes: a mixer 1110 generates an intermediate frequency signal S IF according to the analog received signal S RF_A . A gain controller 1120 (for example, a variable gain amplifier) generates a gain control signal S GAIN according to the intermediate frequency signal S IF ; and an analog-to-digital converter (ADC) 1130 generates the digital reception according to the gain control signal S GAIN The signal S BB .

圖12顯示本發明之調幅調相失真之補償裝置的另一實施例。相較於圖10，圖12之調幅調相失真之補償裝置1200進一步包含一校正電路1210（例如：圖9b之比較暨校準電路930）。校正電路1210依據該數位接收訊號SBB 之變化與該控制訊號SCTRL 之變化之間的關係來輸出一校正訊號SCAL 至控制電路1020，以使控制電路1020依據該校正訊號SCAL 決定該數位接收訊號SBB 與該控制訊號SCTRL 之間的關係。於一實作範例中，校正電路1210執行圖7之步驟，除了該輸入訊號SIN 由該射頻訊號SRF 取代、該輸入訊號SIN 的特定值由該射頻訊號SRF 的特定振幅取代、以及該輸出訊號SOUT 由該數位接收訊號SBB 取代。FIG. 12 shows another embodiment of the compensation device for AM and phase distortion of the present invention. Compared with FIG. 10, the compensation device 1200 for AM and phase distortion compensation in FIG. 12 further includes a correction circuit 1210 (for example, the comparison and calibration circuit 930 in FIG. 9b). The correction circuit 1210 outputs a correction signal S CAL to the control circuit 1020 according to the relationship between the change of the digital received signal S BB and the change of the control signal S CTRL , so that the control circuit 1020 determines the digital signal according to the correction signal S CAL The relationship between the received signal S BB and the control signal S CTRL . In an implementation example, the calibration circuit 1210 performs the steps of FIG. 7 except that the input signal S IN is replaced by the radio frequency signal S RF , the specific value of the input signal S IN is replaced by the specific amplitude of the radio frequency signal S RF , and The output signal S OUT is replaced by the digital reception signal S BB .

由於本領域具有通常知識者能夠參酌圖1~9b之實施例的揭露來瞭解圖10~12之實施例的實施細節與變化，因此，重複及冗餘之說明在此節略。Since those with ordinary knowledge in the art can refer to the disclosure of the embodiments of FIGS. 1 to 9b to understand the implementation details and changes of the embodiments of FIGS. 10 to 12, repetitive and redundant descriptions are omitted here.

綜上所述，相較於先前技術，本發明之調幅調相失真之補償裝置具有易於實施、成本經濟以及低功耗等優點。In summary, compared with the prior art, the compensation device for AM and phase distortion of the present invention has the advantages of easy implementation, economical cost, and low power consumption.

雖然本發明之實施例如上所述，然而該些實施例並非用來限定本發明，本技術領域具有通常知識者可依據本發明之明示或隱含之內容對本發明之技術特徵施以變化，凡此種種變化均可能屬於本發明所尋求之專利保護範疇，換言之，本發明之專利保護範圍須視本說明書之申請專利範圍所界定者為準。Although the embodiments of the present invention are as described above, these embodiments are not used to limit the present invention. Those skilled in the art can make changes to the technical features of the present invention based on the explicit or implicit content of the present invention. All such changes may belong to the scope of patent protection sought by the present invention. In other words, the scope of patent protection of the present invention shall be subject to the scope of the patent application in this specification.

100:調幅調相失真之補償裝置 110:傳送電路 120:控制電路 112:放大電路 114:相移調整電路 116:輸出電路 SIN:輸入訊號 SAMP:放大訊號 SCTRL:控制訊號 SOUT:輸出訊號 SIN_I:同相訊號 SIN_Q:正交相訊號 SAMP_1:第一放大訊號 SAMP_2:第二放大訊號 SCTRL_1:第一控制訊號 SCTRL_2:第二控制訊號 210:振盪源 220:第一DRAC（第一數位至射頻振幅轉換器） 230:第二DRAC（第二數位至射頻振幅轉換器） LO1:至少一第一振盪訊號 LO2:至少一第二振盪訊號 240:第一諧振電路 250:第二諧振電路 260:訊號合成器 SIN_D:數位音訊訊號 SIN_A:類比音訊訊號 310:DAC（數位至類比轉換器） 320:音訊放大器 330:可調電容 340:輸出接腳 410:計算電路 420:控制訊號產生電路 SIN_AMP:計算值 510:查表電路 520:DAC（數位至類比轉換器） 530:濾波電路 SCTRL_D:數位控制訊號 SA:類比訊號 600:調幅調相失真之補償裝置 610:校正電路 SCAL:校正訊號 S710~S740:步驟 810:自混頻混頻器 820:適應性校準電路 SMIX:混頻訊號 SMIX_IN:混頻輸入訊號 SMIX_LO:混頻器振盪訊號 910:增益控制器 920:ADC（類比至數位轉換器） 930:比較暨校準電路 SGAIN:增益控制訊號 SFEEDBACK:數位回授訊號 1000:調幅調相失真之補償裝置 1010:接收電路 1020:控制電路 1012:輸入電路 1014:相移調整電路 1016:射頻至基頻接收電路 SRF:射頻訊號 SRF_A:類比接收訊號 SBB:數位接收訊號 1110:混頻器 1120:增益控制器 1130:ADC（類比至數位轉換器） SIF:中頻訊號 SGAIN:增益控制訊號 1200:調幅調相失真之補償裝置 1210:校正電路100: Compensation device for amplitude modulation and phase modulation distortion 110: Transmission circuit 120: Control circuit 112: Amplification circuit 114: Phase shift adjustment circuit 116: Output circuit S IN : Input signal S AMP : Amplified signal S CTRL : Control signal S OUT : Output Signal S IN_I : In-phase signal S IN_Q : Quadrature-phase signal S AMP_1 : First amplified signal S AMP_2 : Second amplified signal S CTRL_1 : First control signal S CTRL_2 : Second control signal 210: Oscillation source 220: First DRAC (First Digital to RF Amplitude Converter) 230: Second DRAC (Second Digital to RF Amplitude Converter) LO 1 : at least one first oscillation signal LO 2 : at least one second oscillation signal 240: first resonance circuit 250 : Second resonance circuit 260: signal synthesizer S IN_D : digital audio signal S IN_A : analog audio signal 310: DAC (digital to analog converter) 320: audio amplifier 330: adjustable capacitor 340: output pin 410: calculation circuit 420: control signal generation circuit S IN_AMP: Calcd 510: look-up table circuit 520: DAC (digital to analog converter) 530: filter circuit S CTRL_D: digital control signal S A: the analog signal 600: amplitude and phase distortion of the compensating apparatus 610: Calibration circuit S CAL : Calibration signal S710~S740: Step 810: Self-mixing mixer 820: Adaptive calibration circuit S MIX : Mixing signal S MIX_IN : Mixing input signal S MIX_LO : Mixer oscillation signal 910 : Gain controller 920: ADC (analog to digital converter) 930: Comparison and calibration circuit S GAIN : Gain control signal S FEEDBACK : Digital feedback signal 1000: Amplitude and phase modulation distortion compensation device 1010: Receiving circuit 1020: Control circuit 1012: Input circuit 1014: Phase shift adjustment circuit 1016: RF to baseband receiving circuit S RF : RF signal S RF_A : Analog receiving signal S BB : Digital receiving signal 1110: Mixer 1120: Gain controller 1130: ADC (analog To digital converter) S IF : Intermediate frequency signal S GAIN : Gain control signal 1200: Amplitude and phase modulation distortion compensation device 1210: Correction circuit

［圖1］顯示本發明之調幅調相失真之補償裝置的一實施例； ［圖2］顯示圖1之傳送電路的一實施例； ［圖3］顯示圖1之傳送電路的另一實施例； ［圖4］顯示圖1之控制電路的一實施例； ［圖5］顯示圖4之控制訊號產生電路的一實施例； ［圖6］顯示本發明之調幅調相失真之補償裝置的另一實施例； ［圖7］顯示圖6之校正電路所執行的步驟； ［圖8］顯示圖6之校正電路的一實施例； ［圖9a］顯示圖8之自混頻混頻器的一實施例； ［圖9b］顯示圖8之適應性校準電路的一實施例； ［圖10］顯示本發明之調幅調相失真之補償裝置的另一實施例； ［圖11］顯示圖10之射頻至基頻接收電路的一實施例；以及 ［圖12］顯示本發明之調幅調相失真之補償裝置的另一實施例。[Figure 1] shows an embodiment of the compensation device for amplitude and phase modulation of the present invention; [Figure 2] shows an embodiment of the transmission circuit of Figure 1; [Figure 3] shows another embodiment of the transmission circuit of Figure 1; [Figure 4] shows an embodiment of the control circuit of Figure 1; [Figure 5] shows an embodiment of the control signal generating circuit of Figure 4; [Figure 6] shows another embodiment of the compensation device for amplitude and phase modulation of the present invention; [Figure 7] shows the steps performed by the calibration circuit in Figure 6; [Figure 8] shows an embodiment of the correction circuit of Figure 6; [Figure 9a] shows an embodiment of the self-mixing mixer of Figure 8; [Figure 9b] shows an embodiment of the adaptive calibration circuit of Figure 8; [Figure 10] shows another embodiment of the compensation device for AM and phase distortion of the present invention; [Figure 11] shows an embodiment of the RF to baseband receiving circuit of Figure 10; and [Figure 12] shows another embodiment of the compensation device for AM and phase distortion of the present invention.

100:調幅調相失真之補償裝置 100: Compensation device for AM and phase distortion

110:傳送電路 110: Transmission circuit

120:控制電路 120: control circuit

112:放大電路 112: Amplifying circuit

114:相移調整電路 114: Phase shift adjustment circuit

116:輸出電路 116: output circuit

SIN:輸入訊號 S IN : Input signal

SAMP:放大訊號 S AMP : Amplify the signal

SCTRL:控制訊號 S CTRL : Control signal

SOUT:輸出訊號 S OUT : output signal

Claims (5)

一種調幅調相（amplitude-modulation to phase-modulation, AM-PM）失真之補償裝置，包含： 一傳送電路，包含： 一放大電路，用來依據一輸入訊號輸出一放大訊號； 一相移調整電路包含一可調電容與一可調電感的至少其中之一，該相移調整電路設於該放大電路與一輸出電路之間，用來依據一控制訊號調整該放大訊號的相移（phase shift）；以及 該輸出電路，用來依據該放大訊號輸出一輸出訊號； 一控制電路，用來依據該輸入訊號產生該控制訊號，其中該控制訊號隨著該輸入訊號而變；以及 一校正電路，該校正電路用來依據該控制訊號之變化與該輸出訊號之變化之間的關係來輸出一校正訊號至該控制電路，以使該控制電路依據該校正訊號決定該輸入訊號與該控制訊號之間的關係，該校正電路包含： 一自混頻混頻器（self-mixing mixer），用來依據該輸出訊號或其衍生訊號產生一混頻訊號；以及 一適應性校準電路，用來依據該控制訊號之變化與該混頻訊號之變化之間的關係來輸出該校正訊號至該控制電路。An amplitude-modulation to phase-modulation (AM-PM) distortion compensation device, including: A transmission circuit, including: An amplifier circuit for outputting an amplified signal according to an input signal; A phase shift adjustment circuit includes at least one of an adjustable capacitor and an adjustable inductor. The phase shift adjustment circuit is arranged between the amplifying circuit and an output circuit for adjusting the phase of the amplified signal according to a control signal. Phase shift; and The output circuit is used to output an output signal according to the amplified signal; A control circuit for generating the control signal according to the input signal, wherein the control signal changes with the input signal; and A correction circuit for outputting a correction signal to the control circuit according to the relationship between the change of the control signal and the change of the output signal, so that the control circuit determines the input signal and the output signal according to the correction signal The relationship between control signals, the correction circuit includes: A self-mixing mixer for generating a mixing signal according to the output signal or its derivative signal; and An adaptive calibration circuit is used to output the calibration signal to the control circuit according to the relationship between the change of the control signal and the change of the mixing signal. 如申專利範圍第1項所述之調幅調相失真之補償裝置，其中該適應性校準電路包含： 一增益控制器，用來依據該混頻訊號產生一增益控制訊號； 一類比至數位轉換器，用來依據該增益控制訊號產生一數位回授訊號；以及 一比較暨校準電路，用來比較該數位回授訊號以及一在前數位回授訊號以決定並輸出該校正訊號。The compensation device for amplitude modulation and phase modulation distortion as described in item 1 of the scope of the patent application, wherein the adaptive calibration circuit includes: A gain controller for generating a gain control signal according to the mixing signal; An analog-to-digital converter for generating a digital feedback signal according to the gain control signal; and A comparison and calibration circuit is used to compare the digital feedback signal and a previous digital feedback signal to determine and output the calibration signal. 如申專利範圍第1項所述之調幅調相失真之補償裝置，其中該校正電路進一步包含一電阻，用來依據該輸出訊號輸出一降壓訊號作為該輸出訊號之衍生訊號，以供該自混頻混頻器依據該降壓訊號產生該混頻訊號。The compensation device for amplitude modulation and phase modulation distortion as described in item 1 of the scope of the patent application, wherein the correction circuit further includes a resistor for outputting a step-down signal according to the output signal as a derivative signal of the output signal for the self The mixing mixer generates the mixing signal according to the step-down signal. 如申專利範圍第1項所述之調幅調相失真之補償裝置，其中該輸出訊號或其衍生訊號是同時作為一混頻輸入訊號以及一混頻器振盪訊號，以供該自混頻混頻器依據該混頻輸入訊號與該混頻器振盪訊號產生該混頻訊號。The compensation device for amplitude modulation and phase modulation distortion as described in the scope of the patent application, wherein the output signal or its derivative signal is used as a mixing input signal and a mixer oscillation signal at the same time for the self-mixing The mixer generates the mixing signal according to the mixing input signal and the mixer oscillation signal. 如申請專利範圍第1項所述之調幅調相失真之補償裝置，其中在該輸入訊號為一特定值的情形下，該校正電路依序執行至少下列步驟以判斷該控制訊號之變化與該輸出訊號之變化之間的關係：令該控制訊號往一目前方向來變化；執行一比較作業，以比較源自該輸出訊號之一當前值與源自該輸出訊號之一先前值，其中該當前值產生於該控制訊號之最近一次的變化後，該先前值產生於該控制訊號之最近一次的變化前；若該當前值小於該先前值，保持該目前方向不變，若該當前值大於該先前值，令該目前方向更新為該目前方向的反相；依序重複上述步驟直到該目前方向改變達至少N次，接著輸出該校正訊號以指出在該輸入訊號為該特定值的情形下該控制訊號的最佳強度或最佳準位組成，其中該N為正整數。For the compensation device for AM and phase distortion as described in the first item of the scope of patent application, when the input signal is a specific value, the correction circuit sequentially executes at least the following steps to determine the change of the control signal and the output The relationship between the change of the signal: make the control signal change in a current direction; perform a comparison operation to compare a current value derived from the output signal with a previous value derived from the output signal, where the current value After the last change of the control signal, the previous value was generated before the last change of the control signal; if the current value is less than the previous value, keep the current direction unchanged, if the current value is greater than the previous Value, update the current direction to the inverse of the current direction; repeat the above steps in sequence until the current direction changes at least N times, and then output the correction signal to indicate the control when the input signal is the specific value The best strength or best level composition of the signal, where N is a positive integer.
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