TWI706556B - Mother board, display panel and manufacturing method of array substrate - Google Patents

Mother board, display panel and manufacturing method of array substrate Download PDF

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TWI706556B
TWI706556B TW108129888A TW108129888A TWI706556B TW I706556 B TWI706556 B TW I706556B TW 108129888 A TW108129888 A TW 108129888A TW 108129888 A TW108129888 A TW 108129888A TW I706556 B TWI706556 B TW I706556B
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arc
trajectory
substrate
shaped
display area
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TW108129888A
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Chinese (zh)
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TW202109868A (en
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李珉澤
鄭聖諺
翁嘉鴻
鍾岳宏
徐雅玲
廖烝賢
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友達光電股份有限公司
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Priority to CN202010139730.5A priority patent/CN111338114B/en
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133351—Manufacturing of individual cells out of a plurality of cells, e.g. by dicing
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13452—Conductors connecting driver circuitry and terminals of panels

Abstract

A mother board includes a substrate and pixel units on the substrate. A contour of an arrangement of the pixel units forms a first arc trajectory and a second arc trajectory. The first trajectory and the second arc trajectory have a misalignment value along a first direction therebetween. A first arc center of the first arc trajectory is different from a second arc center of the second arc trajectory. A radius curvature of the first arc trajectory is substantially different from a radius curvature of the second arc trajectory.

Description

母板、顯示面板與陣列基板的製造方法 Manufacturing method of mother board, display panel and array substrate

本揭露是關於一種母板、顯示面板與陣列基板的製造方法。 The disclosure relates to a manufacturing method of a motherboard, a display panel and an array substrate.

隨著光電技術與半導體製程技術之成熟，帶動了顯示器技術的發展。一般而言，顯示器具有顯示區與位於顯示區之外的邊框區，邊框區設有外接電路區與位於顯示區及外接電路區之間的佈線區。顯示區內包括配置有多個畫素單元的畫素陣列基板，畫素單元可透過佈線區與外接電路區來電性連接外部電路，以接收顯示時所需要的控制訊號與顯示資料訊號。現今的顯示器用範圍日益廣泛，例如可應用於公共顯示器，而導致了圓形顯示器的市場需求。 With the maturity of optoelectronic technology and semiconductor process technology, it has driven the development of display technology. Generally speaking, the display has a display area and a frame area outside the display area, and the frame area is provided with an external circuit area and a wiring area between the display area and the external circuit area. The display area includes a pixel array substrate configured with a plurality of pixel units, and the pixel units can be electrically connected to external circuits through the wiring area and the external circuit area to receive control signals and display data signals required for display. Nowadays, the range of displays is becoming more and more extensive, for example, it can be applied to public displays, which has led to the market demand for circular displays.

然而，目前一般圓形顯示器僅設計為可切割出單一尺寸。若透過切割同一套光罩製造出的畫素陣列基板，來得到不同尺寸的圓形顯示器，則可以大幅降低光罩成本，然而，因為要保留周圍訊號走線，故會導致邊框區的寬度增加，其屏占比隨著尺寸降低而急劇降低。 However, the current general circular display is only designed to be cut into a single size. If the pixel array substrates manufactured by cutting the same set of photomasks are used to obtain circular displays of different sizes, the cost of the photomask can be greatly reduced. However, because the surrounding signal traces need to be retained, the width of the frame area will increase , Its screen-to-body ratio decreases sharply as the size decreases.

本揭露提供一種母板、顯示面板與陣列基板的製造方法，其具有高屏占比。 The present disclosure provides a method for manufacturing a motherboard, a display panel, and an array substrate, which has a high screen-to-body ratio.

本揭露的母板包括基板以及畫素單元。畫素單元位於基板上。畫素單元的排列之輪廓構成第一弧形軌跡與第二弧形軌跡。第一弧形軌跡與第二弧形軌跡在第一方向上具有錯位量，第一弧形軌跡的第一弧心與第二弧形軌跡的第二弧心不同，且第一弧形軌跡之曲率半徑實質上不同於第二弧形軌跡之曲率半徑。 The motherboard of the present disclosure includes a substrate and a pixel unit. The pixel unit is located on the substrate. The contours of the arrangement of pixel units constitute a first arc-shaped trajectory and a second arc-shaped trajectory. The first arc-shaped trajectory and the second arc-shaped trajectory have a misalignment in the first direction. The first arc center of the first arc-shaped trajectory is different from the second arc center of the second arc-shaped trajectory. The radius of curvature is substantially different from the radius of curvature of the second arc-shaped track.

在本揭露的一實施例中，上述的第一弧形軌跡之曲率半徑實質上小於第二弧形軌跡之曲率半徑。 In an embodiment of the disclosure, the radius of curvature of the first arc-shaped track is substantially smaller than the radius of curvature of the second arc-shaped track.

在本揭露的一實施例中，上述的母板更包括驅動電路。驅動電路位於基板上。驅動電路與畫素單元電性連接。第一弧心比第二弧心更靠近驅動電路。 In an embodiment of the disclosure, the aforementioned motherboard further includes a driving circuit. The drive circuit is located on the substrate. The driving circuit is electrically connected to the pixel unit. The first arc center is closer to the driving circuit than the second arc center.

在本揭露的一實施例中，上述的母板更包括驅動電路。驅動電路位於基板上。驅動電路與畫素單元電性連接。第一弧心比第二弧心更遠離驅動電路。 In an embodiment of the disclosure, the aforementioned motherboard further includes a driving circuit. The drive circuit is located on the substrate. The driving circuit is electrically connected to the pixel unit. The first arc center is farther away from the driving circuit than the second arc center.

本揭露的顯示面板包括陣列基板、對向基板及顯示介質層。陣列基板包括基板、畫素單元、驅動電路及扇出線。基板具有顯示區與位於顯示區至少一側的佈線區。畫素單元位於顯示區及佈線區。畫素單元的排列之輪廓構成第一弧形軌跡與第二弧形軌跡。第一弧形軌跡與第二弧形軌跡於第一方向上具有錯位量，且第一弧形軌跡之曲率半徑實質上不同於第二弧 形軌跡之曲率半徑。驅動電路位於佈線區。扇出線位於佈線區。扇出線的第一端電性連接驅動電路。扇出線的第二端電性連接畫素單元。對向基板位於陣列基板之對向。顯示介質層位於陣列基板與對向基板之間。 The display panel of the present disclosure includes an array substrate, an opposite substrate and a display medium layer. The array substrate includes a substrate, a pixel unit, a driving circuit and a fan-out line. The substrate has a display area and a wiring area on at least one side of the display area. The pixel unit is located in the display area and the wiring area. The contours of the arrangement of pixel units constitute a first arc-shaped trajectory and a second arc-shaped trajectory. The first arc-shaped track and the second arc-shaped track have an offset in the first direction, and the radius of curvature of the first arc-shaped track is substantially different from that of the second arc The radius of curvature of the trajectory. The driving circuit is located in the wiring area. The fan-out line is located in the wiring area. The first end of the fan-out line is electrically connected to the driving circuit. The second end of the fan-out line is electrically connected to the pixel unit. The opposite substrate is located opposite to the array substrate. The display medium layer is located between the array substrate and the opposite substrate.

在本揭露的一實施例中，上述的扇出線中的兩相對最外側者的第二端之間的距離實質上小於位於第一弧形軌跡上之畫素單元中的兩相對最外側者之間的距離。 In an embodiment of the present disclosure, the distance between the second ends of the two opposite outermost ones of the fan-out lines is substantially smaller than the two opposite outermost ones of the pixel units located on the first arc-shaped track the distance between.

在本揭露的一實施例中，上述的顯示區之形狀為非矩形。 In an embodiment of the present disclosure, the shape of the aforementioned display area is non-rectangular.

在本揭露的一實施例中，上述的顯示區在基板的正投影面積實質上小於畫素單元在基板的正投影面積。 In an embodiment of the present disclosure, the orthographic projection area of the aforementioned display area on the substrate is substantially smaller than the orthographic projection area of the pixel unit on the substrate.

本揭露的陣列基板的製造方法包括以下步驟。提供母板，母板包括基板及畫素單元。畫素單元位於基板上。畫素單元的排列之輪廓構成第一弧形軌跡與第二弧形軌跡。第一弧形軌跡與第二弧形軌跡於第一方向上具有錯位量。第一弧形軌跡的第一弧心與第二弧形軌跡的第二弧心不同，且第一弧形軌跡之曲率半徑實質上不同於第二弧形軌跡之曲率半徑。於母板上定義預切割線。預切割線的形狀為非矩形。沿預切割線切割母板，以形成陣列基板。 The manufacturing method of the array substrate of the present disclosure includes the following steps. Provide a motherboard, the motherboard includes a substrate and pixel units. The pixel unit is located on the substrate. The contours of the arrangement of pixel units constitute a first arc-shaped trajectory and a second arc-shaped trajectory. The first arc-shaped track and the second arc-shaped track have an offset in the first direction. The first arc center of the first arc-shaped track is different from the second arc center of the second arc-shaped track, and the radius of curvature of the first arc-shaped track is substantially different from the radius of curvature of the second arc-shaped track. Define the pre-cut line on the motherboard. The shape of the pre-cut line is non-rectangular. The mother board is cut along the pre-cut line to form an array substrate.

在本揭露的一實施例中，上述的預切割線的中心重疊於第一弧心與第二弧心的至少其中之一。 In an embodiment of the present disclosure, the center of the aforementioned pre-cut line overlaps at least one of the first arc center and the second arc center.

基於上述，本發明一實施例的母板藉由設計第一弧形軌跡之曲率半徑實質上不同於第二弧形軌跡之曲率半徑，且第一弧形軌跡與第二弧形軌跡在第一方向上具有錯位 量，可以使小尺寸非矩形顯示區的屏占比近似於大尺寸非矩形顯示區的屏占比，達到可在相同母板上切割出具有不同非矩形顯示區尺寸之高屏占比的陣列基板的優點。 Based on the above, the motherboard of an embodiment of the present invention is designed to have a radius of curvature of the first arc-shaped track substantially different from that of the second arc-shaped track, and the first arc-shaped track and the second arc-shaped track are in the first Misalignment It can make the screen-to-body ratio of the small-size non-rectangular display area approximate to that of the large-size non-rectangular display area, so that high-screen-to-body ratio arrays with different non-rectangular display area sizes can be cut on the same motherboard The advantages of the substrate.

10‧‧‧母板 10‧‧‧Motherboard

100a、100b、100a’、100b’‧‧‧陣列基板 100a, 100b, 100a’, 100b’‧‧‧Array substrate

102‧‧‧基板 102‧‧‧Substrate

104‧‧‧畫素單元 104‧‧‧Pixel Unit

106‧‧‧扇出線 106‧‧‧Fanout line

108、108a、108b‧‧‧驅動電路 108, 108a, 108b‧‧‧Drive circuit

110‧‧‧第一弧形軌跡 110‧‧‧The first arc trajectory

110c‧‧‧第一弧心 110c‧‧‧First arc center

110r‧‧‧曲率半徑 110r‧‧‧Radius of curvature

112‧‧‧第二弧形軌跡 112‧‧‧The second arc trajectory

112c‧‧‧第二弧心 112c‧‧‧second arc center

112r‧‧‧曲率半徑 112r‧‧‧Radius of curvature

114‧‧‧預切割線 114‧‧‧Pre-cutting line

114c‧‧‧中心 114c‧‧‧Center

116‧‧‧預切割線 116‧‧‧Pre-cutting line

116c‧‧‧中心 116c‧‧‧Center

118‧‧‧第三弧形軌跡 118‧‧‧The third arc track

118c‧‧‧第三弧心 118c‧‧‧third arc center

118r‧‧‧曲率半徑 118r‧‧‧Radius of curvature

120‧‧‧第四弧形軌跡 120‧‧‧The fourth arc trajectory

120c‧‧‧第四弧心 120c‧‧‧The fourth arc center

120r‧‧‧曲率半徑 120r‧‧‧Radius of curvature

122‧‧‧預切割線 122‧‧‧Pre-cutting line

122c‧‧‧中心 122c‧‧‧Center

124‧‧‧預切割線 124‧‧‧Pre-cutting line

124c‧‧‧中心 124c‧‧‧Center

126‧‧‧對向基板 126‧‧‧Counter board

128‧‧‧顯示介質層 128‧‧‧Display medium layer

130‧‧‧彩色濾光層 130‧‧‧Color filter

132‧‧‧電極層 132‧‧‧electrode layer

200a、200b、200c、200d‧‧‧陣列基板 200a, 200b, 200c, 200d‧‧‧array substrate

300‧‧‧顯示面板 300‧‧‧Display Panel

AA1‧‧‧第一顯示區 AA1‧‧‧First display area

AA2‧‧‧第二顯示區 AA2‧‧‧Second display area

AA3‧‧‧第三顯示區 AA3‧‧‧Third display area

AA4‧‧‧第四顯示區 AA4‧‧‧The fourth display area

B‧‧‧接合區 B‧‧‧Joint Zone

Ba‧‧‧第一子接合區 Ba‧‧‧First sub-junction area

Bb‧‧‧第二子接合區 Bb‧‧‧Second sub junction area

D1‧‧‧第一方向 D1‧‧‧First direction

D2‧‧‧第二方向 D2‧‧‧Second direction

L1、L1’、L1”、L2、L2’、L2”、L3、L4‧‧‧距離 L1, L1’, L1”, L2, L2’, L2”, L3, L4‧‧‧Distance

M1、M2、M3、M4‧‧‧錯位量 M1, M2, M3, M4‧‧‧Displacement

NA1‧‧‧第一非顯示區 NA1‧‧‧The first non-display area

NA2‧‧‧第二非顯示區 NA2‧‧‧The second non-display area

NA3‧‧‧第三非顯示區 NA3‧‧‧The third non-display area

NA4‧‧‧第四非顯示區 NA4‧‧‧The fourth non-display area

O1、O2、O3、O4‧‧‧點 O1, O2, O3, O4‧‧‧ points

S1、S2‧‧‧距離 S1, S2‧‧‧Distance

W‧‧‧佈線區 W‧‧‧Wiring area

Wa‧‧‧第一子佈線區 Wa‧‧‧The first sub-wiring area

Wb‧‧‧第二子佈線區 Wb‧‧‧Second sub-wiring area

閱讀以下詳細敘述並搭配對應之圖式，可了解本揭露之多個樣態。需留意的是，圖式中的多個特徵並未依照該業界領域之標準作法繪製實際比例。事實上，所述之特徵的尺寸可以任意的增加或減少以利於討論的清晰性。 Read the following detailed description and match the corresponding drawings to understand many aspects of this disclosure. It should be noted that many of the features in the drawing are not drawn in actual proportions according to the standard practice in the industry. In fact, the size of the feature can be increased or decreased arbitrarily to facilitate the clarity of the discussion.

第1A圖至第1C圖是依照本發明一實施例的陣列基板的製造方法的上視示意圖。 1A to 1C are schematic top views of a manufacturing method of an array substrate according to an embodiment of the present invention.

第2A圖至第2C圖是依照本發明一實施例的陣列基板的製造方法的上視示意圖。 2A to 2C are schematic top views of a manufacturing method of an array substrate according to an embodiment of the invention.

第3A圖至第3F圖是依照本發明一實施例的陣列基板的製造方法的上視示意圖。 3A to 3F are schematic top views of a manufacturing method of an array substrate according to an embodiment of the present invention.

第4圖是依照本發明一實施例的顯示面板的剖面示意圖。 FIG. 4 is a schematic cross-sectional view of a display panel according to an embodiment of the invention.

以下將以圖式及詳細說明清楚說明本揭露之精神，任何所屬技術領域中具有通常知識者在瞭解本揭露之實施例後，當可由本揭露所教示之技術，加以改變及修飾，其並不脫離本揭露之精神與範圍。舉例而言，敘述「第一特徵形成於第二特徵上方或上」，於實施例中將包含第一特徵及第二特徵具有直接接觸；且也將包含第一特徵和第二特徵為非直接接 觸，具有額外的特徵形成於第一特徵和第二特徵之間。此外，本揭露在多個範例中將重複使用元件標號以和/或文字。重複的目的在於簡化與釐清，而其本身並不會決定多個實施例以和/或所討論的配置之間的關係。 The following will clearly illustrate the spirit of the present disclosure with drawings and detailed descriptions. Anyone with ordinary knowledge in the relevant technical field can change and modify the techniques taught in the present disclosure after understanding the embodiments of the present disclosure. Depart from the spirit and scope of this disclosure. For example, the statement that "the first feature is formed on or on the second feature" will include the first feature and the second feature having direct contact; and will also include the first feature and the second feature being indirect Pick up Touch, with additional features formed between the first feature and the second feature. In addition, the present disclosure will reuse component numbers and/or text in multiple examples. The purpose of repetition is to simplify and clarify, and it does not determine the relationship between multiple embodiments and/or the discussed configurations.

此外，方位相對詞彙，如「在...之下」、「下面」、「下」、「上方」或「上」或類似詞彙，在本文中為用來便於描述繪示於圖式中的一個元件或特徵至另外的元件或特徵之關係。方位相對詞彙除了用來描述裝置在圖式中的方位外，其包含裝置於使用或操作下之不同的方位。當裝置被另外設置(旋轉90度或者其他面向的方位)，本文所用的方位相對詞彙同樣可以相應地進行解釋。 In addition, relative terms such as "below", "below", "below", "above" or "up" or similar terms are used in this article to facilitate the description of the words shown in the diagram The relationship of one element or feature to another element or feature. In addition to describing the position of the device in the diagram, the relative position vocabulary includes the different positions of the device under use or operation. When the device is additionally set (rotated by 90 degrees or other facing orientation), the relative terms of the orientation used in this article can also be explained accordingly.

第1A圖至第1C圖是依照本發明一實施例的陣列基板100a、100b的製造方法的上視示意圖。為求清晰，第1A圖至第1C圖僅示意性地繪示母板10的畫素單元104及與其連接的佈線區W，並繪示佈線區W的局部放大圖。請參照第1A圖。首先，提供母板10。母板10包括基板102、多個畫素單元104、扇出線106與驅動電路108。基板102之材質可為玻璃、石英、有機聚合物或是不透光或反射材料(例如金屬)等。 1A to 1C are schematic top views of a method of manufacturing array substrates 100a, 100b according to an embodiment of the present invention. For clarity, FIGS. 1A to 1C only schematically show the pixel unit 104 of the motherboard 10 and the wiring area W connected to it, and show a partial enlarged view of the wiring area W. Please refer to Figure 1A. First, the motherboard 10 is provided. The motherboard 10 includes a substrate 102, a plurality of pixel units 104, a fan-out line 106 and a driving circuit 108. The material of the substrate 102 can be glass, quartz, organic polymer, or opaque or reflective material (such as metal).

畫素單元104例如是沿第一方向D1與第二方向D2呈陣列配置，舉例而言，第一方向D1與第二方向D2相交。於本實施例中，第一方向D1實質上垂直於第二方向D2。驅動電路108位於基板102上，驅動電路108與畫素單元104透過扇出線106互相電性連接。舉例而言，扇出線106的第一端電性連接驅動電路108，扇出線106的第二端電性連接畫素單元104。 扇出線106彼此不相交的沿著佈線區W分布，並且集中於接合區B。 The pixel units 104 are, for example, arranged in an array along the first direction D1 and the second direction D2. For example, the first direction D1 and the second direction D2 intersect. In this embodiment, the first direction D1 is substantially perpendicular to the second direction D2. The driving circuit 108 is located on the substrate 102, and the driving circuit 108 and the pixel unit 104 are electrically connected to each other through the fan-out line 106. For example, the first end of the fan-out line 106 is electrically connected to the driving circuit 108, and the second end of the fan-out line 106 is electrically connected to the pixel unit 104. The fan-out lines 106 are distributed along the wiring area W without intersecting each other, and are concentrated in the junction area B.

畫素單元104的排列之輪廓構成至少二個弧形軌跡。於本實施例中，畫素單元104的排列之輪廓構成第一弧形軌跡110與第二弧形軌跡112，第一弧形軌跡110與第二弧形軌跡112相交，舉例而言，第一弧形軌跡110與第二弧形軌跡112相交於二點O1、O2。第一弧形軌跡110的第一弧心110c與第二弧形軌跡112的第二弧心112c不同。於本實施例中，第一弧形軌跡110與第二弧形軌跡112在第一方向D1上具有錯位量M1，且第一弧形軌跡110之曲率半徑110r實質上不同於第二弧形軌跡112之曲率半徑112r。第一弧形軌跡110定義出第一顯示區AA1，第二弧形軌跡112定義出第二顯示區AA2，第一顯示區AA1與第二顯示區AA2部分重疊。於本實施例中，第一弧形軌跡110之曲率半徑110r實質上小於第二弧形軌跡112之曲率半徑112r，也就是說，第一顯示區AA1的面積實質上小於第二顯示區AA2的面積。於一實施例中，第一弧形軌跡110之曲率半徑110r在約35公分至約45公分的範圍中，第二弧形軌跡112之曲率半徑112r在約45公分至約55公分的範圍中。 The outline of the arrangement of the pixel units 104 constitutes at least two arc-shaped tracks. In this embodiment, the outline of the arrangement of the pixel units 104 constitutes a first arc-shaped trajectory 110 and a second arc-shaped trajectory 112, and the first arc-shaped trajectory 110 and the second arc-shaped trajectory 112 intersect, for example, the first The arc-shaped trajectory 110 and the second arc-shaped trajectory 112 intersect at two points O1 and O2. The first arc center 110c of the first arc-shaped track 110 is different from the second arc center 112c of the second arc-shaped track 112. In this embodiment, the first arc-shaped track 110 and the second arc-shaped track 112 have an offset M1 in the first direction D1, and the curvature radius 110r of the first arc-shaped track 110 is substantially different from the second arc-shaped track The radius of curvature of 112 is 112r. The first arc-shaped track 110 defines a first display area AA1, the second arc-shaped track 112 defines a second display area AA2, and the first display area AA1 partially overlaps the second display area AA2. In this embodiment, the radius of curvature 110r of the first arc-shaped track 110 is substantially smaller than the radius of curvature 112r of the second arc-shaped track 112, that is, the area of the first display area AA1 is substantially smaller than that of the second display area AA2. area. In one embodiment, the radius of curvature 110r of the first arc-shaped track 110 is in the range of about 35 cm to about 45 cm, and the radius of curvature 112r of the second arc-shaped track 112 is in the range of about 45 cm to about 55 cm.

接著，於母板10上定義對應於第一顯示區AA1的預切割線114與對應於第二顯示區AA2的預切割線116。預切割線114及預切割線116在第一方向D1上具有錯位量M2。預切割線114的形狀為非矩形，於本實施例中，預切割線114的形狀為圓形。預切割線114的中心114c重疊於第一弧心110c。預切割線114線通過多個畫素單元104，舉例而言，預切割線114經過 的多個畫素單元104為非矩形排列。於本實施例中，預切割線114經過的多個畫素單元104為環狀的排列。舉例而言，預切割線114經過的多個畫素單元104與第一弧心110c的距離實質上相等。 Next, a pre-cut line 114 corresponding to the first display area AA1 and a pre-cut line 116 corresponding to the second display area AA2 are defined on the motherboard 10. The pre-cut line 114 and the pre-cut line 116 have an offset amount M2 in the first direction D1. The shape of the pre-cut line 114 is non-rectangular, and in this embodiment, the shape of the pre-cut line 114 is a circle. The center 114c of the pre-cut line 114 overlaps the first arc center 110c. The pre-cut line 114 passes through a plurality of pixel units 104, for example, the pre-cut line 114 passes The plurality of pixel units 104 are arranged in a non-rectangular manner. In this embodiment, the plurality of pixel units 104 through which the pre-cut line 114 passes are arranged in a ring shape. For example, the distance between the pixel units 104 passed by the pre-cut line 114 and the first arc center 110c is substantially equal.

若想要得到具有小尺寸非矩形顯示區(例如第一顯示區AA1)之陣列基板100a(見第1B圖)，可以沿預切割線114切割母板10。若想要得到具有大尺寸非矩形顯示區(例如第二顯示區AA2)之陣列基板100b(見第1C圖)，可以沿預切割線116切割母板10。二個尺寸的非矩形顯示區(例如第一顯示區AA1及第二顯示區AA2)是由同一道光罩所形成，在毋須額外的光罩的情況下，母板10至少可提供二種尺寸的非矩形顯示區的陣列基板(例如第1B圖的陣列基板100a與第1C圖的陣列基板100b)，如此一來，不僅達到具有非矩形顯示區之陣列基板尺寸彈性化的優點，還可降低製造成本。 If it is desired to obtain the array substrate 100a (see FIG. 1B) with a small non-rectangular display area (such as the first display area AA1), the motherboard 10 can be cut along the pre-cut line 114. If it is desired to obtain the array substrate 100b (see FIG. 1C) with a large non-rectangular display area (for example, the second display area AA2), the mother board 10 can be cut along the pre-cut line 116. Two sizes of non-rectangular display areas (for example, the first display area AA1 and the second display area AA2) are formed by the same mask. Without the need for additional masks, the motherboard 10 can provide at least two sizes Array substrates with non-rectangular display areas (such as the array substrate 100a in Figure 1B and the array substrate 100b in Figure 1C), in this way, not only achieves the advantages of flexible size of the array substrate with non-rectangular display areas, but also reduces manufacturing cost.

第1B圖與第1C圖繪示第1A圖的母板10切割後的上視示意圖。請先同時參照第1A圖與第1B圖，沿預切割線114切割母板10，以得到陣列基板100a。切割的方法例如為利用刀具(未繪示)、雷射(未繪示)、或其他合適的用具、或前述之組合。陣列基板100a具有第一顯示區AA1，陣列基板100a的輪廓與預切割線114的輪廓相同，陣列基板100a的輪廓與第一顯示區AA1之間的區域構成第一非顯示區NA1。第一顯示區AA1在基板102的正投影面積實質上小於畫素單元104在基板102的正投影面積。第一非顯示區NA1包括佈線區W與部分的畫素單元104。透過設計第一弧形軌跡110與第二弧形軌跡112在第 一方向D1上具有錯位量M1(見第1A圖)，可以縮短陣列基板100a之輪廓與第一弧形軌跡110之間的距離L1，換言之，可以降低第一非顯示區NA1在基板102上的正投影面積，如此一來，可以提高陣列基板100a的屏占比。於一實施例中，陣列基板100a之輪廓與第一弧形軌跡110之間的距離L1在約2公分至約2.5公分的範圍中。 1B and 1C show schematic top views of the mother board 10 in FIG. 1A after being cut. Please refer to FIG. 1A and FIG. 1B at the same time, and cut the mother board 10 along the pre-cut line 114 to obtain the array substrate 100a. The cutting method is, for example, using a knife (not shown), a laser (not shown), or other suitable tools, or a combination of the foregoing. The array substrate 100a has a first display area AA1, the contour of the array substrate 100a is the same as the contour of the pre-cut line 114, and the area between the contour of the array substrate 100a and the first display area AA1 constitutes the first non-display area NA1. The orthographic projection area of the first display area AA1 on the substrate 102 is substantially smaller than the orthographic projection area of the pixel unit 104 on the substrate 102. The first non-display area NA1 includes the wiring area W and part of the pixel unit 104. By designing the first arc-shaped trajectory 110 and the second arc-shaped trajectory 112 in the first There is a misalignment amount M1 in one direction D1 (see Figure 1A), which can shorten the distance L1 between the outline of the array substrate 100a and the first arc-shaped track 110, in other words, can reduce the first non-display area NA1 on the substrate 102 The front projection area, in this way, can increase the screen-to-body ratio of the array substrate 100a. In one embodiment, the distance L1 between the contour of the array substrate 100a and the first arc-shaped track 110 is in the range of about 2 cm to about 2.5 cm.

於本實施例中，扇出線106(參照第1A圖)中的兩相對最外側者的第二端之間的距離S1實質上小於位於第一弧形軌跡110上之畫素單元104中的兩相對最外側者之間的距離S2。換言之，位於母板10之相對兩側之扇出線106之間在第二方向D2上的最大距離S1實質上小於畫素單元104之間在第二方向D2上的最大距離S2。如此一來，可確保當沿預切割線114切割母板10以得到具有小尺寸非矩形顯示區(例如第一顯示區AA1)之陣列基板100a時，預切割線114免於通過扇出線106，如此一來，可同時達到縮減母板10可切割出的非矩形顯示區之最小尺寸(例如第一弧形軌跡110的曲率直徑)，以及小尺寸陣列基板100a具有高屏占比的優點。 In this embodiment, the distance S1 between the second ends of the two opposite outermost ones in the fan-out line 106 (refer to Figure 1A) is substantially smaller than that in the pixel unit 104 located on the first arc-shaped track 110 The distance S2 between the two opposite outermost ones. In other words, the maximum distance S1 in the second direction D2 between the fan-out lines 106 located on opposite sides of the motherboard 10 is substantially smaller than the maximum distance S2 between the pixel units 104 in the second direction D2. In this way, it can be ensured that when the mother board 10 is cut along the pre-cut line 114 to obtain the array substrate 100a with a small non-rectangular display area (for example, the first display area AA1), the pre-cut line 114 is prevented from passing through the fan-out line 106 In this way, the minimum size of the non-rectangular display area that can be cut by the motherboard 10 (such as the curvature diameter of the first arc-shaped track 110) can be reduced, and the small-size array substrate 100a has the advantage of high screen-to-body ratio.

接著請同時參照第1A圖與第1C圖，亦可沿預切割線116切割母板10，以得到陣列基板100b。切割的方法可如第1B圖的切割方法。於本實施例中，預切割線116的形狀為非矩形，其中預切割線116不通過畫素單元104。預切割線116的中心116c重疊於第二弧心112c。陣列基板100b具有第二顯示區AA2，陣列基板100b的輪廓與預切割線116的輪廓相同，陣列基板100b的輪廓與第二顯示區AA2之間的區域構成第二非 顯示區NA2。於本實施例中，非顯示區包括佈線區W且不具有畫素單元104。透過設計第一弧形軌跡110與第二弧形軌跡112在第一方向D1上具有錯位量M1(見第1A圖)，可以降低陣列基板100a之輪廓與第一弧形軌跡110之間的距離L1(見第1B圖)與陣列基板100b之輪廓與第二弧形軌跡112之間的距離L2之間的大小差距，換言之，可以使小尺寸非矩形顯示區(例如第一顯示區AA1)的屏占比近似於大尺寸非矩形顯示區(例如第二顯示區AA2)的屏占比，達到可在相同母板10上切割出具有不同非矩形顯示區尺寸之高屏占比的陣列基板100a、100b的優點。於一實施例中，陣列基板100b之輪廓與第二弧形軌跡112之間的距離L2在約2公分至約2.5公分的範圍中。 Next, referring to FIG. 1A and FIG. 1C at the same time, the motherboard 10 can also be cut along the pre-cut line 116 to obtain the array substrate 100b. The cutting method can be as the cutting method in Figure 1B. In this embodiment, the shape of the pre-cut line 116 is non-rectangular, and the pre-cut line 116 does not pass through the pixel unit 104. The center 116c of the pre-cut line 116 overlaps the second arc center 112c. The array substrate 100b has a second display area AA2, the contour of the array substrate 100b is the same as the contour of the pre-cut line 116, and the area between the contour of the array substrate 100b and the second display area AA2 constitutes a second non- Display area NA2. In this embodiment, the non-display area includes the wiring area W and does not have the pixel unit 104. By designing the first arc-shaped track 110 and the second arc-shaped track 112 to have an offset M1 in the first direction D1 (see Figure 1A), the distance between the contour of the array substrate 100a and the first arc-shaped track 110 can be reduced The size difference between L1 (see Figure 1B) and the distance L2 between the outline of the array substrate 100b and the second arc-shaped track 112, in other words, can make the small size non-rectangular display area (such as the first display area AA1) The screen-to-body ratio is similar to the screen-to-body ratio of a large-size non-rectangular display area (for example, the second display area AA2), so that high-screen-to-body ratio array substrates 100a with different non-rectangular display area sizes can be cut on the same motherboard 10 , The advantages of 100b. In one embodiment, the distance L2 between the contour of the array substrate 100b and the second arc-shaped track 112 is in the range of about 2 cm to about 2.5 cm.

第2A圖至第2C圖是依照本發明一實施例的陣列基板100a’、100b’的製造方法的上視示意圖。其與第1A圖至第1C圖所示的實施例的主要差異在母板10具有第一子佈線區Wa、第二子佈線區Wb、第一子接合區Ba、第二子接合區Bb、第一驅動電路108a與第二驅動電路108b。與第1A圖至第1C圖類似的步驟與元件於此不再重複說明。請先參照第2A圖，扇出線106彼此不相交的沿著第一子佈線區Wa與第二子佈線區Wb分布，並且各集中於第一子接合區Ba與第二子接合區Bb。第二驅動電路108b位於基板102上，第二驅動電路108b與畫素單元104透過扇出線106互相電性連接。舉例而言，扇出線106的第一端電性連接驅動電路108，扇出線106的第二端電性連接畫素單元104。第一子佈線區Wa與第二子佈線區Wb在第一方向D1上分開，第一子接合區Ba與第二子接合區Bb在第一方向D1 上分開。換言之，畫素單元104位於第一子佈線區Wa與第二子佈線區Wb之間，且畫素單元104位於第一子接合區Ba與第二子接合區Bb之間。第一弧心110c比第二弧心112c更遠離第二驅動電路108b。第二弧心112c比第一弧心110c更遠離第一驅動電路108a。由於第1A圖之佈線區W拆成第一子佈線區Wa與第二子佈線區Wb，因此第一子佈線區Wa相較於第1A圖之佈線區W具有降低的面積，且第二子佈線區Wb相較於第1A圖之佈線區W具有降低的面積。於本實施例中，第一弧形軌跡110之曲率半徑110r在約35公分至約45公分的範圍中，第二弧形軌跡112之曲率半徑112r在約65公分至約75公分的範圍中。 2A to 2C are schematic top views of a method of manufacturing the array substrate 100a', 100b' according to an embodiment of the present invention. The main difference from the embodiment shown in FIGS. 1A to 1C is that the motherboard 10 has a first sub-wiring area Wa, a second sub-wiring area Wb, a first sub-bonding area Ba, a second sub-bonding area Bb, The first driving circuit 108a and the second driving circuit 108b. Steps and components similar to those in FIG. 1A to FIG. 1C will not be repeated here. Please refer to FIG. 2A first, the fan-out lines 106 are distributed along the first sub-wiring area Wa and the second sub-wiring area Wb without intersecting each other, and are concentrated in the first sub-bonding area Ba and the second sub-bonding area Bb. The second driving circuit 108 b is located on the substrate 102, and the second driving circuit 108 b and the pixel unit 104 are electrically connected to each other through the fan-out line 106. For example, the first end of the fan-out line 106 is electrically connected to the driving circuit 108, and the second end of the fan-out line 106 is electrically connected to the pixel unit 104. The first sub-wiring area Wa and the second sub-wiring area Wb are separated in the first direction D1, and the first sub-wiring area Ba and the second sub-wiring area Bb are in the first direction D1. On separate. In other words, the pixel unit 104 is located between the first sub wiring area Wa and the second sub wiring area Wb, and the pixel unit 104 is located between the first sub bonding area Ba and the second sub bonding area Bb. The first arc center 110c is farther away from the second driving circuit 108b than the second arc center 112c. The second arc center 112c is farther away from the first driving circuit 108a than the first arc center 110c. Since the wiring area W in FIG. 1A is split into a first sub-wiring area Wa and a second sub-wiring area Wb, the first sub-wiring area Wa has a reduced area compared to the wiring area W in FIG. 1A, and the second sub-wiring area The wiring area Wb has a reduced area compared to the wiring area W in FIG. 1A. In this embodiment, the radius of curvature 110r of the first arc-shaped track 110 is in the range of about 35 cm to about 45 cm, and the radius of curvature 112r of the second arc-shaped track 112 is in the range of about 65 cm to about 75 cm.

第2B圖與第2C圖繪示第2A圖的母板10切割後的上視示意圖。請先同時參照第2A圖與第2B圖，沿預切割線114切割母板10，以得到陣列基板100a’。第一子佈線區Wa具有降低的面積。如此一來，可以提高陣列基板100a’的屏占比。於一實施例中，陣列基板100a’之輪廓與第一弧形軌跡110之間的距離L1’在約2公分至約2.5公分的範圍中。 2B and 2C are schematic top views of the mother board 10 of FIG. 2A after being cut. Please refer to FIG. 2A and FIG. 2B at the same time, and cut the mother board 10 along the pre-cut line 114 to obtain the array substrate 100a'. The first sub-wiring area Wa has a reduced area. In this way, the screen-to-body ratio of the array substrate 100a' can be increased. In one embodiment, the distance L1' between the outline of the array substrate 100a' and the first arc-shaped track 110 is in the range of about 2 cm to about 2.5 cm.

接著請同時參照第2A圖與第2C圖，亦可沿預切割線116切割母板10，以得到陣列基板100b’。第一子佈線區Wa具有降低的面積。換言之，可以使小尺寸非矩形顯示區(例如第一顯示區AA1)的屏占比近似於大尺寸非矩形顯示區(例如第二顯示區AA2)的屏占比，達到可在相同母板10上切割出具有不同非矩形顯示區尺寸之高屏占比的陣列基板100a’、100b’的優點。於一實施例中，陣列基板100b’之輪廓與第二弧形軌跡112之間的距離L2’在約1公分至約2公分的範圍中。 Next, referring to FIG. 2A and FIG. 2C at the same time, the motherboard 10 can also be cut along the pre-cut line 116 to obtain the array substrate 100b'. The first sub-wiring area Wa has a reduced area. In other words, the screen-to-body ratio of the small non-rectangular display area (for example, the first display area AA1) can be approximated to the screen-to-body ratio of the large non-rectangular display area (for example, the second display area AA2), which can be used on the same motherboard 10 The advantages of cutting out array substrates 100a', 100b' with different non-rectangular display area sizes with high screen-to-body ratio. In one embodiment, the distance L2' between the contour of the array substrate 100b' and the second arc-shaped track 112 is in the range of about 1 cm to about 2 cm.

第3A圖至第3F圖是依照本發明一實施例的陣列基板的製造方法的上視示意圖。其與第1A圖至第1C圖所示的實施例的主要差異在母板10具有第一子佈線區Wa、第二子佈線區Wb、第一子接合區Ba、第二子接合區Bb、第一驅動電路108a與第二驅動電路108b，且其畫素單元104的排列之輪廓還構成第三弧形軌跡118與第四弧形軌跡120。與第1A圖至第1C圖類似的步驟與元件於此不再重複說明，第一子佈線區Wa與第二子佈線區Wb的配置類似於第2A圖，於此亦不再贅述。 3A to 3F are schematic top views of a manufacturing method of an array substrate according to an embodiment of the present invention. The main difference from the embodiment shown in FIGS. 1A to 1C is that the motherboard 10 has a first sub-wiring area Wa, a second sub-wiring area Wb, a first sub-bonding area Ba, a second sub-bonding area Bb, The contours of the first driving circuit 108a and the second driving circuit 108b, and the arrangement of the pixel units 104 also constitute a third arc-shaped track 118 and a fourth arc-shaped track 120. The steps and components similar to those in FIG. 1A to FIG. 1C will not be repeated here. The configuration of the first sub-wiring area Wa and the second sub-wiring area Wb is similar to that in FIG. 2A, and will not be repeated here.

第3A圖及第3B圖為相同母板10的俯視示意圖。為求清晰，第3B圖省略畫素單元104、第一子佈線區Wa、第二子佈線區Wb、第一子接合區Ba、第二子接合區Bb、第一驅動電路108a與第二驅動電路108b，請同時參照第3A圖及第3B圖，第三弧形軌跡118的曲率半徑118r與第四弧軌跡120的曲率半徑120r實質上大於第一弧形軌跡110的曲率半徑110r且大於第二弧形軌跡112的曲率半徑112r。第三弧形軌跡118與第四弧形軌跡120相交，舉例而言，第三弧形軌跡118與第四弧形軌跡120相交於二點O3、O4。第三弧形軌跡118的第三弧心118c與第四弧形軌跡120的第四弧心120c不同。於本實施例中，第三弧形軌跡118與第四弧形軌跡120在第一方向D1上具有錯位量M3，且第三弧形軌跡118之曲率半徑118r實質上不同於第四弧形軌跡120之曲率半徑120r。第三弧形軌跡118定義出第三顯示區AA3，第四弧形軌跡120定義出第四顯示區AA4，第三顯示區AA3與第四顯示區AA4部分重疊。於本實施例中，第四弧形軌跡120之曲率半徑120r實質上大於第三弧形軌跡118之曲 率半徑118r，也就是說，第四顯示區AA4的面積實質上大於第三顯示區AA3的面積。於一實施例中，第三弧形軌跡118之曲率半徑118r在約55公分至約65公分的範圍中，第四弧形軌跡120之曲率半徑120r在約65公分至約75公分的範圍中。接著，於母板10上定義對應於第三顯示區AA3的預切割線122與對應於第四顯示區AA4的預切割線124，且預切割線122、124不通過扇出走線。預切割線122、124在第一方向D1上具有錯位量M4。 3A and 3B are schematic top views of the same motherboard 10. For clarity, the pixel unit 104, the first sub-wiring area Wa, the second sub-wiring area Wb, the first sub-bonding area Ba, the second sub-bonding area Bb, the first driving circuit 108a and the second driving are omitted in Figure 3B. Circuit 108b, please refer to Figures 3A and 3B at the same time. The radius of curvature 118r of the third arc track 118 and the radius of curvature 120r of the fourth arc track 120 are substantially greater than the radius of curvature 110r of the first arc track 110 and greater than the first arc track 110. The radius of curvature 112r of the two-arc trajectory 112. The third arc-shaped trajectory 118 and the fourth arc-shaped trajectory 120 intersect. For example, the third arc-shaped trajectory 118 and the fourth arc-shaped trajectory 120 intersect at two points O3 and O4. The third arc center 118 c of the third arc-shaped trajectory 118 is different from the fourth arc center 120 c of the fourth arc-shaped trajectory 120. In this embodiment, the third arc-shaped track 118 and the fourth arc-shaped track 120 have an offset M3 in the first direction D1, and the curvature radius 118r of the third arc-shaped track 118 is substantially different from the fourth arc-shaped track The radius of curvature of 120 is 120r. The third arc track 118 defines the third display area AA3, the fourth arc track 120 defines the fourth display area AA4, and the third display area AA3 partially overlaps the fourth display area AA4. In this embodiment, the radius of curvature 120r of the fourth arc-shaped track 120 is substantially greater than that of the third arc-shaped track 118 The rate radius 118r, that is, the area of the fourth display area AA4 is substantially larger than the area of the third display area AA3. In one embodiment, the radius of curvature 118r of the third arc-shaped track 118 is in the range of about 55 cm to about 65 cm, and the radius of curvature 120r of the fourth arc-shaped track 120 is in the range of about 65 cm to about 75 cm. Next, a pre-cut line 122 corresponding to the third display area AA3 and a pre-cut line 124 corresponding to the fourth display area AA4 are defined on the motherboard 10, and the pre-cut lines 122 and 124 are not routed through fan-out. The pre-cut lines 122 and 124 have an offset amount M4 in the first direction D1.

第一顯示區AA1、第二顯示區AA2、第三顯示區AA3及第四顯示區AA4的面積大小由小至大排列依序為第一顯示區AA1、第二顯示區AA2、第三顯示區AA3與第四顯示區AA4。可根據想要的顯示區的面積大小，選擇沿著其對應的預切割線切割母板10，舉例而言，若想要得到具有第一顯示區AA1之陣列基板200a(見第3C圖)，可以沿預切割線114切割母板10。若想要得到具有第二顯示區AA2之陣列基板200b(見第3D圖)，可以沿預切割線116切割母板10，若想要得到具有第三顯示區AA3之陣列基板200c(見第3E圖)，可以沿預切割線122切割母板10。若想要得到具有第四顯示區AA4之陣列基板200d(見第3F圖)，可以沿預切割線124切割母板10。四個尺寸的非矩形顯示區(例如第一、第二、第三及第四顯示區AA1、AA2、AA3、AA4)是由同一道光罩所形成，在毋須額外的光罩的情況下，母板10至少可提供四種尺寸的非矩形顯示區的陣列基板100a，第一顯示區AA1、第二顯示區AA2、第三顯示區AA3及第四顯示區AA4在基板102的正投影面積各實質上小於 畫素單元104在基板102的正投影面積。如此一來，不僅達到具有非矩形顯示區之陣列基板尺寸彈性化的優點，還可降低製造成本。 The area sizes of the first display area AA1, the second display area AA2, the third display area AA3, and the fourth display area AA4 are arranged in descending order as the first display area AA1, the second display area AA2, and the third display area. AA3 and the fourth display area AA4. According to the size of the desired display area, choose to cut the mother board 10 along its corresponding pre-cut line. For example, if you want to obtain the array substrate 200a with the first display area AA1 (see Figure 3C), The mother board 10 can be cut along the pre-cut line 114. If you want to obtain the array substrate 200b with the second display area AA2 (see Figure 3D), you can cut the mother board 10 along the pre-cut line 116. If you want to obtain the array substrate 200c with the third display area AA3 (see Figure 3E) Figure), the mother board 10 can be cut along the pre-cut line 122. To obtain the array substrate 200d with the fourth display area AA4 (see FIG. 3F), the motherboard 10 can be cut along the pre-cut line 124. The four size non-rectangular display areas (such as the first, second, third and fourth display areas AA1, AA2, AA3, AA4) are formed by the same mask. Without the need for additional masks, the mother The board 10 can provide at least four sizes of non-rectangular display area array substrate 100a. The first display area AA1, the second display area AA2, the third display area AA3, and the fourth display area AA4 are substantially projected on the substrate 102. Upper less than The orthographic projection area of the pixel unit 104 on the substrate 102. In this way, not only the size flexibility of the array substrate with non-rectangular display area is achieved, but also the manufacturing cost can be reduced.

第3C圖繪示第3A圖的母板10切割後的上視示意圖。請同時參照第3A圖與第3C圖。沿預切割線114切割母板10，以得到陣列基板200a。切割的方法可如第1B圖的切割方法。於本實施例中，預切割線114的形狀為非矩形，其中預切割線114通過畫素單元104。預切割線114的中心114c重疊於第一弧心110c。陣列基板200a具有第一顯示區AA1，陣列基板200a的輪廓與預切割線114的輪廓相同，陣列基板200a的輪廓與第一顯示區AA1之間的區域構成第一非顯示區NA1。於本實施例中，第一非顯示區NA1包括第一子佈線區Wa與畫素單元104。透過設計第一弧形軌跡110與第二弧形軌跡112在第一方向D1上具有錯位量M1’，可以縮短陣列基板200a之輪廓與第一弧形軌跡110之間的距離L1”，換言之，可以降低第一非顯示區NA1在基板102上的正投影面積。並且，第一子佈線區Wa具有降低的面積。如此一來，可以提高陣列基板200a的屏占比。於一實施例中，陣列基板200a之輪廓與第一弧形軌跡110之間的距離L1”在約2公分至約2.5公分的範圍中。 FIG. 3C is a schematic top view of the motherboard 10 of FIG. 3A after being cut. Please refer to Figure 3A and Figure 3C at the same time. The mother board 10 is cut along the pre-cut line 114 to obtain the array substrate 200a. The cutting method can be as the cutting method in Figure 1B. In this embodiment, the shape of the pre-cut line 114 is non-rectangular, and the pre-cut line 114 passes through the pixel unit 104. The center 114c of the pre-cut line 114 overlaps the first arc center 110c. The array substrate 200a has a first display area AA1, the contour of the array substrate 200a is the same as the contour of the pre-cut line 114, and the area between the contour of the array substrate 200a and the first display area AA1 constitutes the first non-display area NA1. In this embodiment, the first non-display area NA1 includes the first sub-wiring area Wa and the pixel unit 104. By designing the first arc-shaped trajectory 110 and the second arc-shaped trajectory 112 to have an offset M1' in the first direction D1, the distance L1" between the contour of the array substrate 200a and the first arc-shaped trajectory 110 can be shortened, in other words, The orthographic projection area of the first non-display area NA1 on the substrate 102 can be reduced. In addition, the first sub-wiring area Wa has a reduced area. In this way, the screen-to-body ratio of the array substrate 200a can be increased. In one embodiment, The distance L1" between the outline of the array substrate 200a and the first arc-shaped track 110 is in the range of about 2 cm to about 2.5 cm.

第3D圖繪示第3A圖的母板10切割後的上視示意圖。請同時參照第3D圖與第3A圖。亦可沿預切割線116切割母板10，以得到陣列基板200b。切割的方法可如第1B圖的切割方法。於本實施例中，預切割線116的形狀為非矩形，其中預切割線116通過畫素單元104。預切割線116的中心116c重疊於 第二弧心112c。陣列基板200a具有第二顯示區AA2，陣列基板200b的輪廓與預切割線116的輪廓相同，陣列基板200b的輪廓與第二顯示區AA2之間的區域構成第二非顯示區NA2。於本實施例中，第二非顯示區NA2包括第一子佈線區Wa與畫素單元104。透過設計第一弧形軌跡110與第二弧形軌跡112在第一方向D1上具有錯位量M1’，可以降低陣列基板200a之輪廓與第一弧形軌跡110之間的距離L1”(見第3C圖)與陣列基板200b之輪廓與第二弧形軌跡112之間的距離L2”之間的大小差距，換言之，可以使具有小尺寸非矩形顯示區(例如第一顯示區AA1)的陣列基板200a的屏占比近似於具有大尺寸非矩形顯示區(例如第二顯示區AA2)的陣列基板200b的屏占比，達到可在相同母板10上切割出具有不同非矩形顯示區尺寸之高屏占比的陣列基板200a、200b的優點。於一實施例中，陣列基板200b之輪廓與第二弧形軌跡112之間的距離L2”在約2公分至約2.5公分的範圍中。 FIG. 3D is a schematic top view of the motherboard 10 of FIG. 3A after being cut. Please refer to Figure 3D and Figure 3A at the same time. The motherboard 10 can also be cut along the pre-cut line 116 to obtain the array substrate 200b. The cutting method can be as the cutting method in Figure 1B. In this embodiment, the shape of the pre-cut line 116 is non-rectangular, and the pre-cut line 116 passes through the pixel unit 104. The center 116c of the pre-cut line 116 overlaps The second arc center 112c. The array substrate 200a has a second display area AA2, the contour of the array substrate 200b is the same as the contour of the pre-cut line 116, and the area between the contour of the array substrate 200b and the second display area AA2 constitutes the second non-display area NA2. In this embodiment, the second non-display area NA2 includes the first sub-wiring area Wa and the pixel unit 104. By designing the first arc-shaped track 110 and the second arc-shaped track 112 to have a misalignment amount M1' in the first direction D1, the distance L1" between the contour of the array substrate 200a and the first arc-shaped track 110 can be reduced (see section 3C) and the distance L2" between the outline of the array substrate 200b and the second arc-shaped track 112, in other words, the array substrate with a small non-rectangular display area (for example, the first display area AA1) The screen-to-body ratio of 200a is similar to the screen-to-body ratio of the array substrate 200b with a large non-rectangular display area (for example, the second display area AA2), so that the same motherboard 10 can be cut into different non-rectangular display areas. Advantages of the screen-to-body ratio of the array substrates 200a and 200b. In one embodiment, the distance L2" between the contour of the array substrate 200b and the second arc-shaped track 112 is in the range of about 2 cm to about 2.5 cm.

第3E圖繪示第3A圖的母板10切割後的上視示意圖。請同時參照第3E圖與第3A圖。亦可沿預切割線122切割母板10，以得到陣列基板200c。切割的方法可如第1B圖的切割方法。於本實施例中，預切割線122的形狀為非矩形，其中預切割線122通過畫素單元104。預切割線122的中心122c重疊於第三弧心118c。陣列基板200c具有第三顯示區AA3，陣列基板200c的輪廓與預切割線122的輪廓相同，陣列基板200c的輪廓與第三顯示區AA3之間的區域構成第三非顯示區NA3。於本實施例中，第三非顯示區NA3包括第二子佈線區Wb與畫素單元 104。透過設計第三弧形軌跡118與第四弧形軌跡120在第一方向D1上具有錯位量M3，可以縮短陣列基板200c之輪廓與第三弧形軌跡118之間的距離L3，換言之，可以降低第三非顯示區在基板102上的正投影面積。並且，第二子佈線區Wb具有降低的面積。如此一來，可以提高陣列基板200c的屏占比。於一實施例中，陣列基板200c之輪廓與第三弧形軌跡118之間的距離L3在約2公分至約2.5公分的範圍中。 FIG. 3E is a schematic top view of the motherboard 10 of FIG. 3A after being cut. Please refer to Figure 3E and Figure 3A at the same time. The motherboard 10 can also be cut along the pre-cut line 122 to obtain the array substrate 200c. The cutting method can be as the cutting method in Figure 1B. In this embodiment, the shape of the pre-cut line 122 is non-rectangular, and the pre-cut line 122 passes through the pixel unit 104. The center 122c of the pre-cut line 122 overlaps the third arc center 118c. The array substrate 200c has a third display area AA3, the contour of the array substrate 200c is the same as the contour of the pre-cut line 122, and the area between the contour of the array substrate 200c and the third display area AA3 constitutes the third non-display area NA3. In this embodiment, the third non-display area NA3 includes a second sub-wiring area Wb and a pixel unit 104. By designing the third arc-shaped trajectory 118 and the fourth arc-shaped trajectory 120 to have a misalignment amount M3 in the first direction D1, the distance L3 between the contour of the array substrate 200c and the third arc-shaped trajectory 118 can be shortened, in other words, it can be reduced The orthographic projection area of the third non-display area on the substrate 102. Also, the second sub-wiring region Wb has a reduced area. In this way, the screen-to-body ratio of the array substrate 200c can be increased. In one embodiment, the distance L3 between the contour of the array substrate 200c and the third arc-shaped track 118 is in the range of about 2 cm to about 2.5 cm.

第3F圖繪示第3A圖的母板10切割後的上視示意圖。請同時參照第3F圖與第3A圖，沿預切割線124切割母板10，以得到陣列基板200d。於本實施例中，預切割線124的形狀為非矩形，其中預切割線124通過畫素單元104。預切割線124的中心124c重疊於第四弧心120c。陣列基板200d具有第四顯示區AA4，陣列基板200d的輪廓與預切割線124的輪廓相同，陣列基板200d的輪廓與第四顯示區AA4之間的區域構成第四非顯示區NA4。於本實施例中，非顯示區包括第二子佈線區Wb與畫素單元104。透過設計第三弧形軌跡118與第四弧形軌跡120在第一方向D1上具有錯位量M3，可以降低陣列基板200c之輪廓與第三弧形軌跡118之間的距離L3(見第3E圖)與陣列基板200d之輪廓與第四弧形軌跡120之間的距離L4之間的大小差距，換言之，可以使具有小尺寸非矩形顯示區(例如第三顯示區AA3)的陣列基板200c的屏占比近似於具有大尺寸非矩形顯示區(例如第四顯示區AA4)的陣列基板200d的屏占比，並且，第二子佈線區Wb具有降低的面積。如此一來，可以提高陣列基板200c、200d的屏占比。達到可在相同母板10 上切割出具有不同非矩形顯示區尺寸之高屏占比的陣列基板200c、200d的優點。於一實施例中，陣列基板200d之輪廓與第四弧形軌跡120之間的距離L4在約1公分至約2公分的範圍中。 FIG. 3F is a schematic top view of the motherboard 10 of FIG. 3A after being cut. Please refer to FIG. 3F and FIG. 3A at the same time, and cut the mother board 10 along the pre-cut line 124 to obtain the array substrate 200d. In this embodiment, the shape of the pre-cut line 124 is non-rectangular, and the pre-cut line 124 passes through the pixel unit 104. The center 124c of the pre-cut line 124 overlaps the fourth arc center 120c. The array substrate 200d has a fourth display area AA4, the contour of the array substrate 200d is the same as the contour of the pre-cut line 124, and the area between the contour of the array substrate 200d and the fourth display area AA4 constitutes the fourth non-display area NA4. In this embodiment, the non-display area includes the second sub-wiring area Wb and the pixel unit 104. By designing the third arc-shaped track 118 and the fourth arc-shaped track 120 to have an offset M3 in the first direction D1, the distance L3 between the contour of the array substrate 200c and the third arc-shaped track 118 can be reduced (see Figure 3E ) And the distance L4 between the outline of the array substrate 200d and the fourth arc-shaped track 120, in other words, the screen of the array substrate 200c with a small non-rectangular display area (for example, the third display area AA3) The occupying ratio is similar to that of the array substrate 200d having a large-sized non-rectangular display area (for example, the fourth display area AA4), and the second sub-wiring area Wb has a reduced area. In this way, the screen-to-body ratio of the array substrates 200c and 200d can be increased. Reach 10 on the same motherboard The advantages of cutting out array substrates 200c and 200d with different non-rectangular display area sizes with high screen-to-body ratio. In one embodiment, the distance L4 between the outline of the array substrate 200d and the fourth arc-shaped track 120 is in the range of about 1 cm to about 2 cm.

第4圖是依照本發明一實施例的顯示面板300的剖面示意圖。在本實施例中，顯示面板300包括陣列基板100、對向基板126、顯示介質層128以及彩色濾光層130。陣列基板100例如為前述的陣列基板100a、100b、100a’、100b’、200a-200d，因此，顯示面板300具有高屏占比，也就是說，顯示面板300能達到窄邊框的需求。顯示面板300例如是液晶顯示面板或是其他形式之顯示面板。對向基板126之材質可為玻璃、石英或有機聚合物等。對向基板126位於基板102的對向，顯示介質層128位於陣列基板100a與對向基板126之間。當顯示面板300為液晶顯示面板300時，顯示介質層128例如是液晶分子。 FIG. 4 is a schematic cross-sectional view of a display panel 300 according to an embodiment of the invention. In this embodiment, the display panel 300 includes an array substrate 100, an opposite substrate 126, a display medium layer 128, and a color filter layer 130. The array substrate 100 is, for example, the aforementioned array substrates 100a, 100b, 100a', 100b', 200a-200d. Therefore, the display panel 300 has a high screen-to-body ratio, that is, the display panel 300 can meet the requirement of a narrow frame. The display panel 300 is, for example, a liquid crystal display panel or other types of display panels. The material of the opposite substrate 126 can be glass, quartz, or organic polymer. The opposite substrate 126 is located opposite to the substrate 102, and the display medium layer 128 is located between the array substrate 100a and the opposite substrate 126. When the display panel 300 is a liquid crystal display panel 300, the display medium layer 128 is, for example, liquid crystal molecules.

在本實施例中，顯示面板300更包括電極層132，電極層132可為透明導電層，其材質包括金屬氧化物，例如是銦錫氧化物或銦鋅氧化物等。電極層132設置於彩色濾光層130與顯示介質層128之間。電極層132可與陣列基板100a之間產生電場，以控制或驅動顯示介質層128。彩色濾光層130位於對向基板126上，然本發明不限於此。彩色濾光層130可使通過的光線具有色彩，如此一來，可使顯示面板300顯示彩色畫面。 In this embodiment, the display panel 300 further includes an electrode layer 132. The electrode layer 132 may be a transparent conductive layer. The material of the electrode layer 132 includes metal oxide, such as indium tin oxide or indium zinc oxide. The electrode layer 132 is disposed between the color filter layer 130 and the display medium layer 128. An electric field can be generated between the electrode layer 132 and the array substrate 100a to control or drive the display medium layer 128. The color filter layer 130 is located on the opposite substrate 126, but the invention is not limited to this. The color filter layer 130 can make the passing light have colors, so that the display panel 300 can display color images.

綜上所述，本揭露的實施例的母板中，藉由設計第一弧形軌跡與第二弧形軌跡在第一方向上具有錯位量，可以 降低陣列基板之輪廓與第二弧形軌跡之間的距離大小與陣列基板之輪廓與第一弧形軌跡之間的距離大小之間的差距，換言之，可以使小尺寸非矩形顯示區)的屏占比近似於大尺寸非矩形顯示區(例如第二顯示區)的屏占比，達到可在相同母板上切割出具有不同非矩形顯示區尺寸之高屏占比的陣列基板的優點。 In summary, in the motherboard of the embodiment of the present disclosure, by designing the first arc-shaped track and the second arc-shaped track to have an offset in the first direction, it is possible to Reduce the distance between the outline of the array substrate and the second arc track and the distance between the outline of the array substrate and the first arc track, in other words, can make a small size non-rectangular display area) The occupying ratio is similar to that of the large-size non-rectangular display area (for example, the second display area), achieving the advantage that array substrates with different non-rectangular display area sizes can be cut out on the same motherboard.

以上概述數個實施方式或實施例的特徵，使所屬領域中具有通常知識者可以從各個方面更加瞭解本揭露。本技術領域中具有通常知識者應可理解，且可輕易地以本揭露為基礎來設計或修飾其他製程及結構，並以此達到相同的目的及/或達到在此介紹的實施方式或實施例相同之優點。本技術領域中具有通常知識者也應了解這些相等的結構並未背離本揭露的揭露精神與範圍。在不背離本揭露的精神與範圍之前提下，可對本揭露進行各種改變、置換或修改。 The above summarizes the characteristics of several implementations or embodiments, so that those with ordinary knowledge in the field can better understand the present disclosure from various aspects. Those skilled in the art should understand, and can easily design or modify other processes and structures based on this disclosure, so as to achieve the same purpose and/or to achieve the implementation modes or embodiments introduced herein The same advantages. Those skilled in the art should also understand that these equivalent structures do not deviate from the spirit and scope of the disclosure. Without departing from the spirit and scope of this disclosure, various changes, substitutions or modifications can be made to this disclosure.

10‧‧‧母板 10‧‧‧Motherboard

102‧‧‧基板 102‧‧‧Substrate

104‧‧‧畫素單元 104‧‧‧Pixel Unit

106‧‧‧扇出線 106‧‧‧Fanout line

108‧‧‧驅動電路 108‧‧‧Drive circuit

110‧‧‧第一弧形軌跡 110‧‧‧The first arc trajectory

110c‧‧‧第一弧心 110c‧‧‧First arc center

110r‧‧‧曲率半徑 110r‧‧‧Radius of curvature

112‧‧‧第二弧形軌跡 112‧‧‧The second arc trajectory

112c‧‧‧第二弧心 112c‧‧‧second arc center

112r‧‧‧曲率半徑 112r‧‧‧Radius of curvature

114‧‧‧預切割線 114‧‧‧Pre-cutting line

114c‧‧‧中心 114c‧‧‧Center

116‧‧‧預切割線 116‧‧‧Pre-cutting line

116c‧‧‧中心 116c‧‧‧Center

AA1‧‧‧第一顯示區 AA1‧‧‧First display area

AA2‧‧‧第二顯示區 AA2‧‧‧Second display area

B‧‧‧接合區 B‧‧‧Joint Zone

D1‧‧‧第一方向 D1‧‧‧First direction

D2‧‧‧第二方向 D2‧‧‧Second direction

M1、M2‧‧‧錯位量 M1, M2‧‧‧Displacement

O1、O2‧‧‧點 O1, O2‧‧‧point

W‧‧‧佈線區 W‧‧‧Wiring area

Claims (10)

一種母板，包含：一基板；以及多個畫素單元，位於該基板上，其中該些畫素單元的排列之輪廓構成一第一弧形軌跡與一第二弧形軌跡，該第一弧形軌跡與該第二弧形軌跡在一第一方向上具有錯位量，該第一弧形軌跡與該第二弧形軌跡相交，該第一弧形軌跡的一第一弧心與該第二弧形軌跡的一第二弧心不同，且該第一弧形軌跡之曲率半徑實質上不同於該第二弧形軌跡之曲率半徑。 A motherboard includes: a substrate; and a plurality of pixel units located on the substrate, wherein the outline of the arrangement of the pixel units constitutes a first arc-shaped track and a second arc-shaped track, the first arc The second arc-shaped trajectory and the second arc-shaped trajectory have a misalignment in a first direction, the first arc-shaped trajectory intersects the second arc-shaped trajectory, and a first arc center of the first arc-shaped trajectory and the second arc A second arc center of the arc track is different, and the radius of curvature of the first arc track is substantially different from the radius of curvature of the second arc track. 如請求項1所述之母板，其中該第一弧形軌跡之曲率半徑實質上小於該第二弧形軌跡之曲率半徑。 The motherboard according to claim 1, wherein the radius of curvature of the first arc-shaped track is substantially smaller than the radius of curvature of the second arc-shaped track. 如請求項2所述之母板，更包含：一驅動電路，位於該基板上，其中該驅動電路與該些畫素單元電性連接，該第一弧心比該第二弧心更靠近該驅動電路。 The motherboard according to claim 2, further comprising: a driving circuit on the substrate, wherein the driving circuit is electrically connected to the pixel units, and the first arc center is closer to the second arc center than the second arc center. Drive circuit. 如請求項2所述之母板，更包含：一驅動電路，位於該基板上，其中該驅動電路與該些畫素單元電性連接，該第一弧心比該第二弧心更遠離該驅動電路。 The motherboard according to claim 2, further comprising: a driving circuit on the substrate, wherein the driving circuit is electrically connected to the pixel units, and the first arc center is farther away from the second arc center Drive circuit. 一種顯示面板，包含：一陣列基板，包含： 一基板，具有一顯示區與位於該顯示區至少一側的一佈線區；多個畫素單元，位於該顯示區及該佈線區，其中該些畫素單元的排列之輪廓構成一第一弧形軌跡與一第二弧形軌跡，該第一弧形軌跡與該第二弧形軌跡於一第一方向上具有錯位量，且該第一弧形軌跡之曲率半徑實質上不同於該第二弧形軌跡之曲率半徑，該第一弧形軌跡與該第二弧形軌跡相交；一驅動電路，位於該佈線區；以及多條扇出線，位於該佈線區，其中該些扇出線的一第一端電性連接該驅動電路，該些扇出線的一第二端電性連接該些畫素單元；一對向基板，位於該陣列基板之對向；以及一顯示介質層，位於該陣列基板與該對向基板之間。 A display panel, including: an array substrate, including: A substrate having a display area and a wiring area located on at least one side of the display area; a plurality of pixel units located in the display area and the wiring area, wherein the outline of the arrangement of the pixel units forms a first arc Trajectory and a second arc trajectory, the first arc trajectory and the second arc trajectory have a misalignment in a first direction, and the radius of curvature of the first arc trajectory is substantially different from that of the second arc trajectory The radius of curvature of the arc-shaped track, the first arc-shaped track intersects the second arc-shaped track; a driving circuit located in the wiring area; and a plurality of fan-out lines located in the wiring area, wherein A first end is electrically connected to the driving circuit, and a second end of the fan-out lines is electrically connected to the pixel units; a pair of substrates located opposite to the array substrate; and a display medium layer located on Between the array substrate and the opposite substrate. 如請求項5所述之顯示面板，其中該些扇出線中的兩相對最外側者的該第二端之間的距離實質上小於位於該第一弧形軌跡上之該些畫素單元中的兩相對最外側者的之間的距離。 The display panel according to claim 5, wherein the distance between the second ends of the two relatively outermost ones of the fan-out lines is substantially smaller than in the pixel units located on the first arc-shaped track The distance between the two opposite outermost ones. 如請求項5所述之顯示面板，其中該顯示區之形狀為非矩形。 The display panel according to claim 5, wherein the shape of the display area is non-rectangular. 如請求項5所述之顯示面板，其中該顯示區在該基板的正投影面積實質上小於該些畫素單元在該基板的 正投影面積。 The display panel according to claim 5, wherein the orthographic projection area of the display area on the substrate is substantially smaller than that of the pixel units on the substrate Orthographic projection area. 一種陣列基板的製造方法，包含：提供一母板，該母板包含：一基板；以及多個畫素單元，位於該基板上，其中該些畫素單元的排列之輪廓構成一第一弧形軌跡與一第二弧形軌跡，該第一弧形軌跡與該第二弧形軌跡於一第一方向上具有錯位量，該第一弧形軌跡與該第二弧形軌跡相交，該第一弧形軌跡的一第一弧心與該第二弧形軌跡的一第二弧心不同，且該第一弧形軌跡之曲率半徑實質上不同於該第二弧形軌跡之曲率半徑；於該母板上定義一預切割線，其中該預切割線的形狀為非矩形；以及沿該預切割線切割該母板，以形成一陣列基板。 A method for manufacturing an array substrate includes: providing a motherboard, the motherboard comprising: a substrate; and a plurality of pixel units on the substrate, wherein the outline of the arrangement of the pixel units forms a first arc Trajectory and a second arc-shaped trajectory, the first arc-shaped trajectory and the second arc-shaped trajectory have an offset in a first direction, the first arc-shaped trajectory intersects the second arc-shaped trajectory, the first A first arc center of the arc-shaped track is different from a second arc center of the second arc-shaped track, and the radius of curvature of the first arc-shaped track is substantially different from the radius of curvature of the second arc-shaped track; A pre-cut line is defined on the mother board, wherein the shape of the pre-cut line is non-rectangular; and the mother board is cut along the pre-cut line to form an array substrate. 如請求項9所述之陣列基板的製造方法，其中該預切割線的中心重疊於該第一弧心與該第二弧心的至少其中之一。 The manufacturing method of the array substrate according to claim 9, wherein the center of the pre-cut line overlaps at least one of the first arc center and the second arc center.
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