TWI706499B - Wafer storage tray - Google Patents
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- TWI706499B TWI706499B TW105136684A TW105136684A TWI706499B TW I706499 B TWI706499 B TW I706499B TW 105136684 A TW105136684 A TW 105136684A TW 105136684 A TW105136684 A TW 105136684A TW I706499 B TWI706499 B TW I706499B
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
- H01L21/67333—Trays for chips
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- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
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- H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
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- H01L21/67356—Closed carriers specially adapted for containing chips, dies or ICs
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- H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
- H01L21/67333—Trays for chips
- H01L21/67336—Trays for chips characterized by a material, a roughness, a coating or the like
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- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
- H01L21/67712—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrate being handled substantially vertically
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- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
- H01L21/67721—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrates to be conveyed not being semiconductor wafers or large planar substrates, e.g. chips, lead frames
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- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
- H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
- H01L21/6773—Conveying cassettes, containers or carriers
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- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6838—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping with gripping and holding devices using a vacuum; Bernoulli devices
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
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- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
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- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
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- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
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- H01L2221/68313—Auxiliary support including a cavity for storing a finished device, e.g. IC package, or a partly finished device, e.g. die, during manufacturing or mounting
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- Condensed Matter Physics & Semiconductors (AREA)
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- Computer Hardware Design (AREA)
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- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
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Abstract
本發明的課題,係提供無關於晶片的大小,且可有效率地將晶片從治具移送至晶片收容托盤,並且容易進行被收容之晶片的拾取的晶片收容托盤。 The subject of the present invention is to provide a wafer storage tray that can efficiently transfer wafers from a jig to a wafer storage tray regardless of the size of a wafer, and can easily pick up the contained wafers.
本發明的解決手段是一種收容複數晶片的晶片收容托盤,具備於具有附著力的表面,保持晶片的保持片,與由支持保持片之背面的底壁和從底壁豎立設置,圍繞保持片的側壁所構成的框體;於保持片與框體的底壁形成有開口於保持片之表面的複數細孔,從底壁側透過細孔來供給空氣,對被保持片保持之晶片的下面噴出空氣,藉此剝離晶片。 The solution of the present invention is a wafer accommodating tray for accommodating a plurality of wafers, which is provided on an adhesive surface, a holding piece for holding the wafer, and a bottom wall supporting the back of the holding piece and erected from the bottom wall, surrounding the holding piece A frame composed of a side wall; a plurality of pores are formed in the bottom wall of the holding sheet and the frame body to open on the surface of the holding sheet, and air is supplied through the pores from the bottom wall side and ejected to the bottom of the wafer held by the holding sheet Air, thereby peeling off the wafer.
Description
本發明細觀於收容藉由切削裝置等的切割鋸刀所分割之半導體晶片等的晶片收容托盤。 The present invention is detailed in a wafer storage tray that contains semiconductor wafers and the like divided by a dicing saw blade of a cutting device or the like.
於半導體裝置製程中,在大略圓形板形狀之半導體晶圓的表面格子狀地排列之多數區域形成IC、LSI等的裝置,沿著區劃形成該裝置的各區域的預定分割線進行切斷,藉此製造各個半導體晶片。如此分割的半導體晶片,係被封裝而廣泛利用於手機或電腦等的電氣機器。 In the semiconductor device manufacturing process, devices such as ICs, LSIs, etc. are formed in a large number of areas on the surface of a semiconductor wafer having a substantially circular plate shape arranged in a grid pattern, and cut along a predetermined dividing line that divides the areas forming the device. In this way, each semiconductor wafer is manufactured. The semiconductor chips thus divided are packaged and widely used in electrical equipment such as mobile phones and computers.
手機或電腦等的電氣機器被要求更加輕量化、小型化,半導體晶片的封裝也開發有稱為晶片尺寸封裝(CSP)之可小型化的封裝技術。作為CSP技術之一,稱為Quad Flat Non-lead Package(QFN)的封裝技術實用化。稱為該QFN的封裝技術,係形成有複數之對應半導體晶片之連接端子的連接端子,並且於依每一半導體晶片區劃的預定分割線形成為格子狀之銅板等的金屬板,將複數個半導體晶片配設成矩陣狀,藉由從半導體晶片的背面側對樹脂模造加工(Molding)的樹脂部,使金屬板與半導體晶 片一體化,藉此形成CSP基板(封裝基板)。藉由沿著預定分割線切斷該封裝基板,個別地分割成被封裝的晶片尺寸封裝。 Electrical devices such as mobile phones and computers are required to be lighter and smaller, and semiconductor chip packaging has also developed a miniaturized packaging technology called chip size packaging (CSP). As one of the CSP technologies, a packaging technology called Quad Flat Non-lead Package (QFN) is put into practical use. The packaging technology called the QFN is to form a plurality of connection terminals corresponding to the connection terminals of the semiconductor chip, and form a grid-shaped metal plate such as a copper plate on a predetermined dividing line of each semiconductor chip. Arranged in a matrix, the metal plate and the semiconductor crystal are formed by molding the resin part of the resin from the back side of the semiconductor wafer. The sheet is integrated, thereby forming a CSP substrate (package substrate). The package substrate is cut along a predetermined dividing line to be individually divided into packaged chip size packages.
前述封裝基板的切斷,一般藉由具備切削刀的切削裝置實施。該切削裝置係具備於與預定分割線對應的區域,格子狀地形成有讓切削刀的刀刃退避的退刀溝,並且於藉由凹溝區劃的複數區域,分別設置吸引孔的治具,於位於保持台上的該治具吸引保持封裝基板,一邊使切削刀旋轉,一邊使保持台沿著封裝基板的預定分割線相對移動,藉此沿著預定分割線切斷封裝基板,分割成各個晶片尺寸封裝。之後,個別被分割的晶片尺寸封裝,係被具備複數收容室的晶片收容托盤收容,搬送至組裝工程(例如參照專利文獻1)。 The aforementioned cutting of the package substrate is generally performed by a cutting device equipped with a cutting blade. The cutting device is provided in a region corresponding to a predetermined dividing line, and a relief groove for retreating the cutting edge of the cutting tool is formed in a grid pattern, and a plurality of regions divided by the groove are respectively provided with suction hole jigs. The jig located on the holding table attracts and holds the package substrate, while rotating the cutting blade, the holding table is relatively moved along the predetermined dividing line of the package substrate, thereby cutting the package substrate along the predetermined dividing line and dividing into individual wafers Size package. After that, the individually divided wafer size packages are accommodated in a wafer storage tray provided with a plurality of storage chambers, and are transported to the assembly process (for example, refer to Patent Document 1).
[專利文獻1]日本特開2001-239365號公報 [Patent Document 1] Japanese Patent Application Publication No. 2001-239365
然而,設置於晶片收容托盤之複數收容室對應晶片(晶片尺寸封裝)的大小,分別藉由間隔壁區劃,所以,必須準備對應晶片(晶片尺寸封裝)的大小之種類的晶片收容托盤,有管理煩雜的問題。 However, the multiple storage chambers provided in the chip storage tray are divided by partition walls corresponding to the size of the chip (chip size package). Therefore, a chip storage tray corresponding to the size of the chip (chip size package) must be prepared and managed Troublesome question.
本發明係有鑑於前述事實所發明者,其主要的技術課題係提供無關於晶片的大小,且可有效率地將晶片從治具移送至晶片收容托盤,並且容易進行被收容之晶片的拾取的晶片收容托盤。 The present invention is the inventor in view of the foregoing facts, and its main technical problem is to provide a method for efficiently transferring the wafers from the jig to the wafer receiving tray regardless of the size of the wafer, and easily picking up the stored wafers Wafer receiving tray.
依據本發明,提供一種晶片收容托盤,係收容複數晶片的晶片收容托盤,具備:保持片,係於具有附著力及複數第1細孔的表面,保持晶片;及框體,係由具有複數第2細孔,支持該保持片之背面的底壁,與從該底壁豎立設置,圍繞該保持片的側壁所構成;從該框體的該底壁側透過第2細孔來供給空氣,對被該保持片保持之晶片的下面噴出空氣,藉此剝離晶片。
According to the present invention, there is provided a wafer accommodating tray, which is a wafer accommodating tray for accommodating a plurality of wafers, comprising: a holding sheet for holding the wafers on a surface having adhesion and a plurality of first pores; and a frame body having a plurality of
本發明的晶片收容托盤,係具備具有附著力,於表面保持晶片的保持片,與由支持該保持片之背面的底壁和從該底壁直立設置,包圍保持片的側壁所成的框體,所以,不需要設置對應各個晶片所區劃之複數收容室,也不需要準備對應各個晶片的大小之種類的托盤。所以,可利用1種類的晶片收容托盤對應各種晶片,管理可簡單化。 The wafer accommodating tray of the present invention is provided with a holding sheet having adhesive force to hold the wafer on the surface, and a frame formed by a bottom wall supporting the back of the holding sheet and a side wall of the holding sheet being erected from the bottom wall and surrounding the holding sheet Therefore, there is no need to provide a plurality of storage chambers corresponding to each wafer, and there is no need to prepare a tray corresponding to the size of each wafer. Therefore, one type of wafer storage tray can be used for various wafers, and management can be simplified.
又,本發明所致之晶片收容托盤,係藉由於保持片與框體的底壁形成開口於保持片之表面的複數細孔,從底壁 側透過細孔來供給空氣,對被保持片保持的晶片下面噴出空氣,來剝離晶片,所以,在拾取被保持片藉由附著力保持的晶片時,藉由對對應應拾取之晶片的細孔供給空氣,可容易剝離應拾取的晶片。 In addition, the wafer storage tray of the present invention is formed by forming a plurality of pores opening on the surface of the holding sheet due to the holding sheet and the bottom wall of the frame. On the side, air is supplied through the pores, and air is blown to the bottom of the wafer held by the holding sheet to peel off the wafer. Therefore, when picking up the wafer held by the holding sheet by adhesion, the pores corresponding to the picked wafer By supplying air, the wafer to be picked up can be easily peeled off.
1‧‧‧封裝基板 1‧‧‧Packaging substrate
2‧‧‧保持治具 2‧‧‧Maintenance fixture
3‧‧‧切削裝置 3‧‧‧Cutting device
5‧‧‧晶片收容托盤 5‧‧‧Chip Storage Tray
6‧‧‧裝置搬送裝置 6‧‧‧Device handling device
7‧‧‧拾取裝置 7‧‧‧Pickup device
11‧‧‧金屬板 11‧‧‧Metal plate
11a‧‧‧表面 11a‧‧‧surface
12‧‧‧合成樹脂部 12‧‧‧Synthetic resin department
20‧‧‧吸引保持部 20‧‧‧Suction and retention department
21‧‧‧退刀溝 21‧‧‧Knife retreat
22‧‧‧退刀溝 22‧‧‧Knife retreat
23‧‧‧吸引孔 23‧‧‧Suction hole
24‧‧‧孔洞 24‧‧‧Hole
31‧‧‧裝置殼體 31‧‧‧Device housing
32‧‧‧吸引台 32‧‧‧Attraction
33‧‧‧主軸單元 33‧‧‧Spindle unit
34‧‧‧攝像手段 34‧‧‧Photography
51‧‧‧保持片 51‧‧‧Keep the film
51a‧‧‧細孔 51a‧‧‧fine hole
52‧‧‧框體 52‧‧‧Frame
61‧‧‧吸引保持墊 61‧‧‧Attraction and retention pad
62‧‧‧搬送機械臂 62‧‧‧Transfer robot arm
71‧‧‧拾取手段 71‧‧‧Pickup
72‧‧‧空氣噴出手段 72‧‧‧Air ejection means
111‧‧‧第1預定分割線 111‧‧‧First planned dividing line
112‧‧‧第2預定分割線 112‧‧‧Second planned dividing line
113‧‧‧晶片 113‧‧‧chip
321‧‧‧吸引凹部 321‧‧‧Attracting recess
323‧‧‧定位銷 323‧‧‧Locating pin
331‧‧‧主軸殼體 331‧‧‧Spindle housing
332‧‧‧旋轉主軸 332‧‧‧Rotating spindle
333‧‧‧切削刀 333‧‧‧Cutter
333a‧‧‧箭頭 333a‧‧‧Arrow
521‧‧‧底壁 521‧‧‧Bottom Wall
521a‧‧‧支持面 521a‧‧‧Support surface
521b‧‧‧卡合凹部 521b‧‧‧Clamping recess
521c‧‧‧細孔 521c‧‧‧fine hole
522‧‧‧側壁 522‧‧‧Wall
611‧‧‧墊本體 611‧‧‧Pad body
611a‧‧‧凹部 611a‧‧‧Recess
611b‧‧‧吸引口 611b‧‧‧Suction port
612‧‧‧吸附墊 612‧‧‧Adsorption pad
612a‧‧‧吸引孔 612a‧‧‧Suction hole
711‧‧‧拾取筒夾 711‧‧‧ Picking Collet
721‧‧‧氣缸 721‧‧‧Cylinder
722‧‧‧空氣噴出筒 722‧‧‧Air ejector
[圖1]作為被加工物的封裝基板的立體圖及剖面圖。 [Fig. 1] A perspective view and a cross-sectional view of a package substrate as a workpiece.
[圖2]揭示圖1所示之用以保持封裝基板的保持治具及於保持治具保持封裝基板之狀態的立體圖。 [Fig. 2] A perspective view showing the holding jig for holding the package substrate shown in Fig. 1 and the holding jig holding the package substrate.
[圖3]用以將圖1所示之封裝基板分割成各個晶片的切削裝置的立體圖。 [Fig. 3] A perspective view of a cutting device for dividing the package substrate shown in Fig. 1 into individual chips.
[圖4]藉由圖3所示之切削裝置所實施的切斷工程的說明圖。 [Fig. 4] An explanatory diagram of the cutting process performed by the cutting device shown in Fig. 3.
[圖5]揭示實施了圖4所示之切斷工程的封裝基板被分割成各個晶片之狀態的立體圖。 [FIG. 5] A perspective view showing a state in which the package substrate after the cutting process shown in FIG. 4 is divided into individual chips.
[圖6]本發明實施形態之晶片收容托盤的立體圖。 [Fig. 6] A perspective view of a wafer storage tray according to an embodiment of the present invention.
[圖7]圖6的A-A剖面圖。 [Fig. 7] Fig. 6 A-A sectional view.
[圖8]揭示將圖5所示之複數晶片移送至圖6及圖7所示之晶片收容托盤之狀態的說明圖。 [FIG. 8] An explanatory diagram showing the state of transferring the plural wafers shown in FIG. 5 to the wafer storage tray shown in FIGS. 6 and 7.
[圖9]揭示拾取如圖8所示移送至晶片收容托盤之複數晶片之狀態的說明圖。 [FIG. 9] An explanatory diagram showing the state of picking up a plurality of wafers transferred to the wafer storage tray as shown in FIG. 8.
以下,針對遵從本發明所構成之晶片收容托盤的理想實施形態,參照添附圖面,進一步詳細進行說明。 Hereinafter, the ideal embodiment of the wafer storage tray constructed in accordance with the present invention will be described in further detail with reference to the attached drawings.
於圖1(a)及(b),揭示作為被加工物的封裝基板1的立體圖及剖面圖。封裝基板1係具備金屬板11,於金屬板11的表面11a格子狀地形成有延伸於所定方向的複數第1預定分割線111,與延伸於與該第1預定分割線111正交之方向的第2預定分割線112。於藉由第1預定分割線111與第2預定分割線112所區劃的複數區域分別配置有晶片113,該晶片113從金屬板11的背面側藉由合成樹脂部12模造加工。如此形成的封裝基板1,係沿著第1預定分割線111及第2預定分割線112切斷,個別地分割成封裝的晶片(晶片尺寸封裝)113。
In Fig. 1 (a) and (b), a perspective view and a cross-sectional view of the package substrate 1 as a workpiece are shown. The package substrate 1 is provided with a
對於將前述封裝基板1沿著複數第1預定分割線111及第2預定分割線112切斷來說,如圖2(a)及(b)所示,藉由保持治具2保持。保持治具2係如圖2(a)所示,於形成為矩形狀的表面中央部突出設置有吸引保持前述封裝基板1的吸引保持部20。於吸引保持部20的上面(保持面),在與形成於封裝基板1之第1預定分割線111及正交於第1預定分割線111所形成之第2預定分割線112對應的區域,格子狀地形成有讓後述切削刀的刀刃退避的退刀溝21及22。又,於吸引保持構件20,在藉由第1預定分割線111及第2預定分割線112所區劃的複數區域分別形成有吸引孔23,該吸引孔23連通於未圖示的吸
引手段。再者,於保持治具2的4角落,設置有定位用的孔洞24。於如此構成的保持治具2,如圖2(b)所示,於吸引保持部20的上面(保持面)載置封裝基板1。
For cutting the aforementioned package substrate 1 along a plurality of first
接著,針對將上述之載置於保持治具2的封裝基板1,沿著第1預定分割線111及第2預定分割線112切斷的切削裝置,參照圖3進行說明。圖3所示之切削裝置3係具備大略長方體狀的裝置殼體31。於該裝置殼體31內,保持被加工物的吸引台32可往切削進送方向即箭頭X所示方向移動地配設。於吸引台32的上面,設置有吸引凹部321,與未圖示的吸引手段連通的吸引口322開口於該吸引凹部321。又,於吸引台32的上面之4角落,直立設置有設置在前述保持治具2的4角之定位用的孔洞24嵌合的定位銷323。又,吸引台32構成為可藉由未圖示的旋轉機構旋轉。如此構成的吸引台32藉由未圖示的切削進送手段,往箭頭X所示的切銷進送方向移動。
Next, a cutting device that cuts the package substrate 1 placed on the holding
切削裝置3具備作為切削手段的主軸單元33。主軸單元33係藉由未圖示的指數標定手段,往圖3中箭頭Y所示之指數標定(indexing)方向移動,並且藉由未圖示的進刀手段,往圖3中箭頭Z所示之進刀(Infeed)方向移動。該主軸單元33係具備安裝於未圖示的移動基台,可往指數標定方向即箭頭Y所示之方向及進刀方向即箭頭Z所示之方向移動調整的主軸殼體331、被可旋轉地支持於該主軸殼體331的旋轉主軸332、安裝於該旋轉主
軸332的前端部的切削刀333。
The
又,切削裝置3係具備對被保持於前述吸引台32上之被加工物的表面進行攝像,用以檢測出應藉由前述切削刀333切削之區域的攝像手段34。該攝像手段34係具備由顯微鏡等的光學系與攝像元件(CCD),將攝像的畫像訊號送至未圖示的控制手段。
In addition, the
圖3所示之切削裝置3如以上所述構成,以下,針對使用切削裝置3,將前述封裝基板1沿著複數第1預定分割線111及第2預定分割線112切斷的切斷作業,進行說明。首先,於切削裝置3的吸引台32上載置載置封裝基板1的保持治具2。此時,藉由將設置於保持治具2的4角落的複數定位用孔洞24,嵌合於配設於吸引台32的4角落的定位銷323,載置封裝基板1的保持治具2被定位於所定位置。然後,藉由未圖示的吸引手段動作,透過吸引台32的吸引口322、吸引凹部321、設置於保持治具2的複數吸引孔23,負壓作用於載置在保持治具2的吸引保持部20之封裝基板1的各晶片113,封裝基板1的各晶片113被吸引保持於保持治具2的吸引保持部20上(封裝基板保持工程)。
The
實施了前述封裝基板保持工程的話,未圖示的切削進送手段動作,使保持封裝基板1的保持治具2移動至攝像手段34的正下方為止。保持治具2位於攝像手段34的正下方的話,藉由攝像手段34及未圖示的控制手段,執行檢測出封裝基板1之應進行切削加工的加工區域
的校準作業。亦即,攝像手段34及未圖示的控制手段,係執行用以進行形成於封裝基板1之所定方向的第1預定分割線111,與沿著第1預定分割線111切削的切削刀333之對位的圖案匹配等的畫像處理,實施檢測出應進行切削加工之加工區域的校準作業。又,對於延伸於與形成於封裝基板1之前述所定方向正交的方向之第2預定分割線112,也同樣地實施檢測出應進行切削加工之加工區域的校準作業。
When the package substrate holding process described above is performed, the cutting and feeding means (not shown) operate to move the holding
如上所述,實施了檢測出應進行封裝基板1的切削加工之加工區域的校準作業的話,則將保持治具2移動至切削區域,如圖4(a)所示,使所定第1預定分割線111的一端,位於比切削刀333的正下方更稍微靠圖4(a)中右側。然後,一邊使切削刀333往箭頭333a所示方向旋轉,一邊使未圖示的進刀手段動作,將切削刀333往箭頭Z1所示方向進刀所定量,位於所定切削深度。該切削深度係設定為切削刀333的刀刃的外周緣到達形成於保持治具2之吸引保持部20的退刀溝21(參照圖2(a))的位置。接著,使未圖示的切削進送手段動作,使吸引台32往圖4(a)中箭頭X1所示方向以所定切削進送手段移動。然後,隔著保持治具2被保持於吸引台32的封裝基板1之所定第1預定分割線111的另一端如圖4(b)所示,到達切削刀333的正下方稍微靠左側的話,則停止吸引台32的移動,並且使切削刀333往箭頭Z2所示方向上升,標數指定於接下來應切削的第1預定分割線111,重複切削
作業。結果,封裝基板1沿著第1預定分割線111被切斷(第1切斷工程)。
As described above, if the calibration operation is performed to detect the processing area where the cutting of the package substrate 1 should be performed, the holding
沿著所有第1預定分割線111實施了上述之第1切斷工程的話,則使吸引台32進行90度旋動,並使形成在隔著保持治具2被保持於吸引台32的封裝基板1之第2預定分割線112,位於切削進送方向即箭頭X所示方向,然後,對於封裝基板1,同樣地沿著所有第2預定分割線112進行前述第1切斷工程,來實施切斷作業(第2切斷工程)。
If the above-mentioned first cutting process is performed along all the first
如上述實施了第1切斷工程及第2切斷工程的封裝基板1,係如圖5所示,沿著第1預定分割線111及第2預定分割線112被切斷,個別分割成被封裝的晶片(晶片尺寸封裝)113。如此分割之各個晶片(晶片尺寸封裝)113,係在被保持治具2的吸引保持部20吸引保持之狀態下維持。
As shown in FIG. 5, the package substrate 1 that has performed the first cutting process and the second cutting process is cut along the first
如上述般分割的晶片113(晶片尺寸封裝),被收容於後述的晶片收容托盤,移送至下個工程即組裝工程。在此,針對遵從本發明所構成的晶片收容托盤5,參照圖6、圖7A及圖7B進行說明。
The wafer 113 (wafer size package) divided as described above is housed in a wafer accommodating tray described later, and transferred to the next process, that is, the assembly process. Here, the
圖6及圖7(a)(b)所示之晶片收容托盤5,係由於表面保持複數晶片之矩形狀的保持片51,與支持該保持片51之矩形狀的框體52所成。保持片51係由具有附著力的薄片所成,在上面的表面藉由附著力保持複數晶片。作為具有附著力的薄片,可使用日本新達可化成(New Tac Kasei)
股份有限公司所製造販賣之產品名稱「」或「 」。框體52係由具有支持保持片51之下面即背面的支持面521a的底壁521,與從該底壁521直立設置,圍繞保持片51的側壁522、522、522、522所成。於底壁521的下面,於短邊方向兩側分別設置有與未圖示之搬送裝置的支持構件卡合的兩個卡合凹部521b、521b(於圖6僅揭示一方之側的卡合凹部521b、521b)。於構成如此構成之晶片收容托盤5的保持片51及框體52的底壁521,如圖7(b)所示,形成有開口於保持片51之表面的複數細孔51a及521c。再者,細孔51a及521c能以從保持片51的表面側照射雷射光線,貫通框體52的底壁521之方式形成。
The
接著,如前述圖5所示,針對從保持治具2的吸引保持部20上,將個別分割之複數晶片(晶片尺寸封裝)113收容至晶片收容托盤5的方法,參照圖8進行說明。
Next, as shown in FIG. 5, the method of storing the individually divided plural wafers (wafer size packages) 113 from the
對於從保持治具2的吸引保持部20上將複數晶片113收容至晶片收容托盤5來說,於圖示的實施形態中,使用晶片搬送裝置6來實施。晶片搬送裝置6係具備吸引保持複數晶片的吸引保持墊61,與將該吸引保持墊61支持於一端部的搬送機械臂62,搬送機械臂62藉由未圖示的動作機構進行動作。吸引保持墊61係由具備與在下面形成前述複數晶片113的封裝基板1相同大小之矩形狀的凹部611a的墊本體611,與嵌合於該墊本體611之凹部
611a的吸附墊612所成。墊本體611係於中央部設置有連通於前述凹部611a的吸引口611b。該吸引口611b連通於未圖示的吸引手段。前述吸附墊612形成為矩形狀,與設置於前述保持治具2的吸引保持部20之吸引孔23相同,在與複數晶片113對應的位置設置有複數吸引孔612a。所以,未圖示的吸引手段動作的話,透過吸引口611b及凹部611a,負壓會作用於複數吸引孔612a。
To accommodate the
對於使用上述之裝置搬送裝置6,從保持治具2的吸引保持部20上將複數晶片113收容至晶片收容托盤5來說,如圖8(a)所示,使未圖示的動作機構動作,讓吸引保持墊61的吸附墊612的下面,位於被載置於保持治具2的吸引保持部20上之複數晶片113的上面。然後,解除連通於吸引台32側的吸引手段所致之吸引,並且使連通吸引保持墊61的吸引口611b之未圖示的吸引手段動作,藉此,透過吸引口611b及凹部611a,使負壓作用於設置在吸附墊612的複數吸引孔612a。結果,複數晶片113被設置於吸附墊612的複數吸引孔612a吸引保持。如此,將複數晶片113吸引保持於設置在吸附墊612的複數吸引孔612a的話,使未圖示的動作機構動作,如圖8(b)所示,將吸引保持墊61搬送至晶片收容托盤5上,並將被吸引保持於吸附墊612的下面(吸附面)之複數晶片113的下面,載置於框體52之底壁521的支持面521a所支持的保持片51上。接著,解除未圖示的吸引手段所致之吸引,並且使未圖示的動作機構動作,使吸引保
持墊61從晶片收容托盤5上退避,如圖8(c)所示,複數晶片113被移送至構成晶片收容托盤5之底壁521的支持面521a所支持之具有附著力的保持片51上。再者,被移送至晶片收容托盤5的保持片51上之複數晶片113,藉由保持片51上的附著力而不脫落地被保持。
In the case of using the above-mentioned device transfer device 6 to accommodate the
如上所述,本發明的晶片收容托盤5,因為在構成框體52之底壁521的支持面521a支持具有附著力的保持片51,所以,不需要設置對應各個晶片113所區劃之複數收容室,也不需要準備對應各個晶片113之大小的各種類的托盤。所以,可利用1種類的晶片收容托盤5對應各種晶片113,管理可簡單化。又,本發明的晶片收容托盤5,因為在構成框體52之底壁521的支持面521a支持具有附著力的保持片51,所以,可從保持治具2的吸引保持部20上將複數晶片113如上所述般藉由裝置搬送裝置6總括進行移送,可提升生產性。
As described above, the
如上所述,被收容於晶片收容托盤5的複數晶片113,係被搬送至組裝工程。於組裝工程中,藉由圖9(a)所示之拾取裝置7,對應每一晶片113進行拾取(拾取工程)。圖9(a)所示之拾取裝置7,係具備於晶片收容托盤5的上側中可移動地配設在與被晶片收容托盤5保持之複數晶片113對應的位置的拾取手段71,與於晶片收容托盤5的下側中和前述拾取手段71同步,可移動地配設在與被晶片收容托盤5保持之複數晶片113對應的位置的空氣噴出手段72。拾取手段71係具備吸引保持晶片113的
拾取筒夾711,該拾取筒夾711連接於未圖示的吸引手段。前述空氣噴出手段72係具備構成為可藉由氣缸721升降的空氣噴出筒722,該空氣噴出筒722連接於未圖示的空氣供給手段。
As described above, the
對於使用圖9(a)所示之拾取裝置7,實施拾取工程來說,使拾取手段71及空氣噴出手段72動作,如圖9(b)所示,使拾取筒夾711位於應拾取的晶片113的上面,並且使空氣噴出筒722位於與構成晶片收容托盤5的底壁521之應拾取之晶片113的下面。接著,使拾取手段71之未圖示的吸引手段動作,讓負壓作用於拾取筒夾711,藉此吸引保持應拾取之晶片113的上面,並且使空氣噴出手段72之未圖示的空氣供給手段動作,對空氣噴出筒722供給空氣。結果,被供給至空氣噴出筒722的空氣,通過形成於構成晶片收容托盤5之框體52的底壁521之細孔521c及形成於保持片51的細孔51a,向應拾取之晶片113的下面噴出。所以,藉由將拾取手段71的拾取筒夾711往上方移動,如圖9(c)所示,藉由附著力被保持於保持片51的表面之應拾取的晶片113,可藉由從下面噴出的空氣而容易剝離。
For the picking process using the picking device 7 shown in FIG. 9(a), the picking means 71 and the air blowing means 72 are operated. As shown in FIG. 9(b), the picking
5‧‧‧晶片收容托盤 5‧‧‧Chip Storage Tray
7‧‧‧拾取裝置 7‧‧‧Pickup device
51‧‧‧保持片 51‧‧‧Keep the film
51a‧‧‧細孔 51a‧‧‧fine hole
52‧‧‧框體 52‧‧‧Frame
71‧‧‧拾取手段 71‧‧‧Pickup
72‧‧‧空氣噴出手段 72‧‧‧Air ejection means
113‧‧‧晶片 113‧‧‧chip
521‧‧‧底壁 521‧‧‧Bottom Wall
521c‧‧‧細孔 521c‧‧‧fine hole
522‧‧‧側壁 522‧‧‧Wall
711‧‧‧拾取筒夾 711‧‧‧ Picking Collet
721‧‧‧氣缸 721‧‧‧Cylinder
722‧‧‧空氣噴出筒 722‧‧‧Air ejector
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JP2015251182A JP6605946B2 (en) | 2015-12-24 | 2015-12-24 | Method for picking up chips from the chip storage tray |
JP2015-251182 | 2015-12-24 |
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JP (1) | JP6605946B2 (en) |
KR (1) | KR102465718B1 (en) |
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DE (1) | DE102016225805A1 (en) |
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Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP6887722B2 (en) * | 2016-10-25 | 2021-06-16 | 株式会社ディスコ | Wafer processing method and cutting equipment |
JP2019016700A (en) * | 2017-07-07 | 2019-01-31 | Towa株式会社 | Holding member, method for manufacturing holding member, holding device, conveyance device, and device for manufacturing electronic component |
JP6890894B2 (en) * | 2017-08-21 | 2021-06-18 | 株式会社ディスコ | Manufacturing method of holding jig |
CN111344849B (en) * | 2017-09-29 | 2023-09-08 | 株式会社新川 | Packaging device |
JP7304709B2 (en) * | 2019-02-19 | 2023-07-07 | 株式会社ディスコ | Workpiece processing method |
KR102633195B1 (en) * | 2021-12-10 | 2024-02-01 | 세메스 주식회사 | Film mounting module and semiconductor strip sawing and sorting equipment including the same |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070045799A1 (en) * | 2005-08-26 | 2007-03-01 | Disco Corporation | Wafer processing method and adhesive tape used in the wafer processing method |
Family Cites Families (36)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3456159A (en) * | 1963-08-08 | 1969-07-15 | Ibm | Connections for microminiature functional components |
US4395184A (en) * | 1980-02-21 | 1983-07-26 | Palomar Systems & Machines, Inc. | Means and method for processing miniature electronic components such as capacitors or resistors |
US4859498A (en) * | 1987-11-18 | 1989-08-22 | Murata Manufacturing Co., Ltd. | Chip component holding plate |
JPH02158152A (en) * | 1988-12-09 | 1990-06-18 | Rohm Co Ltd | Jig for containing and aligning pellet |
US5173766A (en) * | 1990-06-25 | 1992-12-22 | Lsi Logic Corporation | Semiconductor device package and method of making such a package |
JP2682250B2 (en) * | 1991-03-20 | 1997-11-26 | 株式会社村田製作所 | Electronic component chip holder and electronic component chip handling method |
US5337893A (en) * | 1992-07-22 | 1994-08-16 | Electro Scientific Industries, Inc. | High capacity carrier plate |
JP2000025881A (en) * | 1998-07-10 | 2000-01-25 | Disco Abrasive Syst Ltd | Transfer tray |
JP2000030990A (en) * | 1998-07-16 | 2000-01-28 | Murata Mfg Co Ltd | Manufacture of chip component holding plate |
US6029427A (en) * | 1999-04-05 | 2000-02-29 | Lucent Technologies, Inc. | Method and apparatus for handling semiconductor chips |
JP3772954B2 (en) * | 1999-10-15 | 2006-05-10 | 株式会社村田製作所 | How to handle chip-like parts |
JP4458386B2 (en) | 2000-02-28 | 2010-04-28 | 有限会社ラムテクノロジーズ | Pulse arc welding equipment |
US6488158B1 (en) * | 2000-06-29 | 2002-12-03 | Advanced Micro Devices, Inc. | Boat for organic and ceramic flip chip package assembly |
JP4546626B2 (en) * | 2000-08-29 | 2010-09-15 | 株式会社ディスコ | Method for picking up semiconductor element |
JP2002066911A (en) * | 2000-08-29 | 2002-03-05 | Disco Abrasive Syst Ltd | Peeling off method of plate-like object adsorbed and retained to elastic adsorption pad |
JP2004055860A (en) * | 2002-07-22 | 2004-02-19 | Renesas Technology Corp | Semiconductor device fabricating process |
US6864295B2 (en) * | 2002-07-23 | 2005-03-08 | Asahi Kasei Chemicals Corporation | Gas-generating, pressure-sensitive adhesive composition |
JP2005302932A (en) * | 2004-04-09 | 2005-10-27 | M Tec Kk | Chip separation apparatus |
JP2006156793A (en) * | 2004-11-30 | 2006-06-15 | Sumitomo Metal Micro Devices Inc | Flexible substrate detacher |
JP4630692B2 (en) * | 2005-03-07 | 2011-02-09 | 株式会社ディスコ | Laser processing method |
EP2579312A3 (en) * | 2005-03-25 | 2013-05-29 | Fujifilm Corporation | Solid state imaging device and manufacturing method thereof |
US7928026B2 (en) * | 2005-06-30 | 2011-04-19 | Corning Incorporated | Synthetic silica material with low fluence-dependent-transmission and method of making the same |
JP2007184465A (en) * | 2006-01-10 | 2007-07-19 | Renesas Technology Corp | Semiconductor chip tray |
JP4744603B2 (en) * | 2006-07-25 | 2011-08-10 | ミライアル株式会社 | Wafer storage container with cushion sheet |
JP2008041987A (en) * | 2006-08-08 | 2008-02-21 | Tokyo Ohka Kogyo Co Ltd | Method and equipment for peeling support plate and wafer |
JP4941527B2 (en) * | 2009-09-09 | 2012-05-30 | セイコーエプソン株式会社 | Semiconductor chip storage tray |
US8698099B2 (en) * | 2009-09-30 | 2014-04-15 | Kyocera Corporation | Attraction member, and attraction device and charged particle beam apparatus using the same |
JP5679735B2 (en) * | 2010-08-18 | 2015-03-04 | 株式会社ディスコ | Package board handling method |
NL2005626C2 (en) * | 2010-11-04 | 2012-05-07 | Fico Bv | CARRIER FOR SEPARATED ELECTRONIC COMPONENTS AND METHOD FOR VISUAL INSPECTION OF SEPARATED ELECTRONIC COMPONENTS. |
JP2012144261A (en) * | 2011-01-07 | 2012-08-02 | Disco Corp | Transport tray |
PT2891173T (en) * | 2012-08-31 | 2019-06-28 | Semiconductor Tech & Instruments Pte Ltd | Multifunction wafer and film frame handling system |
KR102138794B1 (en) * | 2013-03-18 | 2020-07-28 | 삼성전자주식회사 | A Tray for Aligning the Positions of Semiconductor Package, Test Handler Using the Same, A Method for Aligning the Positions of Semiconductor Package and the Test Method Using the Same |
JP2014200888A (en) * | 2013-04-05 | 2014-10-27 | ローム株式会社 | Suction holding device and wafer polishing device |
CN203760443U (en) * | 2014-01-24 | 2014-08-06 | 梁志炜 | Etching process-used bearing disc of patterned sapphire substrate |
JP6262115B2 (en) * | 2014-02-10 | 2018-01-17 | 東京エレクトロン株式会社 | Substrate processing method and substrate processing apparatus |
EP2921262B1 (en) * | 2014-03-20 | 2020-06-24 | Sofradim Production | Porous supports and vacuum hold down device using said supports |
-
2015
- 2015-12-24 JP JP2015251182A patent/JP6605946B2/en active Active
-
2016
- 2016-11-10 TW TW105136684A patent/TWI706499B/en active
- 2016-12-01 SG SG10201610082WA patent/SG10201610082WA/en unknown
- 2016-12-09 US US15/373,795 patent/US10475681B2/en active Active
- 2016-12-14 KR KR1020160170159A patent/KR102465718B1/en active IP Right Grant
- 2016-12-14 CN CN201611151774.XA patent/CN106935536B/en active Active
- 2016-12-21 DE DE102016225805.2A patent/DE102016225805A1/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20070045799A1 (en) * | 2005-08-26 | 2007-03-01 | Disco Corporation | Wafer processing method and adhesive tape used in the wafer processing method |
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US20170186635A1 (en) | 2017-06-29 |
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