TWI701823B - Image sensor and method of manufacturing the same - Google Patents

Image sensor and method of manufacturing the same Download PDF

Info

Publication number
TWI701823B
TWI701823B TW107134628A TW107134628A TWI701823B TW I701823 B TWI701823 B TW I701823B TW 107134628 A TW107134628 A TW 107134628A TW 107134628 A TW107134628 A TW 107134628A TW I701823 B TWI701823 B TW I701823B
Authority
TW
Taiwan
Prior art keywords
dielectric layer
photodiode
transfer transistor
electrode
image sensor
Prior art date
Application number
TW107134628A
Other languages
Chinese (zh)
Other versions
TW202015225A (en
Inventor
鍾志平
何明祐
黃文澔
嘉慧 畢
Original Assignee
力晶積成電子製造股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 力晶積成電子製造股份有限公司 filed Critical 力晶積成電子製造股份有限公司
Priority to TW107134628A priority Critical patent/TWI701823B/en
Priority to CN201811195119.3A priority patent/CN110970450B/en
Priority to US16/194,399 priority patent/US10629644B1/en
Publication of TW202015225A publication Critical patent/TW202015225A/en
Application granted granted Critical
Publication of TWI701823B publication Critical patent/TWI701823B/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14643—Photodiode arrays; MOS imagers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14603—Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
    • H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1462—Coatings
    • H01L27/14623—Optical shielding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14641—Electronic components shared by two or more pixel-elements, e.g. one amplifier shared by two pixel elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H01L27/14689—MOS based technologies
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/50—Control of the SSIS exposure
    • H04N25/57—Control of the dynamic range
    • H04N25/59—Control of the dynamic range by controlling the amount of charge storable in the pixel, e.g. modification of the charge conversion ratio of the floating node capacitance
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/60—Noise processing, e.g. detecting, correcting, reducing or removing noise
    • H04N25/62—Detection or reduction of noise due to excess charges produced by the exposure, e.g. smear, blooming, ghost image, crosstalk or leakage between pixels
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
    • H04N25/70—SSIS architectures; Circuits associated therewith
    • H04N25/76—Addressed sensors, e.g. MOS or CMOS sensors
    • H04N25/77—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components
    • H04N25/771—Pixel circuitry, e.g. memories, A/D converters, pixel amplifiers, shared circuits or shared components comprising storage means other than floating diffusion
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14625—Optical elements or arrangements associated with the device
    • H01L27/14627—Microlenses

Abstract

An image sensor includes a semiconductor substrate, a photodiode formed in the semiconductor substrate, a microlens disposed on the photodiode, a first transfer transistor, a second transfer transistor, and a capacitor. The first transfer transistor and the second transfer transistor are formed on the semiconductor substrate, and a memory node is formed in the semiconductor substrate between the first transfer transistor and the second transfer transistor, wherein the first transfer transistor is coupled to the photodiode. The capacitor is formed between the first transfer transistor and the second transfer transistor, and the capacitor includes a first electrode coupled to the memory node, a second electrode on the first electrode and extending to the edge of the photodiode, and a dielectric layer between the first and the second electrodes.

Description

影像感測器及其製造方法Image sensor and manufacturing method thereof

本發明是有關於一種影像感測技術，且特別是有關於一種影像感測器及其製造方法。 The present invention relates to an image sensing technology, and particularly relates to an image sensor and a manufacturing method thereof.

隨著數位相機、電子掃描機等產品不斷地開發與成長，市場上對影像感測元件的需求持續增加。目前常用的影像感測元件包含有電荷耦合感測元件(charge coupled device，CCD)以及互補式金氧半導體(complementary metal-oxide-semiconductor，CMOS)影像感測元件(又稱CMOS image sensor，CIS)兩大類，其中CMOS影像感測元件因具有低操作電壓、低功率消耗與高操作效率、可根據需要而進行隨機存取等優點，同時具有可整合於目前的半導體技術以大量製造之優勢，因此應用範圍非常廣泛。 With the continuous development and growth of products such as digital cameras and electronic scanners, the demand for image sensing components in the market continues to increase. Currently commonly used image sensor components include charge coupled device (CCD) and complementary metal-oxide-semiconductor (CMOS) image sensor components (also known as CMOS image sensor, CIS) There are two categories. CMOS image sensor devices have the advantages of low operating voltage, low power consumption, high operating efficiency, and random access as needed. At the same time, they have the advantage of being integrated into current semiconductor technology for mass manufacturing. Therefore, The application range is very wide.

而且，為了避免高速移動的物體之影像產生變形，目前發展出一種全域快門(global shutter，GS)影像感測器，是利用整個畫素陣列的每個畫素都會在同一期間取得影像。因此，需要有畫素內(in-pixel)記憶單元，以便在光電二極體擷取後儲存信 號。而且，為了進一步改善全域快門影像感測器的效能，通常會另設置電容器來增加儲存電容。 Moreover, in order to avoid distortion of images of objects moving at high speeds, a global shutter (GS) image sensor has been developed, which utilizes each pixel of the entire pixel array to obtain an image during the same period. Therefore, an in-pixel memory unit is required to store the information after the photodiode is captured. number. Moreover, in order to further improve the performance of the global shutter image sensor, a capacitor is usually provided to increase the storage capacitance.

然而，電容器通常在影像感測器中佔據大半的面積，導致光電二極體的面積相對縮小。相反地，若要縮減電容器的面積，又會導致影像讀取不良的結果。 However, the capacitor usually occupies most of the area of the image sensor, resulting in a relatively small area of the photodiode. On the contrary, if the area of the capacitor is to be reduced, it will lead to poor image reading.

本發明提供一種影像感測器，能降低影像感測器的寄生光敏度(parasitic light sensitivity)並具有較大的填充因子(fill factor)。 The present invention provides an image sensor that can reduce the parasitic light sensitivity of the image sensor and has a larger fill factor.

本發明另提供一種影像感測器的製造方法，能製作出寄生光敏度低且填充因子高的影像感測器。 The present invention also provides a method for manufacturing an image sensor, which can produce an image sensor with low parasitic photosensitivity and high filling factor.

本發明的一種影像感測器包括半導體基底、形成於半導體基底中的光電二極體、設置於光電二極體上的微透鏡、第一轉移電晶體(transfer transistor)、第二轉移電晶體以及電容器。第一轉移電晶體與第二轉移電晶體形成於半導體基底上，且於第一轉移電晶體與第二轉移電晶體之間的半導體基底內形成有記憶節點(memory node，MN)，其中第一轉移電晶體耦合至光電二極體。至於電容器則形成於第一轉移電晶體與第二轉移電晶體之間，且電容器包括第一電極、第二電極以及介於第一與第二電極之間的介電層。第一電極耦合至所述記憶節點，第二電極則位於第一電極上並延伸至光電二極體的邊緣。 An image sensor of the present invention includes a semiconductor substrate, a photodiode formed in the semiconductor substrate, a microlens disposed on the photodiode, a first transfer transistor, a second transfer transistor, and Capacitor. The first transfer transistor and the second transfer transistor are formed on the semiconductor substrate, and a memory node (MN) is formed in the semiconductor substrate between the first transfer transistor and the second transfer transistor. The transfer transistor is coupled to the photodiode. As for the capacitor, it is formed between the first transfer transistor and the second transfer transistor, and the capacitor includes a first electrode, a second electrode, and a dielectric layer between the first and second electrodes. The first electrode is coupled to the memory node, and the second electrode is located on the first electrode and extends to the edge of the photodiode.

在本發明的一實施例中，上述介電層還可延伸至光電二極體的邊緣與第二電極之間。 In an embodiment of the present invention, the above-mentioned dielectric layer may also extend between the edge of the photodiode and the second electrode.

在本發明的一實施例中，上述第一電極的材料包括多晶矽或金屬，且上述第二電極的材料為金屬。 In an embodiment of the present invention, the material of the first electrode includes polysilicon or metal, and the material of the second electrode is metal.

在本發明的一實施例中，上述影像感測器還可包括形成於半導體基底上的內層介電層(ILD)與形成於所述內層介電層中的導電插塞(plug)。內層介電層覆蓋第一轉移電晶體、第二轉移電晶體與記憶節點，而導電插塞則用以電性耦合記憶節點與位在內層介電層上的第一電極。 In an embodiment of the present invention, the above-mentioned image sensor may further include an inner dielectric layer (ILD) formed on the semiconductor substrate and a conductive plug formed in the inner dielectric layer. The inner dielectric layer covers the first transfer transistor, the second transfer transistor and the memory node, and the conductive plug is used to electrically couple the memory node with the first electrode located on the inner dielectric layer.

在本發明的一實施例中，上述導電插塞例如多晶矽插塞。 In an embodiment of the present invention, the aforementioned conductive plug is for example a polysilicon plug.

在本發明的一實施例中，上述內層介電層的側壁位於光電二極體的邊緣，並露出部分光電二極體。 In an embodiment of the present invention, the sidewall of the inner dielectric layer is located at the edge of the photodiode, and part of the photodiode is exposed.

在本發明的一實施例中，上述內層介電層還可延伸覆蓋光電二極體並具有溝渠。所述溝渠是位於第一轉移電晶體與光電二極體之間，並露出光電二極體的邊緣。 In an embodiment of the present invention, the above-mentioned inner dielectric layer may also extend to cover the photodiode and have trenches. The trench is located between the first transfer transistor and the photodiode and exposes the edge of the photodiode.

在本發明的一實施例中，上述介電層還可包括延伸至上述溝渠的表面與第二電極之間。 In an embodiment of the present invention, the dielectric layer may further include a surface extending between the surface of the trench and the second electrode.

在本發明的一實施例中，上述介電層的厚度在500Å以下。 In an embodiment of the present invention, the thickness of the above-mentioned dielectric layer is less than 500 Å.

在本發明的一實施例中，上述影像感測器還可包括溢位(overflow，OF)電晶體，設置於光電二極體旁的半導體基底上，並耦合至光電二極體。 In an embodiment of the present invention, the above-mentioned image sensor may further include an overflow (OF) transistor, which is disposed on the semiconductor substrate next to the photodiode and coupled to the photodiode.

本發明的一種影像感測器的製造方法，包括先提供一半導體基底，其中形成有光電二極體與記憶節點，並於所述半導體基底上具有第二轉移電晶體以及耦合至所述光電二極體的第一轉移電晶體，其中所述記憶節點位於所述第一轉移電晶體與所述第二轉移電晶體之間。然後，於第一轉移電晶體與第二轉移電晶體之間形成電容器，再於光電二極體上形成微透鏡。上述電容器包括耦合至記憶節點的第一電極、形成於第一電極上的介電層以及形成於介電層上並延伸至光電二極體的邊緣的第二電極。 A method of manufacturing an image sensor of the present invention includes first providing a semiconductor substrate in which a photodiode and a memory node are formed, and a second transfer transistor is provided on the semiconductor substrate and coupled to the photodiode. The first transfer transistor of the polar body, wherein the memory node is located between the first transfer transistor and the second transfer transistor. Then, a capacitor is formed between the first transfer transistor and the second transfer transistor, and then a micro lens is formed on the photodiode. The aforementioned capacitor includes a first electrode coupled to the memory node, a dielectric layer formed on the first electrode, and a second electrode formed on the dielectric layer and extending to the edge of the photodiode.

在本發明的另一實施例中，形成上述電容器之前還可包括先在半導體基底上形成覆蓋第一轉移電晶體、第二轉移電晶體與記憶節點的內層介電層，再於內層介電層中形成與記憶節點接觸的導電插塞。 In another embodiment of the present invention, before forming the above-mentioned capacitor, it may further include forming an inner dielectric layer covering the first transfer transistor, the second transfer transistor and the memory node on the semiconductor substrate, and then interposing the inner layer dielectric layer. A conductive plug contacting the memory node is formed in the electrical layer.

在本發明的另一實施例中，形成上述電容器的步驟包括於內層介電層上形成導電層，並經由導電插塞電性耦合至記憶節點，然後移除部分導電層與部分內層介電層，以露出部分光電二極體並形成上述第一電極，且內層介電層的側壁是位於光電二極體的邊緣，再於第一電極上與內層介電層的側壁形成上述介電層，並於介電層上形成上述第二電極。 In another embodiment of the present invention, the step of forming the above-mentioned capacitor includes forming a conductive layer on the inner dielectric layer, and electrically coupling to the memory node through a conductive plug, and then removing part of the conductive layer and part of the inner dielectric layer. The first electrode is formed by exposing part of the photodiode, and the sidewall of the inner dielectric layer is located at the edge of the photodiode, and the first electrode and the sidewall of the inner dielectric layer are formed on the first electrode. A dielectric layer, and the second electrode is formed on the dielectric layer.

在本發明的另一實施例中，上述介電層還可延伸至光電二極體的邊緣。 In another embodiment of the present invention, the above-mentioned dielectric layer may also extend to the edge of the photodiode.

在本發明的另一實施例中，形成上述電容器的步驟包括於內層介電層上形成導電層，並經由導電插塞電性耦合至記憶節 點，然後移除部分導電層而形成上述第一電極，再移除部分內層介電層，以於第一轉移電晶體與光電二極體之間的內層介電層內形成溝渠，露出上述光電二極體的邊緣，再於第一電極上以及上述溝渠的表面形成上述介電層，並於介電層上形成上述第二電極。 In another embodiment of the present invention, the step of forming the above-mentioned capacitor includes forming a conductive layer on the inner dielectric layer, and electrically coupling to the memory node through a conductive plug Point, then remove part of the conductive layer to form the above-mentioned first electrode, and then remove part of the inner dielectric layer to form a trench in the inner dielectric layer between the first transfer transistor and the photodiode, exposing On the edge of the photodiode, the dielectric layer is formed on the first electrode and the surface of the trench, and the second electrode is formed on the dielectric layer.

基於上述，本發明中特定的電容器結構設計，能藉由縮減介電層的厚度達到提升電容值的效果，並藉此縮減電容器的面積，達到增加光電二極體面積的結果，並因此大幅增加影像感測器的填充因子。而且，電容器的上電極(第二電極)除了作為電極還能兼具遮光(light shield，LS)的效果，所以可進一步降低影像感測器的寄生光敏度。另外，若是電容器的下電極(第一電極)為多晶矽並通過多晶矽插塞來耦接至記憶節點，則可藉由這樣的同質接觸界面而減少暗電流(dark current)。 Based on the above, the specific capacitor structure design in the present invention can achieve the effect of increasing the capacitance value by reducing the thickness of the dielectric layer, thereby reducing the area of the capacitor, achieving the result of increasing the area of the photodiode, and thus greatly increasing The fill factor of the image sensor. In addition, the upper electrode (second electrode) of the capacitor can also have a light shield (LS) effect as an electrode, so the parasitic photosensitivity of the image sensor can be further reduced. In addition, if the lower electrode (first electrode) of the capacitor is polysilicon and is coupled to the memory node through a polysilicon plug, the dark current can be reduced through such a homogeneous contact interface.

為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。 In order to make the above-mentioned features and advantages of the present invention more comprehensible, the following specific embodiments are described in detail in conjunction with the accompanying drawings.

100、500:半導體基底 100, 500: semiconductor substrate

102、502:光電二極體 102, 502: photodiode

104:微透鏡 104: Micro lens

106、506:第一轉移電晶體 106, 506: first transfer transistor

108、508:第二轉移電晶體 108, 508: second transfer transistor

110、528、CMN1、CMN2:電容器 110, 528, C MN1 , C MN2 : capacitor

112、504、MN:記憶節點 112, 504, MN: memory node

113、510、FD:浮置擴散區節點 113, 510, FD: floating diffusion zone node

114:重置電晶體 114: reset transistor

115、SF:源極隨耦器 115, SF: source follower

116、522:第一電極 116, 522: first electrode

118、526:第二電極 118, 526: second electrode

120、524:介電層 120, 524: Dielectric layer

122:接觸窗 122: contact window

124、148、300、512:內層介電層 124, 148, 300, 512: inner dielectric layer

124a、512a:側壁 124a, 512a: side wall

126、520:導電插塞 126, 520: conductive plug

128:p+區 128: p+ area

130:N型區 130: N-type area

131:隔離結構 131: Isolation structure

132:第一轉移電晶體閘極 132: The first transfer transistor gate

134、140:閘氧化層 134, 140: gate oxide layer

136、142:間隙壁 136, 142: gap wall

138:第二轉移電晶體閘極 138: second transfer transistor gate

144:P型井 144: P type well

146、516:蝕刻停止層 146, 516: etch stop layer

149:金屬層間介電層 149: Intermetal dielectric layer

150:線路層 150: circuit layer

302、304、600:溝渠 302, 304, 600: trench

306:重摻雜擴散區 306: heavily doped diffusion region

400:溢位電晶體 400: Overflow transistor

514:開口 514: open

518:導電層 518: conductive layer

T:厚度 T: thickness

CFD:浮置擴散區節點電容器 C FD : floating diffusion node capacitor

LS:記憶節點電容器的上電極 LS: The upper electrode of the memory node capacitor

VTG1:第一轉移電晶體閘極電壓 V TG1 : first transfer transistor gate voltage

VRST:重置電晶體閘極電壓 V RST : Reset transistor gate voltage

VREAD:讀取電晶體閘極電壓 V READ : read transistor gate voltage

VTG2:第二轉移電晶體閘極電壓 V TG2 : the second transfer transistor gate voltage

VDD:供應電壓源 V DD : Supply voltage source

Vcolumn:行電壓 V column : row voltage

Φ:特定電壓 Φ: specific voltage

VOFD:溢位電晶體節點電壓 V OFD : Overflow transistor node voltage

VOFG:溢位電晶體閘極電壓 V OFG : Overflow transistor gate voltage

圖1A是依照本發明的第一實施例的一種影像感測器的俯視示意圖。 FIG. 1A is a schematic top view of an image sensor according to the first embodiment of the invention.

圖1B是圖1A的I-I’線段之影像感測器的剖面示意圖。 Fig. 1B is a schematic cross-sectional view of the image sensor on the line I-I' of Fig. 1A.

圖2是圖1A的影像感測器的電路圖。 FIG. 2 is a circuit diagram of the image sensor of FIG. 1A.

圖3是依照本發明的第二實施例的一種影像感測器的剖面示 意圖。 3 is a cross-sectional view of an image sensor according to the second embodiment of the present invention intention.

圖4A是依照本發明的第三實施例的一種影像感測器的剖面示意圖。 4A is a schematic cross-sectional view of an image sensor according to a third embodiment of the invention.

圖4B是圖4A的影像感測器的電路圖。 FIG. 4B is a circuit diagram of the image sensor of FIG. 4A.

圖5A至圖5E是依照本發明的第四實施例的一種影像感測器的製造流程剖面示意圖。 5A to 5E are schematic cross-sectional views of a manufacturing process of an image sensor according to a fourth embodiment of the invention.

圖6A至圖6C是依照本發明的第五實施例的一種影像感測器的製造流程剖面示意圖。 6A to 6C are schematic cross-sectional views of a manufacturing process of an image sensor according to a fifth embodiment of the invention.

下文列舉一些實施例並配合所附圖式來進行詳細地說明，但所提供的實施例並非用以限制本發明所涵蓋的範圍。此外，圖式僅以說明為目的，並未依照原尺寸作圖。為了方便理解，下述說明中相同的元件將以相同之符號標示來說明。另外，關於文中所使用「包含」、「包括」、「具有」等等用語，均為開放性的用語；也就是指包含但不限於。而且，文中所提到的方向性用語，例如：「上」、「下」等，僅是用以參考圖式的方向。因此，使用的方向性用語是用來說明，而並非用來限制本發明。 Hereinafter, some embodiments are listed and described in detail with the accompanying drawings, but the provided embodiments are not intended to limit the scope of the present invention. In addition, the drawings are for illustrative purposes only and are not drawn according to the original size. To facilitate understanding, the same elements in the following description will be described with the same symbols. In addition, the terms "include", "include", "have" and so on used in the text are all open terms; that is, including but not limited to. Moreover, the directional terms mentioned in the text, such as "上", "下", etc., are only used to refer to the directions of the drawings. Therefore, the directional terms used are used to illustrate, but not to limit the present invention.

圖1A是依照本發明的第一實施例的一種影像感測器的俯視示意圖。圖1B是圖1A的I-I’線段之影像感測器的剖面示意圖。 FIG. 1A is a schematic top view of an image sensor according to the first embodiment of the invention. Fig. 1B is a schematic cross-sectional view of the image sensor on the line I-I' of Fig. 1A.

請參照圖1A和圖1B，本實施例的影像感測器基本上包 括半導體基底100、形成於半導體基底100中的光電二極體102、設置於光電二極體102上的微透鏡104、第一轉移電晶體106、第二轉移電晶體108以及電容器110，且為了清楚起見，在圖1A中省略微透鏡104。影像感測器例如全域快門影像感測器可透過多個如圖1A的像素針對每一行影像同時一起曝光，並同時結束曝光，因此第一轉移電晶體106須將光電二極體102累積之光電電荷同時傳送至記憶節點112蓄積電荷。由於光電電荷所形成的訊號必須逐行(row by row)或選擇性地讀出，因此需要足夠大的電容來記憶並保存電荷。因此，影像感測器可抑制拍攝高速移動的物體之影像產生變形。另外，第二轉移電晶體108係用以逐行或選擇性地將上述電荷從記憶節點112傳送至浮置擴散節點113。通常在每一次光電電荷被傳送至浮置擴散節點113前會先經由重置電晶體114將前次影像讀取後的殘餘電荷移除。再者，浮置擴散節點113通常會與源極隨耦器(source follower，SF)115之閘極相連來將浮置擴散節點113的電荷進行耦合輸出。至於電容器110是形成於第一轉移電晶體106與第二轉移電晶體108之間，且電容器110包括第一電極116、第二電極118以及介於第一與第二電極116與118之間的介電層120。第一電極116耦合至記憶節點112，第二電極118則位於第一電極116上並延伸至光電二極體102的邊緣，達到遮光(light shield，LS)的效果，進而降低影像感測器的寄生光敏度(parasitic light sensitivity)。譬如圖1A顯示的第二電極118的遮光範圍(即以「點」涵蓋的部位)就涵蓋半導體基底100上所有 的電晶體(如第一轉移電晶體106、第二轉移電晶體108、重置電晶體114、源極隨耦器(source follower，SF)115等)及半導體基底100內的各個摻雜擴散區，而只露出部分光電二極體102以及預定形成接觸窗122的位置，但本發明並不限於此；上述第二電極118的遮光範圍也可僅涵蓋光電二極體102的邊緣、記憶節點112、第一轉移電晶體106、第二轉移電晶體108與重置電晶體114；甚至僅涵蓋光電二極體102的邊緣與記憶節點112。在本實施例中，第一電極116的材料可為多晶矽或金屬，且第二電極118的材料例如具有反光性的導體或金屬，如鎢。 1A and 1B, the image sensor of this embodiment basically includes Including a semiconductor substrate 100, a photodiode 102 formed in the semiconductor substrate 100, a microlens 104 disposed on the photodiode 102, a first transfer transistor 106, a second transfer transistor 108, and a capacitor 110, and for For clarity, the microlens 104 is omitted in FIG. 1A. An image sensor such as a global shutter image sensor can simultaneously expose each row of images through a plurality of pixels as shown in FIG. 1A, and end the exposure at the same time. Therefore, the first transfer transistor 106 must accumulate the photoelectricity of the photodiode 102 The charges are simultaneously transferred to the memory node 112 to accumulate charges. Since the signal formed by the photoelectric charge must be read row by row or selectively, a large enough capacitor is required to memorize and store the charge. Therefore, the image sensor can suppress the deformation of the image of a high-speed moving object. In addition, the second transfer transistor 108 is used to transfer the above-mentioned charges from the memory node 112 to the floating diffusion node 113 row by row or selectively. Usually, before each photoelectric charge is transferred to the floating diffusion node 113, the residual charge after the previous image reading is removed through the reset transistor 114. Furthermore, the floating diffusion node 113 is usually connected to the gate of a source follower (SF) 115 to couple out the charge of the floating diffusion node 113. As for the capacitor 110, it is formed between the first transfer transistor 106 and the second transfer transistor 108, and the capacitor 110 includes a first electrode 116, a second electrode 118, and a capacitor between the first and second electrodes 116 and 118. The dielectric layer 120. The first electrode 116 is coupled to the memory node 112, and the second electrode 118 is located on the first electrode 116 and extends to the edge of the photodiode 102 to achieve a light shield (LS) effect, thereby reducing the image sensor Parasitic light sensitivity. For example, as shown in FIG. 1A, the light-shielding range of the second electrode 118 (that is, the part covered by "dots") covers all of the semiconductor substrate 100 Transistors (such as the first transfer transistor 106, the second transfer transistor 108, the reset transistor 114, the source follower (SF) 115, etc.) and each doped diffusion region in the semiconductor substrate 100 , Only a part of the photodiode 102 and the position where the contact window 122 is scheduled to be formed are exposed, but the present invention is not limited to this; the light shielding range of the second electrode 118 can also only cover the edge of the photodiode 102 and the memory node 112 , The first transfer transistor 106, the second transfer transistor 108 and the reset transistor 114; even cover only the edge of the photodiode 102 and the memory node 112. In this embodiment, the material of the first electrode 116 can be polysilicon or metal, and the material of the second electrode 118 is, for example, a reflective conductor or metal, such as tungsten.

請繼續參照圖1B，影像感測器還可包括形成於半導體基底100上的內層介電層124中，同時形成於記憶節點112上的導電插塞126。內層介電層124覆蓋第一轉移電晶體106、第二轉移電晶體108與記憶節點112，而導電插塞126則用以電性耦合記憶節點112與位在內層介電層124的第一電極116。因此，當第一電極116的材料為多晶矽，可使用多晶矽插塞作為導電插塞126，因此多晶矽材料的導電插塞126與記憶節點112之間為同質接觸界面，進而能減少暗電流(dark current)。另外，內層介電層124的側壁124a位於光電二極體102的邊緣，並露出部分光電二極體102，所以電容器110的第二電極118能自行對準地延伸至光電二極體102的邊緣，以加強側壁遮光的效果。在此情況下，介電層120可延伸至光電二極體102的邊緣與第二電極118之間。上述介電層120的材料並未限制，舉凡介電常數高的材料均可，如氧化 矽、氮化矽或氮氧化矽；或者其他高介電常數的氧化物，如氧化鋯(ZrO2)、氧化鉭(Ta2O5)、氧化鋁(Al2O3)、氧化鈦(TiO2)、氧化鉿(HfO2)、氧化鑭(La2O3)等；或者其他高介電常數的含氧金屬化合物，如鈦酸鋇(BaTiO3)、鈦酸鍶(SrTiO3)等。由於電容器110的介電層120的厚度T極薄，例如在500Å以下，所以電容值能相對提高，而與傳統使用厚度約2000Å的內層介電層124作為金屬-絕緣層-金屬電容器(MIM capacitor)之介電層的影像感測器相比，可大幅縮減電容器110的面積，因而能相對增加光電二極體102的面積，進而提升影像感測器的填充因子(fill factor)。 Please continue to refer to FIG. 1B, the image sensor may further include a conductive plug 126 formed in the inner dielectric layer 124 on the semiconductor substrate 100 and formed on the memory node 112 at the same time. The inner dielectric layer 124 covers the first transfer transistor 106, the second transfer transistor 108, and the memory node 112, and the conductive plug 126 is used to electrically couple the memory node 112 with the first transfer transistor located in the inner dielectric layer 124. One electrode 116. Therefore, when the material of the first electrode 116 is polysilicon, a polysilicon plug can be used as the conductive plug 126. Therefore, the conductive plug 126 of polysilicon material and the memory node 112 have a homogenous contact interface, which can reduce dark current. ). In addition, the sidewall 124a of the inner dielectric layer 124 is located at the edge of the photodiode 102 and exposes a part of the photodiode 102, so the second electrode 118 of the capacitor 110 can be self-aligned to extend to the photodiode 102 Edges to enhance the shading effect of the side walls. In this case, the dielectric layer 120 can extend between the edge of the photodiode 102 and the second electrode 118. The material of the above-mentioned dielectric layer 120 is not limited. Any material with high dielectric constant can be used, such as silicon oxide, silicon nitride or silicon oxynitride; or other high dielectric constant oxides, such as zirconium oxide (ZrO 2 ) , Tantalum oxide (Ta 2 O 5 ), aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), hafnium oxide (HfO 2 ), lanthanum oxide (La 2 O 3 ), etc.; or other high dielectric constant Oxygen-containing metal compounds, such as barium titanate (BaTiO 3 ), strontium titanate (SrTiO 3 ), etc. Since the thickness T of the dielectric layer 120 of the capacitor 110 is extremely thin, such as less than 500 Å, the capacitance value can be relatively increased. Unlike the traditional use of the inner dielectric layer 124 with a thickness of about 2000 Å as a metal-insulating layer-metal capacitor (MIM Compared with the image sensor with the dielectric layer of the capacitor, the area of the capacitor 110 can be greatly reduced, and the area of the photodiode 102 can be relatively increased, thereby increasing the fill factor of the image sensor.

此外，在本實施例中，半導體基底100例如為矽基底、磊晶矽基底、矽鍺基底、碳化矽基底或絕緣層覆矽(silicon-on-insulator，SOI)基底。光電二極體102則是能將光訊號轉換成電訊號的元件，如PN型光電二極體、PNP型光電二極體、NP型光電二極體、NPN型光電二極體等。舉例而言，本實施例的光電二極體102如圖1B所示，是由p+區128和N型區130及P型磊晶矽基底(即半導體基底100)構成的PNP型光電二極體，其形成方式例如使用離子佈植製程將P型摻質與N型摻質分別植入半導體基底100，使得p+區128形成於N型區130上，但本發明並不限於此。而且，在半導體基底100中會有用來隔離不同元件的隔離結構131，且圖1B雖只顯示一個隔離結構131，但應知整個半導體基底100內的各個摻雜擴散區周邊實際上都設有隔離結構131。而第一轉移電晶體106一般具有第一轉移電晶體閘極132、 閘氧化層134與間隙壁136；第二轉移電晶體108一般具有第二轉移電晶體閘極138、閘氧化層140與間隙壁142。第一轉移電晶體106耦合光電二極體102與記憶節點112，第二轉移電晶體108耦合記憶節點112至浮置擴散區節點113。第一轉移電晶體106將光電二極體102中產生的光電電荷傳送至記憶節點112，第二轉移電晶體108再將記憶節點112中的電荷傳送至浮置擴散區並耦合至源極隨耦器115之閘極進行訊號輸出，而重置電晶體114則將前次影像讀取後的殘餘電荷進行移除。記憶節點112位於半導體基底100且可為N型擴散區，並由P型井144包圍。此外，由於製程的關係，通常在半導體基底100表面、第一轉移電晶體106與第二轉移電晶體108等的表面會有一層氮化矽層作為蝕刻停止層146，但本發明並不限於此。而在微透鏡104與電容器110之間通常還有一層內層介電層148、至少一層金屬層間介電層149與線路層150進行線路的連接，例如第二電極118可經由接觸窗122連至線路層150，再連至外部電路。 In addition, in this embodiment, the semiconductor substrate 100 is, for example, a silicon substrate, an epitaxial silicon substrate, a silicon germanium substrate, a silicon carbide substrate, or a silicon-on-insulator (SOI) substrate. The photodiode 102 is a component that can convert optical signals into electrical signals, such as PN-type photodiodes, PNP-type photodiodes, NP-type photodiodes, NPN-type photodiodes, etc. For example, as shown in FIG. 1B, the photodiode 102 of this embodiment is a PNP type photodiode composed of a p+ region 128, an N-type region 130, and a P-type epitaxial silicon substrate (ie, a semiconductor substrate 100). The formation method thereof is, for example, using an ion implantation process to implant P-type dopants and N-type dopants into the semiconductor substrate 100 respectively, so that the p+ region 128 is formed on the N-type region 130, but the present invention is not limited to this. Moreover, there are isolation structures 131 used to isolate different devices in the semiconductor substrate 100, and although only one isolation structure 131 is shown in FIG. 1B, it should be understood that the entire semiconductor substrate 100 is actually provided with isolation around each doped diffusion region. Structure 131. The first transfer transistor 106 generally has a first transfer transistor gate 132, The gate oxide layer 134 and the spacer 136; the second transfer transistor 108 generally has a second transfer transistor gate 138, the gate oxide layer 140 and the spacer 142. The first transfer transistor 106 couples the photodiode 102 and the memory node 112, and the second transfer transistor 108 couples the memory node 112 to the floating diffusion node 113. The first transfer transistor 106 transfers the photoelectric charge generated in the photodiode 102 to the memory node 112, and the second transfer transistor 108 transfers the charge in the memory node 112 to the floating diffusion region and is coupled to the source follower coupling The gate of the device 115 performs signal output, and the reset transistor 114 removes the residual charge after the previous image reading. The memory node 112 is located in the semiconductor substrate 100 and can be an N-type diffusion region and is surrounded by a P-type well 144. In addition, due to the manufacturing process, there is usually a silicon nitride layer as the etching stop layer 146 on the surface of the semiconductor substrate 100, the first transfer transistor 106 and the second transfer transistor 108, but the present invention is not limited to this. . Between the microlens 104 and the capacitor 110, there is usually an inner dielectric layer 148, at least one metal interlayer dielectric layer 149 and the circuit layer 150 for circuit connection. For example, the second electrode 118 can be connected to the circuit layer through the contact window 122. The circuit layer 150 is connected to an external circuit.

圖2是圖1A的影像感測器的電路圖。在圖2中，第一轉移電晶體的第一端耦接光電二極體、第二端耦接記憶節點MN，且第一轉移電晶體的控制端接收第一轉移電晶體閘極電壓VTG1。第二轉移電晶體的第一端耦接記憶節點MN、第二端耦接重置電晶體的第一端、浮置擴散區節點FD以及源極隨耦器SF的閘極端，且第二轉移電晶體的控制端接收第二轉移電晶體閘極電壓VTG2。重置電晶體的第一端耦接第二轉移電晶體的第二端、浮置擴散區節點FD 以及源極隨耦器SF的閘極端，第二端耦接供應電壓源VDD，且重置電晶體的控制端接收重置電晶體閘極電壓VRST。位於第二轉移電晶體與第一轉移電晶體之間的電容器是由記憶節點MN下方的電容器CMN1與上方的電容器CMN2並聯組成，其中CMN2的上電極(第二電極)連至一特定電壓Φ，例如0伏特。在曝光後，影像訊號(光電電荷)會經由第一轉移電晶體儲存在記憶節點MN的電容器CMN1和CMN2，並經由第二轉移電晶體逐行或選擇性傳送至浮置擴散區節點FD的電容器CFD，並透過源極隨耦器SF以進行耦合輸出至讀取電路(Read)。然後，記憶節點MN以及浮置擴散區節點FD的殘留電荷會在每次讀取前經由重置電晶體被重新消除。由於本實施例的記憶節點MN的電容器CMN2的上電極(如圖1A的第二電極118)會延伸覆蓋至光電二極體的邊緣以及影像感測器的大部分區域，所以圖2中是以LS標示出記憶節點MN的電容器CMN2的上電極的延伸範圍。 FIG. 2 is a circuit diagram of the image sensor of FIG. 1A. In FIG. 2, the first end of the first transfer transistor is coupled to the photodiode, the second end is coupled to the memory node MN, and the control end of the first transfer transistor receives the first transfer transistor gate voltage V TG1 . The first terminal of the second transfer transistor is coupled to the memory node MN, the second terminal is coupled to the first terminal of the reset transistor, the floating diffusion node FD and the gate terminal of the source follower SF, and the second transfer The control terminal of the transistor receives the gate voltage V TG2 of the second transfer transistor. The first terminal of the reset transistor is coupled to the second terminal of the second transfer transistor, the floating diffusion node FD and the gate terminal of the source follower SF, the second terminal is coupled to the supply voltage source V DD , and The control terminal of the reset transistor receives the reset transistor gate voltage V RST . The capacitor located between the second transfer transistor and the first transfer transistor is composed of a capacitor C MN1 below the memory node MN and a capacitor C MN2 above in parallel. The upper electrode (second electrode) of C MN2 is connected to a specific The voltage Φ, for example, 0 volts. After exposure, the image signal (photoelectric charge) will be stored in the capacitors C MN1 and C MN2 of the memory node MN through the first transfer transistor, and transferred to the floating diffusion node FD through the second transfer transistor row by row or selectively The capacitor C FD is coupled to the read circuit (Read) through the source follower SF. Then, the residual charges of the memory node MN and the floating diffusion node FD will be eliminated again through the reset transistor before each reading. Since the upper electrode of the capacitor C MN2 of the memory node MN of this embodiment (the second electrode 118 of FIG. 1A) extends to cover the edge of the photodiode and most of the area of the image sensor, it is shown in FIG. 2 The extension range of the upper electrode of the capacitor C MN2 of the memory node MN is indicated by LS.

圖3是依照本發明的第二實施例的一種影像感測器的剖面示意圖，其中使用第一實施例的元件符號來表示相同或類似的構件，且相同的構件的說明可參照第一實施例，於此不再贅述。 3 is a schematic cross-sectional view of an image sensor according to the second embodiment of the present invention, in which the component symbols of the first embodiment are used to denote the same or similar components, and the description of the same components can refer to the first embodiment , I won’t repeat it here.

請參照圖3，本實施例的影像感測器基本上也包括半導體基底100、形成於半導體基底100中的光電二極體102、設置於光電二極體102上的微透鏡104、第一轉移電晶體106、第二轉移電晶體108以及電容器110，其與第一實施例的差別在於內層介電層300除了覆蓋第一轉移電晶體106、第二轉移電晶體108與記憶節 點112，還延伸覆蓋光電二極體102。而且，內層介電層300具有溝渠302，溝渠302是位於第一轉移電晶體106與光電二極體102之間並露出光電二極體102的邊緣。此外，在第二轉移電晶體108相對浮置擴散節點113的內層介電層300內也可具有溝渠304。因此，電容器110的第一電極116同樣耦合至記憶節點112，第二電極118同樣位於第一電極116上並延伸至光電二極體102的邊緣，而介電層120則在第一電極116與第二電極118之間並延伸至溝渠302和304的表面與第二電極118之間。在本實施例中，內層介電層300全面地覆蓋半導體基底100的表面(及位於其上的構件)。另外，在記憶節點112內還可設置與記憶節點112的導電態相異的重摻雜擴散區306，且重摻雜擴散區306是位於接近第一轉移電晶體106和第二轉移電晶體108的表面；舉例來說，記憶節點112如為N型擴散區，重摻雜擴散區306則為p+區。 3, the image sensor of this embodiment basically includes a semiconductor substrate 100, a photodiode 102 formed in the semiconductor substrate 100, a microlens 104 disposed on the photodiode 102, and a first transfer The difference between the transistor 106, the second transfer transistor 108 and the capacitor 110 is that the inner dielectric layer 300 covers the first transfer transistor 106, the second transfer transistor 108 and the memory node. The point 112 also extends to cover the photodiode 102. Moreover, the inner dielectric layer 300 has a trench 302, and the trench 302 is located between the first transfer transistor 106 and the photodiode 102 and exposes the edge of the photodiode 102. In addition, a trench 304 may also be provided in the inner dielectric layer 300 of the second transfer transistor 108 relative to the floating diffusion node 113. Therefore, the first electrode 116 of the capacitor 110 is also coupled to the memory node 112, the second electrode 118 is also located on the first electrode 116 and extends to the edge of the photodiode 102, and the dielectric layer 120 is on the first electrode 116 and Between the second electrodes 118 and extend between the surfaces of the trenches 302 and 304 and the second electrode 118. In this embodiment, the inner dielectric layer 300 completely covers the surface of the semiconductor substrate 100 (and the components located thereon). In addition, a heavily doped diffusion region 306 with a conductivity state different from that of the memory node 112 can also be provided in the memory node 112, and the heavily doped diffusion region 306 is located close to the first transfer transistor 106 and the second transfer transistor 108. For example, if the memory node 112 is an N-type diffusion region, the heavily doped diffusion region 306 is a p+ region.

圖4A是依照本發明的第三實施例的一種影像感測器的剖面示意圖，其中使用第二實施例的元件符號來表示相同或類似的構件，且相同的構件的說明可參照第二實施例，於此不再贅述。 4A is a schematic cross-sectional view of an image sensor according to the third embodiment of the present invention, in which the component symbols of the second embodiment are used to denote the same or similar components, and the description of the same components can refer to the second embodiment , I won’t repeat it here.

請參照圖4A，本實施例的影像感測器與第二實施例的差異是在光電二極體102旁的半導體基底100上還加設溢位電晶體(overflow transistor)400，通常毗鄰光電二極體102旁用來移除光電二極體102內的殘留電荷，或抑制因高度照光下電荷飽和並擴散至鄰近畫素的溢出(blooming)現象。 4A, the difference between the image sensor of this embodiment and the second embodiment is that an overflow transistor 400 is added on the semiconductor substrate 100 beside the photodiode 102, which is usually adjacent to the photodiode. The side of the polar body 102 is used to remove the residual charge in the photodiode 102, or to suppress the blooming phenomenon that the charge is saturated and diffused to adjacent pixels due to high illumination.

圖4B是圖4A的影像感測器的電路圖，其中使用與圖2相同的元件符號來表示相同與類似的構件，且相同或類似的構件的說明也可參照圖2，不再贅述。 4B is a circuit diagram of the image sensor of FIG. 4A, in which the same component symbols as in FIG. 2 are used to denote the same and similar components, and the description of the same or similar components can also refer to FIG. 2 and will not be repeated.

在圖4B中，溢位電晶體的第一端耦接溢位電晶體節點電壓VOFD、第二端耦接光電二極體、控制端連至溢位電晶體閘極電壓VOFG。 In FIG. 4B, the first terminal of the overflow transistor is coupled to the overflow transistor node voltage V OFD , the second terminal is coupled to the photodiode, and the control terminal is connected to the overflow transistor gate voltage V OFG .

圖5A至圖5E是依照本發明的第四實施例的一種影像感測器的製造流程剖面示意圖。 5A to 5E are schematic cross-sectional views of a manufacturing process of an image sensor according to a fourth embodiment of the invention.

請先參照圖5A，本實施例的方法是先提供一半導體基底500，其中形成有光電二極體502與記憶節點(MN)504，並於半導體基底500上具有耦合至光電二極體502的第一轉移電晶體506和第二轉移電晶體508，其中記憶節點504是位於第一轉移電晶體506與第二轉移電晶體508之間。另外，半導體基底500還有與第二轉移電晶體508耦合的浮置擴散區節點510。關於光電二極體502、記憶節點504、第一轉移電晶體506以及第二轉移電晶體508的製作可採行現有技術，故不再贅述。 Referring to FIG. 5A first, the method of this embodiment first provides a semiconductor substrate 500 in which a photodiode 502 and a memory node (MN) 504 are formed, and the semiconductor substrate 500 is coupled to the photodiode 502 The first transfer transistor 506 and the second transfer transistor 508, wherein the memory node 504 is located between the first transfer transistor 506 and the second transfer transistor 508. In addition, the semiconductor substrate 500 has a floating diffusion node 510 coupled to the second transfer transistor 508. The fabrication of the photodiode 502, the memory node 504, the first transfer transistor 506, and the second transfer transistor 508 can adopt the existing technology, so it will not be repeated.

然後，為了在第一轉移電晶體506和第二轉移電晶體508之間形成電容器，請先參照圖5B，在半導體基底500上形成覆蓋第一轉移電晶體506、第二轉移電晶體508與記憶節點504的內層介電層512，再於內層介電層512中形成露出記憶節點504的開口514。而且為了後續製程需要，可在形成內層介電層512之前，全面地於半導體基底500上形成一層氮化矽層作為後續製程的蝕刻 停止層516。 Then, in order to form a capacitor between the first transfer transistor 506 and the second transfer transistor 508, first referring to FIG. 5B, the semiconductor substrate 500 is formed to cover the first transfer transistor 506, the second transfer transistor 508, and the memory. In the inner dielectric layer 512 of the node 504, an opening 514 exposing the memory node 504 is formed in the inner dielectric layer 512. Moreover, for subsequent process requirements, a silicon nitride layer can be formed on the semiconductor substrate 500 as an etching for the subsequent process before forming the inner dielectric layer 512. Stop layer 516.

接著，請參照圖5C，於內層介電層512上形成導電層518，並填滿開口514形成導電插塞520。由於作為第一電極的導電層518與導電插塞520是通過相同的沉積製程形成，所以導電層518與導電插塞520是相同材料。但是，本發明並不限於此；在另一實施例中，可先在內層介電層512中的開口514形成導電插塞520，再於內層介電層512上另外沉積一層與導電插塞520接觸的導電層518，所以導電層518與導電插塞520也可以是不同材料。 Next, referring to FIG. 5C, a conductive layer 518 is formed on the inner dielectric layer 512, and the opening 514 is filled to form a conductive plug 520. Since the conductive layer 518 and the conductive plug 520 as the first electrode are formed by the same deposition process, the conductive layer 518 and the conductive plug 520 are made of the same material. However, the present invention is not limited to this; in another embodiment, the conductive plug 520 may be formed in the opening 514 in the inner dielectric layer 512, and then another layer and the conductive plug are deposited on the inner dielectric layer 512. The conductive layer 518 is in contact with the plug 520, so the conductive layer 518 and the conductive plug 520 may also be of different materials.

然後，請參照圖5D，移除部分導電層(圖5的518)與部分內層介電層512，以露出部分光電二極體502並形成第一電極522，且內層介電層512的側壁512a是位於光電二極體502的邊緣。導電層(圖5C的518)與內層介電層512的移除可利用相同光罩進行微影蝕刻，並使用蝕刻停止層516作為蝕刻內層介電層512的蝕刻停止層，所以第一電極522與內層介電層512在佈局上具有相同的形狀。 Then, referring to FIG. 5D, a portion of the conductive layer (518 in FIG. 5) and a portion of the inner dielectric layer 512 are removed to expose a portion of the photodiode 502 and form a first electrode 522, and the inner dielectric layer 512 The sidewall 512a is located at the edge of the photodiode 502. The conductive layer (518 in FIG. 5C) and the inner dielectric layer 512 can be removed by using the same photomask for lithographic etching, and the etch stop layer 516 is used as an etch stop layer for etching the inner dielectric layer 512, so the first The electrode 522 and the inner dielectric layer 512 have the same shape in layout.

之後，請參照圖5E，於第一電極522上與內層介電層512的側壁512a形成介電層524，並於介電層524上形成第二電極526，而完成電容器528的製作。因為內層介電層512的側壁512a位於光電二極體502的邊緣，並露出部分光電二極體502，所以電容器528的第二電極526能自行對準地延伸至光電二極體502的邊緣。介電層524同樣可延伸至光電二極體502的邊緣。 After that, referring to FIG. 5E, a dielectric layer 524 is formed on the first electrode 522 and the sidewall 512a of the inner dielectric layer 512, and a second electrode 526 is formed on the dielectric layer 524 to complete the fabrication of the capacitor 528. Because the sidewall 512a of the inner dielectric layer 512 is located at the edge of the photodiode 502 and exposes part of the photodiode 502, the second electrode 526 of the capacitor 528 can extend to the edge of the photodiode 502 in self-alignment. . The dielectric layer 524 can also extend to the edge of the photodiode 502.

在形成電容器528之後，可進行後續內連線製程，並於光電二極體上形成微透鏡，得到類似圖1B的影像感測器。 After the capacitor 528 is formed, a subsequent interconnection process can be performed, and a micro lens is formed on the photodiode to obtain an image sensor similar to FIG. 1B.

圖6A至圖6C是依照本發明的第五實施例的一種影像感測器的製造流程剖面示意圖，其中使用第四實施例的元件符號來表示相同或類似的構件，且相同的製程說明可參照第四實施例，於此不再贅述。 6A to 6C are schematic cross-sectional views of the manufacturing process of an image sensor according to the fifth embodiment of the present invention, in which the component symbols of the fourth embodiment are used to denote the same or similar components, and the same process description can be referred to The fourth embodiment will not be repeated here.

第五實施例的影像感測器的製造流程可參照圖5A至圖5C，然後，請參照圖6A，移除部分導電層而形成第一電極522。 The manufacturing process of the image sensor of the fifth embodiment can be referred to FIGS. 5A to 5C, and then, referring to FIG. 6A, a part of the conductive layer is removed to form the first electrode 522.

之後，請參照圖6B，移除部分內層介電層512，以於第一轉移電晶體506與光電二極體502之間的內層介電層512內形成溝渠600，露出光電二極體502的邊緣。在本實施例中，內層介電層512全面地覆蓋半導體基底500的表面(及位於其上的構件)，所以溝渠600的形成能符合延伸準則。移除部分內層介電層512的方法例如使用蝕刻停止層516作為蝕刻內層介電層512的蝕刻停止層。 Afterwards, referring to FIG. 6B, a portion of the inner dielectric layer 512 is removed to form a trench 600 in the inner dielectric layer 512 between the first transfer transistor 506 and the photodiode 502, exposing the photodiode The edge of 502. In this embodiment, the inner dielectric layer 512 completely covers the surface of the semiconductor substrate 500 (and the components located thereon), so the formation of the trench 600 can meet the extension criterion. The method of removing part of the inner dielectric layer 512, for example, uses the etch stop layer 516 as an etch stop layer for etching the inner dielectric layer 512.

接著，請參照圖6C，於第一電極522上以及溝渠600的表面形成介電層524，並於介電層524上形成第二電極526，而完成電容器528的製作。 Next, referring to FIG. 6C, a dielectric layer 524 is formed on the first electrode 522 and the surface of the trench 600, and a second electrode 526 is formed on the dielectric layer 524 to complete the fabrication of the capacitor 528.

在形成電容器528之後，可進行後續內連線製程，並於光電二極體上形成微透鏡，得到類似圖3的影像感測器。 After the capacitor 528 is formed, a subsequent interconnection process can be performed, and a micro lens is formed on the photodiode to obtain an image sensor similar to FIG. 3.

綜上所述，本發明的影像感測器為影像感測器，且搭配具有薄介電層的電容器，因而可提升電容值，並藉此縮減電容器 的面積、增加光電二極體面積，以增加影像感測器的填充因子(fill factor)。而且，電容器的上電極還能兼具遮光的效果，使影像感測器的寄生光敏度降低。 In summary, the image sensor of the present invention is an image sensor, and is matched with a capacitor with a thin dielectric layer, so that the capacitance value can be increased and the capacitor can be reduced thereby Increase the area of the photodiode to increase the fill factor of the image sensor. Moreover, the upper electrode of the capacitor can also have a light-shielding effect, which reduces the parasitic photosensitivity of the image sensor.

雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention. Anyone with ordinary knowledge in the technical field can make some changes and modifications without departing from the spirit and scope of the present invention. The scope of protection of the present invention shall be determined by the scope of the attached patent application.

100：半導體基底 102：光電二極體 104：微透鏡 106：第一轉移電晶體 108：第二轉移電晶體 110：電容器 112：記憶節點 113：浮置擴散區節點 116：第一電極 118：第二電極 120：介電層 122：接觸窗 124、148：內層介電層 124a：側壁 126：導電插塞 128：p+區 130：N型區 131：隔離結構 132：第一轉移電晶體閘極 134、140：閘氧化層 136、142：間隙壁 138：第二轉移電晶體閘極 144：P型井 146：蝕刻停止層 149：金屬層間介電層 150：線路層 T：厚度100: semiconductor substrate 102: photodiode 104: microlens 106: first transfer transistor 108: second transfer transistor 110: capacitor 112: memory node 113: floating diffusion node 116: first electrode 118: first electrode Two electrodes 120: dielectric layer 122: contact windows 124, 148: inner dielectric layer 124a: sidewall 126: conductive plug 128: p+ region 130: N-type region 131: isolation structure 132: first transfer transistor gate 134, 140: gate oxide layer 136, 142: spacer 138: second transfer transistor gate 144: P-well 146: etching stop layer 149: metal interlayer dielectric layer 150: circuit layer T: thickness

Claims (15)

一種影像感測器，包括：半導體基底；光電二極體，形成於所述半導體基底中；微透鏡，設置於所述光電二極體上；第一轉移電晶體，形成於所述半導體基底上，並耦合至所述光電二極體；第二轉移電晶體，形成於所述半導體基底上，並於所述第一轉移電晶體與所述第二轉移電晶體之間的所述半導體基底內形成有記憶節點；以及電容器，形成於所述第一轉移電晶體與所述第二轉移電晶體之間，其中所述電容器包括：第一電極，耦合至所述記憶節點，其中所述第一電極、所述第一轉移電晶體以及所述第二轉移電晶體於所述半導體基底的垂直投影完全重疊；第二電極，設置於所述第一電極上，並延伸至所述光電二極體的邊緣；以及介電層，介於所述第一電極與所述第二電極之間。 An image sensor, comprising: a semiconductor substrate; a photodiode formed in the semiconductor substrate; a microlens arranged on the photodiode; a first transfer transistor formed on the semiconductor substrate , And coupled to the photodiode; a second transfer transistor, formed on the semiconductor substrate, and in the semiconductor substrate between the first transfer transistor and the second transfer transistor A memory node is formed; and a capacitor formed between the first transfer transistor and the second transfer transistor, wherein the capacitor includes: a first electrode coupled to the memory node, wherein the first The vertical projections of the electrode, the first transfer transistor, and the second transfer transistor on the semiconductor substrate completely overlap; the second electrode is arranged on the first electrode and extends to the photodiode And a dielectric layer between the first electrode and the second electrode. 如申請專利範圍第1項所述的影像感測器，其中所述介電層更包括延伸至所述光電二極體的所述邊緣與所述第二電極之間。 The image sensor according to claim 1, wherein the dielectric layer further includes an extension between the edge of the photodiode and the second electrode. 如申請專利範圍第1項所述的影像感測器，其中所述第一電極的材料包括多晶矽或金屬，且所述第二電極的材料為金屬。 The image sensor according to claim 1, wherein the material of the first electrode includes polysilicon or metal, and the material of the second electrode is metal. 如申請專利範圍第3項所述的影像感測器，更包括：內層介電層，形成於所述半導體基底上，覆蓋所述第一轉移電晶體、所述第二轉移電晶體與所述記憶節點；以及導電插塞，形成於所述內層介電層中，用以電性耦合所述記憶節點與位在所述內層介電層上的所述第一電極。 The image sensor described in item 3 of the scope of patent application further includes: an inner dielectric layer formed on the semiconductor substrate, covering the first transfer transistor, the second transfer transistor and the The memory node; and a conductive plug formed in the inner dielectric layer for electrically coupling the memory node and the first electrode located on the inner dielectric layer. 如申請專利範圍第4項所述的影像感測器，其中所述導電插塞為多晶矽插塞。 The image sensor according to claim 4, wherein the conductive plug is a polysilicon plug. 如申請專利範圍第4項所述的影像感測器，其中所述內層介電層的側壁位於所述光電二極體的所述邊緣，並露出部分所述光電二極體。 The image sensor according to claim 4, wherein the sidewall of the inner dielectric layer is located at the edge of the photodiode and exposes a part of the photodiode. 如申請專利範圍第4項所述的影像感測器，其中所述內層介電層更延伸覆蓋所述光電二極體並具有溝渠，所述溝渠位於所述第一轉移電晶體與所述光電二極體之間露出所述光電二極體的所述邊緣。 The image sensor according to claim 4, wherein the inner dielectric layer further extends to cover the photodiode and has a trench, and the trench is located between the first transfer transistor and the The edges of the photodiodes are exposed between the photodiodes. 如申請專利範圍第7項所述的影像感測器，其中所述介電層更包括延伸至所述溝渠的表面與所述第二電極之間。 The image sensor according to claim 7, wherein the dielectric layer further includes a surface extending between the surface of the trench and the second electrode. 如申請專利範圍第1項所述的影像感測器，更包括溢位電晶體(overflow transistor)，設置於所述光電二極體旁的所述半導體基底上，並耦合至所述光電二極體。 The image sensor described in item 1 of the scope of patent application further includes an overflow transistor, which is disposed on the semiconductor substrate beside the photodiode and coupled to the photodiode body. 如申請專利範圍第1項所述的影像感測器，其中所述介電層的厚度在500Å以下。 The image sensor according to the first item of the scope of patent application, wherein the thickness of the dielectric layer is less than 500 Å. 一種影像感測器的製造方法，包括：提供一半導體基底，其中形成有光電二極體與記憶節點，並於所述半導體基底上具有第二轉移電晶體以及耦合至所述光電二極體的第一轉移電晶體，其中所述記憶節點位於所述第一轉移電晶體與所述第二轉移電晶體之間；於所述第一轉移電晶體與所述第二轉移電晶體之間形成電容器，其中所述電容器包括耦合至所述記憶節點的第一電極、形成於所述第一電極上的介電層以及形成於所述介電層上並延伸至所述光電二極體的邊緣的第二電極，其中所述第一電極、所述第一轉移電晶體以及所述第二轉移電晶體於所述半導體基底的垂直投影完全重疊；以及於所述光電二極體上形成微透鏡。 A method for manufacturing an image sensor includes: providing a semiconductor substrate in which a photodiode and a memory node are formed, and on the semiconductor substrate, a second transfer transistor and a photodiode coupled to the photodiode are provided. A first transfer transistor, wherein the memory node is located between the first transfer transistor and the second transfer transistor; a capacitor is formed between the first transfer transistor and the second transfer transistor , Wherein the capacitor includes a first electrode coupled to the memory node, a dielectric layer formed on the first electrode, and a dielectric layer formed on the dielectric layer and extending to the edge of the photodiode The second electrode, wherein the vertical projections of the first electrode, the first transfer transistor and the second transfer transistor on the semiconductor substrate completely overlap; and a micro lens is formed on the photodiode. 如申請專利範圍第11項所述的影像感測器的製造方法，其中形成所述電容器之前更包括：於所述半導體基底上形成覆蓋所述電晶體、所述第二轉移電晶體與所述記憶節點的內層介電層(ILD)；以及於所述內層介電層中形成與所述記憶節點接觸的導電插塞。 The method for manufacturing an image sensor according to claim 11, wherein before forming the capacitor, it further comprises: forming a covering transistor, the second transfer transistor and the semiconductor substrate on the semiconductor substrate. An inner dielectric layer (ILD) of the memory node; and a conductive plug contacting the memory node is formed in the inner dielectric layer. 如申請專利範圍第12項所述的影像感測器的製造方法，其中形成所述電容器的步驟包括： 於所述內層介電層上形成導電層，並經由所述導電插塞電性耦合至所述記憶節點；移除部分所述導電層與部分所述內層介電層，以露出部分所述光電二極體並形成所述第一電極，其中所述內層介電層的側壁位於所述光電二極體的所述邊緣；於所述第一電極上與所述內層介電層的所述側壁形成所述介電層；以及於所述介電層上形成所述第二電極。 According to the method of manufacturing the image sensor described in claim 12, the step of forming the capacitor includes: A conductive layer is formed on the inner dielectric layer, and is electrically coupled to the memory node through the conductive plug; a part of the conductive layer and a part of the inner dielectric layer are removed to expose part of the The photodiode and form the first electrode, wherein the sidewall of the inner dielectric layer is located at the edge of the photodiode; on the first electrode and the inner dielectric layer The sidewalls form the dielectric layer; and the second electrode is formed on the dielectric layer. 如申請專利範圍第13項所述的影像感測器的製造方法，其中所述介電層更包括延伸至所述光電二極體的所述邊緣。 The method for manufacturing an image sensor according to the scope of patent application, wherein the dielectric layer further includes the edge extending to the photodiode. 如申請專利範圍第12項所述的影像感測器的製造方法，其中形成所述電容器的步驟包括：於所述內層介電層上形成導體層，並經由所述導電插塞電性耦合至所述記憶節點；移除部分所述導電層，以形成所述第一電極；移除部分所述內層介電層，以於所述電晶體與所述光電二極體之間的所述內層介電層內形成溝渠，露出所述光電二極體的所述邊緣；於所述第一電極上與所述溝渠的表面形成所述介電層；以及於所述介電層上形成所述第二電極。 The method for manufacturing an image sensor according to claim 12, wherein the step of forming the capacitor includes: forming a conductive layer on the inner dielectric layer, and electrically coupling through the conductive plug To the memory node; remove a portion of the conductive layer to form the first electrode; remove a portion of the inner dielectric layer to place a portion between the transistor and the photodiode Forming a trench in the inner dielectric layer to expose the edge of the photodiode; forming the dielectric layer on the first electrode and the surface of the trench; and on the dielectric layer The second electrode is formed.
TW107134628A 2018-10-01 2018-10-01 Image sensor and method of manufacturing the same TWI701823B (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
TW107134628A TWI701823B (en) 2018-10-01 2018-10-01 Image sensor and method of manufacturing the same
CN201811195119.3A CN110970450B (en) 2018-10-01 2018-10-15 Image sensor and method for manufacturing the same
US16/194,399 US10629644B1 (en) 2018-10-01 2018-11-19 Image sensor and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW107134628A TWI701823B (en) 2018-10-01 2018-10-01 Image sensor and method of manufacturing the same

Publications (2)

Publication Number Publication Date
TW202015225A TW202015225A (en) 2020-04-16
TWI701823B true TWI701823B (en) 2020-08-11

Family

ID=69946600

Family Applications (1)

Application Number Title Priority Date Filing Date
TW107134628A TWI701823B (en) 2018-10-01 2018-10-01 Image sensor and method of manufacturing the same

Country Status (3)

Country Link
US (1) US10629644B1 (en)
CN (1) CN110970450B (en)
TW (1) TWI701823B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11791354B2 (en) 2020-05-08 2023-10-17 Taiwan Semiconductor Manufacturing Co., Ltd. Method and apparatus for reducing light leakage at memory nodes in CMOS image sensors
US11728362B2 (en) * 2021-04-22 2023-08-15 Taiwan Semiconductor Manufacturing Company Ltd Image sensor pixel and metal shielding of charge storage device of image sensor pixel formed by one step process

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070040922A1 (en) * 2005-08-22 2007-02-22 Micron Technology, Inc. HDR/AB on multi-way shared pixels
KR100776152B1 (en) * 2006-08-28 2007-11-16 동부일렉트로닉스 주식회사 Cmos image sensor and the method of manufacturing thereof
US20090201400A1 (en) * 2008-02-08 2009-08-13 Omnivision Technologies, Inc. Backside illuminated image sensor with global shutter and storage capacitor
US20160286151A1 (en) * 2015-03-23 2016-09-29 Tower Semiconductor Ltd. Image Sensor Pixel With Memory Node Having Buried Channel And Diode Portions

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2079229B1 (en) 2008-01-10 2011-09-14 Stmicroelectronics Sa Pixel circuit for global electronic shutter
US8569807B2 (en) 2009-09-01 2013-10-29 Taiwan Semiconductor Manufacturing Company, Ltd. Backside illuminated image sensor having capacitor on pixel region
WO2012011448A1 (en) * 2010-07-21 2012-01-26 シャープ株式会社 Photosensor and semiconductor device provided with said photosensor
US8575531B2 (en) * 2011-04-26 2013-11-05 Aptina Imaging Corporation Image sensor array for back side illumination with global shutter using a junction gate photodiode
US8773562B1 (en) * 2013-01-31 2014-07-08 Apple Inc. Vertically stacked image sensor
KR102009192B1 (en) * 2013-02-05 2019-08-09 삼성전자주식회사 Unit pixel of image sensor and image sensor including the same
KR102205856B1 (en) * 2014-06-11 2021-01-21 삼성디스플레이 주식회사 Organic light emitting diode display device including sensors
TWI566390B (en) * 2014-10-31 2017-01-11 力晶科技股份有限公司 Cmos image sensor with enhanced dynamic range
CN105934826B (en) 2014-12-18 2021-07-20 索尼公司 Solid-state image sensor, imaging device, and electronic apparatus
TWI572023B (en) * 2015-04-15 2017-02-21 力晶科技股份有限公司 Cmos image sensor unit and method for fabricating the same

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070040922A1 (en) * 2005-08-22 2007-02-22 Micron Technology, Inc. HDR/AB on multi-way shared pixels
KR100776152B1 (en) * 2006-08-28 2007-11-16 동부일렉트로닉스 주식회사 Cmos image sensor and the method of manufacturing thereof
US20090201400A1 (en) * 2008-02-08 2009-08-13 Omnivision Technologies, Inc. Backside illuminated image sensor with global shutter and storage capacitor
US20160286151A1 (en) * 2015-03-23 2016-09-29 Tower Semiconductor Ltd. Image Sensor Pixel With Memory Node Having Buried Channel And Diode Portions

Also Published As

Publication number Publication date
CN110970450B (en) 2022-02-25
CN110970450A (en) 2020-04-07
US10629644B1 (en) 2020-04-21
TW202015225A (en) 2020-04-16
US20200105816A1 (en) 2020-04-02

Similar Documents

Publication Publication Date Title
US6180969B1 (en) CMOS image sensor with equivalent potential diode
US7973346B2 (en) Image sensor with self-boosting transfer transistor gate and methods of operating and fabricating the same
US20130307040A1 (en) Image sensors and methods of fabricating the same
US20070045665A1 (en) CMOS image sensor of preventing optical crosstalk and method of manufacturing the same
JP2006210897A (en) Image sensor and pixel imaging unit
JP2006261411A (en) Image sensor having buried photodiode region, and manufacturing method thereof
CN114664872A (en) Image sensor and method for manufacturing the same
US9466636B2 (en) Image sensors including well regions of different concentrations and methods of fabricating the same
US11742368B2 (en) Image sensing device and method for forming the same
TWI389308B (en) Dual isolation for image sensors
TWI701823B (en) Image sensor and method of manufacturing the same
JP4241527B2 (en) Photoelectric conversion element
KR102067296B1 (en) Solid-state imaging element and electronic device
CN108231810B (en) Pixel unit structure for increasing suspended drain capacitance and manufacturing method
JP2005019781A (en) Solid-state image pickup device and manufacturing method thereof
KR100345669B1 (en) Image sensor having nonsymmetric spacer on each side wall of transfer transistor gate electrode and method for forming the same
US7868364B2 (en) Image sensor
KR100388459B1 (en) Image sensor having trench in photodiode area and method for forming the same
KR100390843B1 (en) Method for fabricating image sensor capable of reducing capacitance of floating node
KR20020052791A (en) Image sensor formation method capable of protecting surface of substrate
KR20020014315A (en) Image sensor formation method capable of preventing cross talk between pixels and reduction of active area
US20070181922A1 (en) Cmos image sensor
KR20020058919A (en) Image sensor capable of improving capacitance of photodiode and charge transport and method for forming the same
JP2003347537A (en) Solid-state image pickup element
KR20020052794A (en) Image sensor formation method capable of reducing node capacitance of floating diffusion area