TWI697877B - Calibration method for display clock and apparatus thereof - Google Patents

Calibration method for display clock and apparatus thereof Download PDF

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TWI697877B
TWI697877B TW108108790A TW108108790A TWI697877B TW I697877 B TWI697877 B TW I697877B TW 108108790 A TW108108790 A TW 108108790A TW 108108790 A TW108108790 A TW 108108790A TW I697877 B TWI697877 B TW I697877B
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time
internal
external
compensation ratio
display driver
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TW202036506A (en
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林聖逸
陳德銘
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瑞鼎科技股份有限公司
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken

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  • General Engineering & Computer Science (AREA)
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  • Electric Clocks (AREA)
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Abstract

A calibration method for display clock is provided. The calibration method comprised of the following steps: using a processing unit to obtain a first external time and to transmit the first external time to a display driver IC as a first internal time; after a first predefined period, using a processing unit to obtain a second external time and to transmit the second external time to the display driver IC; using the display driver IC to obtain a first internal count and a second internal time; using the display driver IC to obtain a compensation ratio from calculation; and using the display driver IC to calculate a quotient of an ideal count for time and the compensation ratio to obtain a second calibrated count for time.

Description

調整顯示時鐘的方法及其裝置Method and device for adjusting display clock

本發明係關於一種調整顯示時鐘的方法及其裝置；具體而言，本發明係關於一種於電子裝置之顯示器調整顯示時鐘的方法及其裝置。The present invention relates to a method and device for adjusting a display clock; specifically, the present invention relates to a method and device for adjusting a display clock in an electronic device.

對於使用電池之電子裝置而言，如何減少電力消耗為一重要課題。以行動裝置為例，當使用者未使用任何服務時，行動裝置即進入閒置模式(idle mode)，直到下次使用者使用服務時被喚醒(wakeup)。For electronic devices using batteries, how to reduce power consumption is an important issue. Taking a mobile device as an example, when the user does not use any service, the mobile device enters an idle mode (idle mode) until the next time the user uses the service to be wakeup (wakeup).

但行動裝置於充電或待機時仍有顯示時間的需求，故發展出待機顯示(Always On Display, AOD)，於行動裝置之應用處理單元(Application Processor，AP)進入閒置模式時，仍可藉由顯示驅動器晶片(Display Driver IC；DDI)顯示時間於行動裝置之螢幕。However, mobile devices still need to display time during charging or standby, so the Always On Display (AOD) has been developed. When the application processor (AP) of the mobile device enters the idle mode, it can still be used The Display Driver IC (DDI) displays the time on the screen of the mobile device.

然而應用處理單元與顯示驅動器晶片為兩獨立之晶片，受製程的差異性及溫度影響，無法透過設定讓兩晶片的振盪器(Oscillator, OSC）之振盪頻率同步化。由於振盪器頻率之差異，顯示驅動器晶片獨立計數之時間愈久，與行動裝置系統之時間誤差愈大；而不同晶片與不同環境溫度下所產生之時間誤差亦不同。However, the application processing unit and the display driver chip are two independent chips. Due to the difference of the manufacturing process and the temperature, it is impossible to synchronize the oscillation frequencies of the oscillators (OSC) of the two chips by setting. Due to the difference in oscillator frequency, the longer the independent counting time of the display driver chip is, the greater the time error with the mobile device system; and the time error generated by different chips and different ambient temperatures is also different.

本發明之一目的在於提供一種調整顯示時鐘的方法及其裝置，使電子裝置之顯示時間於調整前後不會產生過大之差距。An object of the present invention is to provide a method and device for adjusting a display clock so that the display time of the electronic device does not have an excessive difference before and after adjustment.

本發明之另一目的在於提供一種調整顯示時鐘的方法及其裝置，使電子裝置之處理單元可於不固定之時間間隔傳送時間訊息以調整電子裝置之顯示時間。Another object of the present invention is to provide a method and device for adjusting the display clock, so that the processing unit of the electronic device can send time information at irregular time intervals to adjust the display time of the electronic device.

本發明之另一目的在於提供一種調整顯示時鐘的方法及其裝置，使電子裝置之顯示時間於調整後與電子裝置之系統時間趨於一致。Another object of the present invention is to provide a method and device for adjusting the display clock, so that the display time of the electronic device after adjustment becomes consistent with the system time of the electronic device.

本發明提出之一種技術方案為提供一種調整顯示時鐘方法，包含：以處理單元獲得第一外部時間，並傳送第一外部時間至顯示器驅動晶片做為第一內部時間；經過第一設定時間間隔，以處理單元獲得第二外部時間，並傳送第二外部時間至顯示器驅動晶片；以顯示器驅動晶片從顯示器驅動晶片之第二震盪器的計數獲得第一內部計數值以及第二內部時間；以顯示器驅動晶片經計算獲得第二補償比例；以及以顯示器驅動晶片計算理想時間計數與第二補償比例之商值獲得第二校正時間計數。A technical solution proposed by the present invention is to provide a method for adjusting a display clock, including: obtaining a first external time by a processing unit, and transmitting the first external time to the display driver chip as the first internal time; after a first set time interval, Use the processing unit to obtain the second external time and transmit the second external time to the display driver chip; use the display driver chip to obtain the first internal count value and the second internal time from the count of the second oscillator of the display driver chip; use the display drive The chip is calculated to obtain the second compensation ratio; and the display driving chip is used to calculate the quotient of the ideal time count and the second compensation ratio to obtain the second correction time count.

本發明提出之另一種技術方案為提供一種調整顯示時鐘裝置，包含：處理單元；以及顯示單元，藉由顯示器驅動晶片耦接於處理單元；其中處理單元獲得第一外部時間，並傳送第一外部時間至顯示器驅動晶片做為第一內部時間；經過第一設定時間間隔，處理單元獲得第二外部時間，並傳送該第二外部時間至該顯示器驅動晶片；該顯示器驅動晶片從顯示器驅動晶片之第二震盪器的計數獲得第一內部計數值以及第二內部時間；顯示器驅動晶片經計算獲得第二補償比例；以及顯示器驅動晶片計算理想時間計數與第二補償比例之商值獲得第二校正時間計數。Another technical solution proposed by the present invention is to provide a display clock adjusting device, including: a processing unit; and a display unit, coupled to the processing unit by a display driver chip; wherein the processing unit obtains the first external time and transmits the first external time The time to the display driver chip is used as the first internal time; after the first set time interval, the processing unit obtains the second external time, and transmits the second external time to the display driver chip; the display driver chip is from the display driver chip The count of the second oscillator obtains the first internal count value and the second internal time; the display driver chip calculates the second compensation ratio; and the display driver chip calculates the quotient of the ideal time count and the second compensation ratio to obtain the second correction time count .

圖1A為調整顯示時間之一實施例示意圖。如圖1A所示，於第一設定Set1，處理單元110獲得一外部時間To1 = 08:00:00做為系統時間，並傳送To1至顯示器驅動晶片220做為第一內部時間Ti1 = 08:00:00。經過第一設定時間間隔P1 = 5 分鐘，於第二設定Set2，處理單元110獲得第二外部時間To2 = 08:10:00，並傳送到顯示驅動晶片220；顯示器驅動晶片220從顯示器驅動晶片220之第二震盪器230的計數獲得第一內部計數值Ci1 = 14400frame以及依理想計數3600 frame/min獲得第一二內部時間差Di12 = 4 min，獲得第二內部時間Ti2 = 08:04:00。顯示驅動晶片220計算第二外部時間To2 = 08:10:00與第二內部時間Ti2 = 08:04:00之差值獲得第二內外時間差D2 = 6分鐘，大於門檻值TH；顯示驅動晶片220將第二外部時間To2 = 08:10:00做為第二內部校正時間Tic2 = 08:10:00，並將第二內部校正時間Tic2 = 08:10:00取代該第二內部時間Ti2 = 08:04:00。於一較佳實施例，門檻值TH為2分鐘；當第二內外時間差D2大於2分鐘，判斷第二設定Set2為來自處理單元110外之時間校正，第二外部時間為正確時間，故於此情境不做時間補償校正，直接以第二外部時間To2 = 08:10:00做為第二內部校正時間Tic2 = 08:10:00，並將該第二內部校正時間Tic2取代該第二內部時間Ti2，故第二內部時間Ti2 = 08:10:00。於一實施例中，處理單元110接收來自應用程式之時間校正；於另一實施例中，處理單元110接收來自網路時間伺服器之時間校正。FIG. 1A is a schematic diagram of an embodiment of adjusting the display time. As shown in FIG. 1A, in the first setting Set1, the processing unit 110 obtains an external time To1 = 08:00:00 as the system time, and transmits To1 to the display driver chip 220 as the first internal time Ti1 = 08:00 :00. After the first set time interval P1 = 5 minutes, in the second set Set2, the processing unit 110 obtains the second external time To2 = 08:10:00, and transmits it to the display driver chip 220; the display driver chip 220 is from the display driver chip 220 The count of the second oscillator 230 obtains the first internal count value Ci1 = 14400 frame and the first and second internal time difference Di12 = 4 min based on the ideal count of 3600 frame/min, and the second internal time Ti2 = 08:04:00 is obtained. The display driver chip 220 calculates the difference between the second external time To2 = 08:10:00 and the second internal time Ti2 = 08:04:00 to obtain the second internal and external time difference D2 = 6 minutes, which is greater than the threshold TH; the display driver chip 220 Take the second external time To2 = 08:10:00 as the second internal correction time Tic2 = 08:10:00, and replace the second internal time Tic2 = 08:10:00 with the second internal time Ti2 = 08 :04:00. In a preferred embodiment, the threshold TH is 2 minutes; when the second internal and external time difference D2 is greater than 2 minutes, it is determined that the second setting Set2 is a time correction from outside the processing unit 110, and the second external time is the correct time. The situation does not make time compensation correction, directly use the second external time To2 = 08:10:00 as the second internal correction time Tic2 = 08:10:00, and replace the second internal time with the second internal correction time Tic2 Ti2, so the second internal time Ti2 = 08:10:00. In one embodiment, the processing unit 110 receives the time correction from the application program; in another embodiment, the processing unit 110 receives the time correction from the network time server.

以處理單元110獲得第一外部時間To1之步驟包含由其外部接收外部時間To或從處理單元110之第一震盪器130的計數獲得外部時間To。前者為處理單元110與外部理想時間所進行之時間校正，可為定期或不定期；後者為處理單元110依據其第一震盪器130之震盪計數所獲得之時間。若處理單元110未接收外部理想時間所進行之時間校正做為外部時間To，則以第一震盪器130之震盪計數所獲得之時間做為外部時間To。The step of obtaining the first external time To1 by the processing unit 110 includes receiving the external time To from the outside thereof or obtaining the external time To from the count of the first oscillator 130 of the processing unit 110. The former is the time correction performed by the processing unit 110 and the external ideal time, which can be regular or irregular; the latter is the time obtained by the processing unit 110 according to the oscillation count of its first oscillator 130. If the processing unit 110 does not receive the time correction performed by the external ideal time as the external time To, the time obtained by the oscillation count of the first oscillator 130 is used as the external time To.

圖1B為調整顯示時間之一實施例示意圖。圖1B與圖1A之差異在於圖1B之第二內外時間差D2小於門檻值TH。如圖1B所示，經過第一設定時間間隔P1 = 5 分鐘，於第二設定Set2，處理單元110獲得一第二外部時間To2 = 08:05:00，並傳送到顯示驅動晶片220；顯示驅動晶片220從顯示器驅動晶片220之第二震盪器230的計數獲得第一內部計數值14400frame以及第二內部時間Ti2 = 08:04:00。顯示驅動晶片220經計算獲得第二補償比例Rc2，並計算理想時間計數CL1與第二補償比例Rc2之商值獲得第二校正時間計數Cr2。顯示驅動晶片220計算第二外部時間To2 = 08:05:00與第二內部時間Ti2 = 08:04:00之差值獲得第二內外時間差D2=1分鐘，小於門檻值TH。於一較佳實施例，門檻值TH為2分鐘。於一較佳實施例，當第二內外時間差小於或等於門檻值，判斷為單純兩晶片因製程或溫度所造成各自振盪器計數的誤差，故進行補償校正。顯示驅動晶片220依據第二校正時間計數Cr2獲得第二內部校正時間Tic2，並將第二內部校正時間取Tic2代第二內部時間Ti2。FIG. 1B is a schematic diagram of an embodiment of adjusting the display time. The difference between FIG. 1B and FIG. 1A is that the second inner and outer time difference D2 in FIG. 1B is smaller than the threshold value TH. As shown in FIG. 1B, after the first set time interval P1 = 5 minutes, in the second set Set2, the processing unit 110 obtains a second external time To2 = 08:05:00, and transmits it to the display driver chip 220; The chip 220 obtains a first internal count value of 14400 frame and a second internal time Ti2 = 08:04:00 from the count of the second oscillator 230 of the display driving chip 220. The display driver chip 220 obtains the second compensation ratio Rc2 through calculation, and calculates the quotient of the ideal time count CL1 and the second compensation ratio Rc2 to obtain the second correction time count Cr2. The display driver chip 220 calculates the difference between the second external time To2 = 08:05:00 and the second internal time Ti2 = 08:04:00 to obtain the second internal and external time difference D2 = 1 minute, which is less than the threshold TH. In a preferred embodiment, the threshold TH is 2 minutes. In a preferred embodiment, when the second internal and external time difference is less than or equal to the threshold value, it is judged as the error of the respective oscillator counts of the two chips due to the manufacturing process or the temperature, so compensation correction is performed. The display driver chip 220 obtains the second internal calibration time Tic2 according to the second calibration time count Cr2, and takes the second internal calibration time Tic2 to replace the second internal time Ti2.

補償比例Rc包含主補償比例Rc_A及輔補償比例Rc_B。於一實施例中，補償比例Rc為主補償比例Rc_A，如圖2所示。於另一實施例中，補償比例Rc為主補償比例Rc1_A與輔補償比例Rc_B之和值(Rc_A+Rc_B)，如圖3及圖5所示。The compensation ratio Rc includes the main compensation ratio Rc_A and the auxiliary compensation ratio Rc_B. In one embodiment, the compensation ratio Rc is the main compensation ratio Rc_A, as shown in FIG. 2. In another embodiment, the compensation ratio Rc is the sum of the main compensation ratio Rc1_A and the auxiliary compensation ratio Rc_B (Rc_A+Rc_B), as shown in FIGS. 3 and 5.

圖2為調整顯示時間之一實施例示意圖。如圖2所示，經過第一設定時間間隔P1 = 5分鐘，於第二設定Set2，處理單元110獲得第二外部時間To2 = 08:05:00，並傳送該第二外部時間至該顯示器驅動晶片220；顯示驅動晶片220從顯示器驅動晶片220之第二震盪器230的計數獲得第一內部計數值Ci1 = 14400frame以及第二內部時間Ti2 = 08:04:00；顯示驅動晶片220計算第二外部時間To2 = 08:05:00與第一外部時間To1 = 08:00:00之差值獲得第一外部時間差Do12 = 5分鐘，並根據第一外部時間差與理想計數3600 frame/min經計算其乘積獲得第一外部計數值Co1 = 18000frame；顯示驅動晶片220計算第一外部計數值Co1 = 18000frame與第一內部計數值Ci1 = 14400frame之比值18000/14400獲得第二補償比例Rc2=第二主補償比例Rc2_A=1.25。顯示驅動晶片220計算理想時間計數CL1 =60 frame/sec與第二補償比例Rc2=1.25之商值獲得第二校正時間計數Cr2=48 frame/sec；將原本以60 frame轉一圈為一秒，校正為以48 frame轉一圈為一秒。藉由調整震盪器的計數方式做為時間調校，可避免因調整震盪器之震盪頻率做為時間調校而造成對電子裝置內其它需要與震盪器之震盪頻率做校準之電子元件的影響。Figure 2 is a schematic diagram of an embodiment of adjusting the display time. As shown in FIG. 2, after the first set time interval P1 = 5 minutes, in the second set Set2, the processing unit 110 obtains the second external time To2 = 08:05:00, and transmits the second external time to the display driver Chip 220; the display driver chip 220 obtains the first internal count value Ci1 = 14400frame and the second internal time Ti2 = 08:04:00 from the count of the second oscillator 230 of the display driver chip 220; the display driver chip 220 calculates the second external The difference between the time To2 = 08:05:00 and the first external time To1 = 08:00:00 obtains the first external time difference Do12 = 5 minutes, and the product is calculated based on the first external time difference and the ideal count of 3600 frame/min Obtain the first external count value Co1 = 18000frame; the display driver chip 220 calculates the ratio of the first external count value Co1 = 18000frame to the first internal count value Ci1 = 14400frame 18000/14400 Obtains the second compensation ratio Rc2 = the second main compensation ratio Rc2_A =1.25. The display driver chip 220 calculates the quotient of the ideal time count CL1=60 frame/sec and the second compensation ratio Rc2=1.25 to obtain the second correction time count Cr2=48 frame/sec; the original 60 frame rotation is one second, The correction is to make one turn at 48 frames as one second. By adjusting the counting method of the oscillator as the time adjustment, it is possible to avoid the influence on other electronic components in the electronic device that need to be calibrated with the oscillation frequency of the oscillator due to the adjustment of the oscillation frequency of the oscillator as the time adjustment.

如圖2所示，經過第二設定時間間隔P2 = 5分鐘，於第三設定Set3，處理單元110獲得第三外部時間To3=08:10:00，並傳送到顯示器驅動晶片220，重複上述於第二設定Set2之步驟以獲得第三校正時間計數Cr3=48 frame/sec；並重複此步驟進行後續之時間校正。於每次的設定時間間隔後重複步驟進行時間校正，故每次獲得之校正時間計數Cr並非固定值。於一實施例中，設定時間間隔為相同時間間隔，如圖2之第一設定時間間隔P1與第二設定時間間隔P2；於另一實施例中，設定時間間隔為不同時間間隔，如圖2之第二設定時間間隔P2與第三設定時間間隔P3。於圖2之實施例中，只針對處理單元110之第一震盪器130與顯示器驅動晶片220之第二震盪器230的震盪器偏移進行校正，故於第二設定Set2進行第一次校正時第二外部時間To2=08:05:00與Ti2第二內部時間Ti2=08:04:00兩者相差1分鐘，於後續校正，外部時間與內部時間會永遠維持1分鐘之差距。As shown in FIG. 2, after the second set time interval P2 = 5 minutes, in the third set Set3, the processing unit 110 obtains the third external time To3=08:10:00, and transmits it to the display driver chip 220, repeating the above The second step of setting Set2 to obtain the third correction time count Cr3=48 frame/sec; and repeat this step for subsequent time correction. The steps are repeated after each set time interval to perform time correction, so the correction time count Cr obtained each time is not a fixed value. In one embodiment, the set time interval is the same time interval, such as the first set time interval P1 and the second set time interval P2 as shown in FIG. 2; in another embodiment, the set time interval is different time intervals, as shown in FIG. The second set time interval P2 and the third set time interval P3. In the embodiment of FIG. 2, only the oscillator offset of the first oscillator 130 of the processing unit 110 and the second oscillator 230 of the display driver chip 220 are corrected, so when the second setting Set2 performs the first calibration The difference between the second external time To2=08:05:00 and the Ti2 second internal time Ti2=08:04:00 is 1 minute. After subsequent correction, the external time and the internal time will always maintain a 1-minute gap.

圖3為調整顯示時間之一實施例示意圖。圖3與圖2之差異在於，圖3以主補償比例Rc_A與輔補償比例Rc_B之和值(Rc_A+Rc_B)做為補償比例Rc。如圖3所示，於第二設定Set2，顯示驅動晶片220以上述方法獲得第二主補償比例Rc2_A=1.25。顯示驅動晶片220進一步依據第二內外時間D2差獲得所對應之第二輔補償比例Rc2_B。圖4為內外時間差與輔補償比例對應值之一實施例示意圖。於一實施例中，依據內外時間差D獲得所對應之輔補償比例Rc_B之方法為依據一圖表進行查找。於另一實施例中，依據內外時間差D獲得所對應之輔補償比例Rc_B之方法為依據預定義之函數進行轉換。如3及圖4所示，第二內外時間差D2=1min=60sec，對應之第二輔補償比例Rc2_B=10%=0.1，故第二補償比例Rc2= Rc2_A+Rc2_B=1.25+0.1=1.35，第二校正時間計數Cr2=44.4 frame/sec；將原本以60 frame轉一圈為一秒，校正為以44.4 frame轉一圈為一秒。於圖3之實施例中，除了針對處理單元110之第一震盪器130與顯示器驅動晶片220之第二震盪器230的震盪器偏移進行校正，同時進行差時補償，故外部時間與內部時間將差距愈來愈小，從第二內外時間差D2= 1min，第三內外時間差D3= 36/60min至第四內外時間差D4= 12/60min，當時間愈久則兩者趨於一致。Fig. 3 is a schematic diagram of an embodiment of adjusting the display time. The difference between Fig. 3 and Fig. 2 is that Fig. 3 uses the sum of the main compensation ratio Rc_A and the auxiliary compensation ratio Rc_B (Rc_A+Rc_B) as the compensation ratio Rc. As shown in FIG. 3, in the second setting Set2, the display driver chip 220 obtains the second main compensation ratio Rc2_A=1.25 by the above method. The display driver chip 220 further obtains the corresponding second auxiliary compensation ratio Rc2_B according to the second internal and external time difference D2. 4 is a schematic diagram of an embodiment of the corresponding value of the internal and external time difference and the auxiliary compensation ratio. In one embodiment, the method of obtaining the corresponding auxiliary compensation ratio Rc_B according to the internal and external time difference D is to search according to a graph. In another embodiment, the method of obtaining the corresponding auxiliary compensation ratio Rc_B according to the internal and external time difference D is to perform conversion according to a predefined function. As shown in 3 and Figure 4, the second internal and external time difference D2=1min=60sec, the corresponding second auxiliary compensation ratio Rc2_B=10%=0.1, so the second compensation ratio Rc2= Rc2_A+Rc2_B=1.25+0.1=1.35, Second, the correction time count Cr2=44.4 frame/sec; the original 60 frame rotation is one second, and 44.4 frame rotation is one second. In the embodiment of FIG. 3, in addition to correcting the oscillator offset between the first oscillator 130 of the processing unit 110 and the second oscillator 230 of the display driver chip 220, the time difference compensation is also performed, so the external time and internal time Make the difference smaller and smaller, from the second internal and external time difference D2 = 1min, the third internal and external time difference D3 = 36/60min to the fourth internal and external time difference D4 = 12/60min, the longer the time, the two tend to be consistent.

圖5為調整顯示時間之一實施例示意圖。圖5與圖3之差異在於，設定時間間隔可為不固定。當處理單元110於原設定時間間隔需發送外部時間給顯示器驅動晶片220時，可能因為當時正處理其他程式無法準時發送，造成延遲，即使於此種不固定時間間隔的情況下，仍可進行校正，使外部時間與內部時間趨於一致。Fig. 5 is a schematic diagram of an embodiment of adjusting the display time. The difference between FIG. 5 and FIG. 3 is that the set time interval may be not fixed. When the processing unit 110 needs to send the external time to the display driver chip 220 at the original set time interval, it may be delayed due to other programs being processed at the time and cannot be sent on time. Even in the case of such an irregular time interval, correction can still be made , Make the external time and internal time converge.

圖6為調整顯示時鐘裝置之一實施例示意圖。其所示裝置可進行圖1至圖5所述實施例之方法使用。如圖6所示，顯示單元210，藉由顯示器驅動晶片220耦接於處理單元110；處理單元110具有第一震盪器130，顯示器驅動晶片220具有第二震盪器230。於一實施例中，顯示單元210為電子裝置之顯示器，處理單元110為電子裝置之處理器。於最佳實施例中，顯示單元210為行動通訊裝置之顯示螢幕，處理單元110為行動通訊裝置之應用處理單元(Application Processor，AP)。處理單元110獲得第一外部時間To1，並傳送至顯示器驅動晶片220做為第一內部時間Ti1。於一實施例中，處理單元110接收來自應用程式之時間校正做為第一外部時間To1；於另一實施例中，處理單元110接收來自網路時間伺服器之時間校正做為第一外部時間To1。由於處理單元110並不會隨時做時間校正，故若處理單元110未接收外部理想時間所進行之時間校正做為外部時間To，則以第一震盪器130之震盪計數所獲得之時間做為外部時間To。於一實施例中，處理單元110所接收之外部時間To即為電子裝置之系統時間；於另一實施例中，顯示器驅動晶片220以第二震盪器230的計數獲得之內部時間Ti為電子裝置之顯示時間。Fig. 6 is a schematic diagram of an embodiment of a device for adjusting a display clock. The device shown can be used in the method of the embodiment described in FIGS. 1 to 5. As shown in FIG. 6, the display unit 210 is coupled to the processing unit 110 via the display driver chip 220; the processing unit 110 has a first oscillator 130, and the display driver chip 220 has a second oscillator 230. In one embodiment, the display unit 210 is a display of an electronic device, and the processing unit 110 is a processor of the electronic device. In the preferred embodiment, the display unit 210 is the display screen of the mobile communication device, and the processing unit 110 is the application processor (AP) of the mobile communication device. The processing unit 110 obtains the first external time To1 and transmits it to the display driving chip 220 as the first internal time Ti1. In one embodiment, the processing unit 110 receives the time correction from the application program as the first external time To1; in another embodiment, the processing unit 110 receives the time correction from the network time server as the first external time To1. Since the processing unit 110 does not perform time correction at any time, if the processing unit 110 does not receive the time correction performed by the external ideal time as the external time To, then the time obtained by the oscillation count of the first oscillator 130 is used as the external Time To. In one embodiment, the external time To received by the processing unit 110 is the system time of the electronic device; in another embodiment, the display driver chip 220 uses the internal time Ti obtained by the count of the second oscillator 230 as the electronic device The display time.

藉由本發明，可以使電子裝置顯示時間於調整前後不會產生過大之差距，避免產生顯示時間跳躍過大之情形；若處理單元無法準時傳送時間訊息，亦可於不固定之時間間隔調整顯示時間。此外，藉由校正處理單元與顯示器驅動晶片之震盪器因製程或溫度造成之偏移，校正後的內部時間與外部時間之時間差距可保持一致，不會愈差愈大。而進一步以內外時間差所對應之補償比例所進行之差時補償，可讓校正後的內部時間與外部時間趨於一致。By means of the present invention, the display time of the electronic device will not be too large before and after the adjustment, avoiding excessive display time jumps; if the processing unit cannot transmit the time information on time, the display time can also be adjusted at irregular time intervals. In addition, by correcting the deviation between the processing unit and the oscillator of the display driving chip due to manufacturing process or temperature, the time difference between the corrected internal time and the external time can be kept consistent, and the difference will not get worse. Furthermore, the time difference compensation based on the compensation ratio corresponding to the internal and external time difference can make the corrected internal time and the external time converge.

Set1:第一設定Set1: The first setting

Set2:第二設定Set2: second setting

Set3:第三設定Set3: third setting

Set4:第四設定Set4: Fourth setting

P1:第一設定時間間隔P1: The first set time interval

P2:第二設定時間間隔P2: Second set time interval

P3:第三設定時間間隔P3: Third set time interval

110:處理單元110: processing unit

130:第一震盪器130: First Oscillator

To:外部時間To: external time

To1:第一外部時間To1: the first external time

To2:第二外部時間To2: second external time

To3:第三外部時間To3: third external time

To4:第四外部時間To4: Fourth external time

Co1:第一外部計數值Co1: The first external count value

Co2:第二外部計數值Co2: second external count value

Co3:第三外部計數值Co3: third external count value

Do12:第一外部時間差Do12: the first external time difference

D:內外時間差D: Time difference between inside and outside

D2:第二內外時間差D2: The second time difference between inside and outside

D3:第三內外時間差D3: The third time difference between inside and outside

D4:第四內外時間差D4: The fourth time difference between inside and outside

TH:門檻值TH: Threshold

210:顯示單元210: display unit

220:顯示驅動晶片220: display driver chip

230:第二震盪器230: second oscillator

Ti1:第一內部時間Ti1: First internal time

Ti2:第二內部時間Ti2: second internal time

Ti3:第三內部時間Ti3: third internal time

Ti4:第四內部時間Ti4: Fourth internal time

Ci1:第一內部計數值Ci1: The first internal count value

Ci2:第二內部計數值Ci2: The second internal count value

Ci3:第三內部計數值Ci3: The third internal count value

Rc:補償比例Rc: Compensation ratio

Rc_A:主補償比例Rc_A: Main compensation ratio

Rc_B:輔補償比例Rc_B: auxiliary compensation ratio

Rc2:第二補償比例Rc2: Second compensation ratio

Rc2_A:第二主補償比例Rc2_A: Second main compensation ratio

Rc2_B:第二輔補償比例Rc2_B: Second auxiliary compensation ratio

Rc3:第三補償比例Rc3: Third compensation ratio

Rc3_A:第三主補償比例Rc3_A: The third main compensation ratio

Rc3_B:第三輔補償比例Rc3_B: Third auxiliary compensation ratio

CL1:理想時間計數CL1: ideal time count

Cr:校正時間計數Cr: Correction time count

Cr2:第二校正時間計數Cr2: second correction time count

Cr3:第三校正時間計數Cr3: third correction time count

Tic2:第二內部校正時間Tic2: Second internal correction time

本發明所附圖式說明如下： 圖1A為調整顯示時間之一實施例示意圖； 圖1B為調整顯示時間之一實施例示意圖； 圖2為調整顯示時間之一實施例示意圖； 圖3為調整顯示時間之一實施例示意圖； 圖4為內外時間差與輔補償比例對應值之一實施例示意圖； 圖5為調整顯示時間之一實施例示意圖； 圖6為調整顯示時鐘裝置之一實施例示意圖。The drawings of the present invention are described as follows: Fig. 1A is a schematic diagram of an embodiment of adjusting the display time; Fig. 1B is a schematic diagram of an embodiment of adjusting the display time; Fig. 2 is a schematic diagram of an embodiment of adjusting the display time; Fig. 3 is an adjustment display Fig. 4 is a schematic diagram of an embodiment of the corresponding value of the internal and external time difference and the auxiliary compensation ratio; Fig. 5 is a schematic diagram of an embodiment of adjusting the display time; Fig. 6 is a schematic diagram of an embodiment of the device for adjusting the display clock.

Set1:第一設定 Set1: The first setting

Set2:第二設定 Set2: second setting

Set3:第三設定 Set3: third setting

Set4:第四設定 Set4: Fourth setting

P1:第一設定時間間隔 P1: The first set time interval

P2:第二設定時間間隔 P2: Second set time interval

P3:第三設定時間間隔 P3: Third set time interval

P4:第四設定時間間隔 P4: The fourth set time interval

To1:第一外部時間 To1: the first external time

To2:第二外部時間 To2: second external time

To3:第三外部時間 To3: third external time

To4:第四外部時間 To4: Fourth external time

Do12:第一外部時間差 Do12: the first external time difference

Co1:第一外部計數值 Co1: The first external count value

Co2:第二外部計數值 Co2: second external count value

Co3:第三外部計數值 Co3: third external count value

Ti1:第一內部時間 Ti1: First internal time

Ti2:第二內部時間 Ti2: second internal time

Ti3:第三內部時間 Ti3: third internal time

Ti4:第四內部時間 Ti4: Fourth internal time

Ci1:第一內部計數值 Ci1: The first internal count value

Ci2:第二內部計數值 Ci2: The second internal count value

Ci3:第三內部計數值 Ci3: The third internal count value

CL1:理想時間計數 CL1: ideal time count

Cr2:第二校正時間計數 Cr2: second correction time count

Cr3:第三校正時間計數 Cr3: third correction time count

Rc2:第二補償比例 Rc2: Second compensation ratio

Rc2_A:第二主補償比例 Rc2_A: Second main compensation ratio

Rc2_B:第二輔補償比例 Rc2_B: Second auxiliary compensation ratio

Claims (14)

一種調整顯示時鐘的方法，包含：(A)以一處理單元獲得一第一外部時間，並傳送該第一外部時間至一顯示器驅動晶片做為一第一內部時間；(B)經過一第一設定時間間隔，以該處理單元獲得一第二外部時間，並傳送該第二外部時間至該顯示器驅動晶片；(C)以該顯示器驅動晶片從該顯示器驅動晶片之一第二震盪器的計數獲得一第一內部計數值以及一第二內部時間；(D)以該顯示器驅動晶片經計算獲得一第二補償比例；以及(E)以該顯示器驅動晶片計算一理想時間計數與該第二補償比例之商值獲得一第二校正時間計數；其中該第二補償比例包含一第二主補償比例；以及計算該第二補償比例之步驟進一步包含：(D1)以該顯示器驅動晶片計算該第二外部時間與該第一外部時間之差值獲得一第一外部時間差，並根據該第一外部時間差經計算獲得一第一外部計數值；以及(D2)以該顯示器驅動晶片計算該第一外部計數值與該第一內部計數值之比值獲得該第二主補償比例。 A method for adjusting a display clock includes: (A) obtaining a first external time by a processing unit, and transmitting the first external time to a display driver chip as a first internal time; (B) passing a first Set the time interval to obtain a second external time with the processing unit, and transmit the second external time to the display driver chip; (C) Obtain the display driver chip from the count of a second oscillator of the display driver chip A first internal count value and a second internal time; (D) using the display driver chip to calculate a second compensation ratio; and (E) using the display driver chip to calculate an ideal time count and the second compensation ratio Obtaining a second correction time count for the quotient; wherein the second compensation ratio includes a second main compensation ratio; and the step of calculating the second compensation ratio further includes: (D1) calculating the second external compensation using the display driver chip The difference between the time and the first external time obtains a first external time difference, and obtains a first external count value through calculation according to the first external time difference; and (D2) calculates the first external count value using the display driver chip The ratio to the first internal count value obtains the second main compensation ratio. 如請求項1所述之方法，其中：以該處理單元獲得該第一外部時間之步驟進一步包含：(A1)以該處理單元由其外部接收該第一外部時間。 The method according to claim 1, wherein: the step of obtaining the first external time by the processing unit further comprises: (A1) receiving the first external time from the outside of the processing unit. 如請求項2所述之方法，其中： 以該處理單元獲得該第一外部時間之步驟進一步包含：(A2)若該處理單元未接收到來自其外部之該第一外部時間，則從該處理單元之一第一震盪器的計數獲得該第一外部時間。 The method described in claim 2, wherein: The step of obtaining the first external time by the processing unit further includes: (A2) If the processing unit does not receive the first external time from outside, obtaining the first external time from the count of one of the first oscillators of the processing unit The first external time. 如請求項1所述之方法，進一步包含：(F)以該顯示器驅動晶片計算該第二外部時間與該第二內部時間之差值獲得一第二內外時間差；以及(G)若該第二內外時間差大於一門檻值，以該顯示器驅動晶片將該第二外部時間做為一第二內部校正時間，並將該第二內部校正時間取代該第二內部時間。 The method according to claim 1, further comprising: (F) calculating the difference between the second external time and the second internal time by the display driver chip to obtain a second internal and external time difference; and (G) if the second If the difference between the internal and external time is greater than a threshold, the display driver chip uses the second external time as a second internal calibration time, and replaces the second internal time with the second internal calibration time. 如請求項4所述之方法，進一步包含：(H)若該第二內外時間差不大於一門檻值，以該顯示器驅動晶片依據該第二校正時間計數獲得一第二內部校正時間，並將該第二內部校正時間取代該第二內部時間。 The method according to claim 4, further comprising: (H) if the second internal and external time difference is not greater than a threshold, the display driver chip is used to obtain a second internal calibration time according to the second calibration time count, and the The second internal correction time replaces the second internal time. 如請求項1所述之方法，其中該第二補償比例進一步包含一第二輔補償比例；以及計算該第二補償比例之步驟進一步包含：(D3)以該處理單元經計算獲得該第二輔補償比例；以及(D4)以該處理單元經計算該第二主補償比例及該第二輔補償比例之和值獲得該第二補償比例。 The method according to claim 1, wherein the second compensation ratio further includes a second auxiliary compensation ratio; and the step of calculating the second compensation ratio further includes: (D3) calculating the second auxiliary compensation ratio by the processing unit Compensation ratio; and (D4) obtaining the second compensation ratio based on the sum of the second main compensation ratio and the second auxiliary compensation ratio calculated by the processing unit. 如請求項6所述之方法，其中獲得該第二輔補償比例之步驟進一步包含： (D3a)以該顯示器驅動晶片計算該第二外部時間與該第二內部時間之差值獲得一第一內外時間差；以及(D3b)以該顯示器驅動晶片依據該第一內外時間差獲得所對應之該第二輔補償比例。 The method according to claim 6, wherein the step of obtaining the second auxiliary compensation ratio further comprises: (D3a) using the display driver chip to calculate the difference between the second external time and the second internal time to obtain a first internal and external time difference; and (D3b) using the display driver chip to obtain the corresponding one according to the first internal and external time difference The second auxiliary compensation ratio. 一種調整顯示時鐘的裝置，包含：一處理單元；以及一顯示單元，包含一顯示器驅動晶片，且藉由該顯示器驅動晶片耦接於該處理單元；其中該處理單元獲得一第一外部時間，並傳送該第一外部時間至該顯示器驅動晶片做為一第一內部時間；經過一第一設定時間間隔，該處理單元獲得一第二外部時間，並傳送該第二外部時間至該顯示器驅動晶片；該顯示器驅動晶片從該顯示器驅動晶片之一第二震盪器的計數獲得一第一內部計數值以及一第二內部時間；該顯示器驅動晶片經計算獲得一第二補償比例；該顯示器驅動晶片計算一理想時間計數與該第二補償比例之商值獲得一第二校正時間計數；該第二補償比例包含一第二主補償比例；該顯示器驅動晶片計算該第二外部時間與該第一外部時間之差值獲得一第一外部時間差，並根據該第一外部時間差經計算獲得一第一外部計數值；以及 該顯示器驅動晶片計算該第一外部計數值與該第一內部計數值之比值獲得該第二主補償比例。 A device for adjusting a display clock includes: a processing unit; and a display unit including a display driver chip, and is coupled to the processing unit through the display driver chip; wherein the processing unit obtains a first external time, and Transmitting the first external time to the display driving chip as a first internal time; after a first set time interval, the processing unit obtains a second external time, and transmitting the second external time to the display driving chip; The display driver chip obtains a first internal count value and a second internal time from the count of a second oscillator of the display driver chip; the display driver chip obtains a second compensation ratio by calculation; the display driver chip calculates a The quotient of the ideal time count and the second compensation ratio obtains a second correction time count; the second compensation ratio includes a second main compensation ratio; the display driving chip calculates the difference between the second external time and the first external time The difference value obtains a first external time difference, and a first external count value is obtained by calculation according to the first external time difference; and The display driving chip calculates the ratio of the first external count value to the first internal count value to obtain the second main compensation ratio. 如請求項8所述之裝置，進一步包含：該處理單元由其外部接收該第一外部時間。 The device according to claim 8, further comprising: the processing unit receives the first external time from its outside. 如請求項9所述之裝置，進一步包含：若該處理單元未接收到來自其外部之該第一外部時間，則從該處理單元之一第一震盪器的計數獲得該第一外部時間。 The device according to claim 9, further comprising: if the processing unit does not receive the first external time from outside of the processing unit, obtaining the first external time from a count of a first oscillator of the processing unit. 如請求項8所述之裝置，進一步包含：該顯示器驅動晶片計算該第二外部時間與該第二內部時間之差值獲得一第二內外時間差；以及若該第二內外時間差大於一門檻值，該顯示器驅動晶片將該第二外部時間取代該第二內部時間，並將該第二外部時間顯示於該顯示單元。 The device according to claim 8, further comprising: the display driving chip calculates the difference between the second external time and the second internal time to obtain a second internal and external time difference; and if the second internal and external time difference is greater than a threshold, The display driving chip replaces the second internal time with the second external time, and displays the second external time on the display unit. 如請求項11所述之裝置，進一步包含：若該第二內外時間差不大於一門檻值，該顯示器驅動晶片依據該第二校正時間計數獲得一第二內部校正時間；以及該顯示器驅動晶片將該第二內部校正時間取代該第二內部時間，並將該第二內部校正時間顯示於該顯示單元。 The device according to claim 11, further comprising: if the second internal and external time difference is not greater than a threshold value, the display driver chip obtains a second internal calibration time according to the second calibration time count; and the display driver chip The second internal calibration time replaces the second internal time, and the second internal calibration time is displayed on the display unit. 如請求項8所述之裝置，該顯示器驅動晶片經計算獲得之該第二補償比例進一步包含一第二輔補償比例；其中：該顯示器驅動晶片經計算獲得該第二輔補償比例；以及該顯示器驅動晶片經計算該第二主補償比例及該第二輔補償比例之和值獲得該第二補償比例。 According to the device of claim 8, the second compensation ratio calculated by the display driving chip further includes a second auxiliary compensation ratio; wherein: the display driving chip is calculated to obtain the second auxiliary compensation ratio; and the display The driving chip obtains the second compensation ratio by calculating the sum of the second main compensation ratio and the second auxiliary compensation ratio. 如請求項13所述之裝置，該顯示器驅動晶片經計算獲得該第二輔補償比例進一步包含：該顯示器驅動晶片計算該第二外部時間與該第二內部時間之差值獲得一第一內外時間差；以及該顯示器驅動晶片依據該第一內外時間差獲得所對應之該第二輔補償比例。 According to the device of claim 13, the display driver chip calculating the second auxiliary compensation ratio further includes: the display driver chip calculating the difference between the second external time and the second internal time to obtain a first internal and external time difference And the display driver chip obtains the corresponding second auxiliary compensation ratio according to the first internal and external time difference.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI364637B (en) * 2007-12-07 2012-05-21 Mediatek Inc System and method for real time clock calibration
CN102520608A (en) * 2011-12-19 2012-06-27 深圳市航盛电子股份有限公司 Method and device for automatically correcting automobile vehicle-mounted clock
TWI413397B (en) * 2008-06-10 2013-10-21
TWI594091B (en) * 2015-08-18 2017-08-01 Nat Chung-Shan Inst Of Science And Tech Time correction method and system thereof

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4903251A (en) * 1989-09-05 1990-02-20 Ford Motor Company Accuracy adjustment for time-of-day clock using a microcontroller
GB2311878A (en) * 1996-04-01 1997-10-08 Thomson Multimedia Sa VCR Clock correction
KR100396785B1 (en) * 2001-10-19 2003-09-02 엘지전자 주식회사 Apparatus and method for compensating time error of gsm terminal
CN1801008A (en) * 2004-12-30 2006-07-12 昆达电脑科技(昆山)有限公司 Automatic time correction method for electronic device
WO2006090831A1 (en) * 2005-02-24 2006-08-31 Seiko Epson Corporation Clock signal outputting device and its control method, and electronic device and its control method
JP2007078405A (en) * 2005-09-12 2007-03-29 Kojima Press Co Ltd Timing program of software timepiece
KR100944705B1 (en) * 2008-09-04 2010-02-26 한신전자 (주) Automatic time adjusting device of master watch and slave watch for a ship using nmea telecommunication and pulse
KR102071573B1 (en) * 2013-06-13 2020-03-02 삼성전자주식회사 Display driver ic for controlling a frequency of an oscillator using an external clock signal, device having the same, and methods thereof
TWI543040B (en) * 2014-09-03 2016-07-21 創為精密材料股份有限公司 Compensation time computing method and device for clock difference
CN104901687B (en) * 2015-05-20 2018-04-24 珠海市杰理科技股份有限公司 Clock frequency calibration method and system
US9927831B2 (en) * 2015-08-25 2018-03-27 Pixart Imaging Inc. Navigation system and clock calibration method thereof

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI364637B (en) * 2007-12-07 2012-05-21 Mediatek Inc System and method for real time clock calibration
TWI413397B (en) * 2008-06-10 2013-10-21
CN102520608A (en) * 2011-12-19 2012-06-27 深圳市航盛电子股份有限公司 Method and device for automatically correcting automobile vehicle-mounted clock
TWI594091B (en) * 2015-08-18 2017-08-01 Nat Chung-Shan Inst Of Science And Tech Time correction method and system thereof

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