TWI685741B - Controlling device for storage system and storage space recovery method thereof - Google Patents

Controlling device for storage system and storage space recovery method thereof Download PDF

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TWI685741B
TWI685741B TW105115953A TW105115953A TWI685741B TW I685741 B TWI685741 B TW I685741B TW 105115953 A TW105115953 A TW 105115953A TW 105115953 A TW105115953 A TW 105115953A TW I685741 B TWI685741 B TW I685741B
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data
read
operating system
preset
control device
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TW201741881A (en
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林旺聖
陳政宇
王嗣鈞
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大陸商合肥沛睿微電子股份有限公司
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Abstract

The present disclosure illustrates a controlling device for a storage system. The controlling device includes a data reading/writing unit and a determining unit. The determining unit is coupled to the data reading/writing unit. The data reading/writing unit reads at least one data stored in a storage device. The determining unit receives the data, and determines whether the data accords with one of a plurality of preset data forms. When the data accords with one of the plurality of preset data forms, the determining unit outputs a determining signal to a firmware unit. The firmware unit updates a logic-to-physical table based upon the determining signal, and guides a logical address of the data to one of a plurality of dummy data spaces of a memory cell. The dummy data spaces respectively store the preset data forms. Finally, the controlling device controls the storage device to erase the data.

Description

儲存系統之控制裝置及其儲存空間回收方法 Control device of storage system and storage space recovery method

本案係關於一種儲存系統之控制裝置，且特別是一種可讀寫快閃記憶體的控制裝置，以及其儲存空間回收方法。 This case relates to a control device for a storage system, and particularly to a control device that can read and write flash memory, and a method for recovering its storage space.

近年來，智慧型手機、平板電腦、桌上型電腦、數位相機等電子裝置迅速成長，造成消費者對於電子裝置內置之儲存裝置的需求亦增加，而快閃記憶體(Flash Memory)便是近年來電子產業中常用的儲存裝置。 In recent years, smart phones, tablet computers, desktop computers, digital cameras and other electronic devices have grown rapidly, resulting in increased consumer demand for storage devices built into electronic devices, and flash memory (Flash Memory) has been in recent years A storage device commonly used in the electronics industry.

快閃記憶體是一種非揮發性記憶體。以非及閘型(NAND)的快閃記憶體為例，快閃記憶體常被應用在記憶卡、通用序列匯流排閃存裝置(USB Flash Device)、固態硬碟(Solid State Disk，SSD)等儲存裝置。快閃記憶體所提供的儲存陣列係由複數個區塊(Blocks)所構成。各區塊包括複數頁(Pages)。快閃記憶體在複製或抹除(Erase)資料時，係以整個區塊內的所有頁為單位來進行。 Flash memory is a non-volatile memory. Taking NAND flash memory as an example, flash memory is often used in memory cards, USB flash devices, Solid State Disk (SSD), etc. Storage device. The storage array provided by the flash memory is composed of a plurality of blocks. Each block includes plural pages (Pages). When flash memory is copying or erasing (Erase) data, all pages in the entire block are used as a unit.

然而，傳統的快閃記憶體存在著幾個問題。傳統的快閃記憶體在複製資料時，係以區塊的邏輯位置來進行資料搬移。在複製資料的過程中，有用的資料與無用的資料(例如磁碟的空白區域)會一起被搬移。這些無用的資料會長時間儲存在傳統的快閃記憶體中，使得傳統的快閃記憶體需要執行空間回收(Garbage Collection)來清除無用的資料。傳統的快閃記憶體內的空白儲存空 間越少，執行空間回收的次數將增加，使得傳統的快閃記憶體的壽命減少。此外，當傳統的快閃記憶體寫入無用的資料時，傳統的快閃記憶體亦需要執行讀取-修改-寫入(Read-Modify-Write)的動作，使得中央處理單元的使用率上升。 However, there are several problems with traditional flash memory. When copying data, the traditional flash memory uses the logical position of the block to move the data. In the process of copying data, useful data and useless data (such as blank areas on the disk) will be moved together. These useless data will be stored in the traditional flash memory for a long time, so that the traditional flash memory needs to perform a space collection (Garbage Collection) to clear the useless data. Blank storage space in traditional flash memory The less time there is, the more times the space reclamation will be performed, making the life of traditional flash memory less. In addition, when the conventional flash memory writes useless data, the conventional flash memory also needs to perform a read-modify-write (Read-Modify-Write) action, which increases the utilization rate of the central processing unit .

本案實施例提供一種儲存系統之控制裝置。控制裝置包括資料讀寫電路以及判斷電路。判斷電路耦接於資料讀寫電路。資料讀寫電路用以讀取儲存裝置內儲存的至少一資料。判斷電路用以接收該資料，並判斷資料是否符合複數個預設資料形式之其中一者。當資料符合該些預設資料形式之其中一者，判斷電路輸出判斷訊號至韌體單元。接著，韌體單元根據判斷訊號更新邏輯實體對照表，並將資料之邏輯位置指向記憶體單元之複數個虛設資料空間之其中一者。該些虛設資料空間分別儲存了該些預設資料形式。最後，控制裝置控制儲存裝置清除資料。 The embodiment of the present invention provides a control device of a storage system. The control device includes a data reading and writing circuit and a judgment circuit. The judgment circuit is coupled to the data reading and writing circuit. The data read-write circuit is used to read at least one data stored in the storage device. The judging circuit is used to receive the data and judge whether the data conforms to one of a plurality of preset data forms. When the data conforms to one of the preset data forms, the judgment circuit outputs a judgment signal to the firmware unit. Then, the firmware unit updates the logical entity comparison table according to the judgment signal, and points the logical position of the data to one of the plurality of dummy data spaces of the memory unit. The dummy data spaces respectively store the preset data forms. Finally, the control device controls the storage device to clear the data.

本案實施例提供一種儲存空間回收方法。儲存空間回收方法適用於控制裝置。儲存空間回收方法包括以下步驟。步驟A：讀取儲存裝置內儲存的至少一資料。步驟B：判斷資料是否符合複數個預設資料形式之其中一者。步驟C：當資料符合該些預設資料形式之其中一者，輸出判斷訊號至韌體單元。步驟D：根據判斷訊號更新邏輯實體對照表，並將資料之邏輯位置指向記憶體單元之複數個虛設資料空間之其中一者。該些虛設資料空間分別儲存了該些預設資料形式。步驟E：控制儲存裝置清除資料。 The embodiment of the present case provides a storage space recovery method. The storage space recovery method is suitable for the control device. The storage space recovery method includes the following steps. Step A: Read at least one data stored in the storage device. Step B: Determine whether the data conforms to one of the multiple preset data forms. Step C: When the data conforms to one of the preset data forms, a judgment signal is output to the firmware unit. Step D: Update the logical entity comparison table according to the judgment signal, and point the logical position of the data to one of the plurality of dummy data spaces of the memory unit. The dummy data spaces respectively store the preset data forms. Step E: Control the storage device to clear the data.

綜上所述，本案實施例所提供之儲存系統之控制裝置及其儲存空間回收方法，可以將儲存裝置中無用的資料清除，進而減少儲存裝置執行空間回收的次數，使得儲存裝置的壽命延長。此外，當作業系統欲讀取的資料符合預設資料形式時，作業系統可直接從記憶體單元中獲得資料，而不需要透過儲存裝置，使得作業系 統的資料讀取速度提升。 In summary, the control device of the storage system and the storage space recovery method provided in the embodiment of the present invention can clear useless data in the storage device, thereby reducing the number of times the storage device performs space recovery, and prolonging the life of the storage device. In addition, when the data to be read by the operating system conforms to the preset data format, the operating system can obtain the data directly from the memory unit without the need to pass through the storage device, making the operating system The speed of data reading has been improved.

1‧‧‧儲存系統 1‧‧‧Storage system

10‧‧‧控制裝置 10‧‧‧Control device

11‧‧‧儲存裝置 11‧‧‧Storage device

12‧‧‧記憶體單元 12‧‧‧Memory unit

13‧‧‧韌體單元 13‧‧‧Firmware unit

14‧‧‧作業系統 14‧‧‧Operating system

100‧‧‧資料讀寫電路 100‧‧‧Data reading and writing circuit

101‧‧‧判斷電路 101‧‧‧ Judgment circuit

102‧‧‧傳輸電路 102‧‧‧Transmission circuit

103‧‧‧資料抹除電路 103‧‧‧Erasing circuit

S301~S305‧‧‧步驟流程 S301~S305‧‧‧Step flow

圖1是本案實施例所提供之儲存系統的結構示意圖。 FIG. 1 is a schematic structural diagram of a storage system provided by an embodiment of the present invention.

圖2是本案實施例所提供之控制裝置的結構示意圖。 FIG. 2 is a schematic structural diagram of the control device provided by the embodiment of the present invention.

圖3是本案實施例所提供之儲存空間回收方法的流程圖。 FIG. 3 is a flowchart of the storage space recovery method provided by the embodiment of the present invention.

圖4A是本案實施例所提供之更新前的邏輯實體對照表的示意圖。 FIG. 4A is a schematic diagram of a logical entity comparison table before updating provided by an embodiment of the present invention.

圖4B是本案實施例所提供之更新後的邏輯實體對照表的示意圖。 FIG. 4B is a schematic diagram of the updated logical entity comparison table provided by the embodiment of the present invention.

請參閱圖1，圖1是本案實施例所提供之儲存系統的結構示意圖。儲存系統1可設置於為智慧型手機、平板電腦、桌上型電腦、數位相機等電子裝置。儲存系統1包括控制裝置10、儲存裝置11、記憶體單元12、韌體單元13以及作業系統14。控制裝置10耦接於儲存裝置11、記憶體單元12、韌體單元13以及作業系統14。記憶體單元12耦接於作業系統14。韌體單元13耦接於作業系統14。 Please refer to FIG. 1, which is a schematic structural diagram of a storage system provided by an embodiment of the present invention. The storage system 1 can be installed in electronic devices such as smart phones, tablet computers, desktop computers, digital cameras, and the like. The storage system 1 includes a control device 10, a storage device 11, a memory unit 12, a firmware unit 13, and an operating system 14. The control device 10 is coupled to the storage device 11, the memory unit 12, the firmware unit 13 and the operating system 14. The memory unit 12 is coupled to the operating system 14. The firmware unit 13 is coupled to the operating system 14.

控制裝置10用以讀取儲存裝置11內儲存的資料，並判斷讀取到的資料是否符合複數個預設資料形式之其中一者。接著，控制裝置10根據判斷結果輸出一判斷訊號至韌體單元13。另一方面，控制裝置10亦可將資料寫入儲存裝置11。 The control device 10 is used to read the data stored in the storage device 11 and determine whether the read data conforms to one of a plurality of preset data forms. Then, the control device 10 outputs a judgment signal to the firmware unit 13 according to the judgment result. On the other hand, the control device 10 can also write data into the storage device 11.

進一步說，控制裝置10可依作業系統14輸出的資料讀取請求以讀取儲存裝置11內儲存的資料，並判斷資料是否符合該些預設資料形式之其中一者。當控制裝置10讀取到的資料符合其中一種預設資料形式，控制裝置10通知韌體單元13更新內部資料。接著，控制裝置10控制儲存裝置11清除該資料。另一方面，當 作業系統14沒有輸出資料讀取請求時，控制裝置10每隔一段時間執行背景掃瞄讀取(Background Scan Read)，以讀取儲存裝置11內的資料，藉此達到資料保留。若控制裝置10沒有週期性地讀取儲存裝置11內的資料，儲存裝置11將會慢慢地漏電，使得資料流失。至於控制裝置10的內部結構將於下方段落配合圖2進行說明。 Furthermore, the control device 10 can read the data stored in the storage device 11 according to the data reading request output by the operating system 14 and determine whether the data conforms to one of the preset data formats. When the data read by the control device 10 conforms to one of the preset data formats, the control device 10 notifies the firmware unit 13 to update the internal data. Then, the control device 10 controls the storage device 11 to clear the data. On the other hand, when When the operating system 14 does not output a data reading request, the control device 10 performs Background Scan Read at regular intervals to read the data in the storage device 11 to achieve data retention. If the control device 10 does not read the data in the storage device 11 periodically, the storage device 11 will slowly leak electricity, causing data loss. The internal structure of the control device 10 will be described in conjunction with FIG. 2 in the following paragraphs.

於本實施例中，該些預設資料形式中的第一預設資料形式係二進制全0資料(即十六進制全0x00資料)，而該些預設資料形式中的第二預設資料形式係二進制全1資料(即十六進制全0xFF資料)。對於儲存系統1來說，二進制全0資料以及二進制全1資料可能係無用的資料。然而，本發明並不以此為限。於其他實施例中，所屬技術領域具有通常知識者亦可自行設計其他預設資料形式，本案並不對此做限制。 In this embodiment, the first preset data format among the preset data formats is binary all 0 data (ie, hexadecimal all 0x00 data), and the second preset data among the preset data formats The format is binary all 1 data (ie all hex 0xFF data). For the storage system 1, binary all-zero data and binary all-one data may be useless data. However, the invention is not limited to this. In other embodiments, those with ordinary knowledge in the technical field can also design other preset data forms by themselves, which is not limited in this case.

儲存裝置11係一種可複寫式非揮發性記憶體，用以儲存資料。舉例來說，儲存裝置11為一種固態硬碟。儲存裝置11可包括基於浮動閘極或電荷收集技術之非及閘型的快閃記憶體(NAND Flash)、非或閘型的快閃記憶體(NOR Flash)、可抹除可程式化唯讀記憶體(EPROM)、電可抹除可程式化唯讀記憶體(EEPROM)或其任何組合。 The storage device 11 is a rewritable non-volatile memory for storing data. For example, the storage device 11 is a solid state drive. The storage device 11 may include NAND flash memory (NAND Flash), NOR flash memory (NOR Flash), erasable and programmable read-only based on floating gate or charge collection technology EPROM, electrically erasable and programmable read-only memory (EEPROM), or any combination thereof.

儲存裝置11係由複數個區塊所構成，且該些區塊分別包括複數頁。儲存裝置11提供其他裝置(例如控制裝置10)根據實體頁之位址或實體區塊之位址等實體位址讀取或寫入儲存裝置11內的儲存媒體。 The storage device 11 is composed of a plurality of blocks, and the blocks respectively include a plurality of pages. The storage device 11 provides other devices (such as the control device 10) to read or write the storage medium in the storage device 11 according to physical addresses such as the address of a physical page or the address of a physical block.

記憶體單元12係任何類型之揮發性記憶體，用以暫存資料。舉例來說，記憶體單元12係靜態隨機存取記憶體(SRAM)、動態隨機存取記憶體(DRAM)、同步動態隨機存取記憶體(SDRAM)、雙資料速率動態隨機存取記憶體(DDR DRAM)、快取記憶體、唯讀記憶體(ROM)或其任何組合。本實施例係以記憶體單元12為動態 隨機存取記憶體為例。 The memory unit 12 is any type of volatile memory for temporarily storing data. For example, the memory unit 12 is static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), dual data rate dynamic random access memory ( DDR DRAM), cache memory, read-only memory (ROM), or any combination thereof. In this embodiment, the memory unit 12 is dynamic Take random access memory as an example.

值得一提的是，記憶體單元12包括複數個虛設資料空間，該些虛設資料空間分別儲存了該些預設資料形式。舉例來說，記憶體單元12之第一虛設資料空間中儲存了第一預設資料形式(即二進制全0資料)，而記憶體單元12之第二虛設資料空間中儲存了第二預設資料形式(即二進制全1資料)。附帶一提，於本實施例中，第一虛設資料空間的實體位址係00，而第二虛設資料空間的實體位址係FF。 It is worth mentioning that the memory unit 12 includes a plurality of dummy data spaces, and the dummy data spaces respectively store the preset data forms. For example, the first dummy data space of the memory unit 12 stores the first preset data form (that is, binary all-zero data), and the second dummy data space of the memory unit 12 stores the second preset data Form (that is, binary all 1 data). Incidentally, in this embodiment, the physical address of the first dummy data space is 00, and the physical address of the second dummy data space is FF.

韌體單元13用以儲存一韌體。韌體單元130例如為唯讀記憶體或快閃記憶體，而韌體例如為基本輸入輸出系統(Basic Input or Output System，BIOS)、可延伸韌體介面(Extensible Firmware Interface，EFI)BIOS或聯合可延伸韌體介面(Unified Extensible Firmware Interface，UEFI)BIOS等。此外，韌體單元13還儲存了一邏輯實體對照表。邏輯實體對照表記錄了韌體單元13內的邏輯位址與儲存裝置11內的實體位址之對應關係。韌體單元13根據控制裝置10提供的判斷訊號更新邏輯實體對照表，並將判斷訊號內指示的資料之邏輯位置指向記憶體單元12之該些虛設資料空間之其中一者。詳細的更新流程相於下方段落配合圖3、4A、4B進行說明。 The firmware unit 13 is used to store a firmware. The firmware unit 130 is, for example, read-only memory or flash memory, and the firmware is, for example, Basic Input or Output System (BIOS), Extensible Firmware Interface (EFI) BIOS, or integrated Extensible Firmware Interface (Unified Extensible Firmware Interface, UEFI) BIOS, etc. In addition, the firmware unit 13 also stores a logical entity comparison table. The logical entity comparison table records the correspondence between the logical address in the firmware unit 13 and the physical address in the storage device 11. The firmware unit 13 updates the logical entity comparison table according to the judgment signal provided by the control device 10, and points the logical position of the data indicated in the judgment signal to one of the dummy data spaces of the memory unit 12. The detailed update process is described in the following paragraphs in conjunction with FIGS. 3, 4A, and 4B.

作業系統14用以操作儲存系統1。具體來說，作業系統14可以輸出資料讀取請求給韌體單元13，韌體單元13再根據邏輯實體對照表命令控制裝置10從儲存裝置11獲取資料。資料讀取請求包括作業系統14欲讀取之資料的邏輯位址。值得一提的是，當作業系統14欲讀取的資料符合該些預設資料形式之其中一者，韌體單元13通知作業系統14直接讀取記憶體單元12中對應的該些虛設資料空間，以直接獲得作業系統14想要的資料。 The operating system 14 is used to operate the storage system 1. Specifically, the operating system 14 can output a data read request to the firmware unit 13, and the firmware unit 13 instructs the control device 10 to obtain data from the storage device 11 according to the logical entity comparison table. The data read request includes the logical address of the data to be read by the operating system 14. It is worth mentioning that when the data to be read by the operating system 14 conforms to one of the preset data forms, the firmware unit 13 notifies the operating system 14 to directly read the corresponding dummy data spaces in the memory unit 12 In order to directly obtain the information that the operating system 14 wants.

請參閱圖2，圖2是本案實施例所提供之控制裝置的結構示意圖。控制裝置10包括資料讀寫電路100、判斷電路101、傳輸電 路102以及資料抹除電路103。資料讀寫電路100耦接於儲存裝置11、判斷電路101以及傳輸電路102。判斷電路101耦接於韌體單元13、傳輸電路102以及資料抹除電路103。傳輸電路102耦接於記憶體單元12以及韌體單元13。資料抹除電路103耦接於儲存裝置11。 Please refer to FIG. 2, which is a schematic structural view of the control device provided by the embodiment of the present invention. The control device 10 includes a data read-write circuit 100, a judgment circuit 101, a transmission circuit 路102和材料擦保护电路103。 102 and the data erase circuit 103. The data read-write circuit 100 is coupled to the storage device 11, the determination circuit 101 and the transmission circuit 102. The judgment circuit 101 is coupled to the firmware unit 13, the transmission circuit 102 and the data erasing circuit 103. The transmission circuit 102 is coupled to the memory unit 12 and the firmware unit 13. The data erasing circuit 103 is coupled to the storage device 11.

資料讀寫電路100用以讀取儲存裝置11內儲存的至少一資料。具體來說，資料讀寫電路100每隔一段時間執行背景掃瞄讀取，以讀取儲存裝置11內的資料。或者，資料讀寫電路100根據作業系統14輸出的資料讀取請求對應地讀取儲存裝置11內的資料。 The data read-write circuit 100 is used to read at least one data stored in the storage device 11. Specifically, the data reading and writing circuit 100 performs background scan reading at intervals to read data in the storage device 11. Alternatively, the data reading and writing circuit 100 correspondingly reads the data in the storage device 11 according to the data reading request output by the operating system 14.

判斷電路101用以接收資料讀寫電路100讀取到的資料，並判斷該資料是否符合該些預設資料形式之其中一者。當讀取到的資料符合該些預設資料形式之其中一者，判斷電路101輸出判斷訊號至韌體單元13。判斷訊號內包括複數個判斷位元。該些判斷位元分別對應於不同的預設資料形式。即判斷位元的數量正比於判斷電路101設定之預設資料形式的數量。 The judging circuit 101 is used to receive the data read by the data read-write circuit 100 and judge whether the data conforms to one of the preset data forms. When the read data conforms to one of the preset data forms, the determination circuit 101 outputs a determination signal to the firmware unit 13. The judgment signal includes a plurality of judgment bits. The judgment bits respectively correspond to different preset data forms. That is, the number of judgment bits is proportional to the number of preset data formats set by the judgment circuit 101.

舉例來說，當判斷電路101判定資料符合第一預設資料形式，判斷電路101將判斷訊號中的第一判斷位元標記為1。此時其他判斷位元(例如第二判斷位元)被標記為0。同理，當判斷電路101判定資料符合第二預設資料形式，判斷電路101將判斷訊號中的第二判斷位元標記為1，並將其他判斷位元標記為0。另一方面，若資料不符合任何一種預設資料形式，判斷電路101將所有的判斷位元標記為0。換句話說，韌體單元13可根據判斷訊號直接判斷資料是否符合其中一種預設資料形式，以更新邏輯實體對照表。 For example, when the determination circuit 101 determines that the data conforms to the first predetermined data format, the determination circuit 101 marks the first determination bit in the determination signal as 1. At this time, other judgment bits (for example, the second judgment bit) are marked as 0. Similarly, when the judgment circuit 101 judges that the data conforms to the second preset data format, the judgment circuit 101 marks the second judgment bit in the judgment signal as 1, and marks the other judgment bits as 0. On the other hand, if the data does not conform to any of the preset data forms, the judgment circuit 101 marks all judgment bits as 0. In other words, the firmware unit 13 can directly determine whether the data conforms to one of the preset data forms according to the determination signal, so as to update the logical entity comparison table.

傳輸電路102用以將資料寫入記憶體單元12。具體來說，當作業系統14欲讀取的資料不符合該些預設資料形式，判斷電路101根據韌體單元13之邏輯實體對照表控制控制資料讀寫電路100從儲存裝置11中讀取對應的資料。資料讀寫電路100將讀取 到的資料輸出至傳輸電路102。傳輸電路102將資料讀寫電路100讀取到的資料輸出至記憶體單元12，並通知韌體單元13該資料於記憶體單元12中的位址。最後，韌體單元13通知作業系統14自記憶體單元12獲取資料。 The transmission circuit 102 is used to write data into the memory unit 12. Specifically, when the data to be read by the operating system 14 does not conform to the preset data formats, the determination circuit 101 controls the control data reading and writing circuit 100 to read the corresponding data from the storage device 11 according to the logical entity comparison table of the firmware unit 13 data of. The data read-write circuit 100 will read The received data is output to the transmission circuit 102. The transmission circuit 102 outputs the data read by the data read-write circuit 100 to the memory unit 12, and notifies the firmware unit 13 of the address of the data in the memory unit 12. Finally, the firmware unit 13 notifies the operating system 14 to obtain data from the memory unit 12.

另一方面，當作業系統14欲讀取之資料符合該些預設資料形式之其中一者(例如為第一預設資料形式)，判斷電路10根據邏輯實體對照表輸出記憶體單元12之第一虛設資料空間中的實體位址00至作業系統14。最後，作業系統14直接讀取第一虛設資料空間以獲得第一預設資料形式所對應的資料。 On the other hand, when the data to be read by the operating system 14 conforms to one of the preset data formats (such as the first preset data format), the determination circuit 10 outputs the first data of the memory unit 12 according to the logical entity comparison table A physical address 00 in the dummy data space is to the operating system 14. Finally, the operating system 14 directly reads the first dummy data space to obtain data corresponding to the first preset data format.

資料抹除電路103受控於判斷電路101，用以清除儲存裝置11內儲存的資料。 The data erasing circuit 103 is controlled by the judging circuit 101 to erase the data stored in the storage device 11.

以下將進一步說明控制裝置10如何回收儲存裝置11內的儲存空間。請參閱圖3，圖3是本案實施例所提供之儲存空間回收方法的流程圖。圖3之儲存空間回收方法適用於圖2之控制裝置10。此時，作業系統14並未輸出資料讀取請求，故控制裝置10執行背景掃瞄讀取。於步驟S301，資料讀寫電路100讀取儲存裝置11內的資料，並將讀取到的資料輸出至判斷電路101。於步驟S302，判斷電路101判斷資料是否符合該些預設資料形式之其中一者。若資料符合該些預設資料形式之其中一者，進入步驟S303。反之，若資料不符合該些預設資料形式之其中一者，回到步驟S301，以讀取下一個資料。 The following further describes how the control device 10 recovers the storage space in the storage device 11. Please refer to FIG. 3, which is a flowchart of the storage space recovery method provided by the embodiment of the present invention. The storage space recovery method of FIG. 3 is applicable to the control device 10 of FIG. 2. At this time, the operating system 14 does not output a data reading request, so the control device 10 performs background scanning reading. In step S301, the data read-write circuit 100 reads the data in the storage device 11 and outputs the read data to the judgment circuit 101. In step S302, the determination circuit 101 determines whether the data conforms to one of the preset data formats. If the data conforms to one of the preset data forms, go to step S303. On the contrary, if the data does not conform to one of the preset data formats, return to step S301 to read the next data.

於步驟S303，判斷電路101根據該資料符合的預設資料形式對應地標記判斷訊號內的判斷位元，並輸出判斷訊號至韌體單元13。於本實施例中來說，該資料符合第一預設資料形式。因此，判斷電路101將判斷訊號內的第一判斷位元標記為1，並輸出判斷訊號至韌體單元13。 In step S303, the judgment circuit 101 correspondingly marks the judgment bit in the judgment signal according to the preset data format that the data matches, and outputs the judgment signal to the firmware unit 13. In this embodiment, the data conforms to the first preset data format. Therefore, the determination circuit 101 marks the first determination bit in the determination signal as 1, and outputs the determination signal to the firmware unit 13.

於步驟S304，韌體單元13根據判斷訊號更新邏輯實體對照表，以將該資料之邏輯位置指向記憶體單元12之該些虛設資料空 間之其中一者(例如第一虛設資料空間)。 In step S304, the firmware unit 13 updates the logical entity comparison table according to the judgment signal to point the logical position of the data to the dummy data spaces of the memory unit 12 One of them (such as the first dummy data space).

於步驟S305，判斷電路101輸出抹除訊號至資料抹除電路103，使得資料抹除電路103控制儲存裝置11清除該資料，以回收該資料所佔用的儲存空間。 In step S305, the determination circuit 101 outputs an erasing signal to the data erasing circuit 103, so that the data erasing circuit 103 controls the storage device 11 to erase the data, so as to reclaim the storage space occupied by the data.

如此一來，儲存裝置11內的儲存空間可以被釋放。儲存裝置11在重整內部之儲存空間的過程中可以節省不必要的資料搬移，以延長儲存裝置11的壽命。此外，當作業系統14欲讀取第一預設資料形式所對應的資料時，韌體單元13根據邏輯實體對照表通知作業系統14直接讀取記憶體單元12之第一虛設資料空間。據此，作業系統14可以從記憶體單元13獲得該資料而不需要透過儲存裝置11，使得作業系統14的資料讀取速度提升。 In this way, the storage space in the storage device 11 can be released. The storage device 11 can save unnecessary data movement during the process of reforming the internal storage space, so as to extend the life of the storage device 11. In addition, when the operating system 14 wants to read the data corresponding to the first preset data format, the firmware unit 13 notifies the operating system 14 to directly read the first dummy data space of the memory unit 12 according to the logical entity correspondence table. According to this, the operating system 14 can obtain the data from the memory unit 13 without passing through the storage device 11, so that the data reading speed of the operating system 14 is increased.

值得一提的是，控制裝置10還具有一錯誤檢查與糾正(Error Checking and Correcting)功能，並在讀取該資料時對資料執行一錯誤校正程序。具體來說，判斷電路101在判斷該資料是否符合該些該些預設資料形式之其中一者的過程中，可以同時執行錯誤校正程序，以檢查該資料內的位元。若錯誤校正程序顯示該資料錯誤，判斷電路101通知作業系統14該資料異常，或是直接控制資料抹除電路103清除該資料。若錯誤校正程序顯示該資料正確，判斷電路101繼續執行圖3之步驟S303~S305，以釋放儲存空間。 It is worth mentioning that the control device 10 also has an error checking and correcting (Error Checking and Correcting) function, and performs an error correction procedure on the data when reading the data. Specifically, in the process of judging whether the data conforms to one of the preset data forms, the judgment circuit 101 can simultaneously execute an error correction procedure to check the bits in the data. If the error correction process shows that the data is wrong, the judgment circuit 101 notifies the operating system 14 that the data is abnormal, or directly controls the data erasing circuit 103 to clear the data. If the error correction procedure shows that the data is correct, the determination circuit 101 continues to execute steps S303 to S305 in FIG. 3 to free up storage space.

附帶一提，於本實施例中，記憶體單元12係動態隨機存取記憶體。因此，當儲存系統1關閉時，記憶體單元12內儲存的該些預設資料形式會被清除。當儲存系統1再次被啟動時，控制裝置10再將該些預設資料形式分別存入對應的虛設資料空間。 Incidentally, in this embodiment, the memory unit 12 is a dynamic random access memory. Therefore, when the storage system 1 is turned off, the preset data forms stored in the memory unit 12 are cleared. When the storage system 1 is activated again, the control device 10 stores the preset data forms in the corresponding dummy data space.

以下將舉一實際例子來說明控制裝置10如何回收儲存裝置11內的儲存空間。請參閱圖4A、4B，圖4A是本案實施例所提供之更新前的邏輯實體對照表的示意圖。圖4B是本案實施例所提供之更新後的邏輯實體對照表的示意圖。圖4A與4B中分別繪示了韌體單元13內儲存的邏輯實體對照表以及儲存裝置11中資料之 實體位址與資料內容的對應關係表。此時，儲存裝置11中已儲存了無用的資料(即二進制全0資料以及二進制全1資料)。 A practical example will be given below to explain how the control device 10 recovers the storage space in the storage device 11. Please refer to FIGS. 4A and 4B. FIG. 4A is a schematic diagram of the logical entity comparison table provided by the embodiment of the present invention before being updated. FIG. 4B is a schematic diagram of the updated logical entity comparison table provided by the embodiment of the present invention. 4A and 4B respectively show the logical entity comparison table stored in the firmware unit 13 and the data in the storage device 11 The correspondence table between the physical address and the data content. At this time, useless data (ie, binary all-zero data and binary all-one data) has been stored in the storage device 11.

首先，控制裝置10同樣執行背景掃瞄讀取，並從儲存裝置11中讀取實體位址25、94、388所儲存的資料。判斷電路101判斷實體位址25中儲存的是二進制全0資料，實體位址94中儲存的是二進制全1資料，而實體位址388中儲存的並非是二進制全0資料以及二進制全1資料。另一方面，於圖4A之邏輯實體對照表中，實體位址25係對應於邏輯位址10，實體位址388係對應於邏輯位址11，而實體位址94係對應於邏輯位址12。 First, the control device 10 also performs background scan reading, and reads the data stored in the physical addresses 25, 94, 388 from the storage device 11. The judging circuit 101 judges that the physical address 25 stores binary all-zero data, the physical address 94 stores binary all-one data, and the physical address 388 does not store binary all-zero data and binary all-one data. On the other hand, in the logical entity comparison table of FIG. 4A, the physical address 25 corresponds to the logical address 10, the physical address 388 corresponds to the logical address 11, and the physical address 94 corresponds to the logical address 12. .

接著，判斷電路101分別輸出第一判斷訊號、第二判斷訊號以及第三判斷訊號至韌體單元13。第一判斷訊號係用以指示實體位址25所儲存的資料是否符合該些預設資料形式。第二判斷訊號係用以指示實體位址94所儲存的資料是否符合該些預設資料形式。第三判斷訊號係用以指示實體位址388所儲存的資料是否符合該些預設資料形式。由於實體位址25所儲存的資料符合第一預設資料形式，判斷電路101將第一判斷訊號中的第一判斷位元標記為1，而其他判斷位元標記為0。另一方面，由於實體位址94所儲存的資料符合第二預設資料形式，判斷電路101將第二判斷訊號中的第二判斷位元標記為1，而其他判斷位元標記為0。由於實體位址388所儲存的資料不符合第一預設資料形式以及第二預設資料形式，判斷電路101將第三判斷訊號中的所有判斷位元標記為0。 Then, the determination circuit 101 outputs the first determination signal, the second determination signal, and the third determination signal to the firmware unit 13 respectively. The first judgment signal is used to indicate whether the data stored at the physical address 25 conforms to the predetermined data forms. The second judgment signal is used to indicate whether the data stored at the physical address 94 conforms to the predetermined data forms. The third judgment signal is used to indicate whether the data stored in the physical address 388 conforms to the predetermined data forms. Since the data stored in the physical address 25 conforms to the first preset data format, the judgment circuit 101 marks the first judgment bit in the first judgment signal as 1, and the other judgment bits as 0. On the other hand, since the data stored in the physical address 94 conforms to the second preset data format, the judgment circuit 101 marks the second judgment bit in the second judgment signal as 1, and the other judgment bits as 0. Since the data stored in the physical address 388 does not conform to the first preset data format and the second preset data format, the determination circuit 101 marks all determination bits in the third determination signal as 0.

韌體單元13接收第一、第二、第三判斷訊號，並根據第一、第二、第三判斷訊號將圖4A之邏輯實體對照表更新為圖4B之邏輯實體對照表。具體來說，韌體單元13更新邏輯位址10、12所對應的實體位址。更新後的邏輯位址10指向記憶體單元12中的第一虛設資料空間的實體位址00，而更新後的邏輯位址12指向記憶體單元12中的第二虛設資料空間的實體位址FF。據此，作業 系統14可根據圖4B之邏輯實體對照表直接從第一虛設資料空間中讀取二進制全0資料，或從第二虛設資料空間中讀取二進制全1資料。 The firmware unit 13 receives the first, second, and third judgment signals, and updates the logical entity comparison table of FIG. 4A to the logical entity comparison table of FIG. 4B according to the first, second, and third judgment signals. Specifically, the firmware unit 13 updates the physical addresses corresponding to the logical addresses 10 and 12. The updated logical address 10 points to the physical address 00 of the first dummy data space in the memory unit 12, and the updated logical address 12 points to the physical address FF of the second dummy data space in the memory unit 12 . Accordingly, the assignment The system 14 may read binary all-zero data directly from the first dummy data space or read binary all-one data from the second dummy data space according to the logical entity comparison table of FIG. 4B.

或者，當作業系統14欲讀取實體位址388儲存的資料時，判斷電路13根據韌體單元13提供之邏輯實體對照表控制資料讀取單元100讀取實體位址388。接著傳輸電路102輸出實體位址388所對應的資料至記憶體單元12。韌體單元13再通知作業系統14至記憶體單元12讀取想要的資料。 Alternatively, when the operating system 14 intends to read the data stored at the physical address 388, the determination circuit 13 controls the data reading unit 100 to read the physical address 388 according to the logical entity comparison table provided by the firmware unit 13. Then the transmission circuit 102 outputs the data corresponding to the physical address 388 to the memory unit 12. The firmware unit 13 notifies the operating system 14 to the memory unit 12 to read the desired data.

最後，資料抹除電路103控制儲存設備11清除實體位址25、94中儲存的資料，以釋放實體位址25、94的儲存空間。 Finally, the data erasing circuit 103 controls the storage device 11 to clear the data stored in the physical addresses 25 and 94 to release the storage space of the physical addresses 25 and 94.

綜上所述，本案實施例所提供之儲存系統之控制裝置及其儲存空間回收方法，可以將儲存裝置中無用的資料清除，進而減少儲存裝置執行空間回收的次數，使得儲存裝置的壽命延長。此外，當作業系統欲讀取的資料符合預設資料形式時，作業系統可直接從記憶體單元中獲得資料，而不需要透過儲存裝置，使得作業系統的資料讀取速度提升。 In summary, the control device of the storage system and the storage space recovery method provided in the embodiment of the present invention can clear useless data in the storage device, thereby reducing the number of times the storage device performs space recovery, and prolonging the life of the storage device. In addition, when the data to be read by the operating system conforms to the preset data format, the operating system can directly obtain the data from the memory unit without using a storage device, so that the data reading speed of the operating system is increased.

另一方面，本案實施例所提供之儲存空間回收方法係由控制裝置來執行。因此，儲存系統之中央處理器的使用率不會因為儲存裝置執行空間回收而增加。 On the other hand, the storage space recovery method provided by the embodiment of the present invention is executed by the control device. Therefore, the utilization rate of the central processing unit of the storage system will not increase because the storage device performs space recovery.

10‧‧‧控制裝置 10‧‧‧Control device

11‧‧‧儲存裝置 11‧‧‧Storage device

12‧‧‧記憶體單元 12‧‧‧Memory unit

13‧‧‧韌體單元 13‧‧‧Firmware unit

100‧‧‧資料讀寫電路 100‧‧‧Data reading and writing circuit

101‧‧‧判斷電路 101‧‧‧ Judgment circuit

102‧‧‧傳輸電路 102‧‧‧Transmission circuit

103‧‧‧資料抹除電路 103‧‧‧Erasing circuit

Claims (8)

一種儲存系統之控制裝置，包括：一資料讀寫電路，用以讀取一儲存裝置內儲存的至少一資料；以及一判斷電路，耦接於該資料讀寫電路，用以接收該資料，並判斷該資料是否符合複數個預設資料形式之其中一者，當該資料符合該些預設資料形式之其中一者，該判斷電路輸出一判斷訊號至一韌體單元；其中，該韌體單元根據該判斷訊號更新一邏輯實體對照表，並將該資料之一邏輯位置指向一記憶體單元之複數個虛設資料空間之其中一者，接著該控制裝置控制該儲存裝置清除該資料，其中該些虛設資料空間分別儲存了該些預設資料形式；其中，當一作業系統欲讀取的資料符合該些預設資料形式之其中一者，該韌體單元通知該作業系統直接讀取該記憶體單元中對應的該些虛設資料空間，以直接獲得該作業系統欲讀取的資料；其中，該控制裝置還包括一傳輸電路，耦接於該資料讀寫電路、該判斷電路以及該記憶體單元；其中，當該作業系統欲讀取該儲存裝置內儲存的資料不符合該些預設資料形式，該判斷電路控制該資料讀寫電路讀取該儲存裝置內對應的資料，該資料讀寫電路將讀取到的資料輸出至該傳輸電路，接著該傳輸電路將接收到的資料寫入該記憶體單元。 A control device of a storage system includes: a data read-write circuit for reading at least one data stored in a storage device; and a judgment circuit coupled to the data read-write circuit for receiving the data, and Judging whether the data conforms to one of the plurality of preset data forms, when the data conforms to one of the preset data forms, the judgment circuit outputs a judgment signal to a firmware unit; wherein, the firmware unit Update a logical entity comparison table according to the judgment signal, and point a logical position of the data to one of a plurality of dummy data spaces of a memory unit, and then the control device controls the storage device to clear the data, among which The dummy data spaces respectively store the preset data forms; wherein, when the data to be read by an operating system conforms to one of the preset data forms, the firmware unit notifies the operating system to directly read the memory The dummy data spaces corresponding to the unit to directly obtain the data to be read by the operating system; wherein, the control device further includes a transmission circuit coupled to the data read-write circuit, the judgment circuit, and the memory unit ; Wherein, when the operating system wants to read the data stored in the storage device does not meet the predetermined data format, the judgment circuit controls the data read-write circuit to read the corresponding data in the storage device, the data read-write circuit The read data is output to the transmission circuit, and then the transmission circuit writes the received data into the memory unit. 如請求項第1項所述之控制裝置，其中當該作業系統欲讀取的資料符合該些預設資料形式之其中一者，該作業系統根據該韌體單元所儲存之邏輯實體對照表讀取該記憶體單元中對應的虛設資料空間，以直接獲得該資料。 The control device according to claim 1, wherein when the data to be read by the operating system conforms to one of the preset data forms, the operating system reads according to the logical entity comparison table stored in the firmware unit Take the corresponding dummy data space in the memory unit to obtain the data directly. 如請求項第1項所述之控制裝置，其中該些預設資料形式包括二進制全0資料或二進制全1資料。 The control device according to claim 1, wherein the preset data forms include binary all-zero data or binary all-one data. 如請求項第1項所述之控制裝置，其中該控制裝置具有一錯誤檢查與糾正(Error Checking and Correcting)功能，並在讀取該資料時對該資料執行一錯誤校正程序。 The control device according to claim 1, wherein the control device has an error checking and correcting (Error Checking and Correcting) function, and performs an error correction procedure on the data when reading the data. 一種儲存空間回收方法，適用於一控制裝置，包括：步驟A：讀取一儲存裝置內儲存的至少一資料；步驟B：判斷該資料是否符合複數個預設資料形式之其中一者；步驟C：當該資料符合該些預設資料形式之其中一者，輸出一判斷訊號至一韌體單元；步驟D：根據該判斷訊號更新一邏輯實體對照表，並將該資料之一邏輯位置指向一記憶體單元之複數個虛設資料空間之其中一者，其中該些虛設資料空間分別儲存了該些預設資料形式；以及步驟E：控制該儲存裝置清除該資料；其中，當一作業系統欲讀取的資料符合該些預設資料形式之其中一者，該韌體單元通知該作業系統直接讀取該記憶體單元中對應的該些虛設資料空間，以直接獲得該作業系統欲讀取的資料；步驟F：接收該作業系統發出的一資料讀取請求；步驟G：當該作業系統欲讀取該儲存裝置內儲存的資料不符合該些預設資料形式，控制該控制裝置之一資料讀寫電路讀取該儲存裝置內對應的資料，接著將該資料讀寫電路讀取到的資料輸出至該記憶體單元；步驟H：通知該作業系統自該記憶體單元獲取該資料。 A storage space recovery method, suitable for a control device, includes: step A: reading at least one data stored in a storage device; step B: determining whether the data conforms to one of a plurality of preset data forms; step C : When the data conforms to one of the preset data forms, output a judgment signal to a firmware unit; Step D: update a logical entity comparison table according to the judgment signal, and point a logical position of the data to a One of the plurality of dummy data spaces of the memory unit, wherein the dummy data spaces store the preset data forms; and Step E: control the storage device to clear the data; wherein, when an operating system wants to read The fetched data conforms to one of the preset data forms, the firmware unit notifies the operating system to directly read the corresponding dummy data spaces in the memory unit to directly obtain the data that the operating system wants to read ; Step F: Receive a data reading request sent by the operating system; Step G: When the operating system wants to read the data stored in the storage device does not meet the preset data format, control a data reading of the control device The write circuit reads the corresponding data in the storage device, and then outputs the data read by the data read-write circuit to the memory unit; Step H: Notifies the operating system to obtain the data from the memory unit. 如請求項第5項所述之儲存空間回收方法，其中該空間回收方法還包括：步驟I：當該作業系統欲讀取的資料符合該些預設資料形式之 其中一者，該作業系統根據該韌體單元所儲存之邏輯實體對照表讀取該記憶體單元中對應的虛設資料空間，以直接獲得該資料。 The storage space reclamation method according to claim 5, wherein the space reclamation method further includes: Step I: when the data to be read by the operating system conforms to the preset data formats In one of them, the operating system reads the corresponding dummy data space in the memory unit according to the logical entity comparison table stored in the firmware unit to directly obtain the data. 如請求項第5項所述之儲存空間回收方法，其中該些預設資料形式包括二進制全0資料或二進制全1資料。 The storage space reclamation method as described in claim 5, wherein the preset data forms include binary all-zero data or binary all-one data. 如請求項第5項所述之儲存空間回收方法，其中於步驟A中，該控制裝置利用一錯誤檢查與糾正功能對該資料執行一錯誤校正程序。 The storage space reclamation method as recited in claim 5, wherein in step A, the control device uses an error checking and correcting function to perform an error correction procedure on the data.
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1046121B1 (en) * 1997-10-08 2005-12-28 Macronix International Co., Ltd. Automatic test process with non-volatile result table store
TWI329860B (en) * 2006-12-28 2010-09-01 Genesys Logic Inc
US20110063903A1 (en) * 2009-09-15 2011-03-17 Samsung Electronics Co., Ltd. Nonvolatile memory devices, systems having the same, and write current control methods thereof
US8694563B1 (en) * 2009-04-18 2014-04-08 Hewlett-Packard Development Company, L.P. Space recovery for thin-provisioned storage volumes
TWI484334B (en) * 2009-12-24 2015-05-11 Univ Nat Taiwan Method for region-based management of non-volatile memory

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1046121B1 (en) * 1997-10-08 2005-12-28 Macronix International Co., Ltd. Automatic test process with non-volatile result table store
TWI329860B (en) * 2006-12-28 2010-09-01 Genesys Logic Inc
US8694563B1 (en) * 2009-04-18 2014-04-08 Hewlett-Packard Development Company, L.P. Space recovery for thin-provisioned storage volumes
US20110063903A1 (en) * 2009-09-15 2011-03-17 Samsung Electronics Co., Ltd. Nonvolatile memory devices, systems having the same, and write current control methods thereof
TWI484334B (en) * 2009-12-24 2015-05-11 Univ Nat Taiwan Method for region-based management of non-volatile memory

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