TWI680637B - Analog demagnetization sampling method and system for switching power supply output sampling - Google Patents

Analog demagnetization sampling method and system for switching power supply output sampling Download PDF

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TWI680637B
TWI680637B TW107118010A TW107118010A TWI680637B TW I680637 B TWI680637 B TW I680637B TW 107118010 A TW107118010 A TW 107118010A TW 107118010 A TW107118010 A TW 107118010A TW I680637 B TWI680637 B TW I680637B
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sampling
demagnetization
voltage
time
power supply
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TW107118010A
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Chinese (zh)
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TW201935835A (en
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路遙
張允超
方烈義
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大陸商昂寶電子（上海）有限公司
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33507—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters
    • H02M3/33523—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of the output voltage or current, e.g. flyback converters with galvanic isolation between input and output of both the power stage and the feedback loop
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1582—Buck-boost converters

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

本發明涉及開關電源輸出取樣的類比退磁取樣方法和系統。提供了一種開關電源輸出取樣的類比退磁取樣方法，包括：通過對所述開關電源初級取樣峰值電壓放電來對退磁進行模擬；確定初級取樣峰值電壓與退磁時間的關係；並且至少部分地基於當前週期的取樣峰值電壓、功率開關的導通時間以及上個週期的放電速度資訊來確定取樣點的位置。 The invention relates to an analog demagnetization sampling method and system for switching power supply output sampling. An analog demagnetization sampling method for switching power supply output sampling is provided, including: simulating demagnetization by discharging the primary sampling peak voltage of the switching power supply; determining the relationship between the primary sampling peak voltage and the demagnetization time; and based at least in part on the current period The sampling peak voltage, the on-time of the power switch, and the discharge speed information of the previous cycle are used to determine the location of the sampling point.

Description

開關電源輸出取樣的類比退磁取樣方法和系統 Analog demagnetization sampling method and system for switching power supply output sampling

本發明涉及積體電路。更具體地，本發明的一些實施例涉及開關電源輸出取樣的類比退磁取樣方法和系統。 The invention relates to an integrated circuit. More specifically, some embodiments of the invention relate to analog demagnetization sampling methods and systems for switching power supply output sampling.

以傳統的原邊控制返馳變換器電源(PSR AC/DC Flyback Converter)為例，介紹晶片的恒壓(constant voltage,CV)控制以及輸出取樣原理。第1A圖示出了傳統開關電源的簡化框圖。如第1A圖所示，Vline為AC輸入源經整流後得到的線電壓，Cbulk為濾波電容，Rst為高壓啟動電阻，三繞組變壓器的第一、第二、輔助繞組匝數比為Np：Ns：Na，Rcs為第一電流感測電阻，D2為第二整流二極體，Cout為輸出電容，S1為功率開關管，U1為控制器，Cp為晶片供電電容，D1為供電二極體，Rup、Rdn為輸出電壓分壓感測電阻。系統主要節點電壓電流波形如第1B圖所示，脈寬調變(pulse-width modulation,PWM)為功率開關管S1閘極驅動波形，dem為探測到的退磁信號，Ip、Is分別為初級、次級電感電流，Vcs為第一感測電阻上得到的感測電壓，VD為功率開關管的漏端電壓，FB為輸出電壓在輔助繞組上的回饋分壓電壓。 Taking the traditional primary-side control flyback converter (PSR AC / DC Flyback Converter) as an example, the constant voltage (CV) control of the chip and the principle of output sampling are introduced. Figure 1A shows a simplified block diagram of a conventional switching power supply. As shown in Figure 1A, Vline is the line voltage obtained from the rectified AC input source, Cbulk is the filter capacitor, Rst is the high-voltage starting resistance, and the first, second, and auxiliary winding turns ratio of the three-winding transformer is Np: Ns : Na, Rcs is the first current sensing resistor, D2 is the second rectifying diode, Cout is the output capacitor, S1 is the power switch tube, U1 is the controller, Cp is the chip power supply capacitor, D1 is the power supply diode, Rup and Rdn are output voltage-dividing sensing resistors. The voltage and current waveforms of the main nodes of the system are shown in Figure 1B. Pulse -width modulation (PWM) is the driving waveform of the power switch S1 gate, dem is the detected demagnetization signal, and Ip and Is are primary, Secondary inductor current, Vcs is the sensing voltage obtained on the first sensing resistor, VD is the drain voltage of the power switch tube, and FB is the feedback divided voltage of the output voltage on the auxiliary winding.

在CV下，電源的輸出電壓確定如下：

Figure TWI680637B_D0001
其中Vref_FB為輸出回饋取樣參考電壓，VD2為整流二極體D2的正嚮導通壓降。 Under CV, the output voltage of the power supply is determined as follows:
Figure TWI680637B_D0001
 Vref_FB is the output feedback sampling reference voltage, and VD2 is the forward voltage drop of the rectified diode D2.

第2圖示出了傳統開關電源控制器內部FB取樣與開關控制的簡化框圖。在退磁期間內，取樣模組產生一個取樣脈衝信號控制取樣開關導通對FB進行取樣，得到取樣值VFB並保存在電容Cs上，取樣值VFB與參考電壓Vref_FB的差值經誤差放大器EA放大後得到電壓 compv，電壓compv輸入到PWM/Pulse Frequency Modulation,PFM(脈衝寬度調變/脈衝頻率調變)控制模組，得到一個具有某個開關頻率和占空比的脈衝，輸入到驅動模組來控制功率管的開關，從而調整輸出電壓，最終得到穩定的輸出。其中，取樣模組在退磁期間產生取樣脈衝對FB取樣，並確定了取樣點位置，本文針對此提出了一種即時取樣信號產生方法。 Figure 2 shows a simplified block diagram of FB sampling and switching control inside a conventional switching power supply controller. During the demagnetization period, the sampling module generates a sampling pulse signal to control the sampling switch to conduct sampling on FB to obtain the sampling value VFB and save it on the capacitor Cs. The difference between the sampling value VFB and the reference voltage Vref_FB is obtained by the error amplifier EA. Voltage Compv, the voltage compv is input to the PWM / Pulse Frequency Modulation, PFM (Pulse Width Modulation / Pulse Frequency Modulation) control module to get a pulse with a certain switching frequency and duty cycle, and is input to the drive module to control the power The switch of the tube adjusts the output voltage and finally obtains a stable output. Among them, the sampling module generates sampling pulses to sample FB during the demagnetization period, and determines the sampling point position. This paper proposes a method for generating instant sampling signals.

第3A圖和第3B圖分別示出了傳統的FB取樣點產生電路以及信號時序圖。電路利用固定的充放電電流和上一週期的退磁時間確定取樣點位置。Ichar、Idis分別為固定的充電電流和放電電流，dem為退磁信號，Tdem為退磁時間，也是充電時間，Tsamp為放電時間，代表取樣點位置，reset為0脈衝信號，C為積分電容，vramp為電容電壓，FB為輸出電壓在輔助繞組上的回饋分壓電壓。在第一個Tdem期間，固定充電電流Ichar給積分電容C充電並將電壓保持住，在第二個退磁信號的上升沿，reset信號將samp信號置高，積分電容C以固定放電電流Idis放電，放電到samp信號由高變為低，samp信號的下降沿即對應FB取樣點，取樣點的位置由充放電電流Ichar、Idis決定，且滿足公式2：

Figure TWI680637B_D0002
3A and 3B show a conventional FB sampling point generating circuit and a signal timing diagram, respectively. The circuit uses a fixed charge and discharge current and the demagnetization time of the previous cycle to determine the location of the sampling point. Ichar and Idis are fixed charging and discharging currents respectively, dem is the demagnetization signal, Tdem is the demagnetization time and also the charging time, Tsamp is the discharge time, which represents the sampling point position, reset is the 0 pulse signal, C is the integral capacitor, and vramp is Capacitance voltage, FB is the feedback divided voltage of the output voltage on the auxiliary winding. During the first Tdem period, the fixed charging current Ichar charges the integration capacitor C and keeps the voltage. On the rising edge of the second demagnetization signal, the reset signal sets the samp signal high, and the integration capacitor C discharges with a fixed discharge current Idis. Discharge until the samp signal changes from high to low. The falling edge of the samp signal corresponds to the FB sampling point. The position of the sampling point is determined by the charge and discharge currents Ichar and Idis, and it satisfies Equation 2:
Figure TWI680637B_D0002

通過對充放電電流的比例關係的設置，可以調整取樣點的位置。再複製一路此取樣點產生電路，將兩個並聯使用，就能在每一個退磁時間Tdem期間產生FB取樣信號。 By setting the proportional relationship of the charge and discharge current, the position of the sampling point can be adjusted. Then duplicate this sampling point generation circuit and use two in parallel to generate FB sampling signal during each demagnetization time Tdem.

可以看出，這個FB取樣信號產生電路存在顯著缺點，它需要利用上一週期的退磁時間Tdem來產生當前週期的取樣點，即取樣點的位置是與上一Tdem時間成比例的，而與當前Tdem時間的關係是不確定的，這就可能會產生一些取樣問題。例如，當系統Vcs由一個較大值跳變為一個較小值時，Tdem時間也會由一個較大值變為一個較小值，如第4圖所示，而第二個Tdem較短，但取樣點的位置與前面較長的Tdem成比例，這會導致後續取樣出錯。 It can be seen that this FB sampling signal generation circuit has significant shortcomings. It needs to use the demagnetization time Tdem of the previous cycle to generate the sampling point of the current cycle, that is, the position of the sampling point is proportional to the previous Tdem time, and is The relationship of Tdem time is uncertain, which may cause some sampling problems. For example, when the system Vcs jumps from a larger value to a smaller value, the Tdem time will also change from a larger value to a smaller value, as shown in Figure 4, and the second Tdem is shorter. However, the location of the sampling point is proportional to the previous long Tdem, which will cause subsequent sampling errors.

因此，希望提供改進的即時信號取樣方法。 Therefore, it is desirable to provide an improved method of instantaneous signal sampling.

本發明的某些實施例涉及積體電路。更具體地，本發明 的一些實施例提供了開關電源輸出取樣的類比退磁取樣方法和系統。僅通過示例，本發明的一些實施例已經被應用到功率變換系統。但是，應該認識到，本發明具有更廣泛的應用範圍。例如，根據本公開的方法可以適用於Buck、Boost、Buck-Boost以及返馳(flyback)架構的power factor correction,PFC控制器。 Certain embodiments of the invention relate to integrated circuits. More specifically, the present invention Some embodiments provide analog demagnetization sampling methods and systems for switching power supply output sampling. By way of example only, some embodiments of the invention have been applied to power conversion systems. However, it should be recognized that the present invention has a wider range of applications. For example, the method according to the present disclosure can be applied to power factor correction (PFC) controllers of Buck, Boost, Buck-Boost, and flyback architectures.

提出了一種用於原邊控制返馳變換器電源輸出取樣的即時取樣方法，此方法基於電感的電壓電流原理，通過對初級取樣峰值電壓放電類比退磁過程，利用回饋控制的方法，確定放電速度，即確定初級取樣峰值電壓與退磁時間的關係，並利用當前週期的取樣峰值電壓、功率開關的導通時間以及上個週期的放電速度資訊確定取樣點，從而實現了對輸出電壓的即時取樣，解決了傳統的利用上個週期退磁時間確定當前週期取樣點方法中存在的系統Vcs突變引起的輸出不穩定問題。 This paper proposes a real-time sampling method for primary side control flyback converter power output sampling. This method is based on the principle of voltage and current of the inductor, and uses the feedback control method to determine the discharge speed by analogous demagnetization of the primary sampling peak voltage discharge. That is to determine the relationship between the primary sampling peak voltage and the demagnetization time, and use the sampling peak voltage of the current cycle, the on time of the power switch, and the discharge speed information of the previous cycle to determine the sampling point, thereby real-time sampling of the output voltage and solving The traditional method of using the demagnetization time of the previous period to determine the output instability caused by the system Vcs mutation in the current period sampling point method.

根據一個實施例，提供了一種開關電源輸出取樣的類比退磁取樣方法，包括：通過對所述開關電源初級取樣峰值電壓放電來對退磁進行模擬；確定初級取樣峰值電壓與退磁時間的關係；並且至少部分地基於當前週期的取樣峰值電壓、功率開關的導通時間以及上個週期的放電速度資訊來確定取樣點的位置。 According to an embodiment, an analog demagnetization sampling method for switching power supply output sampling is provided, including: simulating demagnetization by discharging a peak voltage of a primary sampling peak voltage of the switching power supply; determining a relationship between a peak voltage of primary sampling and a demagnetization time; and at least The location of the sampling point is determined based in part on the sampling peak voltage of the current cycle, the on-time of the power switch, and the discharge rate information of the previous cycle.

根據另一實施例，提供了一種開關電源輸出取樣的類比退磁取樣系統，包括：用於通過對所述開關電源初級取樣峰值電壓放電來對退磁進行類比的裝置；用於確定初級取樣峰值電壓與退磁時間的關係的裝置；以及用於至少部分地基於當前週期的取樣峰值電壓、功率開關的導通時間以及上個週期的放電速度資訊來確定取樣點的位置的裝置。 According to another embodiment, an analog demagnetization sampling system for switching power supply output sampling is provided, which includes: a device for analogizing demagnetization by discharging a peak sampling peak voltage of the switching power supply; and determining a peak sampling primary voltage and Means for determining the relationship of the demagnetization time; and means for determining the location of the sampling point based at least in part on the sampling peak voltage of the current cycle, the on-time of the power switch, and the discharge speed information of the previous cycle.

根據實施例，可以實現一個或多個有益效果。參考下面的詳細描述和附圖，將完全明白本發明的這些有益效果、以及各種附加目的、特徵、和優點。 According to an embodiment, one or more beneficial effects can be achieved. These beneficial effects, as well as various additional objects, features, and advantages of the present invention will be fully understood with reference to the following detailed description and accompanying drawings.

Vline‧‧‧線電壓 Vline‧‧‧line voltage

Ls‧‧‧次級電感 Ls‧‧‧ secondary inductor

Cbulk‧‧‧濾波電容 Cbulk‧‧‧filter capacitor

Vout‧‧‧輸出電壓 Vout‧‧‧Output voltage

Rst‧‧‧高壓啟動電阻 Rst‧‧‧High-voltage starting resistance

Ipk‧‧‧第一電感電流 Ipk‧‧‧First inductor current

Rcs‧‧‧第一電流感測電阻 Rcs‧‧‧first current sensing resistor

Ipks‧‧‧第二電感電流 Ipks‧‧‧Second inductor current

D2‧‧‧第二整流二極體 D2‧‧‧Second Rectified Diode

Vcspk‧‧‧峰值電壓 Vcspk‧‧‧Peak voltage

Cout‧‧‧輸出電容 Cout‧‧‧ output capacitor

k‧‧‧放電斜率 k‧‧‧discharge slope

S1‧‧‧功率開關管 S1‧‧‧Power Switch

comp‧‧‧比較器 comp‧‧‧ comparator

U1‧‧‧控制器 U1‧‧‧controller

AND‧‧‧及閘 AND‧‧‧ and gate

Cp‧‧‧晶片供電電容 Cp‧‧‧Chip Power Capacitor

pwm‧‧‧開關信號 pwm‧‧‧ switch signal

D1‧‧‧供電二極體 D1‧‧‧ Power Diode

Vc1‧‧‧放電結束取樣電壓 Vc1‧‧‧Sampling voltage after discharge

Rup、Rdn‧‧‧輸出電壓分壓感測電阻 Rup, Rdn‧‧‧‧ Output Voltage Divided Sense Resistor

Vref+Vt‧‧‧比較器的參考輸入 Vref + Vt‧‧‧ Reference input for comparator

dem‧‧‧退磁信號 dem‧‧‧ demagnetization signal

samp‧‧‧取樣脈衝信號 samp‧‧‧sampling pulse signal

Ip‧‧‧初級電感電流 Ip‧‧‧Primary inductor current

AVDD‧‧‧晶片內部低壓電源 AVDD‧‧‧chip internal low voltage power supply

Is‧‧‧次級電感電流 Is‧‧‧ secondary inductor current

Ist‧‧‧固定放電電流 Ist‧‧‧Fixed discharge current

Vcs‧‧‧第一電流感測電壓 Vcs‧‧‧First current sensing voltage

Ict‧‧‧可控放電電流 Ict‧‧‧Controllable discharge current

VD‧‧‧功率開關管的漏端電壓 Drain voltage of VD‧‧‧power switch

Ivr‧‧‧可變放電電流 Ivr‧‧‧ Variable discharge current

Vref_FB‧‧‧輸出回饋取樣參考電壓 Vref_FB‧‧‧Output feedback sampling reference voltage

Rvr‧‧‧壓控電阻 Rvr‧‧‧ Voltage-Controlled Resistor

Cs、C0‧‧‧電容 Cs, C0‧‧‧ capacitor

Vgs‧‧‧M5閘源電壓 Vgs‧‧‧M5 gate source voltage

Ichar‧‧‧充電電流 Ichar‧‧‧Charging current

M5‧‧‧工作在線性區的電晶體 M5‧‧‧ Transistor working in the linear region

Idis‧‧‧放電電流 Idis‧‧‧discharge current

EA‧‧‧誤差放大器 EA‧‧‧ Error Amplifier

Tdem‧‧‧退磁時間 Tdem‧‧‧ Demagnetization time

compv‧‧‧EA的輸出電壓 compv‧‧‧EA output voltage

Vcs‧‧‧系統 Vcs‧‧‧System

Tsamp‧‧‧為放電時間 Tsamp‧‧‧ is the discharge time

reset‧‧‧0脈衝信號 reset‧‧‧0 pulse signal

C‧‧‧積分電容 C‧‧‧Integral capacitor

vramp‧‧‧電容電壓 vramp‧‧‧capacitor voltage

OR‧‧‧或閘 OR‧‧‧ or gate

Ton‧‧‧功率管導通時間 Ton‧‧‧Power tube on time

1-shot‧‧‧上升沿觸發的脈衝產生器 1-shot‧‧‧pulse generator triggered by rising edge

C4‧‧‧濾波電容 C4‧‧‧filter capacitor

Vref‧‧‧位準移位的大小 Vref‧‧‧ Level shift size

Rt‧‧‧電壓-電流轉換電阻 Rt‧‧‧ voltage-current conversion resistor

Samp1、Samp2‧‧‧產生的預採樣信號 Pre-sampling signals generated by Samp1, Samp2‧‧‧

C1、C2、C3‧‧‧採樣電容 C1, C2, C3‧‧‧ sampling capacitors

M0、M1、M2、M3、M4‧‧‧開關管 M0, M1, M2, M3, M4‧‧‧ Switch

Opa1、Opa2、Opa3、Opa4‧‧‧誤差放大器 Opa1, Opa2, Opa3, Opa4‧‧‧ Error Amplifier

FB‧‧‧輸出電壓在輔助繞組上的回饋分壓電壓 FB‧‧‧Feedback divided voltage of output voltage on auxiliary winding

VD2‧‧‧整流二極體D2‧‧‧的正嚮導通壓降 Forward voltage drop of VD2‧‧‧rectified diode D2‧‧‧

VFB‧‧‧輸出電壓Vout‧‧‧回饋到初級端的值 VFB‧‧‧ Output voltage Vout‧‧‧ feedback to the primary side

第1A圖示出了傳統開關電源的簡化框圖。 Figure 1A shows a simplified block diagram of a conventional switching power supply.

第1B圖示出了傳統開關電源的信號時序圖。 FIG. 1B shows a signal timing diagram of a conventional switching power supply.

第2圖示出了傳統開關電源控制器內部FB取樣與開關控制的簡化框圖。 Figure 2 shows a simplified block diagram of FB sampling and switching control inside a conventional switching power supply controller.

第3A圖示出了傳統的FB取樣點產生電路圖。 Figure 3A shows a conventional FB sampling point generation circuit diagram.

第3B圖示出了傳統的FB取樣點產生時序圖。 FIG. 3B shows a conventional FB sampling point generation timing diagram.

第4圖示出了傳統開關電源系統的Vcs突變時取樣點與FB的關係的圖示。 FIG. 4 is a diagram showing the relationship between the sampling point and FB when the Vcs of a conventional switching power supply system is abruptly changed.

第5圖示出了根據本公開的實施例的、模擬退磁放電斜率示意圖。 FIG. 5 shows a schematic diagram of a simulated demagnetization discharge slope according to an embodiment of the present disclosure.

第6A圖示出了根據本公開的實施例的電路結構圖示。 FIG. 6A illustrates a circuit structure diagram according to an embodiment of the present disclosure.

第6B圖示出了根據本公開的實施例的信號時序圖。 FIG. 6B illustrates a signal timing diagram according to an embodiment of the present disclosure.

第7圖示出了根據本公開的實施例的回饋即時取樣點產生電路的圖示。 FIG. 7 shows a diagram of a feedback instant sampling point generating circuit according to an embodiment of the present disclosure.

第8圖示出了根據本公開的實施例的Vramp放電斜率穩定過程中的波形示意圖。 FIG. 8 illustrates a waveform diagram during a Vramp discharge slope stabilization process according to an embodiment of the present disclosure.

第9圖示出了根據本公開的實施例的Vcs突變時的取樣信號示意圖。 FIG. 9 is a schematic diagram of a sampling signal when Vcs is abruptly changed according to an embodiment of the present disclosure.

第10圖示出了根據本公開的實施例的、可選地添加的Vout控制的放電支路示意圖。 FIG. 10 shows a schematic diagram of a Vout controlled discharge branch according to an embodiment of the present disclosure, which is optionally added.

第11圖示出了根據本公開的實施例的、加入Vout控制的放電支路電路圖。 FIG. 11 shows a circuit diagram of a discharge branch added with Vout control according to an embodiment of the present disclosure.

下面將詳細描述本發明的各個方面的特徵和示例性實施例。在下面的詳細描述中，提出了許多具體細節，以便提供對本發明的全面理解。但是，對於本領域技術人員來說很明顯的是，本發明可以在不需要這些具體細節中的一些細節的情況下實施。下面對實施例的描述僅僅是為了通過示出本發明的示例來提供對本發明的更好的理解。本發明決不限於下面所提出的任何具體配置和演算法，而是在不脫離本發明的精神的前提下覆蓋了元素、部件和演算法的任何修改、替換和改進。在附圖和下面的描述中，沒有示出公知的結構和技術，以便避免對本發明造成不必要的模糊。 Features and exemplary embodiments of various aspects of the invention will be described in detail below. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it is obvious to a person skilled in the art that the present invention can be implemented without the need for some of these specific details. The following description of the embodiments is merely for providing a better understanding of the present invention by showing examples of the present invention. The invention is by no means limited to any specific configuration and algorithm proposed below, but covers any modification, replacement and improvement of elements, components and algorithms without departing from the spirit of the invention. In the drawings and the following description, well-known structures and techniques are not shown in order to avoid unnecessarily obscuring the present invention.

本發明的目的是解決現有技術中的上述問題，提供了一 種在穩定輸出電壓下，取樣點位置與當前退磁結束點位置時間間距固定的取樣方法，這個時間間距僅由穩定狀態下的取樣峰值電壓、功率開關的導通時間以及退磁時間所確定，實現了對輸出電壓的即時取樣，至少解決了傳統的利用上個週期退磁時間確定當前週期取樣點方法中存在的系統Vcs突變引起的輸出不穩定問題。 The object of the present invention is to solve the above problems in the prior art, and to provide a A sampling method with a fixed time interval between the sampling point position and the current demagnetization end point position under a stable output voltage. This time interval is determined only by the sampling peak voltage in a steady state, the on time of the power switch, and the demagnetization time. The instant sampling of the output voltage at least solves the problem of output instability caused by the system Vcs mutation in the traditional method of determining the sampling point of the current cycle by using the demagnetization time of the previous cycle.

根據電感電壓電流關係，DCM(Discontinuous Conduction Mode，非連續導通)工作模式下的退磁時間可以確定如下：

Figure TWI680637B_D0003
According to the relationship between the inductor voltage and current, the demagnetization time in the DCM (Discontinuous Conduction Mode) working mode can be determined as follows:
Figure TWI680637B_D0003

其中，Ls為次級電感，Vout為輸出電壓。Ipk、Ipks分別為第一和第二電感電流的峰值，如第1B圖所示，Ip、Is分別為初級電感電流和次級電感電流，Vcs=Rcs*Ip，Rcs是第一電流感測電阻，將第一電流轉化為電壓Vcs，當第一電流為Ipk時，第一電流感測電阻Rcs上的取樣電壓Vcspk就是取樣峰值電壓，此時Vcspk=Rcs*Ipk。 Among them, Ls is the secondary inductance and Vout is the output voltage. Ipk and Ipks are the peak values of the first and second inductor currents respectively. As shown in Figure 1B, Ip and Is are the primary and secondary inductor currents, respectively, Vcs = Rcs * Ip, and Rcs is the first current sensing resistor. , The first current is converted into a voltage Vcs. When the first current is Ipk, the sampling voltage Vcspk on the first current sensing resistor Rcs is the sampling peak voltage, and Vcspk = Rcs * Ipk at this time.

根據本公開的實施例，提供了一種峰值電壓Vcspk控制的實現方法。 According to an embodiment of the present disclosure, a method for implementing peak voltage Vcspk control is provided.

第5圖示出了根據本公開的實施例的、模擬退磁放電斜率示意圖。電路達到穩定時，Vout為一個固定值，退磁時間與取樣峰值電 壓成比例，Tdem=Vcspk/k，其中

Figure TWI680637B_D0004
，為固定值。若在Tdem時間內將峰值電壓值為Vcspk的電容放電到0V，電壓變化如第5圖所示，則該電壓變化的斜率就是k，定義k為放電斜率(該係數反映了放電速度)。若取樣值為M*Vcspk，然後在退磁時間內將M*Vcspk放電到0V，則該放電斜率為固定值M*k。只要確定了這個放電斜率M*k，就可以通過對取樣到的M*Vcspk放電，類比退磁過程，根據Vcspk確定當前週期實際的退磁時間Tdem。本發明利用回饋的方法確定放電斜率M*k。 FIG. 5 shows a schematic diagram of a simulated demagnetization discharge slope according to an embodiment of the present disclosure. When the circuit reaches stability, Vout is a fixed value, the demagnetization time is proportional to the sampling peak voltage, Tdem = Vcspk / k, where
Figure TWI680637B_D0004
Is a fixed value. If the capacitor whose peak voltage value is Vcspk is discharged to 0V within Tdem time, and the voltage change is shown in Fig. 5, the slope of the voltage change is k, and k is defined as the discharge slope (the coefficient reflects the discharge speed). If the sampling value is M * Vcspk, and then M * Vcspk is discharged to 0V within the demagnetization time, the discharge slope is a fixed value M * k. As long as the discharge slope M * k is determined, the actual demagnetization time Tdem of the current cycle can be determined according to Vcspk by discharging the sampled M * Vcspk, and analogizing the demagnetization process. The present invention uses a feedback method to determine the discharge slope M * k.

第6A圖和第6B圖分別示出了根據本公開的實施例的電路結構以及信號時序圖。Vcs為第一電流感測電壓，在功率管導通時間Ton內增大，與輸入電壓Vline相關。電容C0對Vcs峰值電壓Vcspk進行取樣，經放大、位準移位後，被取樣到C1。退磁時間為Tdem，退磁升始時，C2先取樣C1上電壓，Idis在退磁時間內對C2上取樣到的電壓進行放 電，放電結束時，C2上的電壓Vramp被取樣到C3。若C3上的电压Vc1>Vref，放電電流Idis增大，在下一週期對Vramp放電速度變快，使放電結束時的電壓減小；若Vc1<Vref，放電電流Idis減小，在下一週期對Vramp放電速度變慢，使放電結束時的電壓增大；經過幾個週期後，Vc1=Vref，放電電流Idis穩定。 6A and 6B illustrate a circuit structure and a signal timing diagram according to an embodiment of the present disclosure, respectively. Vcs is the first current sensing voltage, which increases during the on-time Ton of the power tube and is related to the input voltage Vline. Capacitor C0 samples the Vcs peak voltage Vcspk, and after sampling and level shifting, it is sampled to C1. The demagnetization time is Tdem. When demagnetization starts, C2 samples the voltage on C1 first, and Idis discharges the voltage sampled on C2 during the demagnetization time. At the end of the discharge, the voltage Vramp on C2 is sampled to C3. If the voltage Vc1> Vref on C3, the discharge current Idis increases, and the discharge rate of Vramp becomes faster in the next cycle, so that the voltage at the end of the discharge decreases; if Vc1 <Vref, the discharge current Idis decreases, and the Vramp is reduced in the next cycle The discharge speed becomes slower, causing the voltage at the end of the discharge to increase; after several cycles, Vc1 = Vref, the discharge current Idis is stable.

comp為取樣點判斷比較器，1-shot為上升沿觸發的脈衝產生器，AND為及閘，pwm為開關信號，dem為退磁信號，Vref+Vt為比較器的參考輸入，稍大於Vref，Vt的大小決定了取樣點的位置，samp為在取樣點處產生的一定寬度的取樣脈衝信號。在Tdem時間內，Vramp從最大值開始線性下降，當減小到Vref+Vt，comp輸出out由低位準變為高位準，1-shot產生一個1脈衝，與退磁信號dem相與後得到取樣脈衝信號samp。 comp is the sampling point judgment comparator, 1-shot is the pulse generator triggered by the rising edge, AND is the AND gate, pwm is the switching signal, dem is the demagnetization signal, and Vref + Vt is the reference input of the comparator, slightly larger than Vref, Vt The size determines the location of the sampling point, and samp is a sampling pulse signal of a certain width generated at the sampling point. Within Tdem time, Vramp starts to decrease linearly from the maximum value. When it decreases to Vref + Vt, the comp output out changes from low level to high level. 1-shot produces a 1 pulse, which is obtained by summing with the demag signal dem. Signal samp.

其中，Vramp的峰值表示如下：V ramppk =V cspk ×M+V ref (公式4) The peak value of Vramp is expressed as follows: V ramppk = V cspk × M + V ref (Equation 4)

取樣點的位置與當前退磁時間Tdem、當前取樣峰值電壓Vcspk及Vt的關係如公式5所示：

Figure TWI680637B_D0005
The relationship between the position of the sampling point and the current demagnetization time Tdem and the current sampling peak voltages Vcspk and Vt is shown in Equation 5:
Figure TWI680637B_D0005

其中，穩定狀態下Idis的大小如公式6所示：

Figure TWI680637B_D0006
Among them, the size of Idis in the steady state is shown in Equation 6:
Figure TWI680637B_D0006

第7圖示出了根據本公開的實施例的回饋即時取樣點產生電路的圖示。AVDD為晶片內部低壓電源，在Ton期間，Vcs被取樣到C0，然後經緩衝、放大和位準平移後被取樣到C1。在Tdem期間，M0、M1斷開，C0、C1分別取樣到Vcs的峰值電壓和相應的放大平移電壓，M2導通，Vramp取樣到C1上的電壓，放電支路打開，對C2放電；Tdem結束後，放電結束，M3導通，將放電結束時的Vramp電壓取樣到C3，得到放電結束取樣電壓Vc1。 FIG. 7 shows a diagram of a feedback instant sampling point generating circuit according to an embodiment of the present disclosure. AVDD is the low-voltage power supply inside the chip. During Ton, Vcs is sampled to C0, and then sampled to C1 after buffering, amplification, and level shifting. During Tdem, M0 and M1 are turned off, C0 and C1 respectively sample the peak voltage of Vcs and the corresponding amplified translation voltage, M2 is turned on, Vramp samples the voltage on C1, the discharge branch is opened, and C2 is discharged; after Tdem ends When the discharge is completed, M3 is turned on, and the Vramp voltage at the end of the discharge is sampled to C3 to obtain the discharge end sampling voltage Vc1.

放電支路由兩部分構成，一部分是固定放電電流Ist，一部分是由放電結束取樣電壓Vc1決定的可控放電電流Ict。電路啟動時， Vc1<<Vref，可控放電電流Ict為0或者很小，固定放電電流保證了啟動時一定的放電電流。當Vc1>Vref，在下一週期，可控放電電流增大，使下一週期放電結束時的電壓減小；當Vc1<Vref，在下一週期，可控放電電流減小，使下一週期放電結束時的電壓增大；最後Vc1=Vref，放電電流Idis達到穩定，如第8圖所示。 The discharge branch is composed of two parts, one is a fixed discharge current Ist, and the other is a controllable discharge current Ict determined by the discharge end sampling voltage Vc1. When the circuit starts, Vc1 << Vref, the controllable discharge current Ict is 0 or very small, and the fixed discharge current guarantees a certain discharge current at startup. When Vc1> Vref, in the next cycle, the controllable discharge current increases, so that the voltage at the end of the next period of discharge decreases; when Vc1 <Vref, in the next period, the controllable discharge current decreases, so that the next period of discharge ends The voltage at time increases; finally Vc1 = Vref, the discharge current Idis reaches stability, as shown in Figure 8.

第8圖示出了根據本公開的實施例的Vramp放電斜率穩定過程中的波形示意圖。在Tdem期間，C2先取樣C1上電壓，Vramp電壓升到Vramppk，comp輸出低位準，隨著part2對C2的放電，Vramp線性下降，當Vramp降到Vref+Vt，comp輸出高位準，1-shot產生一個1脈衝，與退磁信號dem相與後得到取樣信號samp。 FIG. 8 illustrates a waveform diagram during a Vramp discharge slope stabilization process according to an embodiment of the present disclosure. During the Tdem period, C2 samples the voltage on C1 first, the Vramp voltage rises to Vramppk, and comp outputs low level. As part2 discharges to C2, Vramp decreases linearly. When Vramp drops to Vref + Vt, comp outputs high level, 1-shot A 1-pulse is generated, and the sampled signal samp is obtained after summing with the demagnetization signal dem.

第9圖示出了根據本公開的實施例的Vcs突變時的取樣信號示意圖。電路達到穩定時，放電電流Idis為一個固定值，Vramp下降斜率為M*k。若Vcs發生突變，因為放電電流穩定，Vramp下降斜率不變，所以Vramp下降到Vref的時間即為實際的退磁時間。放電時間Tdem為上一週期的退磁時間，若Vcs突變為一個更小的值，實際退磁時間減小(Tdem’<Tdem)，採用該電路，在Vramp完全退磁前就完成了取樣。 FIG. 9 is a schematic diagram of a sampling signal when Vcs is abruptly changed according to an embodiment of the present disclosure. When the circuit reaches stability, the discharge current Idis is a fixed value, and the slope of Vramp drop is M * k. If Vcs changes abruptly, because the discharge current is stable and Vramp's falling slope does not change, the time when Vramp drops to Vref is the actual demagnetization time. The discharge time Tdem is the demagnetization time of the previous cycle. If Vcs changes abruptly to a smaller value, the actual demagnetization time decreases (Tdem '<Tdem). Using this circuit, sampling is completed before Vramp is completely demagnetized.

如果Vcs突變為一個更大的值，實際退磁時間增大(Tdem”>Tdem)。如果在放電結束(Tdem)前，Vramp<Vref+Vt，samp1產生取樣信號；如果在放電結束(Tdem)時，Vramp>Vref+Vt，comp輸出仍然為低位準，samp1不產生取樣信號，在dem下降沿，samp2產生一個1脈衝，在dem下降沿處進行取樣。如第9圖所示。 If Vcs abruptly changes to a larger value, the actual demagnetization time increases (Tdem "> Tdem). If Vramp <Vref + Vt before the end of the discharge (Tdem), samp1 generates a sampling signal; if at the end of the discharge (Tdem) , Vramp> Vref + Vt, comp output is still low level, samp1 does not generate a sampling signal, samp2 generates a 1 pulse at the dem falling edge, and samples at the dem falling edge. As shown in Figure 9.

如果輸出電壓Vout發生變化時，根據(公式3)，退磁時間Tdem也會發生變化。如果Vout增大，則Tdem減小，利用上述閉環取樣到Vramp放電結束時的電壓Vc1將增大，於是放電電流增大，放電斜 率增大

Figure TWI680637B_D0007
，最後達到新的穩定狀態。放電電流可表示為如 下：I dis =I vr +I 0 (公式7) If the output voltage Vout changes, according to (Equation 3), the demagnetization time Tdem also changes. If Vout increases, Tdem decreases, and the voltage Vc1 at the end of Vramp discharge is increased using the above-mentioned closed-loop sampling, so the discharge current increases and the discharge slope increases.
Figure TWI680637B_D0007
And finally reach a new steady state. The discharge current can be expressed as follows: I dis = I vr + I 0 (Equation 7)

Ivr是受Vc1控制的可變電流，穩態下Ivr是固定值，不同Vout下的穩態值不同。Vout對放電斜率的調節是通過退磁時間Tdem的變化間接實現的。上述方法至少需要等待2個週期後才開始調節放電電 流。Vout開始變化時，第一個週期仍然使用改變前的退磁時間對Vramp進行放電，放電結束取樣電壓Vc1不變，所以下一週期放電電流不變；第二個週期使用第一個週期得到的退磁時間對Vramp進行放電，放電結束取樣電壓Vc1變化，下一週期放電電流發生變化。 Ivr is a variable current controlled by Vc1. Ivr is a fixed value under steady state, and the steady state value is different under different Vout. The adjustment of Vout to the discharge slope is realized indirectly through the change of the demagnetization time Tdem. The above method needs to wait at least 2 cycles before starting to adjust the discharge power. flow. When Vout begins to change, Vramp is still discharged using the demagnetization time before the change in the first cycle, and the sampling voltage Vc1 at the end of the discharge is unchanged, so the discharge current is not changed in the next cycle; the demagnetization obtained in the first cycle is used in the second cycle Vramp is discharged over time, the sampling voltage Vc1 at the end of the discharge changes, and the discharge current changes in the next cycle.

根據本公開的實施例，還提供了峰值電壓Vcspk和輸出電壓Vout控制的實現方法。例如，可以在放電電流的控制中直接加入Vout作為控制因素，由(公式3)可知，Vcspk=a×Vout×Tdem，其中k=a×Vout，為一個與Vout有關的值。放電電流錶示如下：

Figure TWI680637B_D0008
According to an embodiment of the present disclosure, a method for implementing peak voltage Vcspk and output voltage Vout control is also provided. For example, Vout can be directly added as a control factor in the control of the discharge current. From (Formula 3), Vcspk = a × Vout × Tdem, where k = a × Vout is a value related to Vout. The discharge current is expressed as follows:
Figure TWI680637B_D0008

其中Rvr是受Vc1控制的可變電阻，穩態下Rvr是一個固定值，不同的Vout下放電電流穩態值不同。 Among them, Rvr is a variable resistor controlled by Vc1. In steady state, Rvr is a fixed value, and the steady-state value of discharge current is different under different Vout.

第10圖示出了根據本公開的實施例的、可選地添加的Vout控制的放電支路示意圖。FB取樣電路的放電電路部分如第11圖所示，其他部分與第7圖中相同。VFB是輸出電壓Vout回饋到初級端的值，M5工作在線性區，從A看到的等效電阻是受控制的可變電阻Ron表示如下：

Figure TWI680637B_D0009
FIG. 10 shows a schematic diagram of a Vout controlled discharge branch according to an embodiment of the present disclosure, which is optionally added. The discharge circuit part of the FB sampling circuit is shown in FIG. 11, and other parts are the same as those in FIG. 7. VFB is the value that the output voltage Vout feeds back to the primary side. M5 works in the linear region. The equivalent resistance seen from A is the controlled variable resistance Ron as follows:
Figure TWI680637B_D0009

其中Vgs是M5閘源電壓，由Vc1控制。於是放電電流的大小由Vout與Vc1共同控制，流過M5的電流大小可表示如下：

Figure TWI680637B_D0010
Vgs is the gate-source voltage of M5, which is controlled by Vc1. Therefore, the magnitude of the discharge current is jointly controlled by Vout and Vc1, and the magnitude of the current flowing through M5 can be expressed as follows:
Figure TWI680637B_D0010

加入Vout控制後，最好情況下等待下一週期調節就會開始。Vout開始變化時，第一個週期仍然使用上一週期取樣到的VFB(電壓不變)，放電電流不變，使用上一週期的退磁時間對Vramp放電，放電結束取樣電壓Vc1不變，所以下一週期Ron不變；若第一個週期可以采到變化後的電壓，第二個週期使用第一個週期得到VFB，放電電流變化，若第一個週期不能進行正確的取樣，第二個週期就使用第一個週期前得到的VFB，放電電流不變。所以最好情況下，Vout變化後等待1個週期就開始調節放電電流。同時聯合Vc1的控制，以提高對輸出電壓變化的回應速 度。 After adding Vout control, it is best to wait for the next cycle of adjustment to start. When Vout starts to change, the first cycle still uses the VFB sampled in the previous cycle (the voltage is unchanged), the discharge current does not change, the demagnetization time of the previous cycle is used to discharge Vramp, and the sampling voltage Vc1 at the end of discharge does not change. Ron remains unchanged in one cycle; if the changed voltage can be taken in the first cycle, VFB is obtained in the second cycle using the first cycle, and the discharge current changes. If the correct sampling cannot be performed in the first cycle, the second cycle The VFB obtained before the first cycle is used, and the discharge current does not change. So in the best case, wait for one cycle after Vout changes to start adjusting the discharge current. At the same time, the control of Vc1 is combined to improve the response speed to changes in output voltage. degree.

以上方法只適用於DCM工作模式，對於CCM(Continuous Conduction Mode，連續導通)工作模式，Vcs電壓在Ton期間是由一個大於零的初始電壓Vcs0開始增加，此時，(公式3)應變形如下：

Figure TWI680637B_D0011
The above method is only applicable to the DCM working mode. For the Continuous Conduction Mode (CCM) working mode, the Vcs voltage increases from an initial voltage Vcs0 greater than zero during the Ton period. At this time, (Formula 3) should be deformed as follows:
Figure TWI680637B_D0011

其中△Ip、△Is分別為初級電感在Ton期間的電流變化和次級電感在Tdem期間的電流變化，△Vcs=Vcspk-Vcs0。相應的，電路圖7中opa3的正輸入端電壓Vref應修改為Vref’，其中Vref’=Vref+M*Vcs0。要得到Vref’，可以通過Ton/2取樣得到Ton期間Vcs的平均值Von/2，於是可以得到下述公式V cs 0=2V on/2-V cspk (公式12) △ Ip and △ Is are the current changes of the primary inductor during the Ton period and the current changes of the secondary inductor during the Tdem period, △ Vcs = Vcspk-Vcs0. Correspondingly, the positive input terminal voltage Vref of opa3 in the circuit diagram of FIG. 7 should be modified to Vref ', where Vref' = Vref + M * Vcs0. To obtain Vref ', Ton / 2 sampling can be used to obtain the average value Von / 2 of Vcs during Ton, so the following formula V cs 0 = 2 V on / 2 - V cspk (Equation 12)

△V cs =V cspk -V cs 0=2(V cspk -V on/2) (公式13) △ V cs = V cspk -V cs 0 = 2 ( V cspk -V on / 2 ) (Equation 13)

V ref '=V ref +MV cs 0=V ref +M(2V on/2-V cspk ) (公式14) V ref '= V ref + MV cs 0 = V ref + M (2 V on / 2 - V cspk ) (Equation 14)

以上做了相應修改的結構對CCM、DCM工作模式都適用。 The above modified structure is applicable to both CCM and DCM working modes.

根據本公開的實施例，取樣點位置與當前退磁結束點位置時間間距固定的取樣方法，所述時間間距由穩定狀態下的取樣峰值電壓、功率開關的導通時間以及退磁時間來確定。 According to an embodiment of the present disclosure, a sampling method having a fixed time interval between a sampling point position and a current demagnetization end point position, the time interval is determined by a sampling peak voltage in a steady state, an on time of a power switch, and a demagnetization time.

根據本公開的實施例，退磁時間滿足下述關係：Tdem=Vcspk/k，其中Tdem為退磁時間，Vcspk為取樣峰值電壓，k為一個與輸出電壓Vout相關的值，在電路穩定時，k為固定值。 According to the embodiment of the present disclosure, the demagnetization time satisfies the following relationship: Tdem = Vcspk / k, where Tdem is the demagnetization time, Vcspk is the sampling peak voltage, k is a value related to the output voltage Vout, and when the circuit is stable, k is Fixed value.

根據本公開的實施例，其中取樣點的位置Tsamp与Tdem的关系可如下表述：

Figure TWI680637B_D0012
According to the embodiment of the present disclosure, the relationship between the position Tsamp and Tdem of the sampling point can be expressed as follows:
Figure TWI680637B_D0012

其中，M為對取樣峰值電壓Vcspk的放大倍數，Vt為取樣點判斷電壓，它決定了通過放電進行模擬退磁的過程中產生取樣點的位置。Vref+Vt作為取樣點判斷比較器的輸入參考電壓，當取樣峰值電壓經過放大和位準移位後得到的電壓放電到Vref+Vt時進行取樣，其中Vref是 位準移位的大小。 Among them, M is the magnification of the sampling peak voltage Vcspk, and Vt is the sampling point judgment voltage, which determines the position of the sampling point during the process of simulated demagnetization by discharging. Vref + Vt is used as the input reference voltage of the comparator to determine the sampling point. When the sampling peak voltage is amplified and the voltage obtained after level shift is discharged to Vref + Vt, sampling is performed, where Vref is The magnitude of the level shift.

根據本公開的實施例，其中當所述開關電源工作在非連續導通模式DCM下時，通過調節取樣峰值電壓與取樣電阻的比值來調節所述退磁時間。 According to an embodiment of the present disclosure, when the switching power supply operates in a discontinuous conduction mode DCM, the demagnetization time is adjusted by adjusting a ratio of a sampling peak voltage to a sampling resistance.

根據本公開的實施例，其中當所述開關電源工作在連續導通模式CCM下時，通過調節取樣峰值電壓與初始電壓的差、與取樣電阻的比值來調節所述退磁時間。 According to an embodiment of the present disclosure, when the switching power supply operates in a continuous conduction mode CCM, the demagnetization time is adjusted by adjusting a difference between a sampling peak voltage and an initial voltage, and a ratio to a sampling resistance.

根據本公開的實施例，其中k根據下式確定：

Figure TWI680637B_D0013
According to an embodiment of the present disclosure, where k is determined according to the following formula:
Figure TWI680637B_D0013

其中Vout為所述開關電源的輸出電壓，Rcs為取樣電阻的電阻值，Ls為次級電感的電感值，Np/Ns為原邊與副邊繞組匝數的比值。 Where Vout is the output voltage of the switching power supply, Rcs is the resistance value of the sampling resistor, Ls is the inductance value of the secondary inductor, and Np / Ns is the ratio of the number of turns of the primary and secondary windings.

根據本公開的實施例，其中Vout是可調節的。 According to an embodiment of the present disclosure, wherein Vout is adjustable.

例如，本發明的各種實施例的一些或所有元件均被使用一個或多個軟體元件、一個或多個硬體元件、和/或軟體和硬體元件的一個或多個組合，單獨和/或至少與另一組件結合實現。在另一示例中，本發明的各種實施例的一些或所有元件均被單獨和/或至少與另一元件結合實現在一個或多個電路中，這些電路諸如是一個或多個類比電路和/或一個或多個數位電路。在又一示例中，本發明的各種實施例和/或示例可以被結合。 For example, some or all of the elements of the various embodiments of the present invention use one or more software elements, one or more hardware elements, and / or one or more combinations of software and hardware elements, alone and / or At least in combination with another component. In another example, some or all of the elements of various embodiments of the present invention are implemented in one or more circuits alone and / or in combination with at least another element, such as one or more analog circuits and / Or one or more digital circuits. In yet another example, various embodiments and / or examples of the invention may be combined.

儘管描述了本發明的具體實施例，但是本領域技術人員將理解的是其他實施例相當於所描述的實施例。因此，將理解的是，本發明不限於具體示出的實施例，而僅受所附權利要求的範圍的限制。 Although specific embodiments of the invention have been described, those skilled in the art will understand that other embodiments are equivalent to the described embodiments. Therefore, it will be understood that the invention is not limited to the specifically illustrated embodiments, but only by the scope of the appended claims.

Claims (10)

一種開關電源輸出取樣的類比退磁取樣方法，包括：通過對所述開關電源初級取樣峰值電壓放電來對退磁進行模擬；確定初級取樣峰值電壓與退磁時間的關係；並且基於當前週期的取樣峰值電壓、功率開關的導通時間以及上個週期的放電速度資訊來確定取樣點的位置。An analog demagnetization sampling method for switching power supply output sampling includes: simulating demagnetization by discharging the primary sampling peak voltage of the switching power supply; determining the relationship between the primary sampling peak voltage and the demagnetization time; and based on the current sampling peak voltage, The on-time of the power switch and the discharge speed information from the previous cycle determine the location of the sampling point. 如申請專利範圍第1項所述的方法，其中，所述取樣點位置與當前退磁結束點位置時間間距固定的取樣方法，所述時間間距由穩定狀態下的取樣峰值電壓、功率開關的導通時間以及退磁時間來確定。The method according to item 1 of the scope of patent application, wherein the sampling point position and the current demagnetization end point position have a fixed time interval between the sampling time, the time interval is the steady state sampling peak voltage, the power switch on-time And demagnetization time to determine. 如申請專利範圍第1項所述的方法，其中所述退磁時間滿足下述關係：Tdem=Vcspk/k其中Tdem為退磁時間，Vcspk為取樣峰值電壓，k為一個與輸出電壓Vout相關的值，在電路穩定時，k為固定值。The method according to item 1 of the scope of the patent application, wherein the demagnetization time satisfies the following relationship: T dem = V cspk / k where T dem is a demagnetization time, V cspk is a sampling peak voltage, and k is a voltage output voltage Related values, when the circuit is stable, k is a fixed value. 如申請專利範圍第3項所述的方法，其中取樣點的位置Tsamp表示如下：其中Vt為取樣點判斷電壓，它決定了通過放電進行模擬退磁的過程中產生取樣點的位置，當取樣峰值電壓Vcspk經過放大和位準移位後得到的電壓放電到Vref+Vt時進行取樣，其中Vref是位準移位的大小。The method according to item 3 of the scope of patent application, wherein the position Tsamp of the sampling point is expressed as follows: Among them, Vt is the sampling point judgment voltage, which determines the position of the sampling point during the simulated demagnetization process by discharging. When the sampling peak voltage Vcspk is amplified and the voltage obtained after the level shift is discharged to Vref + Vt, sampling is performed. Where Vref is the magnitude of the level shift. 如申請專利範圍第1項所述的方法，其中當所述開關電源工作在非連續導通模式DCM下時，通過取樣峰值電壓來類比所述退磁時間。The method according to item 1 of the patent application range, wherein when the switching power supply is operating in a discontinuous conduction mode DCM, the demagnetization time is analogized by sampling a peak voltage. 如申請專利範圍第1項所述的方法，其中當所述開關電源工作在連續導通模式CCM下時，通過取樣峰值電壓與初始電壓的差來類比所述退磁時間。The method according to item 1 of the scope of patent application, wherein when the switching power supply is operating in the continuous conduction mode CCM, the demagnetization time is analogized by sampling the difference between the peak voltage and the initial voltage. 如申請專利範圍第3項所述的方法，其中k根據下式確定：其中Vout為所述開關電源的輸出電壓，Rcs為取樣電阻的電阻值，Ls為次級電感的電感值，Np/Ns為一次與二次繞組匝數的比值。The method as described in item 3 of the patent application scope, wherein k is determined according to the following formula: Where Vout is the output voltage of the switching power supply, Rcs is the resistance value of the sampling resistor, Ls is the inductance value of the secondary inductance, and Np / Ns is the ratio of the primary to secondary winding turns. 如申請專利範圍第7項所述的方法，其中Vout是可調節的。The method as described in claim 7 of the patent application scope, wherein Vout is adjustable. 一種開關電源輸出取樣的類比退磁取樣系統，包括：用於通過對所述開關電源初級取樣峰值電壓放電來對退磁進行類比的裝置；用於確定初級取樣峰值電壓與退磁時間的關係的裝置；以及用於基於當前週期的取樣峰值電壓、功率開關的導通時間以及上個週期的放電速度資訊來確定取樣點的位置的裝置。An analog demagnetization sampling system for switching power supply output sampling, comprising: a device for analogizing demagnetization by discharging a primary sampling peak voltage of the switching power supply; a device for determining a relationship between a primary sampling peak voltage and a demagnetization time; and Device for determining the position of a sampling point based on the sampling peak voltage of the current cycle, the on-time of the power switch, and the discharge speed information of the previous cycle. 一種包括如申請專利範圍第9項所述的開關電源輸出取樣的類比退磁取樣系統的開關電源。A switching power supply including an analog demagnetization sampling system for switching power supply output sampling as described in item 9 of the scope of the patent application.
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