TWI676355B - Hybrid drive circuit - Google Patents
Hybrid drive circuit Download PDFInfo
- Publication number
- TWI676355B TWI676355B TW108119667A TW108119667A TWI676355B TW I676355 B TWI676355 B TW I676355B TW 108119667 A TW108119667 A TW 108119667A TW 108119667 A TW108119667 A TW 108119667A TW I676355 B TWI676355 B TW I676355B
- Authority
- TW
- Taiwan
- Prior art keywords
- resistor
- diode
- coupled
- path
- driving circuit
- Prior art date
Links
Landscapes
- Power Conversion In General (AREA)
- Electronic Switches (AREA)
Abstract
一種混合驅動電路，根據輸入訊號驅動並聯耦接的第一特性電晶體與第二特性電晶體，且混合驅動電路包括第一導通路徑、第一關斷路徑、第二導通路徑及第二關斷路徑。第一導通路徑與第二導通路徑產生第一延遲時間，第一延遲時間使第一特性電晶體延後導通。第一關斷路徑與第二關斷路徑產生第二延遲時間，第二延遲時間使第二特性電晶體延後關斷。 A hybrid driving circuit drives a first characteristic transistor and a second characteristic transistor coupled in parallel according to an input signal, and the hybrid driving circuit includes a first conducting path, a first turning off path, a second conducting path, and a second turning off path. The first conduction path and the second conduction path generate a first delay time, and the first delay time delays the first characteristic transistor to be turned on. The first turn-off path and the second turn-off path generate a second delay time, and the second delay time causes the second characteristic transistor to be turned off after a delay.
Description
本發明係有關一種混合驅動電路，尤指一種驅動不同特性電晶體的混合驅動電路。 The invention relates to a hybrid driving circuit, in particular to a hybrid driving circuit for driving transistors with different characteristics.
在電力電子的領域中，絕緣柵雙極電晶體(Insulated Gate Bipolar Transistor；IGBT)與金氧半場效電晶體(Metal-Oxide-Semiconductor Field-Effect Transistor；MOSFET)為常見的功率開關元件。若是考慮切換頻率，絕緣柵雙極電晶體通常適用於20kHz以下的開關電路，而切換頻率若是在20kHz以上通常是利用金氧半場效電晶體作為開關電路。 In the field of power electronics, Insulated Gate Bipolar Transistor (IGBT) and Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) are common power switching elements. If the switching frequency is considered, an insulated gate bipolar transistor is usually suitable for a switching circuit below 20 kHz, and if the switching frequency is above 20 kHz, a metal-oxide half field effect transistor is usually used as the switching circuit.
以切換頻率作為功率開關元件的選擇，其主要原因是不同開關元件特性對於效率的影響。具體而言，絕緣柵雙極電晶體的導通損失(conduction losses)較低，切換損失(switching losses)較高。其利用在高頻切換時，較高的切換損失會消耗較多的功率(金氧半場效電晶體恰巧相反)，造成效率的低落。但是，在開關電路的設計中，大多僅選擇單一種類的功率開關元件。為了縮小電路體積，更高的切換頻率已是趨勢，然而單一特性的功率元件並無法有效降低功率損耗。 The main reason for using switching frequency as the power switching element is the effect of different switching element characteristics on efficiency. Specifically, the conduction loss of the insulated gate bipolar transistor is low, and the switching losses are high. When it is used at high frequency switching, a higher switching loss will consume more power (the metal-oxygen half field effect transistor happens to be the opposite), resulting in a decrease in efficiency. However, in the design of switching circuits, only a single type of power switching element is often selected. In order to reduce the circuit size, a higher switching frequency is already a trend, but a single characteristic power element cannot effectively reduce power loss.
所以，如何設計出一種混合驅動電路驅動不同特性的功率開關元件，兼具兩種功率開關元件的優點，乃為本案創作人所欲行研究的一大課題。 Therefore, how to design a hybrid driving circuit to drive power switching elements with different characteristics and have the advantages of both types of power switching elements is a major issue for the author of this case.
為了解決上述問題，本發明係提供一種混合驅動電路，以克服習知技術的問題。因此，本發明混合驅動電路，根據輸入訊號驅動並聯耦接的第一特性電晶體與第二特性電晶體，混合驅動電路包括：第一支路與第二支路，第一支路包括：第一導通路徑，根據輸入訊號的上升沿導通第一特性電晶體。及第一關斷路徑，根據輸入訊號的下降沿關斷第一特性電晶體。第二支路，包括：第二導通路徑，根據上升沿導通第二特性電晶體。及第二關斷路徑，根據下降沿關斷第二特性電晶體。其中，第一導通路徑與第二導通路徑產生第一延遲時間，第一延遲時間使第一特性電晶體延後導通；第一關斷路徑與第二關斷路徑產生第二延遲時間，第二延遲時間使第二特性電晶體延後關斷。 In order to solve the above problems, the present invention provides a hybrid driving circuit to overcome the problems of the conventional technology. Therefore, the hybrid driving circuit of the present invention drives a first characteristic transistor and a second characteristic transistor coupled in parallel according to an input signal. The hybrid driving circuit includes a first branch and a second branch, and the first branch includes: A conducting path turns on the first characteristic transistor according to the rising edge of the input signal. And the first shutdown path, the first characteristic transistor is turned off according to the falling edge of the input signal. The second branch includes: a second conducting path, which conducts the second characteristic transistor according to a rising edge. And the second turn-off path, turning off the second characteristic transistor according to the falling edge. Among them, the first conducting path and the second conducting path generate a first delay time, and the first delay time causes the first characteristic transistor to be turned on with a delay; the first off path and the second off path generate a second delay time, and the second The delay time delays turning off the second characteristic transistor.
為了能更進一步瞭解本發明為達成預定目的所採取之技術、手段及功效，請參閱以下有關本發明之詳細說明與附圖，相信本發明之目的、特徵與特點，當可由此得一深入且具體之瞭解，然而所附圖式僅提供參考與說明用，並非用來對本發明加以限制者。 In order to further understand the technology, means and effects adopted by the present invention to achieve the intended purpose, please refer to the following detailed description and accompanying drawings of the present invention. It is believed that the purpose, features and characteristics of the present invention can be obtained in-depth and Specific understanding, however, the drawings are provided for reference and description only, and are not intended to limit the present invention.
100、100’‧‧‧混合驅動電路 100, 100’‧‧‧ hybrid drive circuit
10、10’‧‧‧第一支路 10, 10’‧‧‧ first branch road
Pc1‧‧‧第一導通路徑 Pc1‧‧‧First Conduction Path
Ps1‧‧‧第一關斷路徑 Ps1‧‧‧First shutdown path
20、20’‧‧‧第二支路 20, 20’‧‧‧Second Branch Road
Pc2‧‧‧第二導通路徑 Pc2‧‧‧Second Conduction Path
Ps2‧‧‧第二關斷路徑 Ps2‧‧‧Second shutdown path
202‧‧‧放電電路 202‧‧‧discharge circuit
30、30’‧‧‧光耦驅動模組 30, 30 ’‧‧‧ optocoupler drive module
302‧‧‧第一光耦驅動電路 302‧‧‧The first optocoupler driving circuit
302-1‧‧‧第一光耦驅動器 302-1‧‧‧The first optocoupler driver
302-2、302-2’‧‧‧第一斜率調整電路 302-2, 302-2’‧‧‧‧First slope adjustment circuit
304‧‧‧第二光耦驅動電路 304‧‧‧Second Optocoupler Driving Circuit
304-1‧‧‧第二光耦驅動器 304-1‧‧‧Second Optocoupler Driver
304-2、304-2’‧‧‧第二斜率調整電路 304-2, 304-2’‧‧‧Second slope adjustment circuit
306‧‧‧光耦合單元 306‧‧‧Optical coupling unit
308‧‧‧驅動單元 308‧‧‧Drive unit
200‧‧‧控制器 200‧‧‧ Controller
300‧‧‧絕緣柵雙極電晶體 300‧‧‧ Insulated Gate Bipolar Transistor
400‧‧‧金氧半場效電晶體 400‧‧‧ Metal Oxide Half Field Effect Transistor
R1~R9‧‧‧第一電阻~第九電阻 R1 ~ R9‧‧‧First resistance ~ Ninth resistance
RS1、RS2‧‧‧斜率調整電阻 RS1, RS2‧‧‧‧Slope adjustment resistor
D1~D7‧‧‧第一二極體~第七二極體 D1 ~ D7‧‧‧First Diode ~ Seven Diode
C1~C3‧‧‧第一電容~第三電容 C1 ~ C3‧‧‧ first capacitor ~ third capacitor
Sin‧‧‧輸入訊號 Sin‧‧‧Input signal
VCC‧‧‧驅動電壓 VCC‧‧‧Drive voltage
VEE‧‧‧參考地電壓 VEE‧‧‧ Reference Ground Voltage
(I)~(II)‧‧‧波形 (I) ~ (II) ‧‧‧Waveform
圖1為本發明混合驅動電路第一實施例之電路方塊示意圖；圖2A為本發明混合驅動電路導通絕緣柵雙極電晶體與金氧半場效電晶體之波形示意圖； 圖2B為本發明混合驅動電路關斷絕緣柵雙極電晶體與金氧半場效電晶體之波形示意圖；圖3A為本發明混合驅動電路導通絕緣柵雙極電晶體與金氧半場效電晶體之導通路徑示意圖；圖3B為本發明混合驅動電路導通絕緣柵雙極電晶體與金氧半場效電晶體之關斷路徑示意圖；圖4為本發明混合驅動電路第二實施例之電路方塊示意圖；圖5A為本發明具有光耦驅動模組的混合驅動電路第一實施例之方塊示意圖；圖5B為本發明具有光耦驅動模組的混合驅動電路第二實施例之方塊示意圖；圖6為本發明光耦驅動模組的電路方塊示意圖；及圖7為本發明斜率調整電路的電路方塊示意圖。 FIG. 1 is a schematic circuit block diagram of the first embodiment of the hybrid driving circuit of the present invention; FIG. 2A is a waveform schematic diagram of the hybrid driving circuit of the present invention turning on the insulated gate bipolar transistor and the metal-oxide half field effect transistor; FIG. 2B is a waveform diagram showing that the hybrid driving circuit of the present invention turns off the insulated gate bipolar transistor and the metal-oxide-semiconductor field-effect transistor; FIG. 3A is a diagram of the hybrid driving circuit of the present invention turns on the insulated-gate bipolar transistor and the metal-oxide-semiconductor half-field-effect transistor. A schematic diagram of the conduction path; FIG. 3B is a schematic diagram of the off path of the hybrid driving circuit of the present invention to turn on the insulated gate bipolar transistor and the metal-oxide-semiconductor field-effect transistor; FIG. 4 is a schematic circuit block diagram of the second embodiment of the hybrid driving circuit of the present invention; 5A is a block diagram of a first embodiment of a hybrid drive circuit with an optocoupler drive module according to the present invention; FIG. 5B is a block diagram of a second embodiment of a hybrid drive circuit with an optocoupler drive module according to the present invention; FIG. 6 is the present invention Circuit block diagram of an optocoupler driving module; and FIG. 7 is a circuit block diagram of a slope adjustment circuit according to the present invention.
茲有關本發明之技術內容及詳細說明，配合圖式說明如下：請參閱圖1為本發明混合驅動電路第一實施例之電路方塊示意圖。混合驅動電路100從控制器200接收輸入訊號Sin，且根據輸入訊號Sin驅動並聯耦接的第一特性電晶體與第二特性電晶體。為了方便說明，第一特性電晶體此處以絕緣柵雙極電晶體300為例，第二特性電晶體此處以金氧半場效電晶體400為例，但不限定於此，例如，第二特性電晶體亦可為碳化矽金氧半場效電晶體(SiC-MOSFET)或氮化鎵(Gallium nitride)等不同特性的功率半導體元件。混合驅動電路100包括第一支路10與第二支路20，且第一支路10耦接絕緣柵雙 極電晶體300，第二支路20耦接金氧半場效電晶體400。第一支路10包括串聯耦接的第一二極體D1與第一電阻R1、串聯耦接的第二二極體D2與第二電阻R2，第一二極體D1的陽極與第二二極體D2的陰極耦接輸入訊號Sin，且第一電阻R1與第二電阻R2耦接絕緣柵雙極電晶體300，第一二極體D1與第二二極體D2設置為不同的電流導通方向，此處方向表示流入電晶體或流出的方向。 The technical content and detailed description of the present invention are described below with reference to the drawings. Please refer to FIG. 1 which is a schematic circuit block diagram of the first embodiment of the hybrid driving circuit of the present invention. The hybrid driving circuit 100 receives an input signal Sin from the controller 200 and drives the first characteristic transistor and the second characteristic transistor coupled in parallel according to the input signal Sin. For convenience of explanation, the first characteristic transistor is here an insulated gate bipolar transistor 300 as an example, and the second characteristic transistor is here an example of a metal oxide half field effect transistor 400, but is not limited thereto. For example, the second characteristic transistor is The crystal can also be a power semiconductor device with different characteristics such as silicon carbide, gold-oxygen half field-effect transistor (SiC-MOSFET) or gallium nitride. The hybrid driving circuit 100 includes a first branch 10 and a second branch 20, and the first branch 10 is coupled to an insulated gate double The pole transistor 300 and the second branch 20 are coupled to a metal oxide half field effect transistor 400. The first branch circuit 10 includes a first diode D1 and a first resistor R1 coupled in series, a second diode D2 and a second resistor R2 coupled in series, and an anode of the first diode D1 and a second diode R1. The cathode of the pole D2 is coupled to the input signal Sin, and the first resistor R1 and the second resistor R2 are coupled to the insulated gate bipolar transistor 300. The first diode D1 and the second diode D2 are set to different current conduction. Direction, where direction means the direction of flow into or out of the transistor.
第二支路20包括串聯耦接的第三二極體D3與第三電阻R3，以及放電電路202。放電電路202耦接第三二極體D3、第三電阻R3及輸入訊號Sin，且包括第四電阻R4、第一電容C1、第五電阻R5及第四二極體D4。第四電阻R4的一端耦接第三二極體D3與第三電阻R3之間，第四電阻R4的另一端耦接第一電容C1的一端，且第一電容C1的另一端耦接接地點。第五電阻R5的一端耦接第四電阻R4與第一電容C1之間，且第五電阻R5的另一端耦接第四二極體D4的陽極。第三二極體D3的陽極與第四二極體D4的陰極耦接輸入訊號Sin，且第三電阻R3耦接金氧半場效電晶體400，同樣的，第三二極體D3與第四二極體D4設置為不同的電流導通方向。 The second branch 20 includes a third diode D3 and a third resistor R3 coupled in series, and a discharge circuit 202. The discharge circuit 202 is coupled to the third diode D3, the third resistor R3, and the input signal Sin, and includes a fourth resistor R4, a first capacitor C1, a fifth resistor R5, and a fourth diode D4. One end of the fourth resistor R4 is coupled between the third diode D3 and the third resistor R3. The other end of the fourth resistor R4 is coupled to one end of the first capacitor C1, and the other end of the first capacitor C1 is coupled to a ground point. . One end of the fifth resistor R5 is coupled between the fourth resistor R4 and the first capacitor C1, and the other end of the fifth resistor R5 is coupled to the anode of the fourth diode D4. The anode of the third diode D3 and the cathode of the fourth diode D4 are coupled to the input signal Sin, and the third resistor R3 is coupled to the metal-oxide-semiconductor field-effect transistor 400. Similarly, the third diode D3 and the fourth diode Diode D4 is set to different current conduction directions.
具體而言，第一二極體D1與第一電阻R1構成第一導通路徑，且第一導通路徑根據輸入訊號Sin的上升沿導通絕緣柵雙極電晶體300。第二二極體D2與第二電阻R2構成第一關斷路徑，第一關斷路徑根據輸入訊號Sin的下降沿關斷絕緣柵雙極電晶體300。第三二極體D3與第三電阻R3構成第二導通路徑，且第二導通路徑根據輸入訊號Sin的上升沿導通金氧半場效電晶體400。第三電阻R3、第四電阻R4、第五電阻R5及第四二極體D4構成第二關斷路徑，且第二關斷路徑根據輸入訊號Sin的下降沿關斷金氧半場效電晶體400。 Specifically, the first diode D1 and the first resistor R1 constitute a first conducting path, and the first conducting path turns on the insulated gate bipolar transistor 300 according to the rising edge of the input signal Sin. The second diode D2 and the second resistor R2 form a first turn-off path. The first turn-off path turns off the insulated gate bipolar transistor 300 according to the falling edge of the input signal Sin. The third diode D3 and the third resistor R3 constitute a second conducting path, and the second conducting path turns on the metal-oxygen half field-effect transistor 400 according to the rising edge of the input signal Sin. The third resistor R3, the fourth resistor R4, the fifth resistor R5, and the fourth diode D4 constitute a second turn-off path, and the second turn-off path turns off the metal-oxygen half field effect transistor 400 according to the falling edge of the input signal Sin .
請參閱圖2A為本發明混合驅動電路導通絕緣柵雙極電晶體與金氧半場效電晶體之波形示意圖、圖2B為本發明混合驅動電路關斷絕緣柵雙極電晶體與金氧半場效電晶體之波形示意圖，復配合參閱圖1，且反覆參閱圖 2A~2B。由於絕緣柵雙極電晶體300的導通損失較金氧半場效電晶體400低，但是切換損失較金氧半場效電晶體400高，因此在輸入訊號Sin的上升沿時，金氧半場效電晶體400能夠比絕緣柵雙極電晶體300還要快導通，可以有效地降低切換損失。反之，在輸入訊號Sin的下降沿時，金氧半場效電晶體400能夠比絕緣柵雙極電晶體300還要慢關斷，也可以有效地降低切換損失。為方便說明，於本發明之一實施例中，金氧半場效電晶體400的波形以虛線表示，且絕緣柵雙極電晶體300的波形以實線表示。 Please refer to FIG. 2A for the waveform diagram of the hybrid driving circuit of the present invention turning on the insulated gate bipolar transistor and the metal oxide half field effect transistor, and FIG. 2B for the hybrid driving circuit of the present invention turning off the insulated gate bipolar transistor and the metal oxide half field effect transistor. The waveform of the crystal is shown in Figure 1. 2A ~ 2B. Since the conduction loss of the insulated gate bipolar transistor 300 is lower than that of the metal oxide half field effect transistor 400, but the switching loss is higher than that of the metal oxide half field effect transistor 400. Therefore, at the rising edge of the input signal Sin, the metal oxide half field effect transistor 400 can be turned on faster than the insulated gate bipolar transistor 300, which can effectively reduce switching losses. Conversely, at the falling edge of the input signal Sin, the metal-oxide half-field-effect transistor 400 can be turned off more slowly than the insulated-gate bipolar transistor 300, which can also effectively reduce switching losses. For convenience of description, in one embodiment of the present invention, the waveform of the metal-oxide-semiconductor field-effect transistor 400 is indicated by a dotted line, and the waveform of the insulated gate bipolar transistor 300 is indicated by a solid line.
具體而言，本發明之混合驅動電路100的主要目的在於，如何有效率的將金氧半場效電晶體400提前導通且延後關斷，使得金氧半場效電晶體400導通，但絕緣柵雙極電晶體300尚未導通時(如圖2A所示)，電流僅能流過切換損失較低的金氧半場效電晶體400，以有效地降低切換損失。值得一提，如圖2B所示，絕緣柵雙極電晶體300先關斷時的操作同理，在此不再加以贅述。如圖2A~2B所示，在金氧半場效電晶體400與絕緣柵雙極電晶體300皆導通時，由於絕緣柵雙極電晶體300的導通阻抗較低，使得大部分的電流流過絕緣柵雙極電晶體300，且僅有少部分的電流流過金氧半場效電晶體400，因此可以有效地降低導通損失。為此，混合驅動電路100需控制絕緣柵雙極電晶體300與金氧半場效電晶體400的導通與關斷時間。 Specifically, the main purpose of the hybrid driving circuit 100 of the present invention is how to efficiently turn on the metal-oxide-semiconductor half-field-effect transistor 400 in advance and delay it to turn off, so that the metal-oxide-semiconductor half-field-effect transistor 400 is turned on. When the pole transistor 300 is not turned on (as shown in FIG. 2A), a current can only flow through the metal-oxide half field effect transistor 400 with a lower switching loss to effectively reduce the switching loss. It is worth mentioning that, as shown in FIG. 2B, the operation when the insulated gate bipolar transistor 300 is first turned off is the same, and it will not be repeated here. As shown in FIGS. 2A to 2B, when the metal-oxide half-field-effect transistor 400 and the insulated-gate bipolar transistor 300 are both conducting, most of the current flows through the insulation due to the low on-resistance of the insulated-gate bipolar transistor 300. The gate bipolar transistor 300, and only a small part of the current flows through the metal-oxide half-field-effect transistor 400, can effectively reduce the conduction loss. For this reason, the hybrid driving circuit 100 needs to control the on and off times of the insulated gate bipolar transistor 300 and the metal-oxide-semiconductor half-effect transistor 400.
請參閱圖3A為本發明混合驅動電路導通絕緣柵雙極電晶體與金氧半場效電晶體之導通路徑示意圖，復配合參閱圖1~2B。混合驅動電路100的第一導通路徑Pc1導通絕緣柵雙極電晶體300，且第二導通路徑Pc2導通金氧半場效電晶體400。由於金氧半場效電晶體400導通的時點必須快於絕緣柵雙極電晶體300，因此第一電阻R1的電阻值需設計大於第三電阻R3的電阻值(例如但不限於，第一電阻R1為70歐姆、第三電阻R3為40歐姆)，使得第一電阻R1與絕緣柵雙極電晶體300中的寄生電容所構成的RC電路的時間常數大，充電時間較長 (相較於第三電阻R3與金氧半場效電晶體400中的寄生電容(以虛線電容表示)所構成的RC電路的時間常數)。由於充電時間的差異，使得第一導通路徑Pc1導通絕緣柵雙極電晶體300與第二導通路徑Pc2導通金氧半場效電晶體400之間產生第一延遲時間，以提供如圖2A所示的導通順序。值得一提，於本發明之一實施例中，充電時間除了調整第一電阻R1或第三電阻R3的電阻值外，也可藉由選擇絕緣柵雙極電晶體300或金氧半場效電晶體400的寄生電容的電容值來進行調整。 Please refer to FIG. 3A for a schematic diagram of the conduction paths of the hybrid driving circuit for turning on the insulated gate bipolar transistor and the metal-oxide-semiconductor field-effect transistor according to the present invention. For the complex coordination, see FIGS. 1 to 2B. The first conductive path Pc1 of the hybrid driving circuit 100 turns on the insulated gate bipolar transistor 300, and the second conductive path Pc2 turns on the MOSFET half-effect transistor 400. Since the metal-oxide half-field-effect transistor 400 must be turned on faster than the insulated-gate bipolar transistor 300, the resistance value of the first resistor R1 needs to be greater than that of the third resistor R3 (for example, but not limited to, the first resistor R1 It is 70 ohms and the third resistor R3 is 40 ohms), so that the time constant of the RC circuit formed by the first resistor R1 and the parasitic capacitance in the insulated gate bipolar transistor 300 is large, and the charging time is longer. (Compared to the time constant of the RC circuit formed by the third resistor R3 and the parasitic capacitance (indicated by the dotted line capacitance) in the metal-oxide-semiconductor half-effect transistor 400). Due to the difference in charging time, a first delay time is generated between the first conduction path Pc1 to turn on the insulated gate bipolar transistor 300 and the second conduction path Pc2 to turn on the metal-oxide-semiconductor field-effect transistor 400 to provide a voltage as shown in FIG. 2A. Turn-on sequence. It is worth mentioning that in one embodiment of the present invention, in addition to adjusting the resistance value of the first resistor R1 or the third resistor R3, the charging time can also be selected by selecting an insulated gate bipolar transistor 300 or a metal-oxide half field effect transistor. The capacitance value of the parasitic capacitance of 400 is adjusted.
請參閱圖3B為本發明混合驅動電路導通絕緣柵雙極電晶體與金氧半場效電晶體之關斷路徑示意圖，復配合參閱圖1~2B。混合驅動電路100的第一關斷路徑Ps1關斷絕緣柵雙極電晶體300，且第二關斷路徑Ps2關斷金氧半場效電晶體400。由於金氧半場效電晶體400關斷的時點必須慢於絕緣柵雙極電晶體300，因此第三電阻R3、第四電阻R4及第五電阻R5總和的電阻值需設計大於第二電阻R2的電阻值(例如但不限於，第三電阻R3為40歐姆、第四電阻R4為40歐姆、第五電阻R5為50歐姆及第二電阻R2為50歐姆)，使得絕緣柵雙極電晶體300在關斷時，僅經過單一個電阻值較小的第二電阻R2放電，放電時間較短。但是，由於第三電阻R3、第四電阻R4、第五電阻R5與第一電容C1所構成的RC電路的時間常數大，放電時間較長(相較於第二電阻R2與絕緣柵雙極電晶體300的時間常數)。由於放電時間的差異，使得第一關斷路徑Ps1關斷絕緣柵雙極電晶體300與第二關斷路徑Ps2關斷金氧半場效電晶體400之間產生第二延遲時間，以提供如圖2B所示的關斷順序。值得一提，於本發明之一實施例中，放電時間除了調整第二電阻R2或第三電阻R3、第四電阻R4或第五電阻R5的電阻值外，也可藉由選擇絕緣柵雙極電晶體300、金氧半場效電晶體400的寄生電容(以虛線電容表示)或第一電容C1的電容值來調整。 Please refer to FIG. 3B for a schematic diagram of the turn-off paths of the hybrid driving circuit for turning on the insulated gate bipolar transistor and the metal-oxide half field effect transistor according to the present invention. For the complex cooperation, see FIGS. 1 to 2B. The first turn-off path Ps1 of the hybrid driving circuit 100 turns off the insulated-gate bipolar transistor 300, and the second turn-off path Ps2 turns off the metal-oxide-semiconductor field-effect transistor 400. Because the metal-oxide half-field-effect transistor 400 must be turned off more slowly than the insulated-gate bipolar transistor 300, the resistance value of the sum of the third resistor R3, the fourth resistor R4, and the fifth resistor R5 needs to be greater than that of the second resistor R2. Resistance values (for example, but not limited to, the third resistor R3 is 40 ohms, the fourth resistor R4 is 40 ohms, the fifth resistor R5 is 50 ohms, and the second resistor R2 is 50 ohms), so that the insulated gate bipolar transistor 300 is at When turned off, only a single second resistor R2 with a small resistance value is discharged, and the discharge time is short. However, because the time constant of the RC circuit formed by the third resistor R3, the fourth resistor R4, the fifth resistor R5, and the first capacitor C1 is large, the discharge time is longer (compared with the second resistor R2 and the insulated gate bipolar voltage). Time constant of crystal 300). Due to the difference in discharge time, a second delay time is generated between the first turn-off path Ps1 to turn off the insulated gate bipolar transistor 300 and the second turn-off path Ps2 to turn off the MOSFET half-effect transistor 400 to provide Shutdown sequence shown in 2B. It is worth mentioning that in one embodiment of the present invention, in addition to adjusting the resistance value of the second resistor R2 or the third resistor R3, the fourth resistor R4, or the fifth resistor R5, the insulation gate bipolar can also be selected The parasitic capacitance of the transistor 300 and the metal-oxide-semiconductor half-effect transistor 400 (indicated by a dotted capacitor) or the capacitance of the first capacitor C1 is adjusted.
請參閱圖4為本發明混合驅動電路第二實施例之電路方塊示意圖，復配合參閱圖1~3B。混合驅動電路100’包括第一支路10’與第二支路20’，且第一支路10’耦接絕緣柵雙極電晶體300，第二支路20’耦接金氧半場效電晶體400。第一支路10’包括第五二極體D5、第六電阻R6及第二電容C2，且第五二極體D5的陰極耦接輸入訊號Sin，第五二極體D5的陽極耦接絕緣柵雙極電晶體300。第六電阻R6並聯耦接第五二極體D5，且第二電容C2的一端耦接第五二極體D5、第六電阻R6及絕緣柵雙極電晶體300，第二電容C2的另一端耦接接地點。第二支路20’包括第六二極體D6、第七電阻R7及第三電容C3，且第六二極體D6的陽極耦接輸入訊號Sin，第六二極體D6的陰極耦接金氧半場效電晶體400，第五二極體D5與第六二極體D6設置為不同的電流導通方向。第七電阻R7並聯耦接第六二極體D6，且第三電容C3的一端耦接第六二極體D6、第七電阻R7及金氧半場效電晶體400，第三電容C3的另一端耦接接地點。 Please refer to FIG. 4 for a schematic circuit block diagram of the second embodiment of the hybrid driving circuit according to the present invention. For the complex cooperation, refer to FIGS. 1 to 3B. The hybrid driving circuit 100 ′ includes a first branch 10 ′ and a second branch 20 ′, and the first branch 10 ′ is coupled to the insulated gate bipolar transistor 300, and the second branch 20 ′ is coupled to the metal-oxygen half field effect power. Crystal 400. The first branch 10 'includes a fifth diode D5, a sixth resistor R6, and a second capacitor C2. The cathode of the fifth diode D5 is coupled to the input signal Sin, and the anode of the fifth diode D5 is coupled to the insulation. Grid bipolar transistor 300. The sixth resistor R6 is coupled in parallel to the fifth diode D5, and one end of the second capacitor C2 is coupled to the fifth diode D5, the sixth resistor R6 and the insulated gate bipolar transistor 300, and the other end of the second capacitor C2 Coupling to ground. The second branch 20 'includes a sixth diode D6, a seventh resistor R7, and a third capacitor C3. The anode of the sixth diode D6 is coupled to the input signal Sin, and the cathode of the sixth diode D6 is coupled to gold. In the oxygen half field effect transistor 400, the fifth diode D5 and the sixth diode D6 are set to different current conduction directions. The seventh resistor R7 is coupled in parallel to the sixth diode D6, and one end of the third capacitor C3 is coupled to the sixth diode D6, the seventh resistor R7 and the metal-oxide-semiconductor half-effect transistor 400, and the other end of the third capacitor C3 Coupling to ground.
具體而言，第六電阻R6為第一導通路徑，且第五二極體D5為第一關斷路徑。第六二極體D6為第二導通路徑，且第七電阻R7為第二關斷路徑。在絕緣柵雙極電晶體300與金氧半場效電晶體400導通時，第六電阻R6與第二電容C2構成RC電路，且輸入訊號Sin的上升沿直接對第三電容C3充電。因此，第六電阻R6與第二電容C2構成RC電路的充電時間較第三電容C3的充電時間長。由於充電時間的差異，使得第一導通路徑導通絕緣柵雙極電晶體300與第二導通路徑導通金氧半場效電晶體400之間產生第一延遲時間，以提供如圖2A所示的導通順序。值得一提，於本發明之一實施例中，充電時間除了調整電阻值外，也可調整電容值。 Specifically, the sixth resistor R6 is a first on-path, and the fifth diode D5 is a first off-path. The sixth diode D6 is a second on-path, and the seventh resistor R7 is a second off-path. When the insulated gate bipolar transistor 300 and the metal-oxide-semiconductor field-effect transistor 400 are turned on, the sixth resistor R6 and the second capacitor C2 form an RC circuit, and the rising edge of the input signal Sin directly charges the third capacitor C3. Therefore, the charging time of the RC circuit formed by the sixth resistor R6 and the second capacitor C2 is longer than the charging time of the third capacitor C3. Due to the difference in charging time, a first delay time is generated between the first conduction path to turn on the insulated gate bipolar transistor 300 and the second conduction path to turn on the MOSFET half-effect transistor 400 to provide a conduction sequence as shown in FIG. 2A . It is worth mentioning that, in one embodiment of the present invention, in addition to adjusting the resistance value, the capacitance value can also be adjusted.
在絕緣柵雙極電晶體300與金氧半場效電晶體400關斷時，第七電阻R7與第三電容C3構成RC電路，且第二電容C2直接放電。因此，第七電阻 R7與第三電容C3構成RC電路的放電時間較第二電容C2的放電時間長。由於放電時間的差異，使得第一關斷路徑關斷絕緣柵雙極電晶體300與第二關斷路徑關斷金氧半場效電晶體400之間產生第二延遲時間，以提供如圖2B所示的關斷順序。值得一提，於本發明之一實施例中，放電時間除了調整電阻值外，也可調整電容值。 When the insulated gate bipolar transistor 300 and the metal-oxide-semiconductor field-effect transistor 400 are turned off, the seventh resistor R7 and the third capacitor C3 form an RC circuit, and the second capacitor C2 is directly discharged. So the seventh resistor The discharge time of the RC circuit formed by R7 and the third capacitor C3 is longer than the discharge time of the second capacitor C2. Due to the difference in discharge time, a second delay time is generated between the first turn-off path to turn off the insulated gate bipolar transistor 300 and the second turn-off path to turn off the metal-oxide-semiconductor field-effect transistor 400 to provide a circuit as shown in FIG. 2B. Shown in the shutdown sequence. It is worth mentioning that in one embodiment of the present invention, in addition to adjusting the resistance value, the discharge time can also be adjusted for the capacitance value.
請參閱圖5A為本發明具有光耦驅動模組的混合驅動電路第一實施例之方塊示意圖，復配合參閱圖1~4。當驅動電路需要隔離時，會使用隔離元件，其中可能包括光耦合式、電容式或磁性耦合式等元件。為了方便說明，以下以光耦合式為例，混合驅動電路100包括光耦驅動模組30，光耦驅動模組30耦接第一支路10、第二支路20、絕緣柵雙極電晶體300及金氧半場效電晶體400之間，且光耦驅動模組30包括第一光耦驅動電路302與第二光耦驅動電路304。第一光耦驅動電路302包括第一光耦驅動器302-1與第一斜率調整電路302-2，第一光耦驅動器302-1耦接第一支路10，且第一斜率調整電路302-2耦接第一光耦驅動器302-1與絕緣柵雙極電晶體300。第二光耦驅動電路304包括第二光耦驅動器304-1與第二斜率調整電路304-2，第二光耦驅動器304-1耦接第二支路20，且第二斜率調整電路304-2耦接第二光耦驅動器304-1與金氧半場效電晶體400。 Please refer to FIG. 5A for a block diagram of a first embodiment of a hybrid driving circuit with an optocoupler driving module according to the present invention. For a detailed description, refer to FIGS. 1 to 4. When the driving circuit needs to be isolated, isolation components are used, which may include components such as optical coupling, capacitive or magnetic coupling. For the convenience of description, the following uses an optical coupling type as an example. The hybrid driving circuit 100 includes an optical coupling driving module 30. The optical coupling driving module 30 is coupled to the first branch 10, the second branch 20, and the insulated gate bipolar transistor. 300 and the metal-oxide-semiconductor half-effect transistor 400, and the photocoupler driving module 30 includes a first photocoupler driving circuit 302 and a second photocoupler driving circuit 304. The first photocoupler driving circuit 302 includes a first photocoupler driver 302-1 and a first slope adjustment circuit 302-2. The first photocoupler driver 302-1 is coupled to the first branch 10, and the first slope adjustment circuit 302- 2 is coupled to the first optocoupler driver 302-1 and the insulated gate bipolar transistor 300. The second photocoupler driving circuit 304 includes a second photocoupler driver 304-1 and a second slope adjustment circuit 304-2, the second photocoupler driver 304-1 is coupled to the second branch 20, and the second slope adjustment circuit 304- 2 is coupled to the second optocoupler driver 304-1 and the metal oxide half field effect transistor 400.
具體而言，第一光耦驅動電路302根據第一支路10所提供的訊號而提供第一驅動訊號至絕緣柵雙極電晶體300，且第二光耦驅動電路304根據第二支路20所提供的訊號而提供第二驅動訊號至金氧半場效電晶體400。由於第一光耦驅動器302-1與第二光耦驅動器304-1具有上升沿上升到觸發點而觸發為高準位訊號，且下降沿下降到觸發點而觸發為低準位訊號的特性，因此，圖2A與圖2B中，具有斜率的波形經過第一光耦驅動器302-1與第二光耦驅動器304-1後，在A點所得到的第一驅動訊號或第二驅動訊號成為接近方波的波形(I)，如 此可以達成控制絕緣柵雙極電晶體300金氧半場效電晶體400的延遲時間，且不會使開與關的過程持續過長而造成過多的損耗。但是，接近方波的波形(I)具有陡峭的上升沿與下降沿，因此會產生較高的電磁干擾(EMI)，因此，可利用第一斜率調整電路302-2與第二斜率調整電路304-2略為調緩波形(I)的上升沿與下降沿的斜率，以在B點所得到的第一驅動訊號或第二驅動訊號成為梯形波的波形(II)。其中，如圖5A所示，第一斜率調整電路302-2、第二斜率調整電路304-2可以為斜率調整電阻RS1、RS2，利用電阻提供電阻值的特性，將具有陡峭的上升沿與下降沿的波形(I)調整為緩升的上升沿與緩降的下降沿的波形(II)。 Specifically, the first photocoupler driving circuit 302 provides a first driving signal to the insulated gate bipolar transistor 300 according to the signal provided by the first branch 10, and the second photocoupler driving circuit 304 according to the second branch 20 The provided signal provides a second driving signal to the MOSFET half-effect transistor 400. Because the first optocoupler driver 302-1 and the second optocoupler driver 304-1 have the characteristics that the rising edge rises to the trigger point and triggers as a high level signal, and the falling edge falls to the trigger point and triggers as a low level signal. Therefore, in FIG. 2A and FIG. 2B, after the waveform with the slope passes through the first photocoupler driver 302-1 and the second photocoupler driver 304-1, the first driving signal or the second driving signal obtained at point A becomes close. The waveform (I) of a square wave, such as This can achieve the control of the delay time of the IGBT 300 metal-oxide-semiconductor half-field-effect transistor 400 without causing the on and off processes to continue for too long and cause excessive losses. However, the waveform (I) close to a square wave has steep rising and falling edges, and therefore generates high electromagnetic interference (EMI). Therefore, the first slope adjustment circuit 302-2 and the second slope adjustment circuit 304 can be used. -2 slightly reduces the slope of the rising and falling edges of the waveform (I) so that the first driving signal or the second driving signal obtained at point B becomes a trapezoidal waveform (II). Among them, as shown in FIG. 5A, the first slope adjustment circuit 302-2 and the second slope adjustment circuit 304-2 can be slope adjustment resistors RS1 and RS2, and the characteristics of the resistance value provided by the resistors will have steep rising edges and falling edges. The waveform (I) of the edge is adjusted to the waveform (II) of a slowly rising rising edge and a slowly falling falling edge.
請參閱圖5B為本發明具有光耦驅動模組的混合驅動電路第二實施例之方塊示意圖，復配合參閱圖1~5A。本實施例與圖5A的第一實施例之差異在於，光耦驅動模組30’耦接輸入訊號Sin、第一支路10、第二支路20。輸入訊號Sin經過第一光耦驅動器302-1與第二光耦驅動器304-1後，因為輸入訊號Sin相同，在A點所得到的訊號基本上會相同，再分別經過第一支路10、第二支路20達成延遲效果。具體而言，圖5A與5B光耦驅動模組30設置位置的差異在於，由於第一光耦驅動器302-1與第二光耦驅動器304-1導通或關斷的切換時間較快，光耦驅動模組30設置在圖5A的位置時，可產生延遲時間且不會使開與關的過程拉長，如此可以減少不必要的損耗。因此，光耦驅動模組30設置在圖5A的位置較佳，較能降低整體電路的損耗。 Please refer to FIG. 5B for a schematic block diagram of the second embodiment of the hybrid driving circuit with an optocoupler driving module according to the present invention. For the cooperation, refer to FIGS. 1 to 5A. The difference between this embodiment and the first embodiment of FIG. 5A lies in that the optocoupler driving module 30 'is coupled to the input signal Sin, the first branch 10, and the second branch 20. After the input signal Sin passes through the first optocoupler driver 302-1 and the second optocoupler driver 304-1, because the input signal Sin is the same, the signal obtained at point A will be basically the same, and then pass through the first branch 10, The second branch 20 achieves a delay effect. Specifically, the difference between the installation position of the optocoupler driving module 30 in FIGS. 5A and 5B is that, because the first optocoupler driver 302-1 and the second optocoupler driver 304-1 have a faster switching time for turning on or off, the optocoupler When the driving module 30 is disposed in the position of FIG. 5A, a delay time can be generated without lengthening the opening and closing process, so that unnecessary losses can be reduced. Therefore, the optocoupler driving module 30 is preferably disposed at the position shown in FIG. 5A, which can reduce the loss of the overall circuit.
請參閱圖6為本發明光耦驅動模組的電路方塊示意圖，復配合參閱圖1~5B。第一光耦驅動器302-1與第二光耦驅動器304-1包括光耦合單元306與驅動單元308。以圖5A的電路結構與連接關係為例，光耦合單元306根據一上升沿第一觸發點時，提供高準位訊號，且根據一下降沿下降至第二觸發點時，提供低準位訊號。具體而言，由於光耦合單元306的輸出具有切換速度快的特性，因此當上升沿的電壓值逐漸提升至觸發點的電壓值時，光耦合單元306即 迅速地切換導通(下降沿亦同)。因此，光耦合單元306可將緩升或緩降的波形調整成具有陡峭的上升或下降的波形。但是，由於光耦合單元306需上升沿或下降沿到達觸發點時，才切換導通或切換截止。因此，光耦合單元306同時也會造成輸入波形與輸出波形些微的延遲。 Please refer to FIG. 6 for a schematic circuit block diagram of the optocoupler driving module according to the present invention. For the cooperation, refer to FIGS. 1 to 5B. The first photocoupler driver 302-1 and the second photocoupler driver 304-1 include an optical coupling unit 306 and a driving unit 308. Taking the circuit structure and connection relationship of FIG. 5A as an example, the optical coupling unit 306 provides a high-level signal according to a rising edge at a first trigger point, and provides a low-level signal when falling to a second trigger point according to a falling edge. . Specifically, because the output of the optical coupling unit 306 has a characteristic of fast switching speed, when the voltage value of the rising edge gradually increases to the voltage value of the trigger point, the optical coupling unit 306 is Switch on quickly (same as falling edge). Therefore, the optical coupling unit 306 can adjust the slowly rising or falling waveform to a waveform with a steep rising or falling. However, the optical coupling unit 306 only needs to be switched on or switched off when the rising or falling edge reaches the trigger point. Therefore, the optical coupling unit 306 also causes a slight delay in the input waveform and the output waveform.
其中，VCC為驅動電壓，且VEE為參考地電壓。由於光耦合單元306所提供高準位訊號並未有足夠的驅動電壓VCC足以驅動絕緣柵雙極電晶體300或金氧半場效電晶體400，因此必須利用驅動單元308提供驅動電壓VCC來驅動絕緣柵雙極電晶體300或金氧半場效電晶體400。當光耦合單元306所提供的訊號為高準位訊號時，驅動單元308根據高準位訊號而提供驅動電壓VCC，以導通絕緣柵雙極電晶體300或金氧半場效電晶體400。然後，當光耦合單元306所提供的訊號為低準位訊號時，驅動單元308根據低準位訊號而不提供驅動電壓VCC，以關斷絕緣柵雙極電晶體300或金氧半場效電晶體400。值得一提，本發明之一實施例中，第一光耦驅動器302-1與第二光耦驅動器304-1係以惠普出廠的光耦驅動器HCPL-3120為例，但不以此為限。換言之，第一光耦驅動器302-1與第二光耦驅動器304-1皆可利用功效相同的光耦驅動器或其它隔離型驅動器替代。 Among them, VCC is the driving voltage, and VEE is the ground reference voltage. Since the high-level signal provided by the optical coupling unit 306 does not have enough driving voltage VCC to drive the insulated gate bipolar transistor 300 or metal-oxide-semiconductor field-effect transistor 400, the driving unit 308 must be used to provide the driving voltage VCC to drive the insulation. A gate bipolar transistor 300 or a metal oxide half field effect transistor 400. When the signal provided by the optical coupling unit 306 is a high-level signal, the driving unit 308 provides a driving voltage VCC according to the high-level signal to turn on the insulated gate bipolar transistor 300 or the metal-oxide-semiconductor half-effect transistor 400. Then, when the signal provided by the optical coupling unit 306 is a low-level signal, the driving unit 308 does not provide the driving voltage VCC according to the low-level signal to turn off the insulated gate bipolar transistor 300 or the metal-oxide-semiconductor field-effect transistor. 400. It is worth mentioning that in one embodiment of the present invention, the first optocoupler driver 302-1 and the second optocoupler driver 304-1 are based on the HCPL-3120 optocoupler driver manufactured by Hewlett-Packard as an example, but not limited thereto. In other words, both the first optocoupler driver 302-1 and the second optocoupler driver 304-1 can be replaced with the same photocoupler driver or other isolated driver.
請參閱圖7為本發明斜率調整電路的電路方塊示意圖，復配合參閱圖1~6。圖5A所示之第一斜率調整電路302-2、第二斜率調整電路304-2為斜率調整電阻RS1、RS2，且可同時調整波形(I)的上升沿與下降沿的斜率。雖然其電路結構較為簡單，但是並無法分別且獨立地調整上升沿的斜率與下降沿的斜率。而圖7實施例中的斜率調整電路302-2’、304-2’可分別且獨立地調整上升沿的斜率與下降沿的斜率。具體而言，第一斜率調整電路302-2’、第二斜率調整電路304-2’包括第八電阻R8、第七二極體D7及第九電阻R9。第七二極體D7的陰極串聯耦接第八電阻R8，第九電阻R9並聯耦接第八電阻R8與第七二極 體D7，且第九電阻R9耦接第七二極體D7的陽極。第一驅動訊號或第二驅動訊號上升沿的路徑，係流過第九電阻R9，且第一驅動訊號或第二驅動訊號下降沿的路徑，係流過第八電阻R8與第七二極體D7。當第一驅動訊號或第二驅動訊號在上升沿時，第九電阻R9調緩第一上升沿或第二上升沿的斜率，且當第一驅動訊號或第二驅動訊號在下降沿時，第八電阻R8調緩第一下降沿或第二下降沿的斜率。 Please refer to FIG. 7 for a schematic circuit block diagram of the slope adjustment circuit of the present invention. The first slope adjustment circuit 302-2 and the second slope adjustment circuit 304-2 shown in FIG. 5A are slope adjustment resistors RS1 and RS2, and can simultaneously adjust the slopes of the rising and falling edges of the waveform (I). Although its circuit structure is relatively simple, it is not possible to adjust the slope of the rising edge and the slope of the falling edge separately and independently. The slope adjustment circuits 302-2 'and 304-2' in the embodiment of FIG. 7 can adjust the slope of the rising edge and the slope of the falling edge separately and independently. Specifically, the first slope adjustment circuit 302-2 'and the second slope adjustment circuit 304-2' include an eighth resistor R8, a seventh diode D7, and a ninth resistor R9. The cathode of the seventh diode D7 is coupled in series with the eighth resistor R8, and the ninth resistor R9 is coupled in parallel with the eighth resistor R8 and the seventh diode Body D7, and the ninth resistor R9 is coupled to the anode of the seventh diode D7. The path of the rising edge of the first driving signal or the second driving signal flows through the ninth resistor R9, and the path of the falling edge of the first driving signal or the second driving signal flows through the eighth resistor R8 and the seventh diode. D7. When the first driving signal or the second driving signal is on the rising edge, the ninth resistor R9 slows down the slope of the first rising edge or the second rising edge, and when the first driving signal or the second driving signal is on the falling edge, the first The eight resistor R8 slows down the slope of the first falling edge or the second falling edge.
進一步而言，由於第九電阻R9與第八電阻R8可分別且獨立地調整上升沿的斜率與下降沿的斜率，因此，設計者可根據切換損失與電磁干擾的雙重因素考量，選擇合適的上升沿的斜率與下降沿的斜率。意即，第九電阻R9與第八電阻R8的電阻值可因應最佳化設計而不相同。 Furthermore, since the ninth resistor R9 and the eighth resistor R8 can adjust the slope of the rising edge and the slope of the falling edge separately and independently, the designer can choose a suitable rise based on the dual factors of switching loss and electromagnetic interference. The slope of the edge and the slope of the falling edge. In other words, the resistance values of the ninth resistor R9 and the eighth resistor R8 may be different according to the optimized design.
惟，以上所述，僅為本發明較佳具體實施例之詳細說明與圖式，惟本發明之特徵並不侷限於此，並非用以限制本發明，本發明之所有範圍應以下述之申請專利範圍為準，凡合於本發明申請專利範圍之精神與其類似變化之實施例，皆應包括於本發明之範疇中，任何熟悉該項技藝者在本發明之領域內，可輕易思及之變化或修飾皆可涵蓋在以下本案之專利範圍。 However, the above descriptions are only detailed descriptions and drawings of preferred embodiments of the present invention, but the features of the present invention are not limited thereto, and are not intended to limit the present invention. The full scope of the present invention should be applied as follows The scope of patents shall prevail. Any embodiment that is within the spirit of the scope of patent application of the present invention and similar changes shall be included in the scope of the present invention. Anyone skilled in the art can easily think about it in the field of the present invention. Variations or modifications can be covered by the patent scope of the following case.
Claims (12)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW108119667A TWI676355B (en) | 2019-06-06 | 2019-06-06 | Hybrid drive circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW108119667A TWI676355B (en) | 2019-06-06 | 2019-06-06 | Hybrid drive circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TWI676355B true TWI676355B (en) | 2019-11-01 |
| TW202046640A TW202046640A (en) | 2020-12-16 |
Family
ID=69188777
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW108119667A TWI676355B (en) | 2019-06-06 | 2019-06-06 | Hybrid drive circuit |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI676355B (en) |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090296291A1 (en) * | 2008-05-27 | 2009-12-03 | Infineon Technologies Ag | Power semiconductor arrangement including conditional active clamping |
| US20160126718A1 (en) * | 2014-10-31 | 2016-05-05 | Fuji Electric Co., Ltd. | Semiconductor device |
| CN107947538A (en) * | 2016-10-12 | 2018-04-20 | 福特全球技术公司 | Gate drivers with short-circuit protection |
| CN109698608A (en) * | 2018-12-21 | 2019-04-30 | 江苏固德威电源科技股份有限公司 | A kind of switching device and its control method of use |
-
2019
- 2019-06-06 TW TW108119667A patent/TWI676355B/en active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090296291A1 (en) * | 2008-05-27 | 2009-12-03 | Infineon Technologies Ag | Power semiconductor arrangement including conditional active clamping |
| US20160126718A1 (en) * | 2014-10-31 | 2016-05-05 | Fuji Electric Co., Ltd. | Semiconductor device |
| CN107947538A (en) * | 2016-10-12 | 2018-04-20 | 福特全球技术公司 | Gate drivers with short-circuit protection |
| CN109698608A (en) * | 2018-12-21 | 2019-04-30 | 江苏固德威电源科技股份有限公司 | A kind of switching device and its control method of use |
Also Published As
| Publication number | Publication date |
|---|---|
| TW202046640A (en) | 2020-12-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN109494969B (en) | Drive circuit of silicon carbide semiconductor field effect transistor | |
| JP5783997B2 (en) | Power semiconductor device | |
| US9595602B2 (en) | Switching device for power conversion and power conversion device | |
| JP2011211836A (en) | Switching device driving unit and semiconductor apparatus | |
| KR20130011812A (en) | Method for driving igbt | |
| KR20090014402A (en) | Switching circuit arrangement | |
| JP2007505544A (en) | High frequency control of semiconductor switches | |
| JP5925364B2 (en) | Power semiconductor device | |
| CN113497610B (en) | Gate driving circuit capable of reducing conduction loss of power semiconductor | |
| JP2009194514A (en) | Gate drive circuit of power semiconductor | |
| CN111669034B (en) | Silicon carbide and silicon mixed parallel switch tube driving circuit | |
| JP2013081137A (en) | Semiconductor device | |
| KR102026929B1 (en) | Gate driving circuit for power switch | |
| TWI676355B (en) | Hybrid drive circuit | |
| CN112054791B (en) | Hybrid driving circuit | |
| CN114977744A (en) | Drive circuit and control method | |
| CN111541360B (en) | Variable mixed parallel switch tube driving circuit of working mode | |
| US10027218B2 (en) | Power semiconductor element driving circuit | |
| TWI504119B (en) | Apparatus and method for avoiding conduction of parasitic devices | |
| TWI846201B (en) | Control device for power conversion apparatus | |
| CN116614121B (en) | Power device for improving electromagnetic compatibility | |
| TWI705664B (en) | Silicon carbide power element, drive circuit and control method | |
| CN112234805B (en) | Circuit for driving silicon carbide semiconductor field effect transistor by clamping source level | |
| TWI445305B (en) | Spike voltage reducing circuit for power transistor and power semiconductor chip with the same | |
| TW202425513A (en) | Control device for power conversion apparatus |