TWI666789B - Fabrication method of ultra-violet light-emitting device - Google Patents
Fabrication method of ultra-violet light-emitting device Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 35
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 22
- 239000004065 semiconductor Substances 0.000 claims abstract description 106
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- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims abstract description 18
- 229910052759 nickel Inorganic materials 0.000 claims abstract description 9
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims abstract description 7
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- 229910052719 titanium Inorganic materials 0.000 claims abstract description 7
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- 239000002019 doping agent Substances 0.000 claims description 6
- 238000005566 electron beam evaporation Methods 0.000 claims description 3
- 229910052757 nitrogen Inorganic materials 0.000 claims description 3
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- 229910002601 GaN Inorganic materials 0.000 description 6
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- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 4
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- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
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Abstract
一種紫外光發光二極體的製造方法,其包括下列步驟。於半導體基材上形成金屬層,其中金屬層包括鎳金屬層或鈦金屬層。加熱金屬層,以於半導體基材上形成多個離散分佈的島狀結構。於半導體基材上形成覆蓋島狀結構的紫外光發光二極體元件層。於形成紫外光發光二極體元件層之後,移除半導體基材以及島狀結構。A method for manufacturing an ultraviolet light emitting diode includes the following steps. A metal layer is formed on a semiconductor substrate, wherein the metal layer includes a nickel metal layer or a titanium metal layer. The metal layer is heated to form a plurality of discretely distributed island structures on the semiconductor substrate. An ultraviolet light emitting diode element layer covering an island structure is formed on a semiconductor substrate. After the ultraviolet light emitting diode element layer is formed, the semiconductor substrate and the island structure are removed.
Description
本發明是有關於一種發光二極體的製造方法,且特別是有關於一種紫外光發光二極體的製造方法。 The present invention relates to a method for manufacturing a light emitting diode, and more particularly, to a method for manufacturing an ultraviolet light emitting diode.
隨著半導體科技的進步,現今的發光二極體已具備了高亮度的輸出,加上發光二極體具有省電、體積小、低電壓驅動以及不含汞等優點,因此發光二極體已廣泛地應用在顯示器與照明方面的領域。一般而言,發光二極體的出光效率與其半導體元件層的磊晶品質以及內部量子效率相關。目前,為了提升發光二極體的內部量子效率,已有習知技術藉由於成長半導體基材上成長成核層及緩衝層來改善後續形成之半導體元件層的磊晶品質,但成核層及緩衝層的成長須額外耗費時間及成本,且成核層與緩衝層亦會增加發光二極體晶片的整體厚度。另外,為了提升發光二極體的光取出效率,已有習知技術於成長半導體基材上形成凹陷結構以增加光線被散射的機率。很明顯地,如何在不大幅增加製程複雜度以及製造成本的情況下,改善發光二極體的磊晶品質以 及提升內部量子效率,實為研發人員亟欲解決的議題之一。 With the advancement of semiconductor technology, today's light-emitting diodes have high-brightness output. In addition, light-emitting diodes have the advantages of power saving, small size, low-voltage driving, and mercury-free. Widely used in the field of display and lighting. Generally speaking, the light emitting efficiency of a light emitting diode is related to the epitaxial quality of the semiconductor element layer and its internal quantum efficiency. At present, in order to improve the internal quantum efficiency of light-emitting diodes, there are known techniques to improve the epitaxial quality of the semiconductor element layer formed subsequently by growing a nucleation layer and a buffer layer on the semiconductor substrate. The growth of the buffer layer requires additional time and cost, and the nucleation layer and the buffer layer also increase the overall thickness of the light emitting diode wafer. In addition, in order to improve the light extraction efficiency of light emitting diodes, conventional techniques have been used to form recessed structures on growing semiconductor substrates to increase the probability of light being scattered. Obviously, how to improve the epitaxial quality of light-emitting diodes without significantly increasing process complexity and manufacturing costs? And improving the internal quantum efficiency is one of the issues that R & D personnel are eager to solve.
本發明提供一種紫外光發光二極體的製造方法,其可降低差排(dislocation)竄升紫外光發光二極體元件層表面的機率。 The invention provides a method for manufacturing an ultraviolet light emitting diode, which can reduce the probability of dislocation shifting up the surface of the ultraviolet light emitting diode element layer.
本發明的實施例提供一種紫外光發光二極體的製造方法,其包括下列步驟。於半導體基材上形成金屬層,其中金屬層包括鎳金屬層或鈦金屬層。加熱金屬層,以於半導體基材上形成多個離散分佈的島狀結構。於半導體基材上形成覆蓋島狀結構的紫外光發光二極體元件層。於形成紫外光發光二極體元件層之後,移除半導體基材以及島狀結構。 An embodiment of the present invention provides a method for manufacturing an ultraviolet light emitting diode, which includes the following steps. A metal layer is formed on a semiconductor substrate, wherein the metal layer includes a nickel metal layer or a titanium metal layer. The metal layer is heated to form a plurality of discretely distributed island structures on the semiconductor substrate. An ultraviolet light emitting diode element layer covering an island structure is formed on a semiconductor substrate. After the ultraviolet light emitting diode element layer is formed, the semiconductor substrate and the island structure are removed.
本發明的實施例提供一種紫外光發光二極體的製造方法,其包括下列步驟。於半導體基材上形成金屬層,其中金屬層包括鎳金屬層或鈦金屬層。加熱金屬層,以於半導體基材上形成多個隨機且離散地分佈的自組裝奈米島狀結構(self-assembled nano-island structures),其中自組裝奈米島狀結構暴露出半導體基材的部分表面,且自組裝奈米島狀結構的尺寸介於10奈米至1000奈米之間。於半導體基材上形成覆蓋自組裝奈米島狀結構的紫外光發光二極體元件層,紫外光發光二極體元件層適於發出波長介於200奈米至430奈米的紫外光。移除半導體基材,以使紫外光發光二極體元件層的底面以及嵌於紫外光發光二極體元件層中的自組裝奈米島狀結構暴露。移除嵌於紫外光發光二極體元件層中 的自組裝奈米島狀結構。 An embodiment of the present invention provides a method for manufacturing an ultraviolet light emitting diode, which includes the following steps. A metal layer is formed on a semiconductor substrate, wherein the metal layer includes a nickel metal layer or a titanium metal layer. Heating the metal layer to form a plurality of randomly and discretely distributed self-assembled nano-island structures on the semiconductor substrate, wherein the self-assembled nano-island structures expose a part of the surface of the semiconductor substrate The size of the self-assembled nano-island structure is between 10 nanometers and 1000 nanometers. An ultraviolet light emitting diode element layer covering a self-assembled nano-island structure is formed on a semiconductor substrate. The ultraviolet light emitting diode element layer is suitable for emitting ultraviolet light with a wavelength between 200 nm and 430 nm. The semiconductor substrate is removed to expose the bottom surface of the ultraviolet light emitting diode element layer and the self-assembled nano-island structure embedded in the ultraviolet light emitting diode element layer. Remove embedded in UV light emitting diode element layer Self-assembled nano island structure.
基於上述,本發明的實施例可藉由在半導體基材上形成多個離散分佈的島狀結構,以使紫外光發光二極體元件層中的差排彎曲,進而降低紫外光發光二極體元件層的缺陷密度,並且提升紫外光發光二極體的內部量子效率。 Based on the above, in the embodiment of the present invention, a plurality of discretely-distributed island structures can be formed on a semiconductor substrate to bend the difference rows in the ultraviolet light emitting diode element layer, thereby reducing the ultraviolet light emitting diode. The defect density of the element layer improves the internal quantum efficiency of the ultraviolet light emitting diode.
為讓本發明的上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。 In order to make the above features and advantages of the present invention more comprehensible, embodiments are hereinafter described in detail with reference to the accompanying drawings.
100‧‧‧半導體基材 100‧‧‧ semiconductor substrate
110a‧‧‧島狀結構 110a‧‧‧ island structure
120‧‧‧第一型摻雜半導體層 120‧‧‧ the first type doped semiconductor layer
122、124‧‧‧第一型摻雜半導體材料 122, 124‧‧‧ the first type doped semiconductor material
130‧‧‧發光層 130‧‧‧Light-emitting layer
140‧‧‧第二型摻雜半導體層 140‧‧‧Second type doped semiconductor layer
150‧‧‧歐姆接觸層 150‧‧‧ohm contact layer
160‧‧‧第一電極 160‧‧‧first electrode
170‧‧‧第二電極 170‧‧‧Second electrode
R‧‧‧凹陷 R‧‧‧ Depression
UV‧‧‧紫外光發光二極體元件層 UV‧‧‧UV light emitting diode element layer
圖1、圖2以及圖4至圖10為依照本發明的一實施例的一種紫外光發光二極體的製造流程示意圖。 FIG. 1, FIG. 2, and FIG. 4 to FIG. 10 are schematic diagrams of a manufacturing process of an ultraviolet light emitting diode according to an embodiment of the present invention.
圖3為島狀結構110a分佈於半導體基材100上之示意圖。 FIG. 3 is a schematic diagram of the island structure 110 a distributed on the semiconductor substrate 100.
圖1、圖2以及圖4至圖10為依照本發明的一實施例的一種紫外光發光二極體的製造流程示意圖,而圖3為島狀結構110a分佈於半導體基材100上之示意圖。 FIG. 1, FIG. 2, and FIG. 4 to FIG. 10 are schematic diagrams of a manufacturing process of an ultraviolet light emitting diode according to an embodiment of the present invention, and FIG. 3 is a schematic diagram of an island structure 110 a distributed on a semiconductor substrate 100.
請參照圖1,首先,提供半導體基材100,並於半導體基材100的表面上形成金屬層110。在本實施例中,半導體基材100可為氮化鋁(AlN)基材、藍寶石(Al2O3)基材、碳化矽(SiC)或是其他適合用以製造紫外光發光二極體的半導體基材,而金屬層110例 如為鎳金屬層或鈦金屬層。在一些實施例中,金屬層110可藉由電子束蒸鍍製程形成於所述半導體基材100的表面上,而金屬層110的厚度例如介於1奈米至100奈米之間。然而,本發明並不限定金屬層110的厚度以及形成方式。 Referring to FIG. 1, first, a semiconductor substrate 100 is provided, and a metal layer 110 is formed on a surface of the semiconductor substrate 100. In this embodiment, the semiconductor substrate 100 may be an aluminum nitride (AlN) substrate, a sapphire (Al 2 O 3 ) substrate, silicon carbide (SiC), or other suitable materials for manufacturing ultraviolet light emitting diodes. A semiconductor substrate, and the metal layer 110 is, for example, a nickel metal layer or a titanium metal layer. In some embodiments, the metal layer 110 may be formed on the surface of the semiconductor substrate 100 by an electron beam evaporation process, and the thickness of the metal layer 110 is, for example, between 1 nm and 100 nm. However, the present invention does not limit the thickness and formation method of the metal layer 110.
請參照圖1至圖3,對半導體基材100上所形成的金屬層110進行加熱,以於半導體基材100上形成多個離散分佈的島狀結構110a。如圖2與圖3所示,在本實施例中,島狀結構110a例如是藉由加熱(例如,快速熱退火製程)而於半導體基材100上所形成的自組裝奈米島狀結構110a,且這些自組裝耐密島狀結構110a是隨機且離散地分佈於半導體基材100上。換言之,自組裝奈米島狀結構110a僅覆蓋住半導體基材100的部分表面,並且會將半導體基材100的其餘部分表面暴露。意即,由圖3可知,自組裝奈米島狀結構110a即分佈半導體基材100表面上的鎳群(nickel clusters)。 Referring to FIGS. 1 to 3, the metal layer 110 formed on the semiconductor substrate 100 is heated to form a plurality of discretely distributed island-shaped structures 110 a on the semiconductor substrate 100. As shown in FIGS. 2 and 3, in this embodiment, the island structure 110 a is, for example, a self-assembled nano island structure 110 a formed on the semiconductor substrate 100 by heating (for example, a rapid thermal annealing process). The self-assembled dense island structures 110 a are randomly and discretely distributed on the semiconductor substrate 100. In other words, the self-assembled nano-island structure 110 a covers only a part of the surface of the semiconductor substrate 100 and exposes the remaining part of the surface of the semiconductor substrate 100. In other words, it can be seen from FIG. 3 that the self-assembled nano-island structure 110 a is a nickel cluster distributed on the surface of the semiconductor substrate 100.
在一些實施例中,金屬層110例如是於氮氣環境下被加熱(例如,快速熱退火製程)而於半導體基材100的表面上形成奈米島狀結構110a。舉例而言,在加熱期間,金屬層110可被加熱至攝氏600度至攝氏1000度之間,且加熱時間可介於約1分鐘至10分鐘之間。此外,在加熱期間,金屬層110會產生自行組裝(self-assembling)的動作,以於半導體基材100的表面上形成自組裝奈米島狀結構110a,且自組裝奈米島狀結構110a的尺寸例如是介於10奈米至1000奈米之間。然而,本發明並不限定組裝奈米 島狀結構110a的尺寸。值得注意的是,由於自組裝奈米島狀結構110a是在高溫製程中自行組裝而形成的圖案化結構,因此自組裝奈米島狀結構110a的形成無須使用到微影及蝕刻製程。 In some embodiments, the metal layer 110 is heated under a nitrogen environment (eg, a rapid thermal annealing process) to form a nano-island structure 110 a on the surface of the semiconductor substrate 100. For example, during the heating, the metal layer 110 may be heated to between 600 ° C and 1000 ° C, and the heating time may be between about 1 minute and 10 minutes. In addition, during heating, the metal layer 110 generates a self-assembling action to form a self-assembled nano-island structure 110a on the surface of the semiconductor substrate 100, and the size of the self-assembled nano-island structure 110a is, for example, It is between 10nm and 1000nm. However, the present invention is not limited to assembling nanometers. The size of the island structure 110a. It is worth noting that, since the self-assembled nano-island structure 110a is a patterned structure formed by self-assembly in a high-temperature process, the formation of the self-assembled nano-island structure 110a does not require the use of lithography and etching processes.
由圖3可知,分佈於半導體基材100表面上的自組裝奈米島狀結構110a彼此間在尺寸與圖案上不盡相同。在一些實施例中,分佈於半導體基材100表面上的自組裝奈米島狀結構110a具有隨機的尺寸及不規則的圖案。 As can be seen from FIG. 3, the self-assembled nano-island structures 110 a distributed on the surface of the semiconductor substrate 100 are different in size and pattern from each other. In some embodiments, the self-assembled nano-island structure 110 a distributed on the surface of the semiconductor substrate 100 has a random size and an irregular pattern.
請參照圖4,在形成自組裝奈米島狀結構110a之後,以自組裝奈米島狀結構110a為罩幕,選擇性地沉積第一型摻雜半導體材料122。第一型摻雜半導體材料122會選擇性地沉積未被自組裝奈米島狀結構110a所覆蓋的半導體基材100上,並且覆蓋住自組裝奈米島狀結構110a的側表面。如圖4所示,由於自組裝奈米島狀結構110a的材質為鎳金屬,因此第一型摻雜半導體材料122會填入於自組裝奈米島狀結構110a之間的空間中,不會沉積在自組裝奈米島狀結構110a的頂表面上。 Referring to FIG. 4, after the self-assembled nano-island structure 110 a is formed, the first type doped semiconductor material 122 is selectively deposited using the self-assembled nano-island structure 110 a as a mask. The first-type doped semiconductor material 122 selectively deposits on the semiconductor substrate 100 not covered by the self-assembled nano-island structure 110 a and covers the side surface of the self-assembled nano-island structure 110 a. As shown in FIG. 4, since the material of the self-assembled nano-island structure 110 a is nickel metal, the first type doped semiconductor material 122 will fill the space between the self-assembled nano-island structures 110 a and will not be deposited in Self-assembled nano island structure 110a on the top surface.
請參照圖5,在選擇性地沉積第一型摻雜半導體材料122之後,沉積第一型摻雜半導體材料124以覆蓋住自組裝奈米島狀結構110a以及第一型摻雜半導體材料122。舉例而言,第一型摻雜半導體材料124可藉由金屬有機化學氣相沉積(Metal-organic Chemical Vapor Deposition,MOCVD)形成於自組裝奈米島狀結構110a以及第一型摻雜半導體材料122上。由圖5可知,第一型摻雜半導體材料122以及第一型摻雜半導體材料124可構成第一型 摻雜半導體層120。值得注意的是,前述的第一型摻雜半導體層120中的第一型摻雜半導體材料124可為單層磊晶層或是多層磊晶層,本發明不限定其型態。 Referring to FIG. 5, after the first-type doped semiconductor material 122 is selectively deposited, the first-type doped semiconductor material 124 is deposited to cover the self-assembled nano-island structure 110 a and the first-type doped semiconductor material 122. For example, the first type doped semiconductor material 124 can be formed on the self-assembled nano-island structure 110a and the first type doped semiconductor material 122 by metal-organic chemical vapor deposition (MOCVD). . As can be seen from FIG. 5, the first-type doped semiconductor material 122 and the first-type doped semiconductor material 124 may constitute the first type. Doped semiconductor layer 120. It should be noted that the first type doped semiconductor material 124 in the aforementioned first type doped semiconductor layer 120 may be a single-layer epitaxial layer or a multi-layer epitaxial layer, and the present invention is not limited in its type.
在本實施例中,形成在半導體基材100表面上的自組裝奈米島狀結構110a不但扮演了沉積罩幕的角色,還可使後續形成在第一型摻雜半導體材料124及/或第一型摻雜半導體材料122中的差排彎曲,有效地抑制差排向上竄升至第一型摻雜半導體材料124的表面,進而降低第一型摻雜半導體材料124及第一型摻雜半導體材料122中的缺陷密度。 In this embodiment, the self-assembled nano-island structure 110a formed on the surface of the semiconductor substrate 100 not only plays the role of a deposition mask, but also enables subsequent formation on the first-type doped semiconductor material 124 and / or The differential row bending in the type doped semiconductor material 122 effectively suppresses the differential row from rising upward to the surface of the first type doped semiconductor material 124, thereby reducing the first type doped semiconductor material 124 and the first type doped semiconductor material. Defect density in 122.
請參照圖6,在形成第一型摻雜半導體層120之後,依序於第一型摻雜半導體層120上依序形成發光層130以及第二型摻雜半導體層140,其中發光層130例如是能夠發出波長介於200奈米至430奈米的紫外光(UVC)之多重量子阱層。舉例而言,多重量子阱層可由多對堆疊的AlxIn1-xGaN阱層(wells)以及AlYIn1-YGaN阻障層(barriers)所構成,其中Y>X;1X0;及1Y0。在一些實施例中,第一型摻雜半導體層120為N型摻雜型態的半導體層(例如,具有N型矽摻質的氮化鋁鎵層),而第二型摻雜半導體層140為P型摻雜型態的半導體層(例如,具有P型鎂摻質的氮化鋁鎵層)。在其他實施例中,第一型摻雜半導體層120為P型摻雜型態的半導體層(例如,具有P型摻質的氮化鋁鎵層),而第二型摻雜半導體層140為N型摻雜型態的半導體層(例如,具有N型摻質的氮化鋁鎵層)。 Referring to FIG. 6, after the first-type doped semiconductor layer 120 is formed, a light-emitting layer 130 and a second-type doped semiconductor layer 140 are sequentially formed on the first-type doped semiconductor layer 120. The light-emitting layer 130 is, for example, It is a multiple quantum well layer capable of emitting ultraviolet light (UVC) with a wavelength between 200 nm and 430 nm. For example, multiple quantum well layers can be composed of multiple pairs of stacked Al x In 1-x GaN well layers and Al Y In 1-Y GaN barrier layers, where Y>X; 1 X 0; and 1 Y 0. In some embodiments, the first-type doped semiconductor layer 120 is an N-type doped semiconductor layer (eg, an aluminum gallium nitride layer with an N-type silicon dopant), and the second-type doped semiconductor layer 140 A semiconductor layer of a P-type doping type (for example, an aluminum gallium nitride layer having a P-type magnesium dopant). In other embodiments, the first-type doped semiconductor layer 120 is a P-type doped semiconductor layer (for example, a P-type doped aluminum gallium nitride layer), and the second-type doped semiconductor layer 140 is An N-type doped semiconductor layer (eg, an aluminum gallium nitride layer with an N-type dopant).
如圖6所示,前述之第一型摻雜半導體層120、發光層130以及第二型摻雜半導體層140構成紫外光發光二極體元件層UV。然而,本發明之紫外光發光二極體元件層UV不限定於圖6所繪示出的疊層架構,紫外光發光二極體元件層UV亦可採用其他的疊層架構。 As shown in FIG. 6, the aforementioned first-type doped semiconductor layer 120, the light-emitting layer 130, and the second-type doped semiconductor layer 140 constitute an ultraviolet light-emitting diode element layer UV. However, the UV light emitting diode element layer UV of the present invention is not limited to the laminated structure shown in FIG. 6, and the UV light emitting diode element layer UV can also adopt other laminated structures.
請參照圖7,在形成第二型摻雜半導體層140之後,可選擇性地於第二型摻雜半導體層140上形成歐姆接觸層150。在一些實施例中,歐姆接觸層150與第二型摻雜半導體層140可具有相同的摻雜型態,而相較於第二型摻雜半導體層140,歐姆接觸層150可具有較高的摻質濃度,以使歐姆接觸層150的阻值能夠低於第二型摻雜半導體層140的阻值。此外,歐姆接觸層150可藉由金屬有機化學氣相沉積形成於第二型摻雜半導體層140上,然本發明不以此為限。 Referring to FIG. 7, after the second-type doped semiconductor layer 140 is formed, an ohmic contact layer 150 may be selectively formed on the second-type doped semiconductor layer 140. In some embodiments, the ohmic contact layer 150 and the second-type doped semiconductor layer 140 may have the same doping type, and the ohmic contact layer 150 may have a higher The dopant concentration is such that the resistance value of the ohmic contact layer 150 can be lower than the resistance value of the second type doped semiconductor layer 140. In addition, the ohmic contact layer 150 may be formed on the second type doped semiconductor layer 140 by metal organic chemical vapor deposition, but the present invention is not limited thereto.
請參照圖7與圖8,在形成紫外光發光二極體元件層UV以及歐姆接觸層150之後,令半導體基材100與紫外光發光二極體元件層UV相互分離。在一些實施例中,可採用雷射剝離(laser lift-off)的方式提供能量至半導體基材100與紫外光發光二極體元件層UV之間的介面,亦使半導體基材100能夠自紫外光發光二極體元件層UV的底面分離。如圖8所示,在半導體基材100與紫外光發光二極體元件層UV分離之後,紫外光發光二極體元件層UV的底面以及嵌於紫外光發光二極體元件層UV中的自組裝奈米島狀結構110a會被暴露。 Referring to FIG. 7 and FIG. 8, after the ultraviolet light emitting diode element layer UV and the ohmic contact layer 150 are formed, the semiconductor substrate 100 and the ultraviolet light emitting diode element layer UV are separated from each other. In some embodiments, a laser lift-off method can be used to provide energy to the interface between the semiconductor substrate 100 and the ultraviolet light emitting diode element layer UV, and also enables the semiconductor substrate 100 to be self-UV The bottom surface of the light emitting diode element layer UV is separated. As shown in FIG. 8, after the semiconductor substrate 100 is separated from the ultraviolet light emitting diode element UV, the bottom surface of the ultraviolet light emitting diode element UV and the self-embedded in the ultraviolet light emitting diode element UV The assembled nano-island structure 110a is exposed.
請參照圖8與圖9,接著,移除嵌於紫外光發光二極體元件層UV中的自組裝奈米島狀結構110a,以在紫外光發光二極體元件層UV的底面上形成多個與自組裝奈米島狀結構110a相對定的凹陷R。從圖8與圖9可知,位於紫外光發光二極體元件層UV的底面上的凹陷R之圖案及厚度是由圖2中所形成的自組裝奈米島狀結構110a來決定,由於自組裝奈米島狀結構110a具有隨機的尺寸及不規則的圖案,因此凹陷R亦具有隨機的尺寸及不規則的圖案。 Referring to FIG. 8 and FIG. 9, the self-assembled nano-island structure 110 a embedded in the UV light emitting diode element layer UV is removed to form a plurality of UV light emitting diode element layers UV on the bottom surface. A depression R corresponding to the self-assembled nano-island structure 110a. As can be seen from FIG. 8 and FIG. 9, the pattern and thickness of the recess R on the bottom surface of the UV light emitting diode element layer UV are determined by the self-assembled nano-island structure 110 a formed in FIG. 2. The rice island structure 110a has a random size and an irregular pattern, so the depression R also has a random size and an irregular pattern.
如圖9所示,位於紫外光發光二極體元件層UV的底面上的凹陷R屬於奈米等級的微結構,凹陷R有助於散射發光層130所發出的光線,以避免光線在紫外光發光二極體元件層UV內部的多次反射,造成光損。據此,移除自組裝奈米島狀結構110a後所自然形成的凹陷R有助於改善紫外光發光二極體的內部量子效率。 As shown in FIG. 9, the depression R on the bottom surface of the ultraviolet light-emitting diode element layer UV is a nano-level microstructure. The depression R helps to scatter the light emitted by the light-emitting layer 130 to prevent the light from being emitted in the ultraviolet light. Multiple reflections inside the light-emitting diode element layer UV cause light loss. According to this, the hollow R formed naturally after the self-assembled nano-island structure 110a is removed helps to improve the internal quantum efficiency of the ultraviolet light emitting diode.
在一些實施例中,自組裝奈米島狀結構110a的移除可透過蝕刻製程來達成,而所選用的蝕刻劑(例如,硝酸、鹽酸或由硝酸與鹽酸所組成的溶液)以盡量不損傷紫外光發光二極體元件層UV的底面為原則。然而,本發明並不限定必須採用蝕刻方式來移除自組裝奈米島狀結構110a,其他可行的移除方式亦在本發明的涵蓋範疇內。 In some embodiments, the removal of the self-assembled nano-island structure 110a can be achieved by an etching process, and an etchant (for example, nitric acid, hydrochloric acid or a solution composed of nitric acid and hydrochloric acid) is selected so as not to damage ultraviolet rays as much as possible. The bottom surface of the light-emitting diode element layer UV is a principle. However, the present invention is not limited to the need to use an etching method to remove the self-assembled nano-island structure 110a, and other feasible removal methods are also within the scope of the present invention.
請參照圖10,於歐姆接觸層150上形成第一電極160,並且於紫外光發光二極體元件層UV的底面上形成第二電極170。 在其他可形成的實施例中,當歐姆接觸層150省略而未製作時,第一電極160可直接形成於第二型摻雜半導體層140上。 Referring to FIG. 10, a first electrode 160 is formed on the ohmic contact layer 150, and a second electrode 170 is formed on a bottom surface of the ultraviolet light emitting diode element layer UV. In other formable embodiments, when the ohmic contact layer 150 is omitted and not manufactured, the first electrode 160 may be directly formed on the second-type doped semiconductor layer 140.
綜上所述,本發明的實施例可藉由在半導體基材上形成多個離散分佈的島狀結構,以使紫外光發光二極體元件層中的差排彎曲,進而降低紫外光發光二極體元件層的缺陷密度,並且提升紫外光發光二極體的內部量子效率。此外,加熱製程可促使鎳金屬層或鈦金屬層自組裝成為離散分佈的島狀結構,此自組裝島狀結構的形成無須使用到微影以及蝕刻製程,有助於簡化製程,且可降低製造成本。再者,在一些實施例中,自組裝奈米島狀結構的移除可以在紫外光發光二極體元件層的底面上自然地形成凹陷,有助於改善紫外光發光二極體的內部量子效率。 In summary, the embodiment of the present invention can form a plurality of discretely distributed island-like structures on a semiconductor substrate to bend the differential rows in the ultraviolet light emitting diode element layer, thereby reducing the ultraviolet light emitting diodes. The defect density of the polar element layer increases the internal quantum efficiency of the ultraviolet light emitting diode. In addition, the heating process can promote the self-assembly of the nickel metal layer or the titanium metal layer into a discretely distributed island structure. The formation of this self-assembled island structure does not require the use of lithography and etching processes, which helps simplify the process and reduce manufacturing cost. Furthermore, in some embodiments, the removal of the self-assembled nano-island structure can naturally form a depression on the bottom surface of the ultraviolet light emitting diode element layer, which helps improve the internal quantum efficiency of the ultraviolet light emitting diode. .
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明的精神和範圍內,當可作些許的更動與潤飾,故本發明的保護範圍當視後附的申請專利範圍所界定者為準。 Although the present invention has been disclosed as above with the examples, it is not intended to limit the present invention. Any person with ordinary knowledge in the technical field can make some modifications and retouching without departing from the spirit and scope of the present invention. The protection scope of the present invention shall be determined by the scope of the attached patent application.
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TW201721904A (en) * | 2010-01-15 | 2017-06-16 | 皇家飛利浦電子股份有限公司 | Light emitting structure, and method for manufacturing the same |
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