TWI657247B - Testing apparatus and folded probe card testing system - Google Patents
Testing apparatus and folded probe card testing system Download PDFInfo
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Abstract
本發明係揭露一種測試裝置，具有第一輸出/輸入、第二輸出/輸入、第一比較器、第二比較器、資料組合模組、第一資料輸出電路及第二資料輸出電路。第一比較器及第二比較器分別接收第一測試資料及第二測試資料。電性連接至第一比較器及第二比較器的資料組合模組接收第一比較器之經比較的第一測試資料和第二比較器之經比較的第二測試資料，且進一步接收指令碼。第一資料輸出電路和第二資料輸出電路分別連接到第一輸出/輸入及第二輸出/輸入，且進一步電性連接至資料組合模組。根據指令碼，資料組合模組透過第一資料輸出電路和第二資料輸出電路將經比較的第一測試資料及經比較的第二測試資料分別輸出至第一輸出/輸入及第二輸出/輸入，或者透過第二資料輸出電路和第一資料輸出電路將經比較的第一測試資料及經比較的第二測試資料分別輸出至第二輸出/輸入及第一輸出/輸入。 The invention discloses a testing device having a first output/input, a second output/input, a first comparator, a second comparator, a data combination module, a first data output circuit and a second data output circuit. The first comparator and the second comparator respectively receive the first test data and the second test data. The data combination module electrically connected to the first comparator and the second comparator receives the compared first test data of the first comparator and the compared second test data of the second comparator, and further receives the instruction code . The first data output circuit and the second data output circuit are respectively connected to the first output/input and the second output/input, and are further electrically connected to the data combination module. According to the instruction code, the data combination module outputs the compared first test data and the compared second test data to the first output/input and the second output/input through the first data output circuit and the second data output circuit respectively. Or comparing the compared first test data and the compared second test data to the second output/input and the first output/input respectively through the second data output circuit and the first data output circuit.
Description
本發明係關於測試裝置以及使用所述測試裝置的摺疊探針卡測試系統，特別是一種具有彈性以用於具有一個及多個輸入/輸出的多個不同探針卡的測試裝置。 The present invention relates to a test device and a folded probe card test system using the test device, and more particularly to a test device having elasticity for a plurality of different probe cards having one or more inputs/outputs.
當在晶圓上測試積體電路(IC)時，會盡可能地平行測試多個裝置，以符合成本效益並減少每個晶圓的測試時間。測試系統控制器已經發展到增加通道數量，從而增加可以平行測試的裝置數量。然而，具有增加的測試通道的測試系統控制器對於測試系統來說是一個重要的成本因素，具有用於容納多個平行測試通道的複雜佈線的探針卡也是如此。因此，希望提供一種總體的探針卡結構，其允許增加測試平行性而不需要增加的測試系統控制器通道並且不增加探針卡佈線複雜度。 When testing integrated circuits (ICs) on a wafer, multiple devices are tested as parallel as possible to be cost effective and reduce test time per wafer. Test system controllers have evolved to increase the number of channels, thereby increasing the number of devices that can be tested in parallel. However, test system controllers with increased test channels are an important cost factor for test systems, as are probe cards with complex wiring for multiple parallel test channels. Accordingly, it is desirable to provide an overall probe card structure that allows for increased test parallelism without the need for additional test system controller channels and without the increased complexity of probe card routing.
參照圖1，圖1為現有測試系統中之現有測試裝置的方塊圖。現有測試裝置1包括多個比較器111、112及多個資料輸出電路121、122，其中每一個比較器111、112以一對一的方式電性連接於對應的一個資料輸出電路121、122。 Referring to Figure 1, Figure 1 is a block diagram of an existing test apparatus in an existing test system. The existing test apparatus 1 includes a plurality of comparators 111, 112 and a plurality of data output circuits 121, 122, wherein each of the comparators 111, 112 is electrically connected to a corresponding one of the data output circuits 121, 122 in a one-to-one manner.
每一個比較器111、112接收對應的一個測試資料DG_1、DG_2。每一個比較器111、112比較所接收的測試資料DG_1、DG_2及輸出經比較的測試資料至對應的一個資料輸出電路121、122。然後，資料輸出電路121、122於其輸出端DQ1、DQ2各自輸出經比較的的測試資料。現有測試裝置1採用多個輸入/輸出配置(即，2個輸入/輸出配置)，但如此可能增加探針卡的佈線複雜度。 Each of the comparators 111, 112 receives a corresponding one of the test data DG_1, DG_2. Each of the comparators 111, 112 compares the received test data DG_1, DG_2 and outputs the compared test data to a corresponding one of the data output circuits 121, 122. Then, the data output circuits 121, 122 respectively output the compared test data at their output terminals DQ1, DQ2. The existing test apparatus 1 employs multiple input/output configurations (ie, 2 input/output configurations), but this may increase the wiring complexity of the probe card.
參照圖2，圖2為現有測試系統中之另一個現有測試裝置的方塊圖。現有測試裝置2包括多個比較器211、212、資料組合器22及資料輸出電路23，其中比較器211、212電性連接至資料組合器22，且資料組合器22電性連接至資料輸出電路23。 Referring to Figure 2, Figure 2 is a block diagram of another prior art test set in an existing test system. The existing test device 2 includes a plurality of comparators 211, 212, a data combiner 22 and a data output circuit 23, wherein the comparators 211, 212 are electrically connected to the data combiner 22, and the data combiner 22 is electrically connected to the data output circuit. twenty three.
每一個比較器211、212接收對應的一個測試資料DG_1、DG_2。每一個比較器211、212比較所接收的測試資料DG_1、DG_2及將經比較的測試資料輸出至資料組合器22。資料組合器22進一步接收指令碼CY[1：0]，並且根據指令碼CY[1：0]將比較器211的經比較的測試資料、比較器212的經比較的測試資料或比較器211、212的經比較的測試資料之組合輸出至資料輸出電路23。 Each of the comparators 211, 212 receives a corresponding one of the test data DG_1, DG_2. Each of the comparators 211, 212 compares the received test data DG_1, DG_2 and outputs the compared test data to the data combiner 22. The data combiner 22 further receives the instruction code CY[1:0], and compares the compared test data of the comparator 211, the compared test data of the comparator 212 or the comparator 211 according to the instruction code CY[1:0], A combination of the compared test data of 212 is output to the data output circuit 23.
舉例來說，當指令碼CY[1：0]為「00」時，資料輸出電路23於其輸出端DQ1輸出比較器211、212的經比較的測試資料之組合。當指令碼CY[1：0]為「10」時，資料輸出電路23於其輸出端DQ1輸出比較器211的經比較的測試資料。當指令碼CY[1：0]為「01」時，資料輸出電路23於其輸出端DQ1輸出比較器212的經比較的測試資料。現有測試裝置2採用單一輸入/ 輸出配置(即，1個輸入/輸出配置)，如此可能導致需要測試控制器且不適用於具有多個輸入/輸出的探針卡。 For example, when the instruction code CY[1:0] is "00", the data output circuit 23 outputs a combination of the compared test data of the comparators 211, 212 at its output terminal DQ1. When the instruction code CY[1:0] is "10", the data output circuit 23 outputs the compared test data of the comparator 211 at its output terminal DQ1. When the instruction code CY[1:0] is "01", the data output circuit 23 outputs the compared test data of the comparator 212 at its output terminal DQ1. Existing test device 2 uses a single input / The output configuration (ie, 1 input/output configuration) may result in the need for a test controller and not for probe cards with multiple inputs/outputs.
本發明其中一個目的在於提供一種測試裝置，且此測試裝置可同時適用於具有一個及多個輸入/輸出的兩個測試系統(即，具有彈性以用於一個及多個輸入/輸出的多個探針卡)。 It is an object of the present invention to provide a test apparatus that is simultaneously applicable to two test systems having one or more inputs/outputs (i.e., multiples having elasticity for one or more inputs/outputs) Probe card).
本發明另外一個目的提供一種摺疊探針卡測試系統，且此摺疊探針卡測試系統能夠使用用於一般測試模式的測試裝置。 Another object of the present invention is to provide a folded probe card test system, and the folded probe card test system is capable of using a test device for a general test mode.
至少為了達到上述目的，本發明提供一種測試裝置，包括；第一輸入/輸出(IO,input-output)和第二輸入/輸出；第一比較器，接收第一測試資料；第二比較器，接收第二測試資料；資料組合模組，電性連接至第一比較器和第二比較器，接收第一比較器的經比較的第一測試資料和第二比較器的經比較的第二測試資料，並進一步接收指令碼；第一資料輸出電路，電性連接至第一輸入/輸出和資料組合模組；第二資料輸出電路，電性連接至第二輸出/輸入和資料組合模組，其中根據指令碼，資料組合模組透過第一資料輸出電路和第二資料輸出電路將經比較的第一測試資料和經比較的第二測試資料分別輸出至第一輸出/輸入和第二輸出/輸入；或者，根據指令碼，資料組合模組透過第一資料輸出電路和第二資料輸出電路將經比較的第二測試資料和經比較的第一測試資料分別輸出至第一輸出/輸入和第二輸出/輸入。 At least in order to achieve the above object, the present invention provides a testing apparatus comprising: a first input/output (IO) and a second input/output; a first comparator receiving the first test data; and a second comparator, Receiving a second test data; the data combination module is electrically connected to the first comparator and the second comparator, and receives the compared first test data of the first comparator and the compared second test of the second comparator Data, and further receiving the instruction code; the first data output circuit is electrically connected to the first input/output and data combination module; and the second data output circuit is electrically connected to the second output/input and data combination module, According to the instruction code, the data combination module outputs the compared first test data and the compared second test data to the first output/input and the second output through the first data output circuit and the second data output circuit respectively. Inputting; or, according to the instruction code, the data combination module compares the second test data and the compared first test resource through the first data output circuit and the second data output circuit They are respectively output to the first input / output and a second output / input.
於本發明的一個實施例中，根據指令碼，資料組合模組透過第一資料輸出電路和第二資料輸出電路將經比較的第一測試資料及經比較的第二測試資料的組合輸出至第一輸出/輸入和第二輸出/輸入。 In an embodiment of the present invention, the data combination module outputs the combined combination of the first test data and the compared second test data to the first through the first data output circuit and the second data output circuit according to the instruction code. An output/input and a second output/input.
於本發明的一個實施例中，資料組合模組包括一第一資料組合器和一第二資料組合器，第一比較器和第二比較器電性連接至所有的第一資料組合器和第二資料組合器，且第一資料組合器和第二資料組合器分別連接至第一資料輸出電路和第二資料輸出電路，其中指令碼被施加於第一資料組合器和第二資料組合器。 In one embodiment of the present invention, the data combination module includes a first data combiner and a second data combiner, and the first comparator and the second comparator are electrically connected to all of the first data combiners and the first And a data combiner, wherein the first data combiner and the second data combiner are respectively connected to the first data output circuit and the second data output circuit, wherein the instruction code is applied to the first data combiner and the second data combiner.
於本發明的一個實施例中，測試裝置更包括：第三輸出/輸入和第四輸出/輸入；第三資料輸出電路和第四資料輸出電路，分別電性連接至第三輸出/輸入及第四輸出/輸入，且進一步電性連接資料組合模組；其中根據指令碼，資料組合模組透過第一資料輸出電路和第三資料輸出電路將第一比較器的經比較的第一測試資料輸出至該第一輸出/輸入和該第三輸出/輸入，以及資料組合模組透過第二資料輸出電路和第四資料輸出電路將第二比較器的經比較的第二測試資料輸出至第二輸出/輸入和第四輸出/輸入；或者，根據指令碼，資料組合模組透過第二資料輸出電路和第四資料輸出電路將第一比較器的經比較的第一測試資料輸出至第二輸出/輸入和第四輸出/輸入，以及資料組合模組透過第一資料輸出電路和第三資料輸出電路將第二比較器的經比較的第二測試資料輸出至第一輸出/輸入和第三輸出/輸入；或者，根據指令碼，資料組合模組透過第一至第四資料輸出電路將經 比較的第一測試資料及經比較的第二測試資料之組合輸出至第一至第四輸出/輸入。 In an embodiment of the present invention, the testing device further includes: a third output/input and a fourth output/input; a third data output circuit and a fourth data output circuit, respectively electrically connected to the third output/input and the first Four output/input, and further electrically connected to the data combination module; wherein, according to the instruction code, the data combination module outputs the compared first test data of the first comparator through the first data output circuit and the third data output circuit Up to the first output/input and the third output/input, and the data combination module outputs the compared second test data of the second comparator to the second output through the second data output circuit and the fourth data output circuit Or input and fourth output/input; or, according to the instruction code, the data combination module outputs the compared first test data of the first comparator to the second output through the second data output circuit and the fourth data output circuit The input and the fourth output/input, and the data combination module compare the second test data of the second comparator through the first data output circuit and the third data output circuit Output to the first output/input and the third output/input; or, according to the instruction code, the data combination module passes through the first to fourth data output circuits The combination of the compared first test data and the compared second test data is output to the first to fourth outputs/inputs.
於本發明的一個實施例中，測試裝置更包括第三輸出/輸入和第四輸出/輸入；第三至第八比較器，分別接收第三至第八測試資料；以及第三至第四資料輸出電路，分別電性連接至第三輸出/輸入和第四輸出/輸入，且進一步電性連接資料組合模組；其中根據指令碼，資料組合模組透過第一至第四資料輸出電路將第一至第八比較器的經比較的第一至第八測試資料其中四者輸出至第一至第四輸出/輸入。 In one embodiment of the present invention, the testing apparatus further includes a third output/input and a fourth output/input; third to eighth comparators respectively receiving the third to eighth test data; and third to fourth data The output circuit is electrically connected to the third output/input and the fourth output/input, and is further electrically connected to the data combination module; wherein, according to the instruction code, the data combination module passes through the first to fourth data output circuits Four of the compared first to eighth test data of the first to eighth comparators are output to the first to fourth outputs/inputs.
於本發明的一個實施例中，資料組合模組包括第一至第四資料組合器，第一至第八比較器電性連接至所有的第一至第四資料組合器，且第一至第四資料組合器分別連接第一至第四資料輸出電路，其中指令碼被施加於第一至第四資料組合器。 In one embodiment of the present invention, the data combination module includes first to fourth data combiners, and the first to eighth comparators are electrically connected to all of the first to fourth data combiners, and the first to the fourth The four data combiners are respectively connected to the first to fourth data output circuits, wherein the instruction codes are applied to the first to fourth data combiners.
至少為了達到上述目的，本發明提供一種測試裝置，包括：第一至第四輸出/輸入；第一比較器，從晶片晶粒(chip die)接收第i測試資料；第二比較器，從晶片晶粒接收第i+1測試資料；資料組合模組，電性連接至第一比較器和第二比較器、接收第一比較器的經比較的第i測試資料和第二比較器的經比較的第i+1測試資料、及進一步接收指令碼；第一至第四資料輸出電路，電性連接至該資料組合模組，且分別電性連接至該第一至第四輸出/輸入；其中根據指令碼，資料組合模組透過第一資料輸出電路和第三資料輸出電路將經比較的第i測試資料輸出至第一輸出/輸入和第三輸出/輸入，以及資料組合模組透過第二資料輸出電路和第四資料輸出電路將經比 較的第i+1測試資料輸出至該第二輸出/輸入和該第四輸出/輸入；或者，根據指令碼，資料組合模組透過第一資料輸出電路和第三資料輸出電路將經比較的第i+1測試資料輸出至第一輸出/輸入和第三輸出/輸入，以及資料組合模組透過第二資料輸出電路和第四資料輸出電路將經比較的第i測試資料輸出至第二輸出/輸入和第四輸出/輸入；其中i是屬於偶數的整數，而i+1不大於晶片晶粒之輸出的數量。 At least in order to achieve the above object, the present invention provides a testing apparatus comprising: first to fourth output/input; a first comparator for receiving an i-th test data from a chip die; a second comparator, a slave chip The die receives the i+1th test data; the data combination module is electrically connected to the first comparator and the second comparator, and the compared comparison between the compared i-th test data and the second comparator of the first comparator The first i+1 test data and the further receive instruction code; the first to fourth data output circuits are electrically connected to the data combination module, and are electrically connected to the first to fourth output/input respectively; According to the instruction code, the data combination module outputs the compared i-th test data to the first output/input and the third output/input through the first data output circuit and the third data output circuit, and the data combination module transmits through the second The data output circuit and the fourth data output circuit will be compared The first i+1 test data is output to the second output/input and the fourth output/input; or, according to the instruction code, the data combination module is compared by the first data output circuit and the third data output circuit The i+1th test data is output to the first output/input and the third output/input, and the data combination module outputs the compared i-th test data to the second output through the second data output circuit and the fourth data output circuit /input and fourth output/input; where i is an integer that is even and i+1 is not greater than the number of outputs of the wafer die.
至少為了達到上述目的，本發明提供一種摺疊探針卡測試系統，包括：測試裝置；以及摺疊探針卡，電性連接至測試裝置；其中，測試裝置包括：第一至第四輸出/輸入；第一比較器，從晶片晶粒(chip die)接收第i測試資料；第二比較器，從晶片晶粒接收第i+1測試資料；資料組合模組，電性連接至第一比較器及第二比較器、接收第一比較器的經比較的第i測試資料及第二比較器的經比較的第i+1測試資料、及進一步接收指令碼；以及第一至第四資料輸出電路，電性連接至資料組合模組，且分別電性連接至第一至第四輸出/輸入；其中根據指令碼，資料組合模組透過第一資料輸出電路和第三資料輸出電路將經比較的第i測試資料輸出至第一輸出/輸入和第三輸出/輸入，以及資料組合模組透過第二資料輸出電路和第四資料輸出電路將經比較的第i+1測試資料輸出至第二輸出/輸入和第四輸出/輸入；或者，根據指令碼，資料組合模組透過第一資料輸出電路和第三資料輸出電路將經比較的第i+1測試資料輸出至第一輸出/輸入和第三輸出/輸入，以及資料組合模組透過第二資料輸出電路和第四資料輸出電路將經比較的第i 測試資料輸出至第二輸出/輸入和第四輸出/輸入；其中i是屬於偶數的整數，而i+1不大於晶片晶粒之輸出的數量。 At least in order to achieve the above object, the present invention provides a folding probe card testing system, comprising: a testing device; and a folding probe card electrically connected to the testing device; wherein the testing device comprises: first to fourth output/input; The first comparator receives the i-th test data from the chip die; the second comparator receives the i+1th test data from the die; the data combination module is electrically connected to the first comparator and a second comparator, a compared first i test data of the first comparator, a compared first i+1 test data of the second comparator, and a further received instruction code; and first to fourth data output circuits, Electrically connected to the data combination module, and electrically connected to the first to fourth output/input respectively; wherein according to the instruction code, the data combination module passes the first data output circuit and the third data output circuit to compare the first i test data output to the first output/input and the third output/input, and the data combination module outputs the compared i+1th test data to the second data output circuit and the fourth data output circuit The second output/input and the fourth output/input; or, according to the instruction code, the data combination module outputs the compared i+1th test data to the first output/input through the first data output circuit and the third data output circuit And the third output/input, and the data combination module through the second data output circuit and the fourth data output circuit to compare the i The test data is output to a second output/input and a fourth output/input; wherein i is an integer that is even and i+1 is not greater than the number of outputs of the wafer die.
於本發明的一個實施例中，根據指令碼，資料組合模組透過第一至第四資料輸出電路將經比較的第i測試資料及經比較的第i+1測試資料之組合輸出至第一至第四輸出/輸入。 In one embodiment of the present invention, the data combination module outputs the combination of the compared i-th test data and the compared i+1th test data to the first through the first to fourth data output circuits according to the instruction code. To the fourth output / input.
於本發明的一個實施例中，第一輸出/輸入和第三輸出/輸入透過摺疊探針卡彼此電性連接，第二輸出/輸入和第四輸出/輸入透過摺疊探針卡彼此電性連接。 In an embodiment of the invention, the first output/input and the third output/input are electrically connected to each other through the folding probe card, and the second output/input and the fourth output/input are electrically connected to each other through the folding probe card. .
總而言之，測試裝置可適用於具有一個輸入/輸出的測試系統及具有多個輸入/輸出的測試系統，且藉由擴張測試裝置，測試裝置可使用於摺疊探針卡。 In summary, the test device can be applied to a test system having one input/output and a test system having multiple inputs/outputs, and by expanding the test device, the test device can be used to fold the probe card.
1‧‧‧現有測試裝置 1‧‧‧ Existing test equipment
2‧‧‧現有測試裝置 2‧‧‧ Existing test equipment
3‧‧‧測試裝置 3‧‧‧Testing device
4‧‧‧測試裝置 4‧‧‧Testing device
5‧‧‧摺疊探針卡測試系統 5‧‧‧Folding probe card test system
6‧‧‧測試裝置 6‧‧‧Testing device
7‧‧‧測試裝置 7‧‧‧Testing device
22‧‧‧資料組合器 22‧‧‧Data combiner
23‧‧‧資料輸出電路 23‧‧‧ Data output circuit
32‧‧‧資料組合模組 32‧‧‧ Data Combination Module
42‧‧‧資料組合模組 42‧‧‧ Data Combination Module
51‧‧‧半導體裝置 51‧‧‧Semiconductor device
52‧‧‧摺疊探針卡 52‧‧‧Folding probe card
62‧‧‧資料組合模組 62‧‧‧ Data Combination Module
72‧‧‧資料組合模組 72‧‧‧ data combination module
111‧‧‧比較器 111‧‧‧ comparator
112‧‧‧比較器 112‧‧‧ comparator
121‧‧‧資料輸出電路 121‧‧‧ data output circuit
122‧‧‧資料輸出電路 122‧‧‧ data output circuit
211‧‧‧比較器 211‧‧‧ comparator
212‧‧‧比較器 212‧‧‧ Comparator
311‧‧‧比較器 311‧‧‧ comparator
312‧‧‧比較器 312‧‧‧ Comparator
321‧‧‧資料組合器 321‧‧‧ data combiner
322‧‧‧資料組合器 322‧‧‧ data combiner
331‧‧‧資料輸出電路 331‧‧‧ data output circuit
332‧‧‧資料輸出電路 332‧‧‧ data output circuit
411‧‧‧比較器 411‧‧‧ comparator
412‧‧‧比較器 412‧‧‧ Comparator
421‧‧‧資料組合器 421‧‧‧ data combiner
422‧‧‧資料組合器 422‧‧‧ data combiner
423‧‧‧資料組合器 423‧‧‧ data combiner
424‧‧‧資料組合器 424‧‧‧Data combiner
431‧‧‧資料輸出電路 431‧‧‧ data output circuit
432‧‧‧資料輸出電路 432‧‧‧ data output circuit
433‧‧‧資料輸出電路 433‧‧‧ data output circuit
434‧‧‧資料輸出電路 434‧‧‧ data output circuit
511‧‧‧晶片晶粒 511‧‧‧ wafer granules
512‧‧‧測試裝置 512‧‧‧Testing device
611‧‧‧比較器 611‧‧‧ comparator
612‧‧‧比較器 612‧‧‧ comparator
621‧‧‧資料組合器 621‧‧‧Data combiner
622‧‧‧資料組合器 622‧‧‧Data combiner
623‧‧‧資料組合器 623‧‧‧Data combiner
624‧‧‧資料組合器 624‧‧‧Data combiner
631‧‧‧資料輸出電路 631‧‧‧ data output circuit
632‧‧‧資料輸出電路 632‧‧‧ data output circuit
633‧‧‧資料輸出電路 633‧‧‧ data output circuit
634‧‧‧資料輸出電路 634‧‧‧ data output circuit
711‧‧‧比較器 711‧‧‧ comparator
718‧‧‧比較器 718‧‧‧ comparator
721‧‧‧資料組合器 721‧‧‧ data combiner
724‧‧‧資料組合器 724‧‧‧Data combiner
731‧‧‧資料輸出電路 731‧‧‧ data output circuit
734‧‧‧資料輸出電路 734‧‧‧ data output circuit
DG_1‧‧‧測試資料 DG_1‧‧‧ test data
DG_2‧‧‧測試資料 DG_2‧‧‧ test data
DG_i‧‧‧測試資料 DG_i‧‧‧ test data
DG_(i+1)‧‧‧測試資料 DG_(i+1)‧‧‧ test data
DQ_1‧‧‧輸出/輸入 DQ_1‧‧‧Output/Input
DQ_2‧‧‧輸出/輸入 DQ_2‧‧‧Output/Input
DQi‧‧‧輸出/輸入 DQi‧‧‧Output/Input
DQ(i+1)‧‧‧輸出/輸入 DQ(i+1)‧‧‧ Output/Input
DQ(i+8)‧‧‧輸出/輸入 DQ (i+8)‧‧‧ Output/Input
DQ(i+9)‧‧‧輸出/輸入 DQ(i+9)‧‧‧ Output/Input
CY[1：0]‧‧‧指令碼 CY[1:0]‧‧‧ instruction code
CY[2：0]‧‧‧指令碼 CY[2:0]‧‧‧ instruction code
為了更清楚地說明本發明實施例或現有技術中的技術方案，下面將對實施例描述中所需要使用的附圖作簡單地介紹，顯而易見地，下面描述中的附圖僅僅是本發明的一些實施例，對於本發明所屬技術領域中具有通常知識者來講，在不付出創造性勞動的前提下，還可以根據這些附圖獲得其他的附圖。 In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments will be briefly described below. Obviously, the drawings in the following description are only some of the present invention. For the embodiments of the present invention, other drawings can be obtained based on the drawings without any creative work.
圖1為現有測試系統中之一個現有測試裝置的方塊圖。 1 is a block diagram of an existing test apparatus in an existing test system.
圖2為現有測試系統中之另一個現有測試裝置的方塊圖。 2 is a block diagram of another prior art test device in an existing test system.
圖3為根據本發明之一個實施例的測試系統中之測試裝置的方塊圖。 3 is a block diagram of a test apparatus in a test system in accordance with one embodiment of the present invention.
圖4為根據本發明之另一個實施例的測試系統中之測試裝置的方塊圖。 4 is a block diagram of a test apparatus in a test system in accordance with another embodiment of the present invention.
圖5為根據本發明之一個實施例之摺疊探針卡測試系統的方塊圖。 Figure 5 is a block diagram of a folded probe card testing system in accordance with one embodiment of the present invention.
圖6為根據本發明之一個實施例的摺疊探針卡測試系統中之測試裝置的方塊圖。 6 is a block diagram of a test apparatus in a folded probe card test system in accordance with one embodiment of the present invention.
圖7為根據本發明之另一個實施例的測試系統中之測試裝置的方塊圖。 Figure 7 is a block diagram of a test apparatus in a test system in accordance with another embodiment of the present invention.
為了使審查委員更容易理解本發明的目的、特徵及效果，多個實施例以及用於本發明之詳細描述的附圖在此一起被提供。 In order to make it easier for the reviewing committee to understand the objects, features and effects of the present invention, various embodiments and the accompanying drawings for the detailed description of the present invention are provided together.
本發明一個實施例提供了一種包含多個資料組合器的測試裝置，其中每一個資料組合器電性連接至測試裝置的所有比較器，並且從資料組合器輸出的經比較的測試資料可能基於在資料組合器上被施加的指令碼而不同。因此，測試裝置不僅適用於在壓縮測試模式下的具有一個輸入/輸出的探針卡，而且也適用於在壓縮測試模式下的具有多個輸入/輸出的探針卡。此外，在本發明的一個實施例中，測試裝置可以擴展適用於在一般測試模式下的摺疊探針卡，以提供摺疊探針卡測試系統。 An embodiment of the present invention provides a test apparatus including a plurality of data combiners, wherein each data combiner is electrically connected to all comparators of the test apparatus, and the compared test data output from the data combiner may be based on The command code applied on the data combiner differs. Therefore, the test apparatus is not only suitable for a probe card having one input/output in the compression test mode, but also for a probe card having a plurality of inputs/outputs in the compression test mode. Moreover, in one embodiment of the invention, the test device can be extended to a folded probe card suitable for use in a general test mode to provide a folded probe card test system.
參照圖3，圖3是根據本發明之一個實施例的測試系統中之測試裝置的方塊圖。測試裝置3包括多個比較器311、312、資料組合模組32、及多個資料輸出電路331、332。測試裝置3例如具有兩個輸入/輸出DQ1、DQ2，但本發明不限於此。比較器311、312電性連接到資料組合模組32，資料組 合模組32電性連接到資料輸出電路331、332，資料輸出電路331、332分別電性連接到輸入/輸出DQ1、DQ2。輸入/輸出DQ1、DQ2可用來被連接至具有2個輸入/輸出或1個輸入/輸出的探針卡。 Referring to Figure 3, there is shown a block diagram of a test apparatus in a test system in accordance with one embodiment of the present invention. The testing device 3 includes a plurality of comparators 311, 312, a data combination module 32, and a plurality of data output circuits 331, 332. The test device 3 has, for example, two input/outputs DQ1, DQ2, but the invention is not limited thereto. The comparators 311 and 312 are electrically connected to the data combination module 32, and the data group The module 32 is electrically connected to the data output circuits 331, 332, and the data output circuits 331, 332 are electrically connected to the input/output DQ1, DQ2, respectively. Input/output DQ1, DQ2 can be used to connect to a probe card with 2 inputs/outputs or 1 input/output.
比較器311、312分別接收測試資料DG_1、DG_2。當施加於資料組合模組32的指令碼CY[1：0]為「10」時，資料組合模組32將比較器311、312的經比較的測試資料分別輸出至資料輸出電路331、332。當施加於資料組合模組32的指令碼CY[1：0]為「01」時，資料組合模組32將比較器312、311的經比較的測試資料分別輸出至資料輸出電路331、332。當施加於資料組合模組32的指令碼CY[1：0]為「00」時，資料組合模組32將比較器311、312的經比較的測試資料之組合輸出至資料輸出電路331、332。亦即，資料組合模組32係根據指令碼CY[1：0]將比較器311的經比較的測試資料、比較器312的經比較的測試資料或比較器311、312的經比較的測試資料之組合輸出至資料輸出電路331、332的其中之一。 The comparators 311, 312 receive the test data DG_1, DG_2, respectively. When the command code CY[1:0] applied to the data combination module 32 is "10", the data combination module 32 outputs the compared test data of the comparators 311, 312 to the data output circuits 331, 332, respectively. When the command code CY[1:0] applied to the data combination module 32 is "01", the data combination module 32 outputs the compared test data of the comparators 312, 311 to the data output circuits 331, 332, respectively. When the instruction code CY[1:0] applied to the data combination module 32 is "00", the data combination module 32 outputs the combination of the compared test data of the comparators 311, 312 to the data output circuits 331, 332. . That is, the data combination module 32 compares the compared test data of the comparator 311, the compared test data of the comparator 312, or the compared test data of the comparators 311, 312 according to the instruction code CY[1:0]. The combination is output to one of the data output circuits 331, 332.
資料組合模組32包括多個資料組合器321、322。資料組合器321電性連接至比較器311、312，資料組合器322電性連接至比較器311、312。資料組合器321、322接收比較器311、312的經比較的測試資料，並進一步接收指令碼CY[1：0]。當被施加於資料組合模組32的指令碼CY[1：0]為「00」時，資料組合器321、322將比較器311、312的經比較的測試資料之組合輸出至資料輸出電路331、332。當被施加於資料組合模組32的指令碼CY[1：0]為「10」時，資料組合器321、322將比較器311、312的經比較的測試資料分別輸出到資料輸出電路331、332。當被施加於資料組合模組32的指令碼 CY[1：0]為「01」時，資料組合器321、322將比較器312、311的經比較的測試資料分別輸出至資料輸出電路321、322。 The data combination module 32 includes a plurality of data combiners 321, 322. The data combiner 321 is electrically connected to the comparators 311, 312, and the data combiner 322 is electrically connected to the comparators 311, 312. The data combiners 321, 322 receive the compared test data of the comparators 311, 312 and further receive the instruction code CY[1:0]. When the instruction code CY[1:0] applied to the data combination module 32 is "00", the data combiner 321, 322 outputs the combination of the compared test data of the comparators 311, 312 to the data output circuit 331. 332. When the instruction code CY[1:0] applied to the data combination module 32 is "10", the data combiner 321, 322 outputs the compared test data of the comparators 311, 312 to the data output circuit 331, 332. When the instruction code is applied to the data combination module 32 When CY[1:0] is "01", the data combiners 321, 322 output the compared test data of the comparators 312, 311 to the data output circuits 321, 322, respectively.
當使用具有一個輸入/輸出的探針卡時，探針卡的輸入/輸出可以與測試裝置3的其中一個輸入/輸出DQ1、DQ2電性連接，並且，藉由識別指令碼CY[1：0]，由具有一個輸入/輸出的探針卡探測到的比較器311或312的經比較的測試資料可以被識別。例如，若探針卡的輸入/輸出電性連接至測試裝置3的輸入/輸出DQ2且指令碼CY[1：0]為「10」，則比較器312的經比較的測試資料被探測到。此外，藉由將指令碼CY[1：0]改變為「01」，比較器311的經比較的測試資料被探測到。 When a probe card having an input/output is used, the input/output of the probe card can be electrically connected to one of the input/outputs DQ1 and DQ2 of the test device 3, and by recognizing the instruction code CY[1:0 ], the compared test data of the comparator 311 or 312 detected by the probe card having one input/output can be identified. For example, if the input/output of the probe card is electrically connected to the input/output DQ2 of the test device 3 and the command code CY[1:0] is "10", the compared test data of the comparator 312 is detected. Further, by changing the instruction code CY[1:0] to "01", the compared test data of the comparator 311 is detected.
當使用具有二個輸入/輸出的探針卡時，探針卡的二個輸入/輸出可以分別與測試裝置3的輸入/輸出DQ1、DQ2電性連接(或者，分別與測試裝置3的輸入/輸出DQ2、DQ1電性連接)，並且，藉由識別指令碼CY[1：0]，由具有二個輸入/輸出的探針卡探測的比較器311或312的經比較的測試資料可以被識別(或者，比較器312或311的經比較的測試資料可以被識別)。例如，若探針卡的二個輸入/輸出分別電性連接至測試裝置3的輸入/輸出DQ1、DQ2且指令碼CY[1：0]為「10」，則比較器311、312的經比較的測試資料分別被探針卡的二個輸入/輸出探測到。此外，藉由將指令碼CY[1：0]改變為「01」，比較器312、11的經比較的測試資料分別被探針卡的二個輸入/輸出探測到。 When a probe card having two inputs/outputs is used, the two inputs/outputs of the probe card can be electrically connected to the input/output DQ1, DQ2 of the test device 3, respectively (or, respectively, to the input of the test device 3 / Output DQ2, DQ1 are electrically connected), and by comparing the instruction code CY[1:0], the compared test data of the comparator 311 or 312 detected by the probe card having two inputs/outputs can be identified (Alternatively, the compared test data of comparator 312 or 311 can be identified). For example, if the two inputs/outputs of the probe card are electrically connected to the input/output DQ1, DQ2 of the test device 3, respectively, and the command code CY[1:0] is "10", the comparators 311, 312 are compared. The test data is detected by the two inputs/outputs of the probe card. Further, by changing the instruction code CY[1:0] to "01", the compared test data of the comparators 312, 11 are respectively detected by the two input/outputs of the probe card.
顯然地，測試裝置3為具有一個輸入/輸出及具有二個輸入/輸出的兩個不同探針卡提供了彈性。此外，對於具有一個輸入/輸出的探針卡，測 試裝置的其中一個輸入/輸出DQ1、DQ2可以根據情況因素(例如空間限制與噪音等)而被選擇以電性連接至探針卡的輸入/輸出。 Obviously, the test device 3 provides flexibility for two different probe cards having one input/output and two inputs/outputs. In addition, for probe cards with one input/output, measure One of the input/outputs DQ1, DQ2 of the test device can be selected to be electrically connected to the input/output of the probe card depending on situation factors such as space constraints and noise.
參照圖4，圖4為根據本發明的另一個實施例的測試系統中之測試裝置的方塊圖。測試裝置4包括多個比較器411、412、資料組合模組42、及多個資料輸出電路431~434，其中比較器411、412電性連接至資料組合模組42，資料組合模組42電性連接至資料輸出電路431~434。測試裝置4還包括分別電性連接至資料輸出電路431~434的四個輸入/輸出DQ1、DQ2、DQ3、DQ4。輸入/輸出DQ1、DQ2、DQ3、DQ4可用來被連接至具有四個輸入/輸出、二個輸入/輸出、或一個輸入/輸出的探針卡。 Referring to Figure 4, there is shown a block diagram of a test apparatus in a test system in accordance with another embodiment of the present invention. The test device 4 includes a plurality of comparators 411 and 412, a data combination module 42, and a plurality of data output circuits 431 to 434. The comparators 411 and 412 are electrically connected to the data combination module 42 and the data combination module 42 is electrically connected. The data is connected to the data output circuits 431 to 434. The test apparatus 4 further includes four input/outputs DQ1, DQ2, DQ3, and DQ4 electrically connected to the data output circuits 431 to 434, respectively. Input/output DQ1, DQ2, DQ3, DQ4 can be used to be connected to a probe card having four inputs/outputs, two inputs/outputs, or one input/output.
比較器411、412分別接收測試資料DG_1、DG_2，並且，比較器411、412將經比較的測試資料分別輸出到資料組合模組42。資料組合模組42包括四個資料組合器421~424，其中比較器411、412電性連接至所有資料組合器421~424，且資料組合器421~424電性連接至資料輸出電路431~434。資料組合器421~424進一步接收指令碼CY[1：0]。當指令碼CY[1：0]為「00」時，資料組合器421~424將比較器411、412的經比較的測試資料之組合輸出。當指令碼CY[1：0]為「10」時，資料組合器421、423將比較器411的經比較的測試資料輸出，且資料組合器422、424將比較器412的經比較的測試資料輸出。當指令碼CY[1：0]為「01」時，資料組合器421、423將比較器412的經比較的測試資料輸出，且資料組合器422、424將比較器411的經比較的測試資料輸出。 The comparators 411, 412 receive the test data DG_1, DG_2, respectively, and the comparators 411, 412 output the compared test data to the data combination module 42, respectively. The data combination module 42 includes four data combiners 421 to 424, wherein the comparators 411 and 412 are electrically connected to all of the data combiners 421 to 424, and the data combiners 421 to 424 are electrically connected to the data output circuits 431 to 434. . The data combiners 421-424 further receive the instruction code CY[1:0]. When the instruction code CY[1:0] is "00", the data combiners 421-424 output the combined combination of the test data of the comparators 411, 412. When the instruction code CY[1:0] is "10", the data combiner 421, 423 outputs the compared test data of the comparator 411, and the data combiner 422, 424 compares the compared test data of the comparator 412. Output. When the instruction code CY[1:0] is "01", the data combiner 421, 423 outputs the compared test data of the comparator 412, and the data combiner 422, 424 compares the compared test data of the comparator 411. Output.
參照圖5，圖5為根據本發明的一個實施例之摺疊探針卡測試系統的方塊圖。摺疊探針卡測試系統5包括半導體裝置51和摺疊探針卡52。摺疊探針卡52具有16個以彩虹連接方式(rainbow connection)排列的輸入/輸出。亦即，摺疊探針卡52的第j個輸入/輸出電性連接至摺疊探針卡52的第(j+8)個輸入/輸出，其中j是從1到8的整數。 Referring to Figure 5, there is shown a block diagram of a folded probe card testing system in accordance with one embodiment of the present invention. The folded probe card test system 5 includes a semiconductor device 51 and a folded probe card 52. The folded probe card 52 has 16 inputs/outputs arranged in a rainbow connection. That is, the jth input/output of the folded probe card 52 is electrically connected to the (j+8)th input/output of the folded probe card 52, where j is an integer from 1 to 8.
半導體裝置51可以具有晶片晶粒511及測試裝置512，其中晶片晶粒511之8個輸出端的其中兩個輸出端電性連接至測試裝置512的兩個輸入端。例如，測試裝置512接收測試資料DG_i、DG_(i+1)，其中i是選自1、3、5、7的整數(亦即，i是整數，且i+1不大於晶片晶粒511的輸出數量)。半導體裝置51可以是記憶體裝置，晶片晶粒511可以是記憶體晶粒，但本發明不限於此。測試裝置512的四個輸入/輸出DQi、DQ(i+1)、DQ(i+8)、DQ(i+9)分別電性連接至摺疊探針卡52的第j個、第(j+1)個、第(j+8)個、第(j+9)個輸入/輸出。 The semiconductor device 51 can have a wafer die 511 and a test device 512, wherein two of the eight output terminals of the die 511 are electrically connected to the two inputs of the test device 512. For example, test device 512 receives test data DG_i, DG_(i+1), where i is an integer selected from 1, 3, 5, 7 (ie, i is an integer and i+1 is no larger than wafer die 511) The number of outputs). The semiconductor device 51 may be a memory device, and the wafer die 511 may be a memory die, but the invention is not limited thereto. The four inputs/outputs DQi, DQ(i+1), DQ(i+8), and DQ(i+9) of the test device 512 are electrically connected to the jth and the (j+) of the folded probe card 52, respectively. 1), (j+8), (j+9) inputs/outputs.
測試裝置512可以包括用於接收測試資料DG_i、DG_(i+1)的2個比較器、具有4個資料組合器的資料組合模組及連接至4個輸出/輸入DQi、DQ(i+1)、DQ(i+8)、DQ(i+9)的資料輸出電路。進一步地，測試裝置512說明如下。 The testing device 512 can include two comparators for receiving test data DG_i, DG_(i+1), a data combination module with four data combiners, and a connection to four output/input DQi, DQ (i+1) ), DQ (i + 8), DQ (i + 9) data output circuit. Further, test device 512 is described below.
參照圖6，圖6為根據本發明的一個實施例的摺疊探針卡測試系統中之測試裝置的方塊圖。測試裝置6包括多個比較器611、612、在資料組合模組62中的4個資料組合器621~624及多個資料輸出電路631~634，其中比較器611、612電性連接至資料組合模組62，資料組合模組62電性連接至資 料輸出電路631~634。測試裝置6進一步分別包括四個輸入/輸出DQi、DQ(i+1)、DQ(i+8)、DQ(i+9)，輸入/輸出DQi、DQ(i+1)、DQ(i+8)、DQ(i+9)分別電性連接至摺疊探針卡的第j個、第(j+1)個、第(j+8)個、第(j+9)個輸入/輸出，且資料輸出電路631~634電性連接至輸入/輸出DQi、DQ(i+1)、DQ(i+8)、DQ(i+9)，其中i是選自1、3、5、7的整數。 Referring to Figure 6, Figure 6 is a block diagram of a test apparatus in a folded probe card test system in accordance with one embodiment of the present invention. The test device 6 includes a plurality of comparators 611 and 612, four data combiners 621-624 in the data combination module 62, and a plurality of data output circuits 631-634, wherein the comparators 611 and 612 are electrically connected to the data combination. Module 62, data combination module 62 is electrically connected to the capital Material output circuits 631~634. The test apparatus 6 further includes four input/output DQi, DQ(i+1), DQ(i+8), DQ(i+9), input/output DQi, DQ(i+1), DQ(i+, respectively). 8), DQ (i+9) is electrically connected to the jth, (j+1)th, (j+8)th, (j+9)th input/output of the folded probe card, respectively. And the data output circuits 631~634 are electrically connected to the input/output DQi, DQ(i+1), DQ(i+8), DQ(i+9), where i is selected from 1, 3, 5, and 7. Integer.
比較器611、612分別接收測試資料DG_i、DG_(i+1)且將經比較的測試資料輸出至資料組合模組62。資料組合模組62包括四個資料組合器621~624，其中比較器611、612電性連接至所有的資料組合器621~624且資料組合器621~624電性連接至資料輸出電路631~634。資料組合器621~624進一步接收指令碼CY[1：0]。當指令碼CY[1：0]為「00」時，資料組合器621~624將比較器611、612的經比較的測試資料之組合輸出。當指令碼CY[1：0]為「10」時，資料組合器621、623將比較器611的經比較的測試資料輸出，且資料組合器622、624將比較器612的經比較的測試資料輸出。當指令碼CY[1：0]為「01」時，資料組合器621、623將比較器612的經比較的測試資料輸出，且資料組合器622、624將比較器611的經比較的測試資料輸出。 The comparators 611, 612 receive the test data DG_i, DG_(i+1), respectively, and output the compared test data to the data combination module 62. The data combination module 62 includes four data combiners 621-624, wherein the comparators 611 and 612 are electrically connected to all of the data combiners 621-624 and the data combiners 621-624 are electrically connected to the data output circuits 631-634. . The data combiners 621-624 further receive the instruction code CY[1:0]. When the instruction code CY[1:0] is "00", the data combiners 621-624 output the combined combination of the test data of the comparators 611, 612. When the instruction code CY[1:0] is "10", the data combiner 621, 623 outputs the compared test data of the comparator 611, and the data combiner 622, 624 compares the compared test data of the comparator 612. Output. When the instruction code CY[1:0] is "01", the data combiner 621, 623 outputs the compared test data of the comparator 612, and the data combiner 622, 624 compares the compared test data of the comparator 611. Output.
參照圖7，圖7為根據本發明的另一個實施例的測試系統中之測試裝置的方塊圖。測試裝置7包括多個比較器711~718、資料組合模組72、及多個資料輸出電路731~734。測試裝置3例如具有四個輸入/輸出DQ1~DQ4，但本發明不限於此。比較器711~718電性連接到資料組合模組72，資料組合模組72電性連接到資料輸出電路731~734，資料輸出電路731~ 734分別電性連接到輸入/輸出DQ1~DQ4。輸入/輸出DQ1~DQ4可用來被連接至具有4個輸入/輸出、2個輸入/輸出或1個輸入/輸出的探針卡。 Referring to Figure 7, Figure 7 is a block diagram of a test apparatus in a test system in accordance with another embodiment of the present invention. The testing device 7 includes a plurality of comparators 711-718, a data combination module 72, and a plurality of data output circuits 731-734. The test apparatus 3 has, for example, four input/outputs DQ1 to DQ4, but the present invention is not limited thereto. The comparators 711-718 are electrically connected to the data combination module 72, and the data combination module 72 is electrically connected to the data output circuits 731-734, and the data output circuit 731~ 734 is electrically connected to input/output DQ1~DQ4, respectively. Input/output DQ1~DQ4 can be used to connect to a probe card with 4 inputs/outputs, 2 inputs/outputs, or 1 input/output.
資料組合模組72包括多個資料組合器721~724，其中資料組合器721~724電性連接至比較器711~718以接收比較器711~718的經比較的測試資料，且資料組合器721~724電性連接至資料輸出電路731~734。資料組合器721~724進一步接收指令碼CY[2：0]，且用以將比較器711~718的其中四者的經比較的測試資料分別輸出至資料輸出電路731~734。 The data combination module 72 includes a plurality of data combiners 721-724, wherein the data combiners 721-724 are electrically connected to the comparators 711-718 to receive the compared test data of the comparators 711-718, and the data combiner 721 ~ 724 is electrically connected to the data output circuits 731 to 734. The data combiners 721-724 further receive the instruction code CY[2:0], and output the compared test data of the four of the comparators 711-718 to the data output circuits 731-734, respectively.
例如，當指令碼CY[2：0]為「000」時，資料組合器721~724將比較器711、712、713、714的經比較的測試資料分別輸出。當指令碼CY[2：0]為「001」時，資料組合器721~724將比較器712、711、714、713的經比較的測試資料分別輸出。當指令碼CY[2：0]為「010」時，資料組合器721~724將比較器713、714、711、712的經比較的測試資料分別輸出。當指令碼CY[2：0]為「011」時，資料組合器721~724將比較器714、713、712、711的經比較的測試資料分別輸出。例如，當指令碼CY[2：0]為「100」時，資料組合器721~724將比較器715、716、717、718的經比較的測試資料分別輸出。當指令碼CY[2：0]為「101」時，資料組合器721~724將比較器716、715、718、717的經比較的測試資料分別輸出。當指令碼CY[2：0]為「110」時，資料組合器721~724將比較器717、718、715、716的經比較的測試資料分別輸出。當指令碼CY[2：0]為「111」時，資料組合器721~724將比較器718、717、716、715的經比較的測試資料分別輸出。 For example, when the instruction code CY[2:0] is "000", the data combiners 721-724 respectively output the compared test data of the comparators 711, 712, 713, 714. When the instruction code CY[2:0] is "001", the data combiners 721 to 724 respectively output the compared test data of the comparators 712, 711, 714, and 713. When the instruction code CY[2:0] is "010", the data combiners 721 to 724 respectively output the compared test data of the comparators 713, 714, 711, and 712. When the instruction code CY[2:0] is "011", the data combiners 721 to 724 respectively output the compared test data of the comparators 714, 713, 712, and 711. For example, when the instruction code CY[2:0] is "100", the data combiners 721-724 respectively output the compared test data of the comparators 715, 716, 717, 718. When the instruction code CY[2:0] is "101", the data combiners 721-724 respectively output the compared test data of the comparators 716, 715, 718, 717. When the instruction code CY[2:0] is "110", the data combiners 721 to 724 respectively output the compared test data of the comparators 717, 718, 715, and 716. When the instruction code CY[2:0] is "111", the data combiners 721 to 724 respectively output the compared test data of the comparators 718, 717, 716, and 715.
值得注意的是，若探針卡僅具有二個輸入/輸出，則探針卡的輸入/輸出可電性連接至測試裝置7的輸入/輸出DQ1與DQ4，且當被施加於資料組合器721~724的指令碼CY[2：0]分時地為「000」、「001」、「100」、「101」時，則所有比較器711~718的經比較的測試資料可被探測到。此外，當測試半導體記憶體時，指令碼CY[2：0]可為半導體記憶體之欄碼(column code)的一部份，其中欄碼的此部份可能不被使用於半導體記憶體。因此，可以不需要額外的碼產生器來產生指令碼CY[2：0]。 It should be noted that if the probe card has only two inputs/outputs, the input/output of the probe card can be electrically connected to the input/outputs DQ1 and DQ4 of the test device 7, and when applied to the data combiner 721 When the instruction code CY[2:0] of ~724 is "000", "001", "100", "101", the compared test data of all comparators 711~718 can be detected. In addition, when testing a semiconductor memory, the instruction code CY[2:0] may be part of the column code of the semiconductor memory, wherein this portion of the column code may not be used in the semiconductor memory. Therefore, an additional code generator may not be required to generate the instruction code CY[2:0].
總而言之，上述所提供的至少一種測試裝置可在壓縮測試模式下適用於具有一個及多個輸入/輸出(即，具有彈性以用於一個及多個輸入/輸出的多個不同探針卡)的多個測試系統，以及所提供的至少一種測試裝置可在一般測試模式下使用於摺疊探針卡測試系統。 In summary, at least one of the test devices provided above can be adapted for use in a compression test mode with one or more inputs/outputs (ie, multiple different probe cards that are resilient for one or more inputs/outputs). A plurality of test systems, as well as at least one of the test devices provided, can be used in a general test mode for a folded probe card test system.
雖然已經透過具體實施例描述了本發明，但是本發明所屬技術領域中具有通常知識者可以對其進行許多修改和變化而不脫離申請專利範圍中闡述的本發明的範圍和精神。 Although the present invention has been described in terms of specific embodiments, many modifications and changes can be made by those skilled in the art without departing from the scope and spirit of the invention as set forth in the appended claims.
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| TWM283182U (en) * | 2005-07-19 | 2005-12-11 | Signality System Engineering C | Assembly system of power meters |
| US20150162096A1 (en) * | 2013-12-06 | 2015-06-11 | Elite Semiconductor Memory Technology Inc. | Memory test system and method |
| TW201735536A (en) * | 2016-03-17 | 2017-10-01 | 晶豪科技股份有限公司 | Quaternary/ternary modulation selecting circuit |
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| US6094735A (en) * | 1998-08-03 | 2000-07-25 | Lucent Technologies Inc. | Speed-signaling testing for integrated circuits |
| TWM283182U (en) * | 2005-07-19 | 2005-12-11 | Signality System Engineering C | Assembly system of power meters |
| US20150162096A1 (en) * | 2013-12-06 | 2015-06-11 | Elite Semiconductor Memory Technology Inc. | Memory test system and method |
| TW201735536A (en) * | 2016-03-17 | 2017-10-01 | 晶豪科技股份有限公司 | Quaternary/ternary modulation selecting circuit |
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