TWI648813B - Process chamber, semiconductor manufacturing apparatus and calibration method thereof - Google Patents
Process chamber, semiconductor manufacturing apparatus and calibration method thereof Download PDFInfo
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Abstract
一種半導體製造設備，包含一處理腔室、一影像擷取裝置以及一控制裝置。處理腔室包含有一承載台以及一校正器。承載台是用以承載一半導體元件。校正器是連接於承載台，其中校正器具有複數個指標。影像擷取裝置是用以擷取關於半導體元件以及校正器之一影像，以產生一影像訊號。控制裝置是用以根據些指標以及影像訊號，決定半導體元件之中心是否對位於承載台之中心，並且當半導體元件之中心偏離承載台之中心時，控制裝置決定半導體元件與承載台之間的一偏移位移。 A semiconductor manufacturing apparatus includes a processing chamber, an image capturing device, and a control device. The processing chamber includes a carrier and a corrector. The carrier is used to carry a semiconductor component. The corrector is connected to the carrier, wherein the corrector has a plurality of indicators. The image capturing device is configured to capture an image of the semiconductor component and the corrector to generate an image signal. The control device is configured to determine whether the center of the semiconductor component is located at the center of the carrier according to the indicators and the image signal, and when the center of the semiconductor component is offset from the center of the carrier, the control device determines a relationship between the semiconductor component and the carrier Offset displacement.
Description
本發明係關於一種半導體製造設備，特別係關於一種利用校正治具來協助晶圓定位的半導體製造設備與校正方法。 The present invention relates to a semiconductor manufacturing apparatus, and more particularly to a semiconductor manufacturing apparatus and a correction method using a correction jig to assist wafer positioning.
近年來，半導體積體電路(semiconductor integrated circuits)經歷了指數級的成長。在積體電路材料以及設計上的技術進步下，產生了多個世代的積體電路，其中每一世代較前一世代具有更小更複雜的電路。在積體電路發展的過程中，當幾何尺寸(亦即，製程中所能產出的最小元件或者線)縮小時，功能密度(亦即，每一晶片區域所具有的互連裝置的數目)通常會增加。一般而言，此種尺寸縮小的製程可以提供增加生產效率以及降低製造成本的好處，然而，此種尺寸縮小的製程亦會增加製造與生產積體電路的複雜度。 In recent years, semiconductor integrated circuits have experienced exponential growth. In the advancement of integrated circuit materials and design techniques, multiple generations of integrated circuits have been produced, each of which has smaller and more complex circuits than the previous generation. In the development of an integrated circuit, when the geometric size (ie, the smallest component or line that can be produced in the process) is reduced, the functional density (ie, the number of interconnects per wafer area) It usually increases. In general, such a reduced size process can provide the benefits of increased production efficiency and reduced manufacturing costs. However, such reduced size processes also increase the complexity of manufacturing and manufacturing integrated circuits.
積體電路，是藉由一系列的半導體製造機台(簡稱為製造機台)處理晶圓而產出。每個製造機台通常是依據一預先定義或預先決定的製程程式(process recipe)，在晶圓上執行一積體電路製造工作(又稱為一製造流程(manufacturing process)或製程)，其中上述製程程式界定上述製程的各種參 數。積體電路製造通常使用需要多個在生產上和支援上相關的製造機台來完成多道製程，例如化學氣相沉積(chemical vapor deposition，CVD)製程、一物理氣相沉積(physical vapor deposition，PVD)製程、一蝕刻製程(etching)或離子化金屬電漿製程(Ionized Metal Plasma，IMP)等等。在這些製程中，例如物理氣相沉積製程，半導體晶圓是否與承載台確實定位會影響需要產生的薄膜的品質，當半導體晶圓與承載台產生偏移時，PVD製程產生的薄膜便會有缺陷(defect)，例如是薄膜厚度不均或是在特定位置的薄膜過厚等缺陷。 The integrated circuit is produced by processing a wafer by a series of semiconductor manufacturing machines (referred to as manufacturing machines). Each manufacturing machine typically performs an integrated circuit manufacturing operation (also referred to as a manufacturing process or process) on the wafer in accordance with a predefined or predetermined process recipe. The process program defines various parameters of the above process number. Integral circuit fabrication typically requires multiple manufacturing and support related manufacturing machines to perform multiple processes, such as chemical vapor deposition (CVD) processes, physical vapor deposition (physical vapor deposition). PVD) process, an etching process or an ionized metal plasma (IMP) process, and the like. In these processes, such as physical vapor deposition processes, whether the semiconductor wafer is properly positioned with the carrier will affect the quality of the film to be produced. When the semiconductor wafer and the carrier are offset, the film produced by the PVD process will have Defects, for example, are defects such as uneven film thickness or excessive thickness of a film at a specific position.
當發現晶圓上的薄膜產生缺陷時，造成缺陷的原因包含有定位誤差的可能。為了排除定位上的誤差，一般來說需要對半導體製造機台進行定位校正。定位校正可以是在發現缺陷時或是半導體製造機台定期保養時進行。 When a defect is found in the film on the wafer, the cause of the defect includes the possibility of positioning error. In order to eliminate the error in positioning, it is generally necessary to perform positioning correction on the semiconductor manufacturing machine. The positioning correction can be performed when a defect is found or when the semiconductor manufacturing machine is regularly maintained.
雖然現有的半導體製造機台已經足以達成定位校正的目的，但這些系統及校正方法仍不能在各方面令人滿意。 Although existing semiconductor manufacturing machines are sufficient for positioning correction, these systems and calibration methods are still not satisfactory in all respects.
本發明實施例提供一種處理腔室，包含一承載台以及一校正器。承載台是用以承載一半導體元件，且校正器是安裝於承載台，並且校正器具有複數個指標。半導體元件之一表面是設置於承載台與校正器上，並且指標是用以指示出半導體元件與承載台之間的一偏移位移。 Embodiments of the present invention provide a processing chamber including a carrier and a corrector. The carrier is used to carry a semiconductor component, and the corrector is mounted on the carrier, and the corrector has a plurality of indicators. One surface of the semiconductor component is disposed on the carrier and the corrector, and the index is used to indicate an offset displacement between the semiconductor component and the carrier.
本發明實施例提供一種半導體製造設備，包含一處理腔室、一影像擷取裝置以及一控制裝置。處理腔室包含有一承載台以及一校正器。承載台是用以承載一半導體元件。校 正器是連接於承載台，其中校正器具有複數個指標。影像擷取裝置是用以擷取關於半導體元件以及校正器之一影像以產生一影像訊號。控制裝置是用以根據些指標以及影像訊號，決定半導體元件之中心是否對位於承載台之中心，並且當半導體元件之中心偏離承載台之中心時，控制裝置決定半導體元件與承載台之間的一偏移位移。 Embodiments of the present invention provide a semiconductor manufacturing apparatus including a processing chamber, an image capturing device, and a control device. The processing chamber includes a carrier and a corrector. The carrier is used to carry a semiconductor component. school The positive device is connected to the carrier, wherein the corrector has a plurality of indicators. The image capturing device is configured to capture an image of the semiconductor component and the corrector to generate an image signal. The control device is configured to determine whether the center of the semiconductor component is located at the center of the carrier according to the indicators and the image signal, and when the center of the semiconductor component is offset from the center of the carrier, the control device determines a relationship between the semiconductor component and the carrier Offset displacement.
本發明實施例另提供一種半導體製造設備的校正方法，包含：運送一半導體元件至一承載台上，其中承載台上設置有一校正器，且校正器具有複數個指標；擷取關於半導體元件與校正器之一影像並對應地產生一影像訊號；根據指標以及影像訊號決定半導體元件之中心是否對位於承載台之中心；以及當半導體元件之中心偏離承載台之中心時，決定半導體元件與承載台之間的一偏移位移。 An embodiment of the present invention further provides a method for calibrating a semiconductor manufacturing apparatus, comprising: transporting a semiconductor component to a carrier, wherein a corrector is disposed on the carrier, and the corrector has a plurality of indexes; and the semiconductor component is corrected One of the images and correspondingly generates an image signal; determining whether the center of the semiconductor component is located at the center of the carrier according to the index and the image signal; and determining the semiconductor component and the carrier when the center of the semiconductor component is offset from the center of the carrier An offset displacement between.
100‧‧‧半導體製造設備 100‧‧‧Semiconductor manufacturing equipment
102‧‧‧第一移送腔室 102‧‧‧First transfer chamber
103‧‧‧第一機械手臂 103‧‧‧First robotic arm
104‧‧‧第二移送腔室 104‧‧‧Second transfer chamber
105‧‧‧第二機械手臂 105‧‧‧Second robotic arm
106‧‧‧中間裝載閘腔室 106‧‧‧Intermediate loading gate chamber
108‧‧‧中間裝載閘腔室 108‧‧‧Intermediate loading gate chamber
110‧‧‧裝載閘腔室 110‧‧‧Loading the lock chamber
112‧‧‧裝載閘腔室 112‧‧‧Loading lock chamber
114、116、118、120、122‧‧‧處理腔室 114, 116, 118, 120, 122‧‧‧ processing chamber
1141‧‧‧殼體 1141‧‧‧shell
1142‧‧‧承載台 1142‧‧‧Loading station
1142C‧‧‧卡合槽 1142C‧‧‧ snap groove
1142S‧‧‧承載面 1142S‧‧‧ bearing surface
1143‧‧‧補強板 1143‧‧‧ reinforcing plate
1144‧‧‧電源 1144‧‧‧Power supply
1145‧‧‧氣體入口 1145‧‧‧ gas inlet
1146‧‧‧氣體出口 1146‧‧‧ gas export
124、126、128、130‧‧‧處理腔室 124, 126, 128, 130‧‧ ‧ processing chamber
150‧‧‧控制裝置 150‧‧‧Control device
152‧‧‧處理器 152‧‧‧ processor
154‧‧‧儲存電路 154‧‧‧Storage circuit
160‧‧‧影像擷取裝置 160‧‧‧Image capture device
170‧‧‧標靶材料 170‧‧‧Target materials
180‧‧‧遮罩 180‧‧‧ mask
200‧‧‧半導體元件 200‧‧‧Semiconductor components
300‧‧‧校正器 300‧‧‧corrector
301‧‧‧指標 301‧‧ indicators
301A、301B、301C‧‧‧標示組 301A, 301B, 301C‧‧‧ marking group
302‧‧‧凸出結構 302‧‧‧ protruding structure
303‧‧‧指標 303‧‧ indicators
A1、A2、A3‧‧‧區域 A1, A2, A3‧‧‧ areas
Ad‧‧‧夾角 Ad‧‧‧ angle
AT‧‧‧原子 AT‧‧‧Atom
BR1、BR2、BR3、BR4‧‧‧標示條 BR1, BR2, BR3, BR4‧‧‧ marking strip
C‧‧‧中心 C‧‧‧ Center
d‧‧‧固定間隔 D‧‧‧fixed interval
Dm‧‧‧間隔距離 Dm‧‧‧ separation distance
Ds‧‧‧直徑 Ds‧‧‧ diameter
Dt‧‧‧外徑 Dt‧‧‧ OD
Dw‧‧‧直徑 Dw‧‧‧ diameter
P11、P12、P13‧‧‧標示點 P11, P12, P13‧‧‧ marked points
P21、P22、P23、P24‧‧‧標示點 P21, P22, P23, P24‧‧‧ marked points
P31、P32、P33‧‧‧標示點 P31, P32, P33‧‧‧ marked points
S100、S102、S104、S106、S108、S110、S112‧‧‧操作 S100, S102, S104, S106, S108, S110, S112‧‧‧ operation
第1圖為本發明一些實施例之一半導體製造設備之上視示意圖。 1 is a top plan view of a semiconductor manufacturing apparatus according to some embodiments of the present invention.
第2圖為本發明一些實施例之一處理腔室之示意圖。 Figure 2 is a schematic illustration of a processing chamber in accordance with some embodiments of the present invention.
第3圖為本發明實施例之承載台與一校正器之上視圖。 Figure 3 is a top plan view of a carrier and a corrector according to an embodiment of the present invention.
第4A圖為本發明實施例之半導體元件設置於承載台上之上視圖。 4A is a top view of the semiconductor device according to the embodiment of the present invention disposed on the carrier.
第4B圖為本發明實施例中第4A圖中區域之放大示意圖。 Fig. 4B is an enlarged schematic view showing a region in Fig. 4A in the embodiment of the present invention.
第5圖為本發明實施例中第4A圖之側視圖。 Fig. 5 is a side view of Fig. 4A in the embodiment of the invention.
第6A圖為本發明實施例的第4A圖中之半導體元件朝Y方 向偏移之示意圖。 6A is a view showing the semiconductor element in FIG. 4A facing the Y side according to an embodiment of the present invention; Schematic diagram of the offset.
第6B圖為本發明實施例的第6A圖中區域之放大示意圖。 Fig. 6B is an enlarged schematic view showing a region in Fig. 6A of the embodiment of the present invention.
第7A圖為本發明實施例中第4A圖中之半導體元件朝X方向偏移之示意圖。 Fig. 7A is a view showing the semiconductor element in Fig. 4A shifted in the X direction in the embodiment of the invention.
第7B圖為本發明實施例中第7A圖中區域之放大示意圖。 FIG. 7B is an enlarged schematic view showing a region in FIG. 7A in the embodiment of the present invention.
第8A圖為本發明實施例中的第4A圖中之半導體元件相對於X軸朝右上45度偏移之示意圖。 8A is a schematic view showing the semiconductor element in FIG. 4A offset to the upper right by 45 degrees with respect to the X axis in the embodiment of the present invention.
第8B圖為本發明實施例中第8A圖中區域之放大示意圖。 FIG. 8B is an enlarged schematic view showing a region in FIG. 8A in the embodiment of the present invention.
第9圖為本發明另一實施例中之校正器與半導體元件之部分示意圖。 Figure 9 is a partial schematic view of a corrector and a semiconductor device in another embodiment of the present invention.
第10圖為本發明實施例中之半導體元件朝Y軸方向偏移之示意圖。 Fig. 10 is a view showing the semiconductor element in the embodiment of the invention shifted in the Y-axis direction.
第11圖為本發明實施例中之半導體製造設備的校正方法的流程圖。 Figure 11 is a flow chart showing a method of correcting a semiconductor manufacturing apparatus in an embodiment of the present invention.
以下揭露之實施方式或實施例是用於說明或完成本發明之多種不同技術特徵，所描述之元件及配置方式的特定實施例是用於簡化說明本發明，使揭露得以更透徹且完整，以將本揭露之範圍完整地傳達予同領域熟悉此技術者。當然，本揭露也可以許多不同形式實施，而不局限於以下所述之實施例。 The embodiments and the embodiments disclosed below are intended to illustrate or complete the various features of the present invention. The specific embodiments of the described elements and arrangements are used to simplify the description of the present invention so that the disclosure can be more thorough and complete. The scope of the disclosure is fully conveyed to those skilled in the art. Of course, the disclosure may be embodied in many different forms and is not limited to the embodiments described below.
在下文中所使用的空間相關用詞，例如“在...下方”、“下方”、“較低的”、“上方”、“較高的”及類似的用詞，是為了便於描述圖示中一個元件或特徵與另一個(些)元件或特徵 之間的關係。除了在圖式中繪示的方位之外，這些空間相關用詞也意欲包含使用中或操作中的裝置之不同方位。例如，裝置可能被轉向不同方位(旋轉90度或其他方位)，而在此所使用的空間相關用詞也可依此相同解釋。此外，若實施例中敘述了一第一特徵形成於一第二特徵之上或上方，即表示其可能包含上述第一特徵與上述第二特徵是直接接觸的情況，亦可能包含了有附加特徵形成於上述第一特徵與上述第二特徵之間，而使得上述第一特徵與第二特徵未直接接觸的情況。 Spatially related terms as used hereinafter, such as "below", "below", "lower", "above", "higher" and the like, are used to facilitate the description of the illustration. One element or feature and another element(s) or feature The relationship between. In addition to the orientation depicted in the drawings, these spatially related terms are also intended to encompass different orientations of the device in use or operation. For example, the device may be turned to a different orientation (rotated 90 degrees or other orientation), and the spatially related terms used herein may also be interpreted the same. In addition, if a first feature is formed on or above a second feature in the embodiment, it may indicate that the first feature may be in direct contact with the second feature, and may also include additional features. Formed between the first feature and the second feature described above such that the first feature and the second feature are not in direct contact with each other.
以下不同實施例中可能重複使用相同的元件標號及/或文字，這些重複是為了簡化與清晰的目的，而非用以限定所討論的不同實施例及/或結構之間有特定的關係。另外，在圖式中，結構的形狀或厚度可能擴大，以簡化或便於標示。必須了解的是，未特別圖示或描述之元件可以本領域技術人士所熟知之各種形式存在。 The same component numbers and/or characters may be repeated in the following various embodiments, which are for the purpose of simplification and clarity, and are not intended to limit the specific relationship between the various embodiments and/or structures discussed. In addition, in the drawings, the shape or thickness of the structure may be enlarged to simplify or facilitate the marking. It is to be understood that elements not specifically shown or described may be in various forms well known to those skilled in the art.
請參考第1圖，第1圖為本發明一些實施例之一半導體製造設備100之上視示意圖。半導體製造設備100是可用以執行一半導體製造流程(簡稱為製程)。根據本發明一些實施例，半導體製造設備100可以為一化學氣相沉積(chemical vapor deposition，CVD)機台、一物理氣相沉積(physical vapor deposition，PVD)機台、一蝕刻(etching)機台、一熱氧化(thermal oxidation)機台、一離子佈植(ion implantation)機台、一化學機械研磨(chemical mechanical polishing，CMP)機台、一快速升溫退火(rapid thermal annealing，RTA)機台、一微影(photolithography)機台、一擴散(diffusion)機台、或者其他半 導體製造機台。 Please refer to FIG. 1. FIG. 1 is a top plan view of a semiconductor manufacturing apparatus 100 according to some embodiments of the present invention. The semiconductor manufacturing apparatus 100 is usable to perform a semiconductor manufacturing process (referred to as a process). According to some embodiments of the present invention, the semiconductor manufacturing apparatus 100 may be a chemical vapor deposition (CVD) machine, a physical vapor deposition (PVD) machine, and an etching machine. , a thermal oxidation machine, an ion implantation machine, a chemical mechanical polishing (CMP) machine, a rapid thermal annealing (RTA) machine, a photolithography machine, a diffusion machine, or other half Conductor manufacturing machine.
如第1圖所示，半導體製造設備100可包含兩個裝載閘腔室(loading chamber)110與112、一第一移送腔室(transfer chamber)102、一第二移送腔室104、兩個中間裝載閘腔室(central loading chamber)106與108、九個處理腔室(process chamber)114、116、118、120、122、124、126、128與130、一控制裝置150以及一影像擷取裝置160。其中，裝載閘腔室110、112是用以傳送一半導體元件(例如一半導體晶圓)進入及退出半導體製造設備100。如第1圖所圖示，裝載閘腔室110、112是連接於第二移送腔室104。控制裝置150可控制裝載閘腔室110、112以及第二移送腔室104選擇性地進行排空操作至真空壓力或至接近真空壓力，以使裝載閘腔室110、112以及第二移送腔室104之至少其中一者配置為一真空腔室，或者將裝載閘腔室110、112以及第二移送腔室104之至少其中一者之壓力改變至環境室壓力或接近環境室壓力，以促進半導體元件進入及退出半導體製造設備100。 As shown in FIG. 1, the semiconductor manufacturing apparatus 100 may include two loading chambers 110 and 112, a first transfer chamber 102, a second transfer chamber 104, and two intermediate portions. Loading chambers 106 and 108, nine process chambers 114, 116, 118, 120, 122, 124, 126, 128 and 130, a control device 150 and an image capture device 160. The loading gate chambers 110, 112 are used to transfer a semiconductor component (such as a semiconductor wafer) into and out of the semiconductor manufacturing apparatus 100. As illustrated in FIG. 1, the load lock chambers 110, 112 are coupled to the second transfer chamber 104. The control device 150 can control the load lock chambers 110, 112 and the second transfer chamber 104 to selectively perform an evacuation operation to a vacuum pressure or to a near vacuum pressure to load the lock chambers 110, 112 and the second transfer chamber At least one of 104 is configured as a vacuum chamber or changes the pressure of at least one of the load lock chambers 110, 112 and the second transfer chamber 104 to or near the ambient chamber pressure to promote semiconductor The component enters and exits the semiconductor manufacturing apparatus 100.
第二移送腔室104可連接於複數個處理腔室，舉例而言，如第1圖中所示，第二移送腔室104是連接於處理腔室124、126、128、130，但連接於第二移送腔室104之處理腔室的數目不限於此實施例。每一處理腔室124、126、128及130之每一者可經配置以執行特定半導體元件處理，例如原子層沈積(ALD)、化學氣相沈積(CVD)、物理氣相沈積(PVD)、蝕刻、預清洗、脫氣、退火、定向或其他半導體元件製程，但不限於此。 The second transfer chamber 104 can be coupled to a plurality of processing chambers. For example, as shown in FIG. 1, the second transfer chamber 104 is coupled to the processing chambers 124, 126, 128, 130 but is coupled to The number of processing chambers of the second transfer chamber 104 is not limited to this embodiment. Each of the processing chambers 124, 126, 128, and 130 can be configured to perform a particular semiconductor component processing, such as atomic layer deposition (ALD), chemical vapor deposition (CVD), physical vapor deposition (PVD), Etching, pre-cleaning, degassing, annealing, orientation, or other semiconductor component processes, but are not limited thereto.
第二移送腔室104可包含有一第二機械手臂105， 第二機械手臂105可將半導體元件由裝載閘腔室110、112移送至處理腔室124、126、128與130，且可由處理腔室124、126、128與130再將半導體元件移送至中間裝載閘腔室106、108。類似地，第一移送腔室102可包含一第一機械手臂103，第一機械手臂103可將半導體元件由中間裝載閘腔室106、108移送至處理腔室114、116、118、120與122，也可由處理腔室114、116、118、120與122將半導體元件移送至中間裝載閘腔室106、108。第一機械手臂103以及第二機械手臂105是包含於本發明實施例中之驅動機構。 The second transfer chamber 104 can include a second robot arm 105, The second robotic arm 105 can transfer semiconductor components from the load lock chambers 110, 112 to the processing chambers 124, 126, 128, and 130, and can transfer semiconductor components to the intermediate load by the processing chambers 124, 126, 128, and 130. Gate chambers 106, 108. Similarly, the first transfer chamber 102 can include a first robotic arm 103 that can transfer semiconductor components from the intermediate load lock chambers 106, 108 to the processing chambers 114, 116, 118, 120, and 122. The semiconductor components can also be transferred to the intermediate load lock chambers 106, 108 by the processing chambers 114, 116, 118, 120 and 122. The first robot arm 103 and the second robot arm 105 are drive mechanisms included in the embodiment of the present invention.
第一移送腔室102可連接於複數個處理腔室，舉例而言，如第1圖中所示，第一移送腔室102是連接於處理腔室114、116、118、120以及122，但連接於第一移送腔室102之處理腔室的數目不限於此實施例。類似於處理腔室124、126、128及130，處理腔室114、116、118、120以及122之每一者可經配置以執行特定半導體元件處理操作，例如原子層沈積(ALD)、化學氣相沈積(CVD)、物理氣相沈積(PVD)、蝕刻、預清洗、脫氣、退火、定向或其他半導體元件製程，但不限於此。 The first transfer chamber 102 can be coupled to a plurality of processing chambers. For example, as shown in FIG. 1, the first transfer chamber 102 is coupled to the processing chambers 114, 116, 118, 120, and 122, but The number of processing chambers connected to the first transfer chamber 102 is not limited to this embodiment. Similar to processing chambers 124, 126, 128, and 130, each of processing chambers 114, 116, 118, 120, and 122 can be configured to perform a particular semiconductor component processing operation, such as atomic layer deposition (ALD), chemical gas Phase deposition (CVD), physical vapor deposition (PVD), etching, pre-cleaning, degassing, annealing, orientation, or other semiconductor component processes, but are not limited thereto.
控制裝置150是可配置以控制半導體製造設備100之操作及/或半導體製造設備100中個別元件的操作。如第1圖所示，控制裝置150可包含一處理器152以及一儲存電路154。儲存電路154可為一隨機存取記憶體(Random Access Memory，RAM)、快閃記憶體(flash memory)、唯讀記憶體(Read-Only Memory，ROM)、可抹除可規化唯讀記憶體(EPROM)、電子抹除式可複寫唯讀記憶體(Electrically-Erasable Programmable Read-Only Memory，EEPROM)、暫存器、硬碟、可攜式硬碟、光碟唯讀記憶體(Compact Disc Read-Only Memory，CD-ROM)或在此領域習之技術中任何其它電腦可讀取之儲存媒體格式。其中，儲存電路154可儲存有用以控制各個腔室之製程的程式以及相關資料。 Control device 150 is configurable to control the operation of semiconductor fabrication device 100 and/or the operation of individual components in semiconductor fabrication device 100. As shown in FIG. 1, the control device 150 can include a processor 152 and a storage circuit 154. The storage circuit 154 can be a random access memory (RAM), a flash memory, a read-only memory (ROM), and an erasable programmable read-only memory. Body (EPROM), electronic erasable rewritable read-only memory (Electrically-Erasable Programmable Read-Only Memory (EEPROM), scratchpad, hard drive, portable hard drive, Compact Disc Read-Only Memory (CD-ROM), or any other computer in the field. Readable storage media format. The storage circuit 154 can store programs and related materials useful for controlling the processes of the various chambers.
再者，第一移送腔室102與處理腔室114、116、118、120、122之間皆可分別設置有一閘門(圖中未表示)，並且第二移送腔室104與處理腔室124、126、128與130之間皆可分別設置有一閘門(圖中未表示)。控制裝置150可控制各個閘門開啟或關閉，藉以調整各個處理腔室、第一移送腔室102與第二移送腔室104內的壓力狀態。舉例而言，控制裝置150可控制第一移送腔室102維持在真空狀態，控制第一移送腔室102與處理腔室114之間的閘門關閉，並控制處理腔室114的壓力為大氣壓力。意即，控制裝置150可單獨或共同控制各個處理腔室、第一移送腔室102與第二移送腔室104內的壓力狀態。 Furthermore, a gate (not shown) may be respectively disposed between the first transfer chamber 102 and the processing chambers 114, 116, 118, 120, 122, and the second transfer chamber 104 and the processing chamber 124, A gate (not shown) may be respectively disposed between 126, 128 and 130. The control device 150 can control the opening or closing of the respective gates to adjust the pressure states in the respective processing chambers, the first transfer chamber 102 and the second transfer chamber 104. For example, the control device 150 can control the first transfer chamber 102 to remain in a vacuum state, control the closing of the gate between the first transfer chamber 102 and the processing chamber 114, and control the pressure of the processing chamber 114 to atmospheric pressure. That is, the control device 150 can individually or collectively control the pressure conditions within the various processing chambers, the first transfer chamber 102, and the second transfer chamber 104.
影像擷取裝置160可為一照相裝置或一錄影裝置，電性連接於控制裝置150，並且影像擷取裝置160是配置以擷取該些處理腔室內的影像並產生一影像訊號，並將所述影像訊號傳送給控制裝置150。半導體製造設備100可包含一或多個影像擷取裝置160，舉例而言，半導體製造設備100包含與該些處理腔室相同數量之影像擷取裝置160，分別設置於該些處理腔室，用以監控並擷取該些處理腔室內之影像。 The image capturing device 160 can be a camera device or a video device, and is electrically connected to the control device 150. The image capturing device 160 is configured to capture images in the processing chambers and generate an image signal. The image signal is transmitted to the control device 150. The semiconductor manufacturing device 100 can include one or more image capturing devices 160. For example, the semiconductor manufacturing device 100 includes the same number of image capturing devices 160 as the processing chambers, respectively disposed in the processing chambers. To monitor and capture images of the processing chambers.
請參考第2圖，第2圖為本發明實施例之一處理腔室114之示意圖。於此實施例中，處理腔室114是用以進行物理 氣相沈積製程，但不限於此。其中，如第2圖所示，處理腔室114內具有一殼體1141、一承載台1142、一標靶材料170、一補強板1143(bucking plate)、一電源1144以及一半導體元件200。殼體1141具有一氣體入口1145以及一氣體出口1146，氣體入口1145是用以導入所需的氣體至殼體1141內，而氣體出口1146是用以將殼體1141內的氣體排出以使殼體1141內形成真空狀態。 Please refer to FIG. 2, which is a schematic diagram of a processing chamber 114 according to an embodiment of the present invention. In this embodiment, the processing chamber 114 is used to perform physics The vapor deposition process is, but is not limited to. As shown in FIG. 2, the processing chamber 114 has a housing 1141, a loading platform 1142, a target material 170, a bucking plate, a power source 1144, and a semiconductor component 200. The housing 1141 has a gas inlet 1145 for introducing a desired gas into the housing 1141, and a gas outlet 1146 for discharging the gas inside the housing 1141 to make the housing A vacuum is formed in 1141.
如第2圖所示，半導體元件200(例如晶圓)是設置在承載台1142上，而標靶材料170是設置於補強板1143上。電源1144是電性連接於補強板1143與承載台1142，其中電源1144的正極是施加於承載台1142，而電源1144的負極是施加於補強板1143。首先，控制裝置150可控制殼體1141內的氣體由氣體出口1146排出，使得殼體1141內形成低壓狀態或真空狀態。接著，導入氣體(例如氬氣)並激發成氬離子(Ar+)後，氬離子受到電源1144所產生的電場的驅動而衝撞標靶材料170。當標靶材料170受到氬離子衝撞後，標靶材料170中的原子AT會被撞出並附著於半導體元件200上(如第2圖中箭頭所示)，藉以於半導體元件200上形成一薄膜。其中，標靶材料170可為鈷(Co)、鋁(Al)、鈦(Ti)等材料，但不限於此。 As shown in FIG. 2, the semiconductor device 200 (for example, a wafer) is disposed on the carrier 1142, and the target material 170 is disposed on the reinforcing plate 1143. The power source 1144 is electrically connected to the reinforcing plate 1143 and the carrying table 1142. The positive pole of the power source 1144 is applied to the carrying platform 1142, and the negative pole of the power source 1144 is applied to the reinforcing plate 1143. First, the control device 150 can control the gas in the housing 1141 to be exhausted by the gas outlet 1146 such that a low pressure state or a vacuum state is formed in the housing 1141. Next, after introducing a gas (for example, argon gas) and exciting it into argon ions (Ar+), the argon ions are driven by the electric field generated by the power source 1144 to collide with the target material 170. When the target material 170 is struck by argon ions, the atoms AT in the target material 170 are knocked out and attached to the semiconductor device 200 (as indicated by the arrow in FIG. 2), thereby forming a thin film on the semiconductor device 200. . The target material 170 may be a material such as cobalt (Co), aluminum (Al), or titanium (Ti), but is not limited thereto.
值得注意的是，為了避免標靶材料170的原子AT附著於承載台1142上而增加清潔的困難，承載台1142上可套設有一遮罩180，用以遮蔽承載台1142。 It should be noted that in order to avoid the difficulty of cleaning the atom AT of the target material 170 attached to the loading platform 1142, a cover 180 may be disposed on the loading platform 1142 to shield the loading platform 1142.
接著請再參考第1圖，一般而言，當半導體製造設備100進行各種製程時，例如要將半導體元件200放置於處理腔室114、116、118、120、122時，處理腔室114、116、118、120、 122以及第一移送腔室102可進行排氣以形成真空狀態。但將該些處理腔室、第一移送腔室102或第二移送腔室104轉換為真空狀態必須要耗費大量的時間，例如需要8至12個小時才能達到所需的真空狀態。另外，半導體製造設備100的處理腔室114、116、118、120、122以及第一移送腔室102進行多次製程後，處理腔室(例如處理腔室114)內的承載台1142或者第一機械手臂103可能會因為其內部機械元件多次使用而產生的誤差，使得當第一機械手臂103將半導體元件200移送至承載台1142上時，半導體元件200無法準確地定位於承載台1142(例如半導體元件200的中心偏離承載台1142的中心)。當半導體元件200無法準確地定位於承載台1142時，前述利用氬氣與標靶材料170於半導體元件200上的薄膜就可能會產生沈積不良與厚度不均勻等缺陷(defect)，進而影響後續其餘半導體製程的良率。 Referring now again to FIG. 1, in general, when the semiconductor fabrication apparatus 100 is performing various processes, such as when the semiconductor component 200 is to be placed in the processing chambers 114, 116, 118, 120, 122, the processing chambers 114, 116 , 118, 120, The first transfer chamber 102 and the first transfer chamber 102 are vented to form a vacuum state. However, it takes a lot of time to convert the processing chambers, the first transfer chamber 102, or the second transfer chamber 104 to a vacuum state, for example, 8 to 12 hours is required to achieve the desired vacuum state. In addition, after the processing chambers 114, 116, 118, 120, 122 of the semiconductor manufacturing apparatus 100 and the first transfer chamber 102 are subjected to multiple processes, the carrier 1142 or the first in the processing chamber (eg, the processing chamber 114) The robot arm 103 may be subject to errors due to its multiple use of internal mechanical components such that when the first robot arm 103 transfers the semiconductor component 200 onto the carrier 1142, the semiconductor component 200 cannot be accurately positioned on the carrier 1142 (eg, The center of the semiconductor component 200 is offset from the center of the carrier 1142). When the semiconductor device 200 cannot be accurately positioned on the carrier 1142, the film using the argon gas and the target material 170 on the semiconductor device 200 may cause defects such as poor deposition and thickness unevenness, thereby affecting the rest. The yield of semiconductor processes.
因此，為了避免前述定位偏移造成薄膜的缺陷的問題產生，半導體製造設備100一般會進行校正程序。進行校正程序的時間點可以在半導體製造設備100的預防性保養時，或者是在發現某一處理腔室中處理的半導體元件200有缺陷時。在某些實施例的校正程序是利用一對位治具來協助機械手臂(如第一機械手臂103)與承載台1142來進行對位校正。 Therefore, in order to avoid the problem of defects in the film caused by the aforementioned positioning shift, the semiconductor manufacturing apparatus 100 generally performs a calibration procedure. The timing at which the calibration procedure is performed may be at the time of preventive maintenance of the semiconductor manufacturing apparatus 100, or when it is found that the semiconductor component 200 processed in a certain processing chamber is defective. The calibration procedure in certain embodiments utilizes a pair of jigs to assist the robotic arm (e.g., first robot arm 103) with the carrier 1142 for alignment correction.
請參考第3圖，第3圖為本發明一實施例之承載台1142與一校正器300之上視圖。本發明一實施例中提供一校正器300，安裝於承載台1142上，以改善校正程序所需的時間。要注意的是，校正器300也可安裝於其餘處理腔室中的承載 台，不限於此實施例。於此實施例中，校正器300的安裝位置與第2圖中之遮罩180位置相同，當要進行校正程序時，便可將遮罩180替換為校正器300。具體而言，校正器300可為耐熱之材質製成，例如但不限於塑鋼材質，並且校正器300上可具有複數個指標301。其中，相鄰的兩個指標與承載台1142之中心所夾的角度皆相同。如第3圖所示，校正器300大致上具有一圓形(或環狀)結構，並且校正器300具有8個指標301。其中，校正器300與承載台1142具有一中心C，並且相鄰的兩個指標301與中心C的連線可形成有一夾角Ad。於此實施例中，夾角Ad實質上為45度。另外，值得注意的是，相反的兩個指標301(例如第3圖中最上方與最下方的指標)之間可具有一間隔距離Dm，並且此兩個相反的指標301與中心C的連線形成的夾角Ad為180度。 Please refer to FIG. 3, which is a top view of the carrier 1142 and a corrector 300 according to an embodiment of the present invention. In one embodiment of the invention, a corrector 300 is provided for mounting on the carrier 1142 to improve the time required for the calibration procedure. It should be noted that the corrector 300 can also be mounted in the rest of the processing chamber. The station is not limited to this embodiment. In this embodiment, the position of the corrector 300 is the same as that of the mask 180 in FIG. 2. When the calibration procedure is to be performed, the mask 180 can be replaced with the corrector 300. In particular, the corrector 300 can be made of a heat resistant material such as, but not limited to, a plastic steel material, and the corrector 300 can have a plurality of indicators 301 thereon. The two adjacent indicators are the same angles as the center of the carrying platform 1142. As shown in FIG. 3, the corrector 300 has substantially a circular (or annular) configuration, and the corrector 300 has eight indicators 301. The corrector 300 and the carrying platform 1142 have a center C, and the connecting lines of the two adjacent indicators 301 and the center C may form an angle Ad. In this embodiment, the included angle Ad is substantially 45 degrees. In addition, it is worth noting that the opposite two indicators 301 (for example, the uppermost and lowermost indicators in FIG. 3) may have a separation distance Dm, and the two opposite indicators 301 are connected to the center C. The angle Ad formed is 180 degrees.
要注意的是，指標301的數目與夾角Ad的大小不限於此實施例。舉例來說，於某些實施例中，校正器300可包含六個指標301，並且夾角Ad實質上為60度。於某些實施例中，校正器300可包含十二個指標301，並且夾角Ad實質上為30度。 It is to be noted that the number of the indicators 301 and the size of the included angle Ad are not limited to this embodiment. For example, in some embodiments, the corrector 300 can include six indicators 301 and the included angle Ad is substantially 60 degrees. In some embodiments, the corrector 300 can include twelve indicators 301 and the included angle Ad is substantially 30 degrees.
再者，承載台1142形成有複數個卡合槽1142C，並且校正器300具有對應於該些卡合槽1142C之複數個凸出結構302，該些凸出結構302是配置以卡合於該些卡合槽1142C，以使校正器300安裝於承載台1142。值得注意的是，承載台1142與校正器300的形狀不限於此實施例，只要能夠對應地安裝於承載台1142之校正器300皆符合本發明實施例之範疇。 Furthermore, the carrier 1142 is formed with a plurality of engaging grooves 1142C, and the correcting device 300 has a plurality of protruding structures 302 corresponding to the engaging grooves 1142C, and the protruding structures 302 are configured to be engaged with the plurality of protruding structures 302. The slot 1142C is engaged to mount the corrector 300 to the carrier 1142. It should be noted that the shape of the carrier 1142 and the corrector 300 is not limited to this embodiment, as long as the corrector 300 that can be correspondingly mounted to the carrier 1142 is in accordance with the scope of the embodiments of the present invention.
請參考第4A圖、第4B圖與第5圖，第4A圖為本發 明一些實施例之半導體元件200設置於承載台1142上之上視圖，第4B圖為本發明一些實施例中的第4A圖中區域A1之放大示意圖，第5圖為本發明一些實施例中的第4A圖之側視圖。於第4A圖中，半導體元件200是完全對位於承載台1142(例如半導體元件200的中心對位於承載台1142之中心C)。其中，校正器300具有一外徑Dt，半導體元件200具有一直徑Dw，直徑Dw實質上是相等於前述相對的兩個指標301之間的間隔距離Dm，並且外徑Dt是大於直徑Dw。 Please refer to Figure 4A, Figure 4B and Figure 5, Figure 4A is the current issue. The semiconductor device 200 of some embodiments is disposed on the upper surface of the carrying platform 1142. FIG. 4B is an enlarged schematic view of the area A1 in FIG. 4A in some embodiments of the present invention, and FIG. 5 is a schematic view of the embodiment of the present invention. Side view of Figure 4A. In FIG. 4A, the semiconductor component 200 is completely opposite to the carrier 1142 (eg, the center of the semiconductor component 200 is located at the center C of the carrier 1142). Wherein, the corrector 300 has an outer diameter Dt, and the semiconductor element 200 has a diameter Dw which is substantially equal to the separation distance Dm between the aforementioned two opposite indices 301, and the outer diameter Dt is greater than the diameter Dw.
如第4B圖所示，指標301可具有複數個標示組，並且每一標示組具有複數個標示點。於此實施例中，指標301包含三個標示組301A、301B與301C，標示組301A具有三個標示點P11、P12與P13，標示組301B具有四個標示點P21、P22、P23與P24，標示組301C具有三個標示點P31、P32與P33。其中，同一標示組內相鄰之兩個標示點之間可具有一固定間隔d。舉例而言，標示點P11與標示點P12、標示點P12與標示點P13、標示點21與標示點P22之間以及標示點P32與標示點P33之間皆具有固定間隔d。在某些實施例中，間隔距離可為1mm，但不限於此。 As shown in FIG. 4B, the indicator 301 can have a plurality of flag groups, and each of the flag groups has a plurality of flag points. In this embodiment, the indicator 301 includes three label groups 301A, 301B, and 301C, the label group 301A has three label points P11, P12, and P13, and the label group 301B has four label points P21, P22, P23, and P24. Group 301C has three marked points P31, P32 and P33. Wherein, there may be a fixed interval d between two adjacent marked points in the same marked group. For example, there is a fixed interval d between the marked point P11 and the marked point P12, the marked point P12 and the marked point P13, the marked point 21 and the marked point P22, and between the marked point P32 and the marked point P33. In some embodiments, the separation distance may be 1 mm, but is not limited thereto.
當半導體元件200之中心如第4A圖所示對位於承載台1142之中心C時，校正器300上所有指標301內最靠近半導體元件200之該些標示點由垂直於半導體元件200之方向(Z軸方向)觀看時是對齊於半導體元件200之邊緣。意即如第4B圖所示，標示點P11、P21以及P31會對齊於半導體元件200之邊緣。於此實施例中，每一標示點可以由一發光二極體實現，但 不限於此實施方式。舉例而言，每一標示點也可由耐熱之塗料實現。 When the center of the semiconductor element 200 is located at the center C of the stage 1142 as shown in FIG. 4A, the marked points in all the indicators 301 on the corrector 300 closest to the semiconductor element 200 are perpendicular to the direction of the semiconductor element 200 (Z). The axial direction is aligned with the edge of the semiconductor component 200 when viewed. That is, as shown in FIG. 4B, the marked points P11, P21, and P31 are aligned with the edges of the semiconductor element 200. In this embodiment, each marked point can be implemented by a light emitting diode, but Not limited to this embodiment. For example, each marked point can also be achieved by a heat resistant coating.
值得注意的是，當機械手臂(例如第二機械手臂105)將半導體元件200移送至處理腔室114內時，影像擷取裝置160可擷取一影像如第4A圖所示，並將所述影像轉換為一影像訊號。接著，控制裝置150之處理器152便可根據所述影像訊號以及指標301來判斷半導體元件200是否產生偏移。由於第4A圖中半導體元件200是完全對位於承載台1142，因此控制裝置150會根據影像訊號得知所有指標301中最靠近半導體元件200的標示點皆對齊於半導體元件200的邊緣。意即控制裝置150可以判斷出半導體元件200沒有產生偏移。 It should be noted that when the robot arm (for example, the second robot arm 105) transfers the semiconductor component 200 into the processing chamber 114, the image capturing device 160 can capture an image as shown in FIG. 4A and The image is converted into an image signal. Then, the processor 152 of the control device 150 can determine whether the semiconductor device 200 is offset according to the image signal and the index 301. Since the semiconductor device 200 in FIG. 4A is completely opposite to the carrier 1142, the control device 150 knows that the marked points of all the indicators 301 closest to the semiconductor device 200 are aligned with the edge of the semiconductor device 200 according to the image signal. That is, the control device 150 can judge that the semiconductor element 200 does not generate an offset.
另外，如第5圖所示，承載台1142具有一承載面1142S，承載面1142S是用以承載半導體元件200的表面。承載面1142S具有一直徑Ds，並且承載面1142S的直徑Ds是小於半導體元件200之直徑Dw。於某些實施例中，承載面1142S的直徑Ds是可大於半導體元件200之直徑Dw。然而，要注意的是，不論承載面1142S的直徑Ds是大於或小於半導體元件200之直徑Dw，校正器300之外徑Dt是大於半導體元件200之直徑Dw。 In addition, as shown in FIG. 5, the carrier 1142 has a carrying surface 1142S which is a surface for carrying the semiconductor component 200. The bearing surface 1142S has a diameter Ds, and the diameter Ds of the bearing surface 1142S is smaller than the diameter Dw of the semiconductor element 200. In some embodiments, the diameter Ds of the bearing surface 1142S can be greater than the diameter Dw of the semiconductor component 200. However, it is to be noted that the outer diameter Dt of the corrector 300 is larger than the diameter Dw of the semiconductor element 200 regardless of the diameter Ds of the bearing surface 1142S being larger or smaller than the diameter Dw of the semiconductor element 200.
請參考第6A圖與第6B圖，第6A圖為本發明某些實施例中第4A圖中之半導體元件200朝Y方向偏移之示意圖，並且第6B圖為本揭露第6A圖中區域A1之放大示意圖。當機械手臂(例如第二機械手臂105)將半導體元件200移送至處理腔室(例如為處理腔室114)內時，影像擷取裝置160可擷取一影像，如第6A圖所示。控制裝置150之處理器152便可根據所述影 像訊號來判斷半導體元件200是否產生偏移。由於第6A圖中半導體元件200朝Y軸方向偏移，因此控制裝置150會根據所述影像訊號以及透過關於影像處理的演算法，判斷出第6A圖中最上方的指標301內的標示點P11、P21與P31被半導體元件200蓋住(如第6B圖所示)，並且標示點P12、P22與P32是對齊於半導體元件200的邊緣。因此，控制裝置150便可得知半導體元件200是朝Y軸方向偏移了一個固定間隔d。意即，半導體元件200與承載台1142之間的偏移位移為一個固定間隔d。 Please refer to FIG. 6A and FIG. 6B , FIG. 6A is a schematic diagram of the semiconductor element 200 in FIG. 4A offset in the Y direction according to some embodiments of the present invention, and FIG. 6B is the area A1 in FIG. 6A of the disclosure. Magnified schematic. When the robotic arm (e.g., the second robotic arm 105) transfers the semiconductor component 200 into the processing chamber (e.g., the processing chamber 114), the image capturing device 160 can capture an image, as shown in FIG. 6A. The processor 152 of the control device 150 can be based on the shadow The signal is used to judge whether or not the semiconductor element 200 is shifted. Since the semiconductor device 200 is shifted in the Y-axis direction in FIG. 6A, the control device 150 determines the marked point P11 in the uppermost index 301 in FIG. 6A according to the image signal and the algorithm for image processing. P21 and P31 are covered by the semiconductor element 200 (as shown in FIG. 6B), and the marked points P12, P22 and P32 are aligned with the edge of the semiconductor element 200. Therefore, the control device 150 can know that the semiconductor element 200 is shifted by a fixed interval d in the Y-axis direction. That is, the offset displacement between the semiconductor component 200 and the carrier 1142 is a fixed interval d.
接著，控制裝置150可根據該偏移位移對第二機械手臂105的參數進行調整。在某些實施例中，控制裝置150內的儲存電路154可儲存有一參考資料，所述參考資料包含有複數個第二機械手臂105的移動參數與實際移動位移之間的對應表。因此，控制裝置150便可根據所述對應表以及前述的偏移位移來調整第二機械手臂105的移動距離。於此實施例中，控制裝置150可控制第二機械手臂105沿著Y軸方向進入處理腔室122的移動距離為一調整後移動距離。在一實施例中，所述調整後移動距離為調整前之移動距離減去固定間隔d。經過這樣的參數調整後，接下來第二機械手臂105移送至處理腔室122內的其餘半導體元件200便可如第4A圖所示完全對位於承載台1142。據此，半導體製造設備100便完成對處理腔室114的校正程序。 Next, the control device 150 can adjust the parameters of the second robot arm 105 according to the offset displacement. In some embodiments, the storage circuit 154 within the control device 150 can store a reference material containing a correspondence table between the movement parameters of the plurality of second robot arms 105 and the actual movement displacement. Therefore, the control device 150 can adjust the moving distance of the second robot arm 105 according to the correspondence table and the aforementioned offset displacement. In this embodiment, the control device 150 can control the moving distance of the second robot arm 105 into the processing chamber 122 along the Y-axis direction to be an adjusted moving distance. In an embodiment, the adjusted moving distance is a moving distance before the adjustment minus a fixed interval d. After such parameter adjustment, the remaining semiconductor component 200 transferred by the second robot arm 105 to the processing chamber 122 can be completely positioned on the carrier 1142 as shown in FIG. 4A. Accordingly, the semiconductor manufacturing apparatus 100 completes the calibration process for the processing chamber 114.
請參考第7A圖與第7B圖，第7A圖為本發明實施例的第4A圖中之半導體元件200朝X方向偏移之示意圖，並且第7B圖為本發明實施例中第7A圖中區域A2之放大示意圖。當機 械手臂(例如第二機械手臂105)將半導體元件200移送至處理腔室(例如為處理腔室114)內時，影像擷取裝置160可擷取一影像如第7A圖所示。控制裝置150之處理器152便可根據所述影像訊號來判斷半導體元件200是否產生偏移。由於第7A圖中半導體元件200朝X軸方向偏移，因此控制裝置150會根據所述影像訊號以及透過關於影像處理的演算法，判斷出第7A圖中最右側的指標301內的標示點P11、P21與P31被半導體元件200蓋住(如第7B圖所示)，並且標示點P12、P22與P32是對齊於半導體元件200的邊緣。因此，控制裝置150便可得知半導體元件200是朝X軸方向偏移了固定間隔d。意即，半導體元件200與承載台1142之間的偏移位移為一個固定間隔d。 Please refer to FIG. 7A and FIG. 7B. FIG. 7A is a schematic diagram showing the semiconductor element 200 in FIG. 4A offset in the X direction according to an embodiment of the present invention, and FIG. 7B is a region in FIG. 7A in the embodiment of the present invention. A magnified view of A2. Fake When the arm (e.g., the second robot arm 105) transfers the semiconductor component 200 into the processing chamber (e.g., the processing chamber 114), the image capturing device 160 can capture an image as shown in FIG. 7A. The processor 152 of the control device 150 can determine whether the semiconductor device 200 is offset according to the image signal. Since the semiconductor device 200 is shifted in the X-axis direction in FIG. 7A, the control device 150 determines the marked point P11 in the rightmost index 301 in FIG. 7A according to the image signal and the algorithm for image processing. P21 and P31 are covered by the semiconductor element 200 (as shown in FIG. 7B), and the marked points P12, P22, and P32 are aligned with the edge of the semiconductor element 200. Therefore, the control device 150 can know that the semiconductor element 200 is shifted by a fixed interval d in the X-axis direction. That is, the offset displacement between the semiconductor component 200 and the carrier 1142 is a fixed interval d.
接著，控制裝置150可根據該偏移位移對第二機械手臂105的參數進行調整。舉例而言，控制裝置150便根據所述對應表以及前述的偏移位移來調整第二機械手臂105的轉動角度。於此實施例中，控制裝置150可控制第二機械手臂105進入處理腔室114的轉動角度。經過轉動角度的參數調整後，接下來第二機械手臂105移送至處理腔室114內的半導體元件200便可如第4A圖所示完全對位於承載台1142。據此，半導體製造設備100便完成對處理腔室114的校正程序。 Next, the control device 150 can adjust the parameters of the second robot arm 105 according to the offset displacement. For example, the control device 150 adjusts the rotation angle of the second robot arm 105 according to the correspondence table and the aforementioned offset displacement. In this embodiment, the control device 150 can control the angle of rotation of the second robot arm 105 into the processing chamber 114. After the parameter adjustment of the rotation angle, the semiconductor component 200 that is then transferred to the processing chamber 114 by the second robot arm 105 can be completely positioned on the carrier table 1142 as shown in FIG. 4A. Accordingly, the semiconductor manufacturing apparatus 100 completes the calibration process for the processing chamber 114.
請參考第8A圖與第8B圖，第8A圖為本發明實施例的第4A圖中之半導體元件200相對於X軸朝右上45度偏移之示意圖，並且第8B圖為本發明實施例的第8A圖中區域A3之放大示意圖。當機械手臂(例如第二機械手臂105)將半導體元件200移送至處理腔室(例如為處理腔室114)內時，影像擷取裝 置160可擷取一影像如第8A圖所示。控制裝置150之處理器152便可根據所述影像訊號來判斷半導體元件200是否產生偏移。由於第8A圖中半導體元件200朝右上方偏移，因此控制裝置150會根據所述影像訊號以及透過關於影像處理的演算法，判斷出第8A圖中右上角的指標301內的標示點P11、P21與P31被半導體元件200蓋住(如第8B圖所示)，並且標示點P12、P22與P32是對齊於半導體元件200的邊緣。因此，控制裝置150便可得知半導體元件200是相對於X軸朝右上45度偏移了固定間隔d。意即，半導體元件200與承載台1142之間的偏移位移為固定間隔d。 Please refer to FIGS. 8A and 8B. FIG. 8A is a schematic diagram showing the semiconductor element 200 in FIG. 4A offset to the upper right by 45 degrees with respect to the X axis according to an embodiment of the present invention, and FIG. 8B is an embodiment of the present invention. An enlarged schematic view of the area A3 in Fig. 8A. When the robot arm (eg, the second robot arm 105) transfers the semiconductor component 200 into the processing chamber (eg, the processing chamber 114), the image capture device Setting 160 can capture an image as shown in Fig. 8A. The processor 152 of the control device 150 can determine whether the semiconductor device 200 is offset according to the image signal. Since the semiconductor device 200 is shifted to the upper right in FIG. 8A, the control device 150 determines the marked point P11 in the index 301 in the upper right corner of FIG. 8A according to the image signal and the algorithm for image processing. P21 and P31 are covered by the semiconductor element 200 (as shown in FIG. 8B), and the marked points P12, P22 and P32 are aligned with the edge of the semiconductor element 200. Therefore, the control device 150 can know that the semiconductor element 200 is shifted by a fixed interval d from the X-axis by 45 degrees to the upper right. That is, the offset displacement between the semiconductor component 200 and the carrier 1142 is a fixed interval d.
接著，控制裝置150可根據該偏移位移對第二機械手臂105的參數進行調整。舉例而言，控制裝置150便根據所述對應表以及前述的偏移位移來調整第二機械手臂105的進入處理腔室114的移動距離與轉動角度。經過移動距離轉動角度的參數調整後，接下來第二機械手臂105移送至處理腔室114內的半導體元件200便可如第4A圖所示完全對位於承載台1142。據此，半導體製造設備100便完成對處理腔室114的校正程序。 Next, the control device 150 can adjust the parameters of the second robot arm 105 according to the offset displacement. For example, the control device 150 adjusts the moving distance and the rotation angle of the second robot arm 105 into the processing chamber 114 according to the correspondence table and the aforementioned offset displacement. After the parameter adjustment of the moving distance rotation angle, the semiconductor component 200 that is then transferred by the second robot arm 105 to the processing chamber 114 can be completely positioned on the carrier table 1142 as shown in FIG. 4A. Accordingly, the semiconductor manufacturing apparatus 100 completes the calibration process for the processing chamber 114.
請參考第9圖，第9圖為本發明另一實施例之校正器300與半導體元件200之部分示意圖。於此實施例中，校正器300可如前述第4A圖之實施例具有八個指標303。如第9圖所示，每一指標303如第9圖所示可包含四個標示條BR1、BR2、BR3以及BR4。相似於指標301，相鄰的兩個標示條之間的距離可為前述之固定間隔d。若當半導體元件200如第10圖所示朝Y方向偏移時，控制裝置150會根據第10圖所得到之影像訊號以 及演算法，判斷出第10圖中的指標303內的標示條BR1與BR2被半導體元件200蓋住(如第10圖所示)，並且標示條BR3是對齊於半導體元件200的邊緣。因此，控制裝置150便可得知半導體元件200是沿Y軸方向偏移了兩倍固定間隔d。接著，控制裝置150可控制第二機械手臂105沿著Y軸方向進入處理腔室114的移動距離。在某些實施例中，調整後移動距離為調整前之移動距離減去兩倍固定間隔d。經過這樣的參數調整後，接下來移送至處理腔室114內的半導體元件200的中心便可完全對位於承載台1142的中心C。據此，半導體製造設備100便完成對處理腔室114的校正程序。 Please refer to FIG. 9. FIG. 9 is a partial schematic view of the corrector 300 and the semiconductor device 200 according to another embodiment of the present invention. In this embodiment, the corrector 300 can have eight indicators 303 as in the embodiment of FIG. 4A above. As shown in FIG. 9, each indicator 303 may include four indicator bars BR1, BR2, BR3, and BR4 as shown in FIG. Similar to the index 301, the distance between two adjacent strips may be the aforementioned fixed interval d. If the semiconductor device 200 is shifted in the Y direction as shown in FIG. 10, the control device 150 will obtain the image signal obtained according to FIG. And the algorithm, it is judged that the indicator strips BR1 and BR2 in the index 303 in FIG. 10 are covered by the semiconductor element 200 (as shown in FIG. 10), and the marker strip BR3 is aligned with the edge of the semiconductor element 200. Therefore, the control device 150 can know that the semiconductor element 200 is shifted by twice the fixed interval d in the Y-axis direction. Next, the control device 150 can control the moving distance of the second robot arm 105 into the processing chamber 114 along the Y-axis direction. In some embodiments, the adjusted movement distance is the movement distance before adjustment minus twice the fixed interval d. After such parameter adjustment, the center of the semiconductor component 200 that is subsequently transferred to the processing chamber 114 can be completely centered on the center C of the carrier 1142. Accordingly, the semiconductor manufacturing apparatus 100 completes the calibration process for the processing chamber 114.
請參考第11圖，第11圖為本發明實施例中之半導體製造設備100的校正方法的流程圖。在操作S100中，將校正器300連接至承載台1142，在某些實施例中，是將承載台1142上的遮罩180移除後，再將校正器300安裝至承載台1142上。在操作S102中，藉由一驅動機構運送半導體元件200至承載台1142。在些實施例中，驅動機構可為第一機械手臂103或第二機械手臂105。在操作S104中，藉由影像擷取裝置160擷取關於半導體元件200與校正器300之一影像並對應地產生一影像訊號。在操作S106，控制裝置150根據校正器300的複數個指標301以及影像訊號來決定半導體元件200之中心是否對位於承載台1142之中心C。若是，結束流程。若否，執行操作S108。在操作S108中，控制裝置150決定半導體元件200與承載台1142之間的一偏移位移。在操作S110中，控制裝置150根據該偏移位移以及一參考資料產生一控制訊號。在操作S112中，驅動機構根 據控制訊號驅動原本之半導體元件200或是驅動另一半導體元件200移動並設置於承載台1142，以使原本之半導體元件200之中心或是另一半導體元件200之中心對位於承載台1142之中心C。 Please refer to FIG. 11. FIG. 11 is a flow chart showing a method of correcting the semiconductor manufacturing apparatus 100 in the embodiment of the present invention. In operation S100, the corrector 300 is coupled to the carrier 1142. In some embodiments, the mask 300 on the carrier 1142 is removed and the corrector 300 is mounted to the carrier 1142. In operation S102, the semiconductor element 200 is transported to the carrier 1142 by a driving mechanism. In some embodiments, the drive mechanism can be the first robot arm 103 or the second robot arm 105. In operation S104, an image of the semiconductor device 200 and the corrector 300 is captured by the image capturing device 160 and an image signal is generated correspondingly. In operation S106, the control device 150 determines whether the center of the semiconductor component 200 is located at the center C of the carrier 1142 based on the plurality of indicators 301 of the corrector 300 and the video signal. If yes, end the process. If no, operation S108 is performed. In operation S108, the control device 150 determines an offset displacement between the semiconductor component 200 and the carrier 1142. In operation S110, the control device 150 generates a control signal according to the offset displacement and a reference material. In operation S112, the drive mechanism root The original semiconductor component 200 is driven according to the control signal or the other semiconductor component 200 is driven to move and disposed on the carrier 1142 such that the center of the original semiconductor component 200 or the center of the other semiconductor component 200 is located at the center of the carrier 1142. C.
本發明實施例提供一種半導體製造設備100，當發現半導體元件200於製程中產生的薄膜缺陷是肇因於半導體元件200沒有正確地對位於某一處理腔室(例如處理腔室114)之承載台1142時，或者是半導體製造設備100進行預防性保養時，僅需將要進行校正的處理腔室(例如處理腔室114)去真空後，再於承載台1142上裝設校正器300，接著再透過控制裝置150與影像擷取裝置160來進行校正即可完成校正程序。意即在校正的過程中僅需將處理腔室114去真空，其餘處理腔室以及移送腔室仍可維持在真空狀態並繼續進行其餘的製程處理，而不需要將整台半導體製造設備100去真空才能進行校正，因此也不需要等待校正完後再將移送腔室與處理腔室轉換成真空狀態後來進行後續製程處理。因此，本揭露的半導體製造設備100可大幅縮短了校正所需的時間，增加整體製程上的效率。 The embodiment of the present invention provides a semiconductor manufacturing apparatus 100. When the semiconductor element 200 is found to have a film defect generated in the process, the semiconductor element 200 is not correctly positioned on the carrying surface of a processing chamber (for example, the processing chamber 114). At 1142, or when the semiconductor manufacturing equipment 100 performs preventive maintenance, it is only necessary to vacuum the processing chamber (for example, the processing chamber 114) to be corrected, and then install the corrector 300 on the carrying platform 1142, and then pass through The control device 150 and the image capture device 160 perform calibration to complete the calibration process. That is, in the process of calibration, only the processing chamber 114 needs to be vacuumed, and the remaining processing chambers and the transfer chamber can still be maintained in a vacuum state and continue the remaining process processing without the need to go through the entire semiconductor manufacturing equipment 100. The vacuum can be corrected, so there is no need to wait for the correction to be completed before converting the transfer chamber and the processing chamber into a vacuum state and then performing subsequent processing. Therefore, the semiconductor manufacturing apparatus 100 of the present disclosure can greatly shorten the time required for calibration and increase the efficiency in the overall process.
本發明一些實施例提供一種處理腔室，包含一承載台以及一校正器。承載台是用以承載一半導體元件。校正器是安裝於承載台，並且校正器具有複數個指標。半導體元件之一表面是設置於承載台與校正器上，並且指標是用以指示出半導體元件與承載台之間的一偏移位移。 Some embodiments of the present invention provide a processing chamber including a carrier and a corrector. The carrier is used to carry a semiconductor component. The corrector is mounted on the carrier and the corrector has a plurality of indicators. One surface of the semiconductor component is disposed on the carrier and the corrector, and the index is used to indicate an offset displacement between the semiconductor component and the carrier.
本發明一些實施例提供一種半導體製造設備，包 含一處理腔室、一影像擷取裝置以及一控制裝置。處理腔室包含有一承載台以及一校正器。承載台是用以承載一半導體元件。校正器是連接於承載台，校正器具有複數個指標。影像擷取裝置是用以擷取關於半導體元件以及校正器之一影像以產生一影像訊號。控制裝置是用以根據指標以及影像訊號決定半導體元件之中心是否對位於承載台之中心，並且當半導體元件之中心偏離承載台之中心時，控制裝置決定半導體元件與承載台之間的一偏移位移。 Some embodiments of the present invention provide a semiconductor manufacturing apparatus, including A processing chamber, an image capturing device and a control device are included. The processing chamber includes a carrier and a corrector. The carrier is used to carry a semiconductor component. The corrector is connected to the carrier, and the corrector has a plurality of indicators. The image capturing device is configured to capture an image of the semiconductor component and the corrector to generate an image signal. The control device is configured to determine whether the center of the semiconductor component is located at the center of the carrier according to the index and the image signal, and when the center of the semiconductor component is offset from the center of the carrier, the control device determines an offset between the semiconductor component and the carrier Displacement.
根據一些實施例，指標中的每一者具有複數個標示組，每一標示組具有複數個標示點，並且標示組內相鄰之兩個標示點之間具有一固定間隔。 In accordance with some embodiments, each of the indicators has a plurality of set of labels, each set of markers having a plurality of set points, and a fixed interval between adjacent ones of the set of marked points.
根據一些實施例，當半導體元件之中心對位於承載台之中心時，最靠近半導體元件之標示點由垂直於半導體元件之方向觀看時係對齊於半導體元件之邊緣。 According to some embodiments, when the center of the semiconductor element is centered on the stage, the marked point closest to the semiconductor element is aligned with the edge of the semiconductor element when viewed perpendicular to the direction of the semiconductor element.
根據一些實施例，校正器包含有複數個指標，相鄰兩個指標之間具有一夾角，且每一夾角之角度皆相等。 According to some embodiments, the corrector includes a plurality of indicators, an angle between adjacent two indicators, and the angle of each angle is equal.
根據一些實施例，複數個指標中兩個相反設置的指標之間具有一間隔距離，且間隔距離實質上等於半導體元件之直徑。兩個相反設置的指標之間的夾角為180度。 According to some embodiments, the two oppositely disposed indices of the plurality of indices have a separation distance between them and the separation distance is substantially equal to the diameter of the semiconductor component. The angle between the two oppositely set indicators is 180 degrees.
根據一些實施例，承載台形成有複數個卡合槽，校正器具有對應於卡合槽之複數個凸出結構，用以卡合於卡合槽，以使校正器安裝於承載台。 According to some embodiments, the carrier is formed with a plurality of engaging slots, and the corrector has a plurality of protruding structures corresponding to the engaging slots for engaging the engaging slots to mount the corrector to the carrying platform.
根據一些實施例，校正器具有一外徑，外徑係大於半導體元件之直徑。 According to some embodiments, the corrector has an outer diameter that is greater than the diameter of the semiconductor component.
本發明實施例提供一種半導體製造設備的校正方法，包含：運送一半導體元件至一承載台上，其中承載台上設置有一校正器，且校正器具有複數個指標；擷取關於半導體元件與校正器之一影像並對應地產生一影像訊號；根據指標以及影像訊號，決定半導體元件之中心是否對位於承載台之中心；以及當半導體元件之中心偏離承載台之中心時，決定半導體元件與承載台之間的一偏移位移。 Embodiments of the present invention provide a method for correcting a semiconductor manufacturing apparatus, including: transporting a semiconductor component to a carrier, wherein a corrector is disposed on the carrier, and the corrector has a plurality of indicators; and the semiconductor component and the corrector are extracted One image correspondingly generates an image signal; determining whether the center of the semiconductor component is located at the center of the carrier according to the index and the image signal; and determining the semiconductor component and the carrier when the center of the semiconductor component is offset from the center of the carrier An offset displacement between.
根據一些實施例，校正方法更包含：根據偏移位移以及一參考資料產生一控制訊號；以及根據控制訊號驅動半導體元件或另一半導體元件移動並設置於承載台，以使半導體元件之中心或另一半導體元件之中心對位於承載台之中心。 According to some embodiments, the correction method further includes: generating a control signal according to the offset displacement and a reference; and driving the semiconductor component or the other semiconductor component to move according to the control signal and disposed on the carrying platform to make the center of the semiconductor component or another The center of a semiconductor component is located at the center of the carrier.
以上雖然詳細描述了實施例及它們的優勢，但應該理解，在不背離所附申請專利範圍限定的本揭露的精神和範圍的情況下，對本揭露可作出各種變化、替代和修改。此外，本申請的範圍不旨在限制於說明書中所述的製程、機器、製造、物質組成、工具、方法和步驟的特定實施例。作為本領域的普通技術人員將容易地從本揭露中理解，根據本揭露，可以利用現有的或今後將被開發的、執行與在本揭露所述的對應實施例基本相同的功能或實現基本相同的結果的製程、機器、製造、物質組成、工具、方法或步驟。因此，所附申請專利範圍旨在將這些製程、機器、製造、物質組成、工具、方法或步驟包括它們的範圍內。此外，每一個申請專利範圍構成一個單獨的實施例，且不同申請專利範圍和實施例的組合都在本揭露的範圍內。 The embodiments and their advantages are described in detail above, and it is understood that various changes, substitutions and modifications may be made in the present disclosure without departing from the spirit and scope of the disclosure. Further, the scope of the present application is not intended to be limited to the specific embodiments of the process, the machine, the manufacture, the material composition, the tool, the method and the steps described in the specification. It will be readily apparent to those skilled in the art from this disclosure that, in accordance with the present disclosure, substantially the same functions or implementations as those of the corresponding embodiments described herein may be utilized. The resulting process, machine, manufacturing, material composition, tool, method or procedure. Therefore, the scope of the appended claims is intended to cover such processes, machines, manufacture, compositions of matter, tools, methods or steps. In addition, each patent application scope constitutes a separate embodiment, and combinations of different application patent scopes and embodiments are within the scope of the disclosure.
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