TWI640655B - Method of preparing array of thin film transistor and etchant composition for molybdenum-based metal film/metal oxide film - Google Patents
Method of preparing array of thin film transistor and etchant composition for molybdenum-based metal film/metal oxide film Download PDFInfo
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Abstract
本發明揭示一種製備薄膜電晶體陣列之方法。具體言之，本發明揭示一種蝕刻劑組成物，其包括：5wt%至25wt%過氧化氫；0.05wt%至1wt%含氟化合物；0.5wt%至3wt%芳族有機酸或其鹽；及餘量水，從而選擇性地蝕刻鉬基金屬膜或金屬氧化物膜，及一種使用該組成物製備薄膜電晶體陣列之方法。 A method of making a thin film transistor array is disclosed. Specifically, the present invention discloses an etchant composition comprising: 5 wt% to 25 wt% hydrogen peroxide; 0.05 wt% to 1 wt% of a fluorine-containing compound; 0.5 wt% to 3 wt% of an aromatic organic acid or a salt thereof; The remaining amount of water is used to selectively etch a molybdenum-based metal film or a metal oxide film, and a method of preparing a thin film transistor array using the composition.
Description
本發明係關於一種製備薄膜電晶體陣列之方法。 This invention relates to a method of making a thin film transistor array.
隨著各種資訊及通信技術之發展，顯示裝置已成為現代人類之必需品。顯示裝置藉由向外部發射內部光而向使用者提供影像。內部光可為由任何外部照明設備或本身發射光之光源提供之光。 With the development of various information and communication technologies, display devices have become a necessity for modern humans. The display device provides an image to the user by emitting internal light to the outside. The internal light can be light provided by any external illumination device or a source that emits light by itself.
顯示裝置之特定實例可包括液晶顯示裝置、有機發光二極體顯示裝置或其類似裝置。此類顯示裝置可包括複數個展現影像之像素。在此方面，各像素可包括其中排列有薄膜電晶體之驅動元件。在此情況下，薄膜電晶體可為用於控制各像素之驅動薄膜電晶體。另外，薄膜電晶體可為用於轉換驅動薄膜電晶體之轉換薄膜電晶體。 Specific examples of the display device may include a liquid crystal display device, an organic light emitting diode display device, or the like. Such a display device can include a plurality of pixels that represent an image. In this aspect, each pixel may include a driving element in which a thin film transistor is arranged. In this case, the thin film transistor may be a driving thin film transistor for controlling each pixel. In addition, the thin film transistor may be a conversion film transistor for converting a driving thin film transistor.
圖1為示意性地說明習知薄膜電晶體結構之橫截面圖。 BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a cross-sectional view schematically showing the structure of a conventional thin film transistor.
如圖1中所展示，習知薄膜電晶體包括具有預定形狀之基板10；在基板10上形成之閘電極21；在閘電極21上形成之閘極絕緣膜15a；在閘極絕緣膜15a上形成之具有半導體之活動層24；藉由用高濃度n型雜 質摻雜半導體而在活動層24之上部部分上形成之n+摻雜層25；電連接至n+摻雜層25之預定區域之源電極/汲電極22及23；在源電極/汲電極22及23上形成之保護膜15b；及電連接至汲電極23之像素電極18。 As shown in FIG. 1, a conventional thin film transistor includes a substrate 10 having a predetermined shape; a gate electrode 21 formed on the substrate 10; a gate insulating film 15a formed on the gate electrode 21; and a gate insulating film 15a Forming the active layer 24 with a semiconductor; by using a high concentration of n-type impurities An n+ doped layer 25 formed on the upper portion of the active layer 24 with a doped semiconductor; a source/germanium electrode 22 and 23 electrically connected to a predetermined region of the n+ doped layer 25; and a source/germanium electrode 22 and A protective film 15b formed on 23; and a pixel electrode 18 electrically connected to the germanium electrode 23.
通常，像素電極18由鉬基金屬膜或金屬氧化物膜形成。一般而言，像素電極藉由諸如在其上濺鍍、塗佈光阻且經由曝光及顯影法形成圖案之方法在玻璃基板等上層壓鉬鈦合金膜或氧化銦膜，且蝕刻該膜以製備像素電極而形成。 Generally, the pixel electrode 18 is formed of a molybdenum-based metal film or a metal oxide film. In general, a pixel electrode is formed by laminating a molybdenum-titanium alloy film or an indium oxide film on a glass substrate or the like by a method such as sputtering thereon, coating a photoresist, and patterning by exposure and development, and etching the film to prepare Formed by a pixel electrode.
鉬基金屬膜或金屬氧化物膜為具有極佳耐化學性且不易受化學反應蝕刻之材料，而因此在相關技術中不用於像素電極之製備。因此，未曾報導用於蝕刻鉬基金屬膜或金屬氧化物膜之技術。但是，作為用於蝕刻用作資料佈線之單鉬膜的蝕刻劑，過氧化氫基蝕刻劑揭示於韓國專利公開案第2001-0100226號中。 A molybdenum-based metal film or a metal oxide film is a material which has excellent chemical resistance and is not easily etched by a chemical reaction, and thus is not used in the related art for the preparation of a pixel electrode. Therefore, techniques for etching a molybdenum-based metal film or a metal oxide film have not been reported. However, as an etchant for etching a single molybdenum film used as a data wiring, a hydrogen peroxide-based etchant is disclosed in Korean Patent Publication No. 2001-0100226.
然而，當過氧化氫基蝕刻劑應用於鉬基金屬膜或金屬氧化物膜時，蝕刻因鉬基金屬膜或金屬氧化物膜之極高耐蝕刻性而不可能發生。另外，當鉬基金屬膜或金屬氧化物膜在具有銅膜或矽基化合物膜之多層膜中形成時，可能損害銅膜或矽基化合物膜。 However, when a hydrogen peroxide-based etchant is applied to a molybdenum-based metal film or a metal oxide film, etching is unlikely to occur due to extremely high etching resistance of a molybdenum-based metal film or a metal oxide film. In addition, when a molybdenum-based metal film or a metal oxide film is formed in a multilayer film having a copper film or a ruthenium-based compound film, the copper film or the ruthenium-based compound film may be damaged.
因此，本發明之目標為提供一種能夠選擇性地蝕刻鉬基金屬膜或金屬氧化物膜而不損害銅膜或矽基化合物膜之蝕刻劑組成物。 Accordingly, it is an object of the present invention to provide an etchant composition capable of selectively etching a molybdenum-based metal film or a metal oxide film without damaging the copper film or the ruthenium-based compound film.
另外，本發明之另一目標為提供一種使用上述蝕刻劑組成物製備薄膜電晶體陣列之方法。 Further, another object of the present invention is to provide a method of preparing a thin film transistor array using the above etchant composition.
本發明之上述目標將藉由以下特徵達成： The above objects of the present invention will be achieved by the following features:
(1)一種製備薄膜電晶體陣列之方法，包括：(a)在基板上形成閘電極；(b)在該上面形成有閘電極之基板上形成閘極絕緣層；(c)在閘極絕緣層上形成半導體層；(d)在半導體層上形成源極/汲極線；及(e)形成連接至汲極線之像素電極，其中步驟(e)包括使用蝕刻劑組成物蝕刻由鉬基金屬膜或金屬氧化物膜形成之層，該蝕刻劑組成物包括：5wt%至25wt%過氧化氫；0.05wt%至1wt%含氟化合物；0.5wt%至3wt%芳族有機酸或其鹽；及餘量水。 (1) A method of preparing a thin film transistor array, comprising: (a) forming a gate electrode on a substrate; (b) forming a gate insulating layer on the substrate on which the gate electrode is formed; (c) insulating the gate Forming a semiconductor layer on the layer; (d) forming a source/drain line on the semiconductor layer; and (e) forming a pixel electrode connected to the drain line, wherein step (e) includes etching the molybdenum group using an etchant composition a layer formed of a metal film or a metal oxide film, the etchant composition comprising: 5 wt% to 25 wt% hydrogen peroxide; 0.05 wt% to 1 wt% fluorine-containing compound; 0.5 wt% to 3 wt% aromatic organic acid or a salt thereof ; and the balance of water.
(2)根據上述(1)之方法，其中該薄膜電晶體陣列包括作為資料佈線之銅佈線。 (2) The method according to (1) above, wherein the thin film transistor array includes a copper wiring as a data wiring.
(3)根據上述(1)之方法，其中該鉬基金屬膜為由鉬或鉬合金形成之膜。 (3) The method according to (1) above, wherein the molybdenum-based metal film is a film formed of molybdenum or a molybdenum alloy.
(4)根據上述(3)之方法，其中該鉬合金為包括鉬及至少一種選自由Ti、Ta、Cr、Ni、Nd及In組成之群之金屬的合金。 (4) The method according to (3) above, wherein the molybdenum alloy is an alloy including molybdenum and at least one metal selected from the group consisting of Ti, Ta, Cr, Ni, Nd, and In.
(5)根據上述(1)之方法，其中該金屬氧化物膜為由包括以下者所形成之膜：由AxByCzO(其中A、B及C各自獨立地為選自由鋅(Zn)、鈦(Ti)、鎘(Cd)、鎵(Ga)、銦(In)、錫(Sn)、鉿(Hf)、鋯(Zr)及鉭(Ta)組成之群之金屬；及x、y及z中之每一者表示金屬比率且為0或更大之整數或小數)表示之三組分系統或四組分系統氧化物。 (5) The method of above (1), wherein the film comprises a metal oxide film is formed by those of the following: the A x B y C z O (where A, B and C are each independently selected from the group consisting of zinc ( a metal of the group consisting of Zn), titanium (Ti), cadmium (Cd), gallium (Ga), indium (In), tin (Sn), hafnium (Hf), zirconium (Zr), and tantalum (Ta); Each of y and z represents a three component system or a four component system oxide represented by a metal ratio and is an integer or fraction of 0 or greater.
(6)根據上述(1)之方法，其中該含氟化合物包括HF基團。 (6) The method according to (1) above, wherein the fluorine-containing compound comprises an HF group.
(7)根據上述(1)之方法，其中該含氟化合物包括選自由HF、NaF、NH4F、NH4BF4、NH4F．HF、NaF．HF、KF、KF．HF、CaF2、AlF3、H2SiF6及HBF4組成之群之至少一者。 (7) The method according to (1) above, wherein the fluorine-containing compound comprises a group selected from the group consisting of HF, NaF, NH 4 F, NH 4 BF 4 , NH 4 F. HF, NaF. HF, KF, KF. At least one of the group consisting of HF, CaF 2 , AlF 3 , H 2 SiF 6 and HBF 4 .
(8)根據上述(1)之方法，其中該芳族有機酸或其鹽為選自由苯磺酸、苯甲酸、胺基苯甲酸、水楊酸、菸鹼酸及其鹽組成之群之至少一者。 (8) The method according to the above (1), wherein the aromatic organic acid or a salt thereof is at least selected from the group consisting of benzenesulfonic acid, benzoic acid, aminobenzoic acid, salicylic acid, nicotinic acid, and salts thereof One.
(9)根據上述(8)之方法，其中該芳族有機酸之鹽包括選自由苯甲酸銨、苯甲酸鈉、苯甲酸鉀、苯甲酸甲酯、苯甲酸乙酯、苯甲酸苯甲酯及苯磺酸鈉組成之群之至少一者。 (9) The method according to the above (8), wherein the salt of the aromatic organic acid comprises a salt selected from the group consisting of ammonium benzoate, sodium benzoate, potassium benzoate, methyl benzoate, ethyl benzoate, benzyl benzoate and benzene. At least one of the group consisting of sodium sulfonate.
(10)根據上述(1)之方法，其中該蝕刻劑組成物進一步包含至少一種選自由界面活性劑、螯合劑及腐蝕抑制劑組成之群之添加劑。 (10) The method according to (1) above, wherein the etchant composition further comprises at least one additive selected from the group consisting of a surfactant, a chelating agent, and a corrosion inhibitor.
(11)一種用於鉬基金屬膜/金屬氧化物膜之蝕刻劑組成物，包括：5wt%至25wt%過氧化氫；0.05wt%至1wt%含氟化合物；0.5wt%至3wt%芳族有機酸或其鹽；及餘量水。 (11) An etchant composition for a molybdenum-based metal film/metal oxide film, comprising: 5 wt% to 25 wt% hydrogen peroxide; 0.05 wt% to 1 wt% fluorine-containing compound; 0.5 wt% to 3 wt% aromatic Organic acid or its salt; and the balance of water.
(12)根據上述(11)之組成物，其中該鉬基金屬膜為由鉬或鉬合金形成之膜。 (12) The composition according to the above (11), wherein the molybdenum-based metal film is a film formed of molybdenum or a molybdenum alloy.
(13)根據上述(12)之組成物，其中該鉬合金為包括鉬及至少一種選自由Ti、Ta、Cr、Ni、Nd及In組成之群之金屬的合金。 (13) The composition according to the above (12), wherein the molybdenum alloy is an alloy including molybdenum and at least one metal selected from the group consisting of Ti, Ta, Cr, Ni, Nd, and In.
(14)根據上述(11)之組成物，其中該金屬氧化物膜為由包括以下者所形成之膜：由AxByCzO(其中A、B及C各自獨立地為選自由鋅(Zn)、鈦(Ti)、鎘(Cd)、鎵(Ga)、銦(In)、錫(Sn)、鉿(Hf)、鋯(Zr)及鉭(Ta)組成之群之金屬；及x、y及z中之每一者表示金屬比率且為0或更大之整數或小數)表示之三組分系統或四組分系統氧化物。 (14) The composition according to the above (11), wherein the metal oxide film is a film formed of: A x B y C z O (wherein A, B and C are each independently selected from zinc) a metal of the group consisting of (Zn), titanium (Ti), cadmium (Cd), gallium (Ga), indium (In), tin (Sn), hafnium (Hf), zirconium (Zr), and tantalum (Ta); Each of x, y, and z represents a three-component system or a four-component system oxide represented by a metal ratio and an integer or fraction of 0 or greater.
(15)根據上述(11)之組成物，其中該含氟化合物包括HF基團。 (15) The composition according to the above (11), wherein the fluorine-containing compound includes an HF group.
(16)根據上述(11)之組成物，其中該含氟化合物包括選自由HF、NaF、NH4F、NH4BF4、NH4F．HF、NaF．HF、KF、KF．HF、CaF2、AlF3、H2SiF6 及HBF4組成之群之至少一者。 (16) The composition according to the above (11), wherein the fluorine-containing compound comprises a group selected from the group consisting of HF, NaF, NH 4 F, NH 4 BF 4 , NH 4 F. HF, NaF. HF, KF, KF. At least one of the group consisting of HF, CaF 2 , AlF 3 , H 2 SiF 6 and HBF 4 .
(17)根據上述(11)之組成物，其中該芳族有機酸或其鹽為自由苯磺酸、苯甲酸、胺基苯甲酸、水楊酸、菸鹼酸及其鹽組成之群之至少一者。 (17) The composition according to the above (11), wherein the aromatic organic acid or a salt thereof is at least a group consisting of free benzenesulfonic acid, benzoic acid, aminobenzoic acid, salicylic acid, nicotinic acid, and a salt thereof One.
(18)根據上述(17)之組成物，其中該芳族有機酸之鹽為選自由苯甲酸銨、苯甲酸鈉、苯甲酸鉀、苯甲酸甲酯、苯甲酸乙酯、苯甲酸苯甲酯及苯磺酸鈉組成之群之至少一者。 (18) The composition according to the above (17), wherein the salt of the aromatic organic acid is selected from the group consisting of ammonium benzoate, sodium benzoate, potassium benzoate, methyl benzoate, ethyl benzoate, benzyl benzoate and At least one of the group consisting of sodium benzene sulfonate.
(19)根據上述(11)之組成物，進一步包括至少一種選自由界面活性劑、螯合劑及腐蝕抑制劑組成之群之添加劑。 (19) The composition according to the above (11), further comprising at least one additive selected from the group consisting of a surfactant, a chelating agent, and a corrosion inhibitor.
根據本發明之用於鉬基金屬膜或金屬氧化物膜之蝕刻劑組成物，有可能選擇性地蝕刻鉬基金屬膜或金屬氧化物膜而不損害銅膜或矽基化合物膜，且從而即使在鉬基金屬膜或金屬氧化物膜用作像素佈線且銅佈線用作資料佈線時，亦有可能形成陣列而不損害銅佈線。 According to the etchant composition for a molybdenum-based metal film or a metal oxide film of the present invention, it is possible to selectively etch a molybdenum-based metal film or a metal oxide film without damaging the copper film or the ruthenium-based compound film, and thus even When a molybdenum-based metal film or a metal oxide film is used as a pixel wiring and a copper wiring is used as a data wiring, it is also possible to form an array without damaging the copper wiring.
另外，根據製備薄膜電晶體陣列之方法，即使在銅膜或矽基化合物膜用作鉬基金屬膜或金屬氧化物膜之底層時，亦有可能蝕刻鉬基金屬膜或金屬氧化物膜而不損害銅膜或矽基化合物膜，且從而本發明之方法可有效用於形成鉬基金屬或金屬氧化物膜佈線之像素電極。 In addition, according to the method of preparing a thin film transistor array, even when a copper film or a ruthenium-based compound film is used as a bottom layer of a molybdenum-based metal film or a metal oxide film, it is possible to etch a molybdenum-based metal film or a metal oxide film without The copper film or the ruthenium-based compound film is damaged, and thus the method of the present invention can be effectively used to form a pixel electrode of a molybdenum-based metal or metal oxide film wiring.
10‧‧‧基板 10‧‧‧Substrate
15a‧‧‧閘極絕緣膜 15a‧‧‧Gate insulation film
15b‧‧‧保護膜 15b‧‧‧Protective film
18‧‧‧像素電極 18‧‧‧pixel electrode
21‧‧‧閘電極 21‧‧‧ gate electrode
22‧‧‧源電極 22‧‧‧ source electrode
23‧‧‧汲電極 23‧‧‧汲 electrode
24‧‧‧活動層 24‧‧‧ active layer
25‧‧‧n+摻雜層 25‧‧‧n+ doped layer
自以下實施方式結合隨附圖式將更清楚理解本發明之上述及其他目標、特徵及其他優勢，其中：圖1為示意性地說明習知薄膜電晶體結構之橫截面圖；圖2為用於評估使用實施例2中製備之蝕刻劑組成物蝕刻鉬-鈦膜時之蝕刻概況及蝕刻直度之SEM像片； 圖3為用於評估使用實施例2中製備之蝕刻劑組成物時銅膜中出現之損害之SEM像片；圖4為用於評估使用實施例2中製備之蝕刻劑組成物時SiO2膜中出現之損害之SEM像片；圖5為用於評估使用比較實施例1中製備之蝕刻劑組成物蝕刻鉬-鈦膜時之蝕刻概況及蝕刻直度之SEM像片；圖6為用於評估使用比較實施例1中製備之蝕刻劑組成物時銅膜中出現之損害之SEM像片；圖7為用於評估使用比較實施例1中製備之蝕刻劑組成物時SiO2膜中出現之損害之SEM像片；圖8為用於評估使用實施例9中製備之蝕刻劑組成物蝕刻鉬-鈦膜時之蝕刻概況及蝕刻直度之SEM像片；圖9為用於評估使用實施例9中製備之蝕刻劑組成物時銅膜中出現之損害之SEM像片；圖10為用於評估使用實施例9中製備之蝕刻劑組成物時SiO2膜中出現之損害之SEM像片；圖11為用於評估使用比較實施例5中製備之蝕刻劑組成物蝕刻鉬-鈦膜時之蝕刻概況及蝕刻直度之SEM像片；圖12為用於評估使用比較實施例5中製備之蝕刻劑組成物時銅膜中出現之損害之SEM像片；及圖13為用於評估使用比較實施例5中製備之蝕刻劑組成物時SiO2膜中出現之損害之SEM像片。 The above and other objects, features and other advantages of the present invention will become more apparent from the aspects of the accompanying drawings in which <RTIgt; An SEM image of an etching profile and an etching straightness when the molybdenum-titanium film was etched using the etchant composition prepared in Example 2; FIG. 3 is a graph for evaluating copper when the etchant composition prepared in Example 2 was used. SEM image of damage occurring in the film; FIG. 4 is an SEM image for evaluating damage occurring in the SiO 2 film when the etchant composition prepared in Example 2 was used; FIG. 5 is a comparative example for evaluation use An etched profile of the etchant composition prepared in the etching of the molybdenum-titanium film and an SEM image of the etching straightness; FIG. 6 is for evaluating the appearance of the copper film in the use of the etchant composition prepared in Comparative Example 1. SEM image of the damage; FIG. 7 is an SEM image for evaluating damage occurring in the SiO 2 film when the etchant composition prepared in Comparative Example 1 was used; FIG. 8 is for evaluation using the preparation prepared in Example 9. Etching of etchant composition when etching molybdenum-titanium film And an SEM image of the etching straightness; FIG. 9 is an SEM image for evaluating the damage occurring in the copper film when the etchant composition prepared in Example 9 is used; FIG. 10 is used for evaluation using Example 9. SEM image of damage occurring in the SiO 2 film when the etchant composition was prepared; FIG. 11 is an evaluation of etching and etching straightness for etching the molybdenum-titanium film using the etchant composition prepared in Comparative Example 5. SEM image; FIG. 12 is an SEM image for evaluating damage occurring in the copper film when the etchant composition prepared in Comparative Example 5 was used; and FIG. 13 is for evaluation using the preparation prepared in Comparative Example 5. SEM image of damage occurring in the SiO 2 film at the etchant composition.
本發明揭示一種用於鉬基金屬膜/金屬氧化物膜之蝕刻劑組成物，其包括：5wt%至25wt%過氧化氫；0.05wt%至1wt%含氟化合物；0.5wt%至3wt%芳族有機酸或其鹽；及餘量水，從而選擇性地蝕刻鉬基金屬膜，及一種使用該組成物製備薄膜電晶體陣列之方法。 The present invention discloses an etchant composition for a molybdenum-based metal film/metal oxide film comprising: 5 wt% to 25 wt% hydrogen peroxide; 0.05 wt% to 1 wt% fluorine-containing compound; 0.5 wt% to 3 wt% aromatic a group of organic acids or salts thereof; and a balance of water to selectively etch a molybdenum-based metal film, and a method of preparing a thin film transistor array using the composition.
在下文中，將詳細描述本發明。 Hereinafter, the present invention will be described in detail.
在本發明中，鉬基金屬膜意謂由包括鉬之金屬材料形成的膜。舉例而言，鉬基金屬膜可為由鉬或鉬合金形成之膜。 In the present invention, the molybdenum-based metal film means a film formed of a metal material including molybdenum. For example, the molybdenum-based metal film may be a film formed of molybdenum or a molybdenum alloy.
在本發明中，金屬氧化物膜意謂由具有電導性之金屬氧化物形成之膜，其可製備成薄膜電晶體陣列。此類金屬氧化物膜可為由AxByCzO(其中A、B及C各自獨立地為選自由鋅(Zn)、鈦(Ti)、鎘(Cd)、鎵(Ga)、銦(In)、錫(Sn)、鉿(Hf)、鋯(Zr)及鉭(Ta)組成之群之金屬；及x、y及z中之每一者表示金屬比率且為0或更大之整數或小數)表示之三組分系統或四組分系統氧化物形成之膜。 In the present invention, a metal oxide film means a film formed of a metal oxide having electrical conductivity, which can be prepared as a thin film transistor array. Such a metal oxide film may be composed of A x B y C z O (wherein A, B and C are each independently selected from the group consisting of zinc (Zn), titanium (Ti), cadmium (Cd), gallium (Ga), and indium. a metal of the group consisting of (In), tin (Sn), hafnium (Hf), zirconium (Zr), and tantalum (Ta); and each of x, y, and z represents a metal ratio and is 0 or greater An integer or fractional number indicates a film formed by a three component system or a four component system oxide.
在本發明中，鉬基金屬膜/金屬氧化物膜係指鉬基金屬膜或金屬氧化物膜。 In the present invention, the molybdenum-based metal film/metal oxide film means a molybdenum-based metal film or a metal oxide film.
本發明之蝕刻劑組成物包括過氧化氫；含氟化合物；芳族有機酸或其鹽；及餘量水。 The etchant composition of the present invention comprises hydrogen peroxide; a fluorine-containing compound; an aromatic organic acid or a salt thereof; and a balance of water.
過氧化氫不僅為直接參與蝕刻之氧化劑，而且用於增加含氟化合物之活性。以組成物總重量之5wt%至25wt%，且較佳10wt%至20wt%之量包括過氧化氫(H2O2)。若過氧化氫含量小於5wt%，則蝕刻效能可能不足，從而產生不充分蝕刻量，且當其含量超過25wt%時，蝕刻速率通常 增加而難以控制製程，且關於蝕刻劑而言降低蝕刻穩定性。 Hydrogen peroxide is not only an oxidizing agent that directly participates in etching, but also serves to increase the activity of the fluorine-containing compound. Hydrogen peroxide (H 2 O 2 ) is included in an amount of from 5 wt% to 25 wt%, and preferably from 10 wt% to 20 wt%, based on the total mass of the composition. If the hydrogen peroxide content is less than 5% by weight, the etching efficiency may be insufficient to generate an insufficient etching amount, and when the content thereof exceeds 25% by weight, the etching rate generally increases to make it difficult to control the process, and the etching stability is lowered with respect to the etchant .
含氟化合物係指在水中解離而產生氟(F)離子之化合物。含氟化合物為影響鉬基金屬膜或金屬氧化物膜蝕刻速率之輔助氧化劑，且可控制蝕刻速率同時移除蝕刻期間產生之殘餘物。 The fluorine-containing compound means a compound which dissociates in water to generate fluorine (F) ions. The fluorine-containing compound is an auxiliary oxidant that affects the etching rate of the molybdenum-based metal film or the metal oxide film, and can control the etching rate while removing the residue generated during the etching.
以組成物總重量之0.5wt%至1wt%，且較佳0.1wt%至0.5wt%之量包括含氟化合物。若含氟化合物之含量小於0.5wt%，則鉬基金屬膜或金屬氧化物膜之蝕刻速率可降低，且從而其可能無法經部分蝕刻或可出現殘餘物。當其含量超過1wt%時，矽基化合物膜之損害可能增加。 The fluorine-containing compound is included in an amount of from 0.5% by weight to 1% by weight, and preferably from 0.1% by weight to 0.5% by weight based on the total mass of the composition. If the content of the fluorine-containing compound is less than 0.5% by weight, the etching rate of the molybdenum-based metal film or the metal oxide film may be lowered, and thus it may be impossible to partially etch or residue may occur. When the content thereof exceeds 1% by weight, the damage of the mercapto compound film may increase.
含氟化合物可包括用於相關技術而不具其特定限制之任何習知化合物，只要其產生氟(F)離子，且較佳使用包括HF基團之化合物。若使用包括HF基團之化合物，則金屬氧化物膜可經蝕刻而無需添加獨立pH調節劑。包括HF基團之化合物可包括例如HF、NaF、NH4F、NH4BF4、NH4F．HF、NaF．HF、KF、KF．HF、CaF2、AlF3、H2SiF6、HBF4或其類似物，其可單獨或以其兩種或超過兩種之組合形式使用。其中，不具HF基團之NH4F較佳用於防止矽基化合物膜損害之態樣。在安全性之態樣中，當包括HF基團時，因高揮發性而較佳使用鹽型化合物，且可使用NH4F．HF。 The fluorine-containing compound may include any conventional compound used in the related art without particular limitation as long as it produces fluorine (F) ions, and a compound including an HF group is preferably used. If a compound comprising an HF group is used, the metal oxide film can be etched without the addition of a separate pH adjusting agent. Compounds including HF groups may include, for example, HF, NaF, NH 4 F, NH 4 BF 4 , NH 4 F. HF, NaF. HF, KF, KF. HF, CaF 2 , AlF 3 , H 2 SiF 6 , HBF 4 or the like, which may be used singly or in combination of two or more thereof. Among them, NH 4 F having no HF group is preferably used for preventing the damage of the sulfhydryl compound film. In the case of safety, when an HF group is included, a salt type compound is preferably used because of high volatility, and NH 4 F can be used. HF.
芳族有機酸或其鹽可控制鉬基金屬膜或金屬氧化物膜之蝕刻速率且最小化矽基化合物膜之損害。 The aromatic organic acid or a salt thereof can control the etching rate of the molybdenum-based metal film or the metal oxide film and minimize the damage of the mercapto compound film.
可以組成物總重量之0.5wt%至3wt%之量包括芳族有機酸或其鹽。若芳族有機酸或其鹽之含量小於0.5wt%，則可能損害銅膜或矽基化合物膜。當其含量超過3wt%時，鉬基金屬膜或金屬氧化物膜之蝕刻速率可能降低從而增加製程時間。 The aromatic organic acid or a salt thereof may be included in an amount of from 0.5% by weight to 3% by weight based on the total mass of the composition. If the content of the aromatic organic acid or a salt thereof is less than 0.5% by weight, the copper film or the mercapto compound film may be damaged. When the content thereof exceeds 3 wt%, the etching rate of the molybdenum-based metal film or the metal oxide film may be lowered to increase the process time.
用於本發明之芳族有機酸或其鹽可包括例如苯磺酸、苯甲酸、胺基苯甲酸、水楊酸、菸鹼酸及其鹽或其類似物，其可單獨或以其兩種或超過兩種之組合形式使用。 The aromatic organic acid or a salt thereof used in the present invention may include, for example, benzenesulfonic acid, benzoic acid, aminobenzoic acid, salicylic acid, nicotinic acid, and salts thereof, or the like, which may be used alone or in both Use more than two combinations.
更具體言之，芳族有機酸或其鹽可包括例如苯申酸銨、苯甲酸鈉、苯甲酸鉀、苯甲酸甲酯、苯甲酸乙酯、苯甲酸苯甲酯、及苯磺酸鈉或其類似物，其可單獨或以其兩種或超過兩種之組合形式使用。 More specifically, the aromatic organic acid or a salt thereof may include, for example, ammonium benzoate, sodium benzoate, potassium benzoate, methyl benzoate, ethyl benzoate, benzyl benzoate, and sodium benzenesulfonate or Analogs, which may be used singly or in combination of two or more thereof.
其中，較佳使用苯甲酸鹽，且更佳使用苯甲酸鈉。 Among them, a benzoate is preferably used, and sodium benzoate is more preferably used.
在用於本發明之蝕刻劑組成物中，以除前述組分之含量外的總100wt%組成物之餘量添加水。不特定限制添加於其中之水類型，但是其可為去離子蒸餾水。更佳地，使用電阻率為18MΩ．cm或更大的去離子蒸餾水，其中電阻率表明在水中之離子移除程度。 In the etchant composition used in the present invention, water is added in the balance of the total 100 wt% of the composition excluding the contents of the foregoing components. The type of water added thereto is not particularly limited, but it may be deionized distilled water. More preferably, the resistivity is 18 MΩ. Cm or larger deionized distilled water, where the resistivity indicates the degree of ion removal in the water.
用於本發明之蝕刻劑組成物可進一步包括除前述組分外的習知添加劑，且例如可進一步包括界面活性劑。界面活性劑可起減少表面張力而增加蝕刻均勻性之作用。界面活性劑不受特定限制，只要其可對本發明之蝕刻劑組成物具有抗性且可與其相容，但可包括例如選自由陰離子界面活性劑、陽離子界面活性劑、兩性界面活性劑、非離子界面活性劑、多元醇型界面活性劑或其類似物組成之群之一者或兩者或兩者以上。 The etchant composition used in the present invention may further include a conventional additive other than the foregoing components, and may, for example, further include a surfactant. Surfactants can act to reduce surface tension and increase etch uniformity. The surfactant is not particularly limited as long as it is resistant to and compatible with the etchant composition of the present invention, but may include, for example, an anionic surfactant, a cationic surfactant, an amphoteric surfactant, a nonionic One or a combination of two or more of a surfactant, a polyol type surfactant, or the like.
視情況，除了界面活性劑外，本發明之蝕刻劑組成物可進一步包括螯合劑、腐蝕抑制劑或其類似物作為添加劑。 Optionally, in addition to the surfactant, the etchant composition of the present invention may further comprise a chelating agent, a corrosion inhibitor or the like as an additive.
如上文所描述，由於本發明之用於鉬基金屬膜/金屬氧化物膜之蝕刻劑組成物可選擇性地蝕刻鉬基金屬膜或金屬氧化物膜，因此其可有效用於製備薄膜電晶體陣列，其中像素電極由具有電導性之鉬基金屬或 金屬氧化物形成。 As described above, since the etchant composition for a molybdenum-based metal film/metal oxide film of the present invention can selectively etch a molybdenum-based metal film or a metal oxide film, it can be effectively used for preparing a thin film transistor. An array in which the pixel electrode is made of an electrically conductive molybdenum-based metal or Metal oxide formation.
因此，本發明提供一種製備薄膜電晶體陣列之方法。根據本發明之一個具體實例之製備薄膜電晶體陣列之方法包括：(a)在基板上形成閘電極；(b)在該上面形成有閘電極之基板上形成閘極絕緣層；(c)在閘極絕緣層上形成半導體層；(d)在半導體層上形成源極線及汲極線；及(e)形成連接至汲極線之像素電極，其中步驟(e)包括使用本發明之上述蝕刻劑組成物蝕刻由鉬基金屬膜或金屬氧化物膜形成之層。 Accordingly, the present invention provides a method of preparing a thin film transistor array. A method of fabricating a thin film transistor array according to an embodiment of the present invention includes: (a) forming a gate electrode on a substrate; (b) forming a gate insulating layer on the substrate on which the gate electrode is formed; (c) Forming a semiconductor layer on the gate insulating layer; (d) forming a source line and a drain line on the semiconductor layer; and (e) forming a pixel electrode connected to the drain line, wherein step (e) includes using the above-described The etchant composition etches a layer formed of a molybdenum-based metal film or a metal oxide film.
步驟(a)可包括：(a1)使用氣相沉積或濺鍍法在基板上沉積金屬膜；及(a2)圖案化金屬膜，因此形成閘電極。 The step (a) may include: (a1) depositing a metal film on the substrate using vapor deposition or sputtering; and (a2) patterning the metal film, thereby forming a gate electrode.
本文中，可以由選自由鋁、鋁合金、鉬及鉬合金組成之群之至少一者形成之單膜或多層膜製備金屬膜。在基板上形成金屬膜之方法及金屬膜之材料不限於上文所說明之範圍。舉例而言，金屬膜可由具有高熔點之金屬形成，以免經受由非晶矽形成之活動層在後續製程中結晶期間產生的熱量而變形。 Herein, the metal film may be prepared from a single film or a multilayer film formed of at least one selected from the group consisting of aluminum, aluminum alloy, molybdenum, and molybdenum alloy. The method of forming the metal film on the substrate and the material of the metal film are not limited to the ranges described above. For example, the metal film may be formed of a metal having a high melting point so as not to be deformed by the heat generated by the active layer formed of the amorphous germanium during crystallization in a subsequent process.
在步驟(b)中，矽氮化物(SiNx)沉積於在基板上形成之閘電極的上部部分上，因此形成閘極絕緣層。本文中，描述形成矽氮化物(SiNx)之閘極絕緣層，但不限於此，且可使用選自包括二氧化矽(SiO2)在內之各種無機絕緣材料的材料形成閘極絕緣層。 In the step (b), tantalum nitride (SiN x ) is deposited on the upper portion of the gate electrode formed on the substrate, thus forming a gate insulating layer. Herein, a gate insulating layer forming germanium nitride (SiN x ) is described, but is not limited thereto, and a gate insulating layer may be formed using a material selected from various inorganic insulating materials including germanium dioxide (SiO 2 ). .
在步驟(c)中，使用化學氣相沉積(chemical vapor deposition；CVD)法在閘極絕緣層上形成半導體層。亦即，在閘極絕緣層上依序形成活動層及歐姆接觸層(ohmic contact layer)，且隨後經由乾式蝕刻進行其圖案化。 In the step (c), a semiconductor layer is formed on the gate insulating layer by a chemical vapor deposition (CVD) method. That is, the active layer and the ohmic contact layer are sequentially formed on the gate insulating layer, and then patterned by dry etching.
一般而言，活動層由純非晶矽(a-Si：H)形成，且歐姆接觸層由含雜質非晶矽(n+a-Si：H)形成。描述形成活動層及歐姆接觸層時使用化學氣相沉積(CVD)法，但其不限於此。 In general, the active layer is formed of pure amorphous germanium (a-Si:H), and the ohmic contact layer is formed of impurity-containing amorphous germanium (n+a-Si:H). A chemical vapor deposition (CVD) method is used to describe the formation of the active layer and the ohmic contact layer, but is not limited thereto.
步驟(d)包括：(d1)在半導體層上形成源電極及汲電極；及(d2)在源電極及汲電極上形成絕緣層。 The step (d) includes: (d1) forming a source electrode and a germanium electrode on the semiconductor layer; and (d2) forming an insulating layer on the source electrode and the germanium electrode.
在步驟(d1)中，金屬膜經由濺鍍法沉積於歐姆接觸層上且蝕刻之，因此形成源電極及汲電極。 In the step (d1), the metal film is deposited on the ohmic contact layer by sputtering and etched, thereby forming the source electrode and the germanium electrode.
較佳地，藉由銅/鉬合金雙膜製備源電極及汲電極。然而，形成金屬膜之方法及金屬膜之材料不限於上述實例。 Preferably, the source electrode and the germanium electrode are prepared by a copper/molybdenum alloy double film. However, the method of forming the metal film and the material of the metal film are not limited to the above examples.
在步驟(d2)中，絕緣層可在源電極及汲電極上以選自由無機絕緣材料(包括矽氮化物(SiNx)及二氧化矽(SiO2))組成之群及由有機絕緣材料(包括苯并環丁烯(benzocyclobutene；BCB)及丙烯酸樹脂)組成之群之材料形成單層或雙層。絕緣層之材料不限於上文所說明之實例。 In the step (d2), the insulating layer may be selected from the group consisting of inorganic insulating materials (including silicon nitride (SiN x ) and germanium dioxide (SiO 2 )) and organic insulating materials on the source electrode and the germanium electrode ( A material comprising a group consisting of benzocyclobutene (BCB) and an acrylic resin forms a single layer or a double layer. The material of the insulating layer is not limited to the examples described above.
在步驟(e)中，形成連接至汲電極之像素電極。 In the step (e), a pixel electrode connected to the germanium electrode is formed.
舉例而言，像素電極藉由經由濺鍍法沉積鉬基金屬膜或金屬氧化物膜，且使用本發明之蝕刻劑組成物蝕刻鉬基金屬膜或金屬氧化物膜而形成。沉積上述膜之方法不限於濺鍍法。在製備用於液晶顯示裝置之薄膜電晶體(TFT)陣列基板之方法中，當使用本發明之用於鉬基金屬膜/金屬氧化物膜之蝕刻劑組成物蝕刻鉬基金屬膜或金屬氧化物膜時，可最小化底部銅膜或矽基化合物膜之損害。相應地，有可能最小化對由銅膜形成之資料線的損害，且從而可製備具有改良驅動特徵之TFT陣列基板。 For example, the pixel electrode is formed by depositing a molybdenum-based metal film or a metal oxide film by a sputtering method, and etching the molybdenum-based metal film or the metal oxide film using the etchant composition of the present invention. The method of depositing the above film is not limited to the sputtering method. In a method of preparing a thin film transistor (TFT) array substrate for a liquid crystal display device, when a molybdenum-based metal film or metal oxide is etched using the etchant composition for a molybdenum-based metal film/metal oxide film of the present invention In the case of a film, damage to the underlying copper film or the ruthenium-based compound film can be minimized. Accordingly, it is possible to minimize damage to the data lines formed of the copper film, and thus it is possible to prepare a TFT array substrate having improved driving characteristics.
在下文中，提議較佳具體實例以更具體地描述本發明。然 而，給出以下實施例僅為說明本發明，且熟習此項技術者將顯然瞭解，在本發明之範圍及精神內各種變化及修改均為可能的。該等變化及修改恰當地包括於所附申請專利範圍內。 In the following, preferred embodiments are proposed to more specifically describe the invention. Of course However, the following examples are given to illustrate the invention, and it is obvious to those skilled in the art that various changes and modifications are possible within the scope and spirit of the invention. Such changes and modifications are aptly included in the scope of the appended claims.
實施例Example
實施例及比較實施例Examples and comparative examples
根據列於下表1中之基本組成，已在實施例及比較實施例中製備蝕刻劑組成物(單位：相對於總100wt%之wt%)。 According to the basic compositions listed in Table 1 below, etchant compositions (unit: wt% relative to total 100 wt%) have been prepared in the examples and comparative examples.
實驗實施例Experimental example
實驗實施例1：評估鉬基金屬膜之蝕刻特性Experimental Example 1: Evaluation of etching characteristics of a molybdenum-based metal film
分別使用實施例及比較實施例中製備之蝕刻劑組成物進行鉬基金屬膜之蝕刻製程。將經製備之蝕刻劑組成物置放入處於注入蝕刻模式(injection etching mode)之測試儀器(刻蝕器(TFT),SEMES公司)中，且加熱至約35℃之溫度。通常，蝕刻時間可視蝕刻溫度而不同。在此實驗實施例中，在LCD蝕刻製程中進行鉬基金屬膜之蝕刻持續80秒至100秒，同時進行針對銅(Cu)膜損害之蝕刻持續100秒，且進行針對SiO2損害之蝕刻持續200秒以用於評估其中出現之損害。 The etching process of the molybdenum-based metal film was carried out using the etchant compositions prepared in the examples and the comparative examples, respectively. The prepared etchant composition was placed in a test apparatus (etching apparatus (TFT), SEMES) in an injection etching mode and heated to a temperature of about 35 °C. Generally, the etching time varies depending on the etching temperature. In this experimental embodiment, the etching of the molybdenum-based metal film is performed in the LCD etching process for 80 seconds to 100 seconds, while the etching for the damage of the copper (Cu) film is performed for 100 seconds, and the etching for the SiO 2 damage is continued. 200 seconds to assess the damage that occurred.
洗滌且乾燥之後，藉助於掃描電子顯微鏡(scanning electron microscope；SEM)(由Hitachi公司製造，型號名稱S-4700)評估上述蝕刻製程中蝕刻之鉬基金屬膜之蝕刻概況，及Cu膜及SiO2膜之損害，且所得結果展示於下表2中。對於用於蝕刻製程之鉬基金屬膜，使用Mo-Ti 300Å之薄膜基板。 After washing and drying, an etching profile of the molybdenum-based metal film etched in the above etching process, and a Cu film and SiO 2 were evaluated by means of a scanning electron microscope (SEM) (manufactured by Hitachi, Inc., model name S-4700). Membrane damage, and the results obtained are shown in Table 2 below. For the molybdenum-based metal film used in the etching process, a film substrate of Mo-Ti 300Å is used.
<評估蝕刻概況之標準><Standard for evaluating etching profile>
○：極佳(形成佈線之角度(T/A)為45°至55°) ○: Excellent (the angle at which the wiring is formed (T/A) is 45° to 55°)
△：一般(形成佈線之角度為40°或更大但小於45°，及大於55°且等於或小於60°) △: Normal (the angle at which the wiring is formed is 40° or more but less than 45°, and greater than 55° and equal to or less than 60°)
X：不佳(蝕刻概況：形成佈線之角度小於40°及大於60°)，且佈線寬度分散度大於10% X: Poor (etching profile: the angle at which the wiring is formed is less than 40° and greater than 60°), and the wiring width dispersion is greater than 10%
Unetch：未經蝕刻 Unetch: not etched
<評估蝕刻直度之標準><Standard for evaluating etching straightness>
○：極佳(佈線寬度分散度為5%或更小) ○: Excellent (wiring width dispersion is 5% or less)
△：一般(佈線寬度分散度大於5%且等於或小於10%) △: General (wiring width dispersion is more than 5% and equal to or less than 10%)
X：不佳(佈線寬度分散度大於10%) X: Poor (wiring width dispersion is greater than 10%)
Unetch：未經蝕刻 Unetch: not etched
<評估銅膜損害之標準)<Standard for evaluating copper film damage)
○：極佳(未觀察到損害) ○: Excellent (no damage observed)
△：一般(在Cu膜表面上觀察到形態差異) △: Normal (morphological difference was observed on the surface of the Cu film)
X：不佳(因Cu膜之蝕刻，下層膜(SiO2)曝露) X: Poor (exposed to the underlying film (SiO 2 ) due to etching of the Cu film)
如上表2中所展示，實施例1至實施例7中製備之蝕刻劑組成物各自展現有利蝕刻特徵。 As shown in Table 2 above, the etchant compositions prepared in Examples 1 through 7 each exhibited favorable etching characteristics.
出於參考，使用實施例2之蝕刻劑組成物蝕刻Mo-Ti金屬膜時之SEM像片展示於圖2(蝕刻概況及直度)、圖3(銅膜中出現損害)及圖4(矽基化合物膜中出現損害)中 For reference, the SEM images of the Mo-Ti metal film etched using the etchant composition of Example 2 are shown in Figure 2 (etching profile and straightness), Figure 3 (damage in the copper film), and Figure 4 (矽In the presence of damage in the base compound film)
如圖2至圖4中所展示，可見當使用實施例2之蝕刻劑組成物時，蝕刻概況及直度為極佳而不損害銅膜。另外，SiO2膜中出現之損害經測定為0.1Å/sec或更小之水準。 As shown in Figures 2 to 4, it can be seen that when the etchant composition of Example 2 is used, the etching profile and straightness are excellent without damaging the copper film. In addition, the damage occurring in the SiO 2 film was measured to a level of 0.1 Å/sec or less.
另一方面，比較實施例1中製備之包括5-胺基四唑之蝕刻劑組成物展現如圖5中所展示的極佳蝕刻概況及直度，但如圖6中所展示證實銅膜中出現損害。另外，比較實施例1之蝕刻劑組成物不展現如圖7中所展示之SiO2膜損害的減小。 On the other hand, the etchant composition comprising 5-aminotetrazole prepared in Comparative Example 1 exhibited an excellent etching profile and straightness as shown in FIG. 5, but was confirmed in the copper film as shown in FIG. Damage has occurred. Further, the etchant composition of Comparative Example 1 does not exhibit the SiO 7 shown in FIG. 2 of film damage is reduced.
比較實施例2中製備之包括1,2,3-苯并***之蝕刻劑組成物展現極佳蝕刻概況及直度而不損害銅膜，但未證實SiO2膜之損害減小。 The etchant composition comprising 1,2,3-benzotriazole prepared in Comparative Example 2 exhibited an excellent etching profile and straightness without damaging the copper film, but the damage of the SiO 2 film was not confirmed to be reduced.
此外，比較實施例3中製備之包括本發明揭示範圍外之少量芳族有機酸(鹽)化合物的蝕刻劑組成物展現銅膜及SiO2膜中出現損害，且比較實施例4中製備之包括本發明揭示範圍外之大量芳族有機酸(鹽)化合物的蝕刻劑組成物展現蝕刻速率減小，且從而側蝕量減小，如與其他實施例及比較實施例相比。 Further, the etchant composition prepared in Comparative Example 3 including a small amount of an aromatic organic acid (salt) compound outside the scope of the present invention exhibited damage in the copper film and the SiO 2 film, and was included in Comparative Example 4 An etchant composition of a large amount of an aromatic organic acid (salt) compound outside the scope of the present invention exhibits a reduction in etching rate, and thus a reduction in side etching amount, as compared with other embodiments and comparative examples.
實驗實施例2：評估金屬氧化物膜之蝕刻特性Experimental Example 2: Evaluation of etching characteristics of metal oxide film
分別使用實施例及比較實施例之蝕刻劑組成物進行氧化銦-鎵-鋅(IGZO)之金屬氧化物膜之蝕刻製程。將經製備之蝕刻劑組成物置放入處於注塑蝕刻模式之測試儀器(刻蝕器(TFT),SEMES公司)中，且加熱至約35℃之溫度。通常，蝕刻時間可視蝕刻溫度而不同。在此實驗實施例中，在LCD蝕刻製程中進行鉬基金屬膜之蝕刻持續80秒至100秒，同時進行針對銅(Cu)膜損害之蝕刻持續100秒，且進行針對SiO2損害之蝕刻持續200秒以用於評估其中出現之損害。 An etching process of a metal oxide film of indium oxide-gallium-zinc (IGZO) was carried out using the etchant compositions of the examples and comparative examples, respectively. The prepared etchant composition was placed in a test apparatus (etcher (TFT), SEMES) in an injection-molded mode and heated to a temperature of about 35 °C. Generally, the etching time varies depending on the etching temperature. In this experimental embodiment, the etching of the molybdenum-based metal film is performed in the LCD etching process for 80 seconds to 100 seconds, while the etching for the damage of the copper (Cu) film is performed for 100 seconds, and the etching for the SiO 2 damage is continued. 200 seconds to assess the damage that occurred.
洗滌且乾燥之後，藉助於掃描電子顯微鏡(SEM)(由Hitachi公司製造，型號名稱S-4700)評估上述蝕刻製程中蝕刻之金屬氧化物膜之蝕刻概況，及Cu膜及SiO2膜之損害，且所得結果展示於下表3中。對於用於蝕刻製程之金屬氧化物膜，使用ITO 400Å之薄膜基板。 After washing and drying, the etching profile of the etched metal oxide film in the above etching process, and the damage of the Cu film and the SiO 2 film were evaluated by means of a scanning electron microscope (SEM) (manufactured by Hitachi, Inc., model name S-4700). The results obtained are shown in Table 3 below. For the metal oxide film used in the etching process, a film substrate of ITO 400Å is used.
蝕刻特性評估結果與實驗實施例1相同，且所得結果展示於下表3中。 The etching property evaluation results were the same as in Experimental Example 1, and the results obtained are shown in Table 3 below.
參考表3，實施例中之蝕刻劑組成物各自展現有利的蝕刻特徵。 Referring to Table 3, the etchant compositions in the examples each exhibited advantageous etch characteristics.
出於參考，使用實施例9之蝕刻劑組成物蝕刻氧化銦-鎵-鋅(IGZO)之金屬氧化物膜時之SEM像片展示於圖8(蝕刻概況及直度)、圖9(銅膜中出現損害)及圖10(矽基化合物膜中出現損害)中 For reference, the SEM image of the indium oxide-gallium-zinc (IGZO) metal oxide film etched using the etchant composition of Example 9 is shown in FIG. 8 (etching profile and straightness), and FIG. 9 (copper film). In the case of damage) and Figure 10 (damage in the ruthenium compound film)
如圖8至圖10中所展示，可見當使用實施例9之蝕刻劑組成物時，蝕刻概況及直度為極佳而不損害銅膜。另外，SiO2膜中出現之損害經測定為0.1Å/sec或更小之水準。 As shown in FIGS. 8 to 10, it can be seen that when the etchant composition of Example 9 was used, the etching profile and the straightness were excellent without damaging the copper film. In addition, the damage occurring in the SiO 2 film was measured to a level of 0.1 Å/sec or less.
另一方面，比較實施例5中製備之包括5-胺基四唑之蝕刻劑組成物展現如圖11中所展示的極佳蝕刻概況及直度，但如圖12中所展示證實銅膜中出現損害。另外，比較實施例5之蝕刻劑組成物不展現如圖13中所展示之SiO2膜損害的減小。 On the other hand, the etchant composition comprising 5-aminotetrazole prepared in Comparative Example 5 exhibited an excellent etching profile and straightness as shown in FIG. 11, but was confirmed in the copper film as shown in FIG. Damage has occurred. In addition, the etchant composition of Comparative Example 5 did not exhibit a reduction in SiO 2 film damage as shown in FIG.
比較實施例6中製備之包括1,2,3-苯并***之蝕刻劑組成物展現極佳蝕刻概況及直度而不損害銅膜，但未證實SiO2膜之損害減小。 The etchant composition comprising 1,2,3-benzotriazole prepared in Comparative Example 6 exhibited excellent etching profile and straightness without damaging the copper film, but the damage of the SiO 2 film was not confirmed to be reduced.
此外，比較實施例7中製備之包括本發明揭示範圍外之少量芳族有機酸(鹽)化合物的蝕刻劑組成物展現銅膜及SiO2膜中出現損害，且比較實施例8中製備之包括本發明揭示範圍外之大量芳族有機酸(鹽)化合物的蝕刻劑組成物展現蝕刻速率減小，且從而側蝕量減小，如與其他實施例及比較實施例相比。 Further, the etchant composition prepared in Comparative Example 7 including a small amount of an aromatic organic acid (salt) compound outside the scope of the present invention exhibited damage in the copper film and the SiO 2 film, and was prepared in Comparative Example 8. An etchant composition of a large amount of an aromatic organic acid (salt) compound outside the scope of the present invention exhibits a reduction in etching rate, and thus a reduction in side etching amount, as compared with other embodiments and comparative examples.
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Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102472938A (en) * | 2009-07-23 | 2012-05-23 | 东友Fine-Chem股份有限公司 | Method for fabricating an array substrate for a liquid crystal display device |
| TW201224211A (en) * | 2010-12-10 | 2012-06-16 | Dongwoo Fine Chem Co Ltd | Composition solution and method of manufacturing an arrayed substrate for LCD, etching copper-based metal layer using the same, and arrayed substrate of LCD |
| TW201226532A (en) * | 2010-12-21 | 2012-07-01 | Dongwoo Fine Chem Co Ltd | Etching solution composition for alloy layer comprising mo and ti, or indium oxide layer, and a flat panel display |
| CN102576170A (en) * | 2009-08-20 | 2012-07-11 | 东友Fine-Chem股份有限公司 | Method of fabricating array substrate for liquid crystal display |
| TW201307972A (en) * | 2011-08-04 | 2013-02-16 | Dongwoo Fine Chem Co Ltd | Manufacturing method of an array substrate for liquid crystal display, method of forming a wiring, etching agent composition used for the multi-layer film and array substrate for liquid crystal display |
| TW201309850A (en) * | 2011-08-22 | 2013-03-01 | Dongwoo Fine Chem Co Ltd | Wire forming method and etchant composition for copper-based metal film |
| TW201324781A (en) * | 2011-11-04 | 2013-06-16 | Dongwoo Fine Chem Co Ltd | Method of manufacturing array substrate for liquid crystal display, method of forming metal wirings, etching solution composition for metal oxide semiconductor layer, and array substrate for liquid crystal display |
Family Cites Families (4)
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| KR100505328B1 (en) * | 2002-12-12 | 2005-07-29 | 엘지.필립스 엘시디 주식회사 | ETCHING SOLUTIONS AND METHOD TO REMOVE MOLYBDENUM RESIDUE FOR Cu MOLYBDENUM MULTILAYERS |
| CN102983101B (en) * | 2011-08-04 | 2015-06-17 | 东友精细化工有限公司 | Manufacturing method of array substrate for liquid crystal display |
| KR101349975B1 (en) * | 2011-11-17 | 2014-01-15 | 주식회사 이엔에프테크놀로지 | Etchant composition for molybdenium alloy layer and indium oxide layer |
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-
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Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102472938A (en) * | 2009-07-23 | 2012-05-23 | 东友Fine-Chem股份有限公司 | Method for fabricating an array substrate for a liquid crystal display device |
| CN102576170A (en) * | 2009-08-20 | 2012-07-11 | 东友Fine-Chem股份有限公司 | Method of fabricating array substrate for liquid crystal display |
| TW201224211A (en) * | 2010-12-10 | 2012-06-16 | Dongwoo Fine Chem Co Ltd | Composition solution and method of manufacturing an arrayed substrate for LCD, etching copper-based metal layer using the same, and arrayed substrate of LCD |
| TW201226532A (en) * | 2010-12-21 | 2012-07-01 | Dongwoo Fine Chem Co Ltd | Etching solution composition for alloy layer comprising mo and ti, or indium oxide layer, and a flat panel display |
| TW201307972A (en) * | 2011-08-04 | 2013-02-16 | Dongwoo Fine Chem Co Ltd | Manufacturing method of an array substrate for liquid crystal display, method of forming a wiring, etching agent composition used for the multi-layer film and array substrate for liquid crystal display |
| TW201309850A (en) * | 2011-08-22 | 2013-03-01 | Dongwoo Fine Chem Co Ltd | Wire forming method and etchant composition for copper-based metal film |
| TW201324781A (en) * | 2011-11-04 | 2013-06-16 | Dongwoo Fine Chem Co Ltd | Method of manufacturing array substrate for liquid crystal display, method of forming metal wirings, etching solution composition for metal oxide semiconductor layer, and array substrate for liquid crystal display |
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