TWI612679B

TWI612679B - A photovoltaic cell and a method of generating electricity

Info

Publication number: TWI612679B
Application number: TW104112820A
Authority: TW
Inventors: 柯瑞Ｅ勒納
Original assignee: 哥倫布光伏有限公司
Priority date: 2015-04-22
Filing date: 2015-04-22
Publication date: 2018-01-21
Also published as: TW201639183A

Abstract

本發明提供一種光伏電池，其併入一完全由單一導體類型所構成的半導體元件(10)。一功函數不同於該半導體元件之功函數的偏壓劑(26)疊置在該元件的某一面上方以及產生能帶彎折並且因而在一空間電荷區中產生電場。多個電極會接觸該空間電荷區裡面的半導體元件。由在該半導體元件中被吸收的光所產生的載子會由該電場朝該些電極加速。 The present invention provides a photovoltaic cell incorporating a semiconductor component (10) that is entirely composed of a single conductor type. A biasing agent (26) having a work function different from the work function of the semiconductor component is stacked over a face of the component and creates an energy band bend and thus generates an electric field in a space charge region. A plurality of electrodes contact the semiconductor components in the space charge region. The carriers generated by the light absorbed in the semiconductor element are accelerated by the electric field toward the electrodes.

Description

光伏電池和產生電力的方法 Photovoltaic cells and methods of generating electricity

本發明和光伏電池有關。 The invention relates to photovoltaic cells.

相關申請案交叉參考 Related application cross reference

本申請案主張2013年11月4日提申的美國臨時專利申請案第61/899,400號之提申日期的權利，該案標題為「沒有半導體接面的高能隙太陽能電池(HIGH BAND GAP SOLAR CELLS WITHOUT SEMICONDUCTOR JUNCTION)」，本文以引用的方式將其揭示內容併入。 This application claims the right to file the filing date of U.S. Provisional Patent Application Serial No. 61/899,400, filed on November 4, 2013, entitled "HIGH BAND GAP SOLAR CELLS WITHOUT SEMICONDUCTOR JUNCTION), the disclosure of which is incorporated herein by reference.

迄今為止，本技術中已經非常努力開發光伏電池，也就是，能夠將光轉換成電能的半導體裝置。一般來說，此些電池會併入多層半導體材料，其包含n型半導體(其中，主要以及多數電荷載子為電子)與p型半導體(其中，多數電荷載子為電洞)。此些層會一起定義一p-n接面。多個電極被提供接觸該接面相反兩側上的半導體材料。當彼此隔離時，p型材料與n型材料因不同摻雜的關係而有不同的費米能階(Fermi level)。費米能階係一讓該能階充滿電子的機率為50%的能量位準。當該些p型材料與n型材料於該電池的p-n接面處彼此結合時，該些費米能階會達到彼此平衡並且形成一空間電荷區(space charge region)。該空間電荷區於該接面附近提供一電場。當光照射該半導體材料時，外來的光子會讓電子從該半導體材料的價電帶(valence band)提升至導電帶(conduction band)，因而提高電荷載子的數量。「能隙(band gap)」一詞係指一半導體材料的價電帶與該材料的導電帶之間的能量差異。 To date, efforts have been made in the art to develop photovoltaic cells, that is, semiconductor devices capable of converting light into electrical energy. In general, such cells incorporate a multilayer semiconductor material that includes an n-type semiconductor (wherein the majority and most charge carriers are electrons) and a p-type semiconductor (where most charge carriers are holes). These layers together define a p-n junction. A plurality of electrodes are provided to contact the semiconductor material on opposite sides of the junction. When isolated from each other, the p-type material and the n-type material have different Fermi levels due to different doping relationships. The Fermi energy system is a 50% energy level that allows the energy level to be filled with electrons. When the p-type material and the n-type material are bonded to each other at the p-n junction of the battery, the Fermi energy levels will reach equilibrium with each other and form a space charge region. The space charge region provides an electric energy near the junction field. When light illuminates the semiconductor material, foreign photons lift electrons from the valence band of the semiconductor material to a conduction band, thereby increasing the number of charge carriers. The term "band gap" refers to the difference in energy between a valence band of a semiconductor material and a conductive strip of the material.

該空間電荷區的電場會加速跨越該p-n接面的電荷載子。電洞與電子會在相反方向中移動。電子會通往接觸n型材料的一第一電極，反之，電洞則通往接觸p型材料的一第二電極。這會在該些電極之間創造一電位差，並且因而在該些電極處創造實用、可利用的電能。一被連接至該些電極的外部電路便能夠運用此電能。 The electric field of the space charge region accelerates the charge carriers across the p-n junction. The holes and electrons move in the opposite direction. The electrons lead to a first electrode that contacts the n-type material, whereas the hole leads to a second electrode that contacts the p-type material. This creates a potential difference between the electrodes and thus creates practical, available electrical energy at the electrodes. An external circuit connected to the electrodes can use this electrical energy.

可從此些p-n接面電池處取得的電壓或電位差有限。此電池的最大電壓輸出會受限於n型材料的導電帶的能階與p型材料的價電帶的能階之間的差異。此差異通常小於該半導體的能隙。本技術領域希望利用有寬能隙(舉例來說，約1.7電子伏特或更大)的材料來形成光伏電池。寬能隙材料會有效吸收約小於800奈米的之波長處的光。此光落在頻譜的可見光與紫外光部分中並且構成照射在地球上的太陽能的大部分。又，由寬能隙材料所形成的電池亦能夠配合由窄能隙材料所形成的電池來使用。於此排列中，寬能隙電池係被設置在窄能隙電池前面。長波長的光不會被寬能隙電池吸收並且通過抵達該窄能隙電池而於該窄能隙電池被吸收。 The voltage or potential difference that can be obtained from such p-n junction cells is limited. The maximum voltage output of this battery is limited by the difference between the energy level of the conductive strip of the n-type material and the energy level of the valence band of the p-type material. This difference is typically less than the energy gap of the semiconductor. It is desirable in the art to utilize materials having a wide energy gap (e.g., about 1.7 electron volts or greater) to form a photovoltaic cell. The wide bandgap material effectively absorbs light at wavelengths less than about 800 nm. This light falls in the visible and ultraviolet portions of the spectrum and constitutes the majority of the solar energy that illuminates the Earth. Further, a battery formed of a wide energy gap material can also be used in conjunction with a battery formed of a narrow gap material. In this arrangement, a wide bandgap cell is placed in front of a narrow bandgap cell. Long wavelength light is not absorbed by the wide bandgap cell and is absorbed in the narrow bandgap cell by reaching the narrow bandgap cell.

由矽所形成的p-n接面電池能夠藉由相對廉價的製程來製作，例如，摻雜物植入於矽晶圓之中。然而，矽的能隙為1.12eV。於特定寬能隙半導體材料中製造p-n接面電池需要藉由一序列式磊晶沉積製程來形成多層。於一磊晶沉積製程中，該材料會藉由沉積材料(最典型的係蒸氣或氣體狀態)於一既有的固體晶體上而被成長於一基板上，俾使得該已成長的晶體會形成於晶體晶格分隔距離取決於該基板之晶格分隔距離的結構中。然而，利用特定寬能隙半導體材料來成長相反導體類型的高品質半導體材料卻很困難。因此，迄今為止，本技術中雖然已經非常努力開發光伏電池；但是，仍希望有進一步的改良。 The p-n junction cell formed by ruthenium can be fabricated by a relatively inexpensive process, for example, dopant implantation in a germanium wafer. However, the energy gap of xenon is 1.12 eV. Fabricating a p-n junction cell in a particular wide bandgap semiconductor material requires the formation of multiple layers by a sequential epitaxial deposition process. In an epitaxial deposition process, the material is deposited by deposition (the most typical vapor Or a gaseous state is grown on a substrate on an existing solid crystal such that the grown crystal is formed in a structure in which the crystal lattice separation distance depends on the lattice separation distance of the substrate. However, it is difficult to grow a high quality semiconductor material of the opposite conductor type using a particular wide bandgap semiconductor material. Therefore, to date, although photovoltaic devices have been very hard to develop in the art; however, further improvements are still desired.

根據本發明之一實施例的光伏電池希望包含一半導體元件，其具有一前面、一後面、以及一介於該些面之間的厚度方向。該半導體元件希望完全由n型半導體所構成或者完全由p型半導體所構成。一偏壓劑(biasing agent)希望疊置在該半導體元件的該些面的第一面上方。該偏壓劑希望具有不同於該半導體元件之正常費米能階或功函數的費米能階或功函數。該偏壓劑會於該半導體元件中產生能帶彎折，因此，一空間電荷區會存在於該半導體元件裡面並且在整個空間電荷區中會於該厚度方向中有一單向電位梯度。該電池還希望包含在厚度方向中彼此隔開的前電極與後電極，該些電極中的每一者在沒有照射時接觸該空間電荷區裡面的半導體元件。 A photovoltaic cell in accordance with an embodiment of the present invention desirably includes a semiconductor component having a front side, a back side, and a thickness direction between the faces. The semiconductor element is desirably composed entirely of an n-type semiconductor or entirely composed of a p-type semiconductor. A biasing agent desirably overlies the first side of the faces of the semiconductor component. The biasing agent desirably has a Fermi level or work function that is different from the normal Fermi level or work function of the semiconductor component. The biasing agent creates a band bend in the semiconductor component. Therefore, a space charge region is present in the semiconductor device and a unidirectional potential gradient is present in the thickness direction throughout the space charge region. The battery also desirably includes front and back electrodes spaced apart from one another in the thickness direction, each of the electrodes contacting the semiconductor component within the space charge region when not illuminated.

本發明的進一步觀點提供產生電力的方法。根據本發明此項觀點的方法希望包含在完全由p型半導體所構成或者完全由n型半導體所構成的半導體元件的整個空間電荷區中的一梯度方向中維持一單向電位梯度。該方法還希望包含在維持該電位梯度時將光導入至該空間電荷區之中，俾使得該光的至少一部分被該半導體吸收並且該被吸收光會將電子從價電帶提升至導電帶。該方法還希望進一步包含在一對電極處收集電流，該對電極在該梯度方向中彼此隔開並且接觸該空間電荷區裡面或鄰近的半導體。最佳的係，在該收集步驟期間，該些電極接觸該空間電荷區裡面的半導體。 A further aspect of the invention provides a method of generating electrical power. The method according to this aspect of the present invention desirably includes maintaining a unidirectional potential gradient in a gradient direction in the entire space charge region of the semiconductor element composed entirely of the p-type semiconductor or entirely composed of the n-type semiconductor. The method also desirably includes introducing light into the space charge region while maintaining the potential gradient such that at least a portion of the light is absorbed by the semiconductor and the absorbed light lifts electrons from the valence band to the conductive band. The method also desirably further comprises collecting current at a pair of electrodes, The pair of electrodes are spaced apart from each other in the gradient direction and contact the semiconductor within or adjacent to the space charge region. Preferably, during the collecting step, the electrodes contact the semiconductor within the space charge region.

根據本發明進一步觀點的光伏電池希望包含一半導體元件，其具有一第一面、一第二面、以及一介於該些面之間的厚度方向。一偏壓劑希望僅疊置在該第一面的一第一部分上方並且在該半導體元件中產生能帶彎折。一第一電極較佳的係疊置在該第一面的一第二部分上方並且接觸該第二部分，該第二部分與該第一部分分離。於本發明的此項觀點中，該第一電極希望沒有與該偏壓劑直接導體性接觸。根據本發明此項觀點的電池包含一第二電極，其在一與該第一面隔開的位置處接觸該半導體元件。 A photovoltaic cell according to a further aspect of the present invention desirably includes a semiconductor component having a first face, a second face, and a thickness direction between the faces. A biasing agent desirably only overlies a first portion of the first side and creates a band bend in the semiconductor component. A first electrode is preferably stacked over a second portion of the first face and contacts the second portion, the second portion being separated from the first portion. In this aspect of the invention, the first electrode desirably does not have direct conductive contact with the biasing agent. A battery according to this aspect of the invention includes a second electrode that contacts the semiconductor element at a location spaced apart from the first side.

10‧‧‧半導體元件 10‧‧‧Semiconductor components

12‧‧‧前面 12‧‧‧ front

14‧‧‧後面 14‧‧‧Back

16‧‧‧半導體層或基板層 16‧‧‧Semiconductor or substrate layer

17‧‧‧半導體層或基板層 17‧‧‧Semiconductor or substrate layer

18‧‧‧半導體層或基板層 18‧‧‧Semiconductor or substrate layer

20‧‧‧能階曲線 20‧‧‧ energy level curve

21‧‧‧電極 21‧‧‧ electrodes

22‧‧‧能階曲線 22‧‧‧ energy level curve

23‧‧‧電極 23‧‧‧Electrode

26‧‧‧偏壓劑 26‧‧‧ biasing agent

28‧‧‧空間電荷區的邊界 28‧‧‧The boundary of the space charge zone

28'‧‧‧空間電荷區的邊界 28'‧‧‧The boundary of the space charge zone

29‧‧‧外部電路 29‧‧‧External Circuit

30‧‧‧電極 30‧‧‧Electrode

31‧‧‧切換器 31‧‧‧Switcher

32‧‧‧電子從價電帶提升至導電帶 32‧‧‧Electronic price belts raised to conductive tape

33‧‧‧負載 33‧‧‧load

36‧‧‧理論性邊界 36‧‧‧ theoretical boundaries

110‧‧‧半導體元件 110‧‧‧Semiconductor components

111‧‧‧高度摻雜半導體材料薄層 111‧‧‧Layer of highly doped semiconductor material

126‧‧‧偏壓劑 126‧‧‧ biasing agent

130‧‧‧第二電極 130‧‧‧second electrode

131‧‧‧金屬層 131‧‧‧metal layer

210‧‧‧半導體主體 210‧‧‧Semiconductor main body

226‧‧‧偏壓劑 226‧‧‧ biasing agent

230‧‧‧第二電極 230‧‧‧second electrode

301‧‧‧電極元件 301‧‧‧Electrode components

303‧‧‧繞線線路 303‧‧‧Winding circuit

305‧‧‧第一金屬層 305‧‧‧First metal layer

307‧‧‧第二金屬層 307‧‧‧Second metal layer

309‧‧‧電氣絕緣體 309‧‧‧Electrical insulator

310‧‧‧半導體元件 310‧‧‧Semiconductor components

312‧‧‧第一表面 312‧‧‧ first surface

320‧‧‧沒有外部偏壓電壓時的半導體的導電帶 320‧‧‧Semiconductor strips without external bias voltage

321‧‧‧有外部偏壓電壓時的半導體的導電帶 321‧‧‧Semiconductor strip with external bias voltage

326‧‧‧偏壓劑 326‧‧‧ biasing agent

327‧‧‧p+型半導體 327‧‧‧p+ semiconductor

329‧‧‧躍遷層 329‧‧‧ transition layer

330‧‧‧第二電極 330‧‧‧second electrode

331‧‧‧外部負載 331‧‧‧External load

401‧‧‧電極元件 401‧‧‧Electrode components

409‧‧‧絕緣體 409‧‧‧Insulator

410‧‧‧半導體元件 410‧‧‧Semiconductor components

412‧‧‧第一表面 412‧‧‧ first surface

426‧‧‧偏壓劑 426‧‧‧ biasing agent

428‧‧‧空間電荷區的邊界 428‧‧‧The boundary of the space charge zone

430‧‧‧第二電極 430‧‧‧second electrode

圖1所示的係根據本發明之一實施例的光伏電池的剖視圖，該光伏電池被連接至一外部電路。 1 is a cross-sectional view of a photovoltaic cell in accordance with an embodiment of the present invention, the photovoltaic cell being coupled to an external circuit.

圖2與3所示的係根據本發明進一步實施例的電池的剖視圖。 2 and 3 are cross-sectional views of a battery in accordance with a further embodiment of the present invention.

圖4所示的係根據本發明又一實施例的電池的平面視圖。 4 is a plan view of a battery according to still another embodiment of the present invention.

圖5所示的係沿著圖4中的直線5-5所獲得的剖視圖。 Figure 5 is a cross-sectional view taken along line 5-5 of Figure 4.

圖6所示的係根據本發明又一實施例的電池的剖視圖，類似於圖5。 Figure 6 is a cross-sectional view of a battery according to still another embodiment of the present invention, similar to Figure 5.

根據本發明之一實施例的光伏電池包含一半導體元件10，其具有一前面12、一後面14、以及一延伸在此些面之間的厚度方向。如本文中的用法，並且如本技術中的正常理解，延伸在一實心物體的兩面之間的厚度方向為介於該兩面之間的最短直線的方向。該兩面彼此平行，如圖1中，該厚度方向為垂直於該兩面的方向。於圖中所示的實施例中，該厚度方向圖1中箭頭T所示的水平方向。半導體元件10視情況可以與一或更多個額外的半導體層或基板層16、17、以及18統合。於此實施例中，該些額外層遠離該半導體主體10中扮演產生電能角色的區域，且據此，該些額外層能夠有實質上任何組成物以及任何導體類型。舉例來說，該些額外層可以包含一電絕緣層17以及由能隙小於元件10中之半導體的半導體所形成的層16與18。層16與18可以為相反導體類型，且因此可以定義一習知的p-n接面電池，其具有21與23處概略圖示的電極。 A photovoltaic cell in accordance with an embodiment of the present invention includes a semiconductor component 10 having a front face 12, a rear face 14, and a thickness direction extending between the faces. As used herein, and as normally understood in the art, extends between two sides of a solid object The thickness direction is the direction of the shortest line between the two faces. The two faces are parallel to each other, as shown in Fig. 1, the thickness direction is a direction perpendicular to the two faces. In the embodiment shown in the figures, the thickness direction is the horizontal direction indicated by the arrow T in FIG. The semiconductor component 10 can be integrated with one or more additional semiconductor or substrate layers 16, 17, and 18, as appropriate. In this embodiment, the additional layers are remote from the area of the semiconductor body 10 that acts to generate electrical energy, and accordingly, the additional layers can have substantially any composition and any conductor type. For example, the additional layers may include an electrically insulating layer 17 and layers 16 and 18 formed of a semiconductor having a lower energy band than the semiconductor in component 10. Layers 16 and 18 can be of the opposite conductor type, and thus a conventional p-n junction cell can be defined having electrodes as schematically illustrated at 21 and 23.

於此實施例中，半導體元件10完全由具有單一導體類型的半導體材料所構成。於圖中所示的範例中，該導體類型為n型。該半導體基本上能夠為任何半導體，舉例來說，III-V半導體，例如，包含由選擇自由鎵、銦、以及鋁所構成之群中的一或更多個III族元素以及選擇自由氮、磷、砷、以及銻所構成之群中的一或更多個V族元素的III-V半導體。或者，該半導體材料亦能夠為II-VI半導體，其包含由選擇自由鎘、鋅、以及汞所構成之群中的一或更多個II族金屬以及選擇自由氧、硫、硒、以及碲所構成之群中的一或更多個VI族元素。該半導體亦可以為一IV族半導體，例如，矽或碳化矽。該半導體可以不被摻雜；可以藉由加入一或更多摻雜物至該名義半導體而被刻意摻雜；或者，舉例來說，可以因晶格空位而被非刻意摻雜。舉例來說，氮化鎵可以在常見的磊晶成長製程中被形成在一非刻意摻雜的n型半導體之中。該些摻雜物以及該半導體本身的其它顆粒可以為習知。 In this embodiment, the semiconductor component 10 is entirely composed of a semiconductor material having a single conductor type. In the example shown in the figure, the conductor type is n-type. The semiconductor can be substantially any semiconductor, for example, a III-V semiconductor, for example, comprising one or more Group III elements selected from the group consisting of free gallium, indium, and aluminum, and selective free nitrogen, phosphorus. a III-V semiconductor of one or more group V elements of the group consisting of arsenic and antimony. Alternatively, the semiconductor material can also be a II-VI semiconductor comprising one or more Group II metals selected from the group consisting of cadmium, zinc, and mercury, and selected free oxygen, sulfur, selenium, and germanium. One or more Group VI elements in the group. The semiconductor can also be a Group IV semiconductor, such as germanium or tantalum carbide. The semiconductor may not be doped; it may be deliberately doped by adding one or more dopants to the nominal semiconductor; or, for example, may be deliberately doped due to lattice vacancies. For example, gallium nitride can be formed in a non-deliberately doped n-type semiconductor in a common epitaxial growth process. The dopants and other particles of the semiconductor itself may be conventional.

在圖1中假設該些額外層16、17、以及18不會影響該半導體的電子狀態。沒有受到外界影響干擾的材料的特性於本文中稱為該材料的「正常」特性。該材料具有一導電帶與一價電帶。導電帶的正常能階表示為Ec並且價電帶的正常能階表示為Ev。於如圖示的n型半導體中，正常的費米能階E_FS在正常的導電帶能階Ec之下。 It is assumed in Figure 1 that the additional layers 16, 17, and 18 do not affect the electronic state of the semiconductor. The properties of a material that is not interfered by external influences are referred to herein as the "normal" characteristics of the material. The material has a conductive strip and a monovalent electrical strip. The normal energy level of the conductive strip is denoted as Ec and the normal energy level of the valence band is denoted as Ev. In the n-type semiconductor as illustrated, the normal Fermi level E _{FS is} below the normal conduction band energy level Ec.

一層偏壓劑26疊置在該半導體元件10的前表面12上方。於此範例中，該偏壓劑26被塗敷為一薄層，因此，該偏壓劑對落在被該半導體吸收之波長中的光為透明。如本揭示內容中的用法，「透明」一詞表示一元件會讓落在感興趣波長中的光的大部分透射穿過該元件。完全透明(也就是，100%的透射)並不需要。如此處，當半導體元件10為n型時，偏壓劑26的正常費米能階E_FM會在該半導體的正常費米能階E_FS之下。換言之，該偏壓劑的功函數Φm大於該半導體在其正常狀態中的功函數。一材料的功函數為將一電子從該材料的費米能階處移至真空所需要的能量。一金屬的功函數亦稱為該金屬的「電子親和性」。於圖中所繪的特殊範例中，偏壓劑26為一導電金屬。舉例來說，當半導體元件10為II-VI半導體時，例如，n摻雜至10¹⁷，有約4.2電子伏特(eV)之功函數的硫化鎘，偏壓劑26可以為一金屬，例如，有約4.78eV之功函數的金。於此實施例中，偏壓層26為一夠薄而足以為透明的金屬層。該金屬為導體，俾使得該偏壓劑充當一第一電極。 A layer of biasing agent 26 is stacked over the front surface 12 of the semiconductor component 10. In this example, the biasing agent 26 is applied as a thin layer so that the biasing agent is transparent to light falling in the wavelength absorbed by the semiconductor. As used in this disclosure, the term "transparent" means that a component transmits a substantial portion of the light that falls within the wavelength of interest through the element. Complete transparency (ie, 100% transmission) is not required. As here, when the semiconductor component 10 is of the n-type, the normal Fermi level E _{FM of the} biasing agent 26 will be below the normal Fermi level E _FS of the semiconductor. In other words, the work function Φm of the biasing agent is greater than the work function of the semiconductor in its normal state. The work function of a material is the energy required to move an electron from the Fermi level of the material to a vacuum. The work function of a metal is also known as the "electron affinity" of the metal. In the particular example depicted in the figures, the biasing agent 26 is a conductive metal. For example, when the semiconductor component 10 is a II-VI semiconductor, for example, n-doped to 10 ¹⁷ , cadmium sulfide having a work function of about 4.2 electron volts (eV), the biasing agent 26 may be a metal, for example, There is a gold of about 4.78 eV work function. In this embodiment, the bias layer 26 is a metal layer that is thin enough to be transparent. The metal is a conductor such that the biasing agent acts as a first electrode.

在圖1中，該半導體元件及相關聯的結構顯示在一開路、黑暗情形中。於此情形中，沒有任何光落在該半導體上並且沒有電流流經該半導體。該金屬與半導體的功函數平衡在共同費米能階F_E所示的位準處。於一金屬與半導體之圖中所示的情況中，該平衡費米能階F_E實質上等於該金屬的正常費米能階F_M。換言之，該半導體的費米能階下降至該平衡費米能階F_E。為發生此情況，電子會從該半導體相鄰前表面12處被轉移至該偏壓劑。這會在該半導體中於本文中被稱為「空間電荷區」的整個區域中的半導體產生電子空乏，亦稱為相鄰於該前表面12的「空乏區」，並且因而帶正電，並且讓該偏壓劑帶負電。於該偏壓劑中的電荷會集中在一極薄的區域中，通常為數個埃的厚度，其被稱為鄰接該半導體之前表面12的「得爾它電荷區(delta charge region)」(圖中並未顯示)。在相鄰於該前表面的半導體的導電帶中的電子會被該偏壓劑上的負電荷排斥。在與該前表面相隔越來越大的距離處，排斥力會因介於該偏壓劑與電子之間的帶正半導體的數量越來越多而而降低。換言之，在該半導體的該空間電荷區裡面會有一電場。於該空間電荷區裡面的半導體的導電帶中的任何電子會有由該電場所給予的額外電位能並且因而處在高於該空間電荷區外面的該導電帶中的電子的能階處。曲線20的向上彎折即表示此結果。因為半導體的能隙為一固定數，所以，價電帶的能階同樣會在該空間電荷區中增加，如曲線22的向上彎折所示。「能帶彎折」一詞常被用來描述該空間電荷區裡面的能階的扭曲。此些曲線中的向上彎折的大小等於半導體10的正常費米能階與該偏壓劑26的正常費米能階之間的差異。此差異稱為該金屬-半導體接面的「內建電壓(Built In Voltage。V_BI)」。電場的強度由曲線20的斜率來表示並且逐漸傾斜至該空間電荷區之邊界處的零值，如圖1中的直線28所示。在黑暗、開路情形下的空間電荷區的厚度t_sc相依於該半導體的載子濃度以及該內建電壓V_BI與介電常數。於此些情形下的厚度t_sc可由熟習本技術的人士輕易算出。舉例來說，在各種內建電壓處被摻雜至各種載子濃度的硫化鎘的t_sc的約略數值如下面表I中所示。表I中亦顯示最大電場E_MAX。 In Figure 1, the semiconductor component and associated structure are shown in an open, dark situation. In this case, no light falls on the semiconductor and no current flows through the semiconductor. The work function of the metal and the semiconductor is balanced at the level indicated by the common Fermi level F _E . In the case shown in the diagram of a metal and semiconductor, the equilibrium Fermi level F _E is substantially equal to the normal Fermi level F _{M of} the metal. In other words, the Fermi level of the semiconductor drops to the equilibrium Fermi level F _E . To this happen, electrons are transferred from the adjacent front surface 12 of the semiconductor to the biasing agent. This would cause electron depletion in the semiconductor in the semiconductor as referred to herein as the "space charge region", also known as the "depletion region" adjacent to the front surface 12, and thus positively charged, and The biasing agent is negatively charged. The charge in the biasing agent will concentrate in a very thin region, typically a few angstroms thick, which is referred to as the "delta charge region" adjacent to the front surface 12 of the semiconductor (Fig. Not shown). Electrons in the conductive strip of the semiconductor adjacent to the front surface are repelled by the negative charge on the biasing agent. At a greater distance from the front surface, the repulsive force is reduced by the increasing number of positively charged semiconductors between the biasing agent and the electrons. In other words, there is an electric field in the space charge region of the semiconductor. Any electrons in the conductive strip of the semiconductor within the space charge region will have additional potential energy imparted by the electrical field and thus be at an energy level of the electrons in the conductive strip above the space charge region. The upward bend of curve 20 represents this result. Since the energy gap of the semiconductor is a fixed number, the energy level of the valence band also increases in the space charge region, as indicated by the upward bend of curve 22. The term "bend bend" is often used to describe the distortion of the energy level in the space charge region. The magnitude of the upward bend in such curves is equal to the difference between the normal Fermi level of the semiconductor 10 and the normal Fermi level of the biasing agent 26. This difference is referred to as "Built In Voltage (V _BI )" of the metal-semiconductor junction. The intensity of the electric field is represented by the slope of curve 20 and gradually ramps to a zero value at the boundary of the space charge region, as indicated by line 28 in FIG. The thickness _tsc of the space charge region in the case of darkness and open circuit depends on the carrier concentration of the semiconductor and the built-in voltage _VBI and dielectric constant. The thickness t _{sc in} these cases can be easily calculated by those skilled in the art. For example, the approximate value is doped to a carrier concentration of cadmium sulfide variety of built-in voltage at various t _sc as shown in Table I below. The maximum electric field E _MAX is also shown in Table I.

根據此實施例的光伏電池還包含一第二電極30。該第二電極30在厚度方向中與前表面12以及第一電極26隔開。換言之，電極26與30沒有彼此接觸並且在厚度方向中於此些電極之間有非零距離d₂。一部分的半導體元件10被設置在此些電極之間。在厚度方向中介於前表面12與第二電極30之間的距離d₂小於在黑暗、開路情形下的空間電荷區的厚度t_sc。換言之，該第二電極會接觸在黑暗、開路情形下的空間電荷區裡面的半導體。因此，電極 26與30會接觸該半導體元件10的空間電荷區。於此實施例中，電極30對低能量光子為透明，該些光子會穿過抵達由層16與18所形成的額外電池。實務上，電極30可以包含一金屬的薄層或是彼此隔開的複數個不透明導體，俾使得光能夠透射穿過介於該些導體之間的空間。於圖1的實施例中，第二電極30被假設為與該半導體產生歐姆接觸。因此，為達解釋的目的，本發明假設第二電極30沒有導致明顯的能帶彎折或是顯著地影響該空間電荷區裡面的導電帶的配置。審視圖1將會明白，於該厚度方向中，從介於該偏壓劑26與該半導體之間的接面12處至該第二電極會有一電位梯度。換言之，於此實施例中，該梯度的方向與該厚度方向相同。一電路29(如圖1中概略所示，其包含一切換器31與負載33)可以被連接在電極26與30之間。

The photovoltaic cell according to this embodiment further includes a second electrode 30. The second electrode 30 is spaced apart from the front surface 12 and the first electrode 26 in the thickness direction. In other words, the electrodes 26 and 30 are not in contact with each other and have a non-zero distance d ₂ between the electrodes in the thickness direction. A portion of the semiconductor component 10 is disposed between the electrodes. The distance d ₂ between the front surface 12 and the second electrode 30 in the thickness direction is smaller than the thickness t _sc of the space charge region in the case of dark, open circuit. In other words, the second electrode will contact the semiconductor in the space charge region in the dark, open case. Therefore, the electrodes 26 and 30 will contact the space charge region of the semiconductor element 10. In this embodiment, electrode 30 is transparent to low energy photons that will pass through to the additional cells formed by layers 16 and 18. In practice, electrode 30 can comprise a thin layer of metal or a plurality of opaque conductors spaced apart from one another such that light can be transmitted through the space between the conductors. In the embodiment of Figure 1, the second electrode 30 is assumed to be in ohmic contact with the semiconductor. Thus, for the purposes of explanation, the present invention assumes that the second electrode 30 does not cause significant band bending or significantly affects the configuration of the conductive strips within the space charge region. It will be understood from the review view 1 that in the thickness direction, there is a potential gradient from the junction 12 between the biasing agent 26 and the semiconductor to the second electrode. In other words, in this embodiment, the direction of the gradient is the same as the thickness direction. A circuit 29 (shown schematically in FIG. 1, which includes a switch 31 and load 33) can be coupled between the electrodes 26 and 30.

在操作中，光會通過透明的偏壓劑26並且進入該半導體之中。光會在該前表面12與一理論性邊界36之間的該半導體的一區域裡面被吸收。在與前表面12相隔深度X處的光強度I_X係由下面的方程式來給定：I_X=I₀e^-αX其中：I₀為在前表面12處的光強度；而α為該半導體對照射在該半導體上的光的吸收係數。除非本揭示內容中另外明確表明，否則，α的數值應該被視為能量大於該半導體之能隙的太陽能輻射部分的平均數值。 In operation, light passes through the transparent biasing agent 26 and into the semiconductor. Light is absorbed within a region of the semiconductor between the front surface 12 and a theoretical boundary 36. In the front surface 12 spaced apart light intensity I _X depth X of lines by the following equation given ^by: I _X = I ₀ e -αX wherein: I ₀ is the intensity of light at the front surface 12; and a semiconductor for α The absorption coefficient of light that is incident on the semiconductor. Unless otherwise expressly stated in this disclosure, the value of a should be considered as the average value of the portion of solar radiation whose energy is greater than the energy gap of the semiconductor.

如本揭示內容中的用法，該吸收區的厚度t_A被視為等於α^-1的深度x。於此深度處，I_X/I₀等於e^-1或是約0.37。換言之，t_A為外來光子中約63%已被吸收的深度x。此厚度t_A可能大於或小於該空間電荷區的厚度t_SC；但是，較佳的係，t_A小於t_SC。再次地，舉例來說，硫化鎘提供一約4000 埃厚的吸收區。 As used in the present disclosure, the thickness t _{A of} the absorption zone is considered to be equal to the depth x of α ^-1 . At this depth, I _X /I ₀ is equal to e ^-1 or about 0.37. In other words, t _A is the depth x that about 63% of the foreign photons have been absorbed. This thickness t _A may be greater or smaller than the thickness t _{SC of} the space charge region; however, preferably, t _{A is} less than t _SC . Again, for example, cadmium sulfide provides an absorption zone of about 4000 angstroms thick.

吸收該光的光子會將一電子從價電帶提升至導電帶。這在圖1中由箭頭32來符號表示。因此，吸收光會增加該半導體的載子濃度。因光能量所形成的額外載子會受到該空間電荷區裡面的電位梯度加速。因此，電子會移動遠離該前表面並且朝該第二電極移動，反之，電洞則朝前表面12與偏壓劑以及電極26移動。該些電子會通往該第二電極30，俾使得該第二電極會相對於該偏壓劑以及第一電極26變成帶負電。相對於出現在黑暗情形下的小量少數載子，少數載子(圖中所示之n型半導體中的電洞)的數量增加特別明顯。少數載子的累積傾向於縮減該空間電荷區的厚度。圖1中的邊界28'概略表示此結果。希望的係，該第二電極30被設置在空間電荷區的縮減厚度裡面，如圖1中所示。舉例來說，在預期用於陸地中的光伏電池中，當該電池受到太陽照射時，該第二電極希望維持在該空間電荷區的厚度裡面。如本揭示內容中的用法，「太陽」一詞係指每平方公尺有1,000瓦之強度的光並且頻譜對應於照射在地球上的太陽能的頻譜。此頻譜稱為AM 1.5頻譜。介於開路情形下(沒有任何電流在外部電路29之中流動)的電極之間的電位差的大小會小於該半導體的能隙。當切換器31封閉時，該等電子會從第二電極30處經由該外部電路流至該第一電極，於此情況中為偏壓劑26，並且與電洞結合。在該半導體裡面的內部電流流動稱為光電流，並且在圖1中以箭頭I_PHOTO來符號表示。 A photon that absorbs this light will lift an electron from the valence band to the conductive strip. This is indicated by the arrow 32 in Figure 1. Therefore, absorbing light increases the carrier concentration of the semiconductor. The extra carriers formed by the light energy are accelerated by the potential gradient in the space charge region. Thus, electrons move away from the front surface and move toward the second electrode, whereas the holes move toward the front surface 12 with the biasing agent and electrode 26. The electrons will pass to the second electrode 30 such that the second electrode will become negatively charged relative to the biasing agent and the first electrode 26. The increase in the number of minority carriers (holes in the n-type semiconductor shown) is particularly pronounced relative to the small number of minority carriers that appear in the dark. The accumulation of minority carriers tends to reduce the thickness of the space charge region. The boundary 28' in Figure 1 outlines this result. Desirably, the second electrode 30 is disposed within the reduced thickness of the space charge region, as shown in FIG. For example, in photovoltaic cells intended for use in terrestrial, when the cell is exposed to the sun, the second electrode is desirably maintained within the thickness of the space charge zone. As used in this disclosure, the term "sun" refers to light having an intensity of 1,000 watts per square meter and the spectrum corresponds to the spectrum of solar energy that is illuminated on Earth. This spectrum is called the AM 1.5 spectrum. The magnitude of the potential difference between the electrodes in an open circuit situation (without any current flowing in the external circuit 29) may be less than the energy gap of the semiconductor. When the switch 31 is closed, the electrons flow from the second electrode 30 to the first electrode via the external circuit, in this case the biasing agent 26, and are combined with the hole. The internal current flow inside the semiconductor is referred to as photocurrent and is symbolized by the arrow I _PHOTO in FIG.

出現在該空間電荷區裡面的電場會導致載子(尤其是電子)加速至相對高的速度。又，該些電極之相對緊密的分隔距離會最小化該些載子要移動的距離。這在該半導體構成元件10為一直接半導體(direct semiconductor)並且該光子吸收過程為直接吸收過程的地方特別重要。如本揭示內容中的用法，「直接躍遷(direct transition)」係指光子因一電子從價電帶量子躍遷(quantum transition)至導電帶而被吸收的過程，其不需要和另一顆粒或波互動或是產生另一顆粒或波。此直接躍遷過程應該對照於間接躍遷(indirect transition)過程，其通常涉及與一「光子」的互動，也就是，該半導體材料裡面的震動波。「直接半導體」一詞係指能夠在直接躍遷過程中吸收光子的半導體。因為直接躍遷過程僅涉及兩個顆粒或波的互動，也就是，一光子與一電子，所以，倘若一照射光子的能量至少等於該能隙的話，該吸收過程便可能發生。所以，直接半導體的功能如同非常有效的吸收體。然而，在直接半導體中亦可能有逆向躍遷(reverse transition)，也就是，電子從導電帶落入價電帶之中，其被稱為「載子再結合」。換言之，載子再結合在直接半導體之中發生的速度遠快過在間接半導體之中。因為該些載子在圖1中所示之電池的電極之間的區域裡面的兩個相反方向中快速地移動並且因為介於該等電極之間的距離很小的關係，所以，大量的載子會留存足夠的時間而抵達該些電極，俾使得該電池能夠產生大量的電流。 The electric field that appears in the space charge region causes the carrier (especially electrons) to accelerate to a relatively high velocity. Moreover, the relatively tight separation distance of the electrodes minimizes the distance that the carriers are to be moved. This is a direct semiconductor in the semiconductor constituent element 10 (direct Semiconductor) and this photon absorption process is particularly important where the direct absorption process takes place. As used in this disclosure, "direct transition" refers to the process by which a photon is absorbed by a quantum valence band quantum transition to a conductive strip, which does not require another particle or wave. Interact or generate another particle or wave. This direct transition process should be in contrast to an indirect transition process, which typically involves interaction with a "photon", that is, a shock wave within the semiconductor material. The term "direct semiconductor" refers to a semiconductor that is capable of absorbing photons during a direct transition. Since the direct transition process involves only the interaction of two particles or waves, that is, a photon and an electron, the absorption process may occur if the energy of a photon is at least equal to the energy gap. Therefore, direct semiconductor functions as a very efficient absorber. However, there may also be a reverse transition in the direct semiconductor, that is, electrons fall from the conductive strip into the valence band, which is called "carrier recombination." In other words, the recombination of carriers in the direct semiconductor occurs much faster than in the indirect semiconductor. Because the carriers move rapidly in two opposite directions in the region between the electrodes of the battery shown in Figure 1 and because of the small distance between the electrodes, a large amount of loading The sub-storage will allow sufficient time for the electrodes to reach, allowing the battery to generate a large amount of current.

相反地，在被稱為「蕭特基二極體(Schottky diode)」的習知結構中，該第二電極會在該空間電荷區外面的遠方位置處接觸該半導體。因光子吸收所產生的載子會擴散通過該半導體中的一龐大區域，其不會受到和該空間電荷區相關聯的電場影響。因此，該些載子在抵達該些電極之前必須忍受延長的駐存時間。若嘗試使用由直接半導體所形成的此蕭特基二極體結構作為光伏電池會遭受大規模的載子再結合並且產生低輸出電流。 Conversely, in a conventional structure known as a "Schottky diode," the second electrode contacts the semiconductor at a remote location outside of the space charge region. The carriers generated by photon absorption diffuse through a bulky region of the semiconductor that is not affected by the electric field associated with the space charge region. Therefore, the carriers must endure the extended residence time before reaching the electrodes. Trying to use this Schottky diode structure formed by a direct semiconductor as a photovoltaic cell would suffer from large-scale carrier recombination and produce low output current.

併入圖1中所示之半導體元件10的電池能夠利用直接半導體來製造。又，該電池沒有併入一p-n接面。因此，此電池能夠由各式各樣的半導體製成。舉例來說，能夠使用難以在p型中達成的半導體。特定的半導體即使沒有刻意加入摻雜物仍會呈現n型摻雜。當使用此些半導體時，沒有任何刻意摻雜仍然能夠製作併入半導體元件10的電池。 The battery incorporated in the semiconductor element 10 shown in FIG. 1 can be fabricated using a direct semiconductor. Also, the battery is not incorporated into a p-n junction. Therefore, the battery can be made of a wide variety of semiconductors. For example, a semiconductor that is difficult to achieve in a p-type can be used. A particular semiconductor exhibits n-type doping even if it is not intentionally added to the dopant. When such semiconductors are used, the battery incorporating the semiconductor component 10 can still be fabricated without any deliberate doping.

能量小於元件10中之半導體的能隙的光子會通過該半導體而不會被吸收並且會通過透明電極30與21，因此它們會抵達由層16與18所構成的額外光伏電池。此電池會吸收此些光子並且在電極21與23之間產生一電位。此些電極能夠被連接至任何配置的進一步外部電路(圖中並未顯示)。於此電路的其中一範例中，和額外層16與18相關聯的電極會與和半導體元件10相關聯的電極26與30串聯連接。因此，該裝置整體充當一合成電池，短波長光會被吸收並且在包含元件10的前方電池中被轉換為電力而長波長光會在併入層16與18的後方電池中被轉換為電力。於一進一步的實施例中，由層16與18所構成的額外電池可以被省略，並且該第二電極30可以為反射性。於此排列中，該第二電極會將任何未被吸收的光重新導向回到介於該些第一電極與第二電極之間的空間之中。該被反射的光會包含能量大於半導體元件10之能隙的某些光子。此些光子在反向朝該第一電極26前進時至少部分會被吸收。於一進一步的變化例中，由層16與18所形成的該額外電池會如圖1中所示般被提供，而第二電極30則被形成為一選擇性反射結構。該結構會將高能量光子朝該第一電極26反向反射，但是卻對低能量光子為透明。於此排列的一變化例中，該後方電池可以併入多個透明電極，並且由低能隙半導體所形成的一或更多個額外電池可以被放置在該後方電池後面，俾使得該些額外電池會吸收更低波長的光。於一進一步的變化例中，該半導體主體可以包含在元件10前方的一或更多個額外電池，該些額外電池係由能隙大於元件10之材料的半導體所形成。 Photons having energy less than the energy gap of the semiconductor in element 10 will pass through the semiconductor without being absorbed and will pass through transparent electrodes 30 and 21, so they will reach the additional photovoltaic cells formed by layers 16 and 18. This battery absorbs these photons and creates a potential between the electrodes 21 and 23. These electrodes can be connected to any external circuitry of any configuration (not shown). In one example of this circuit, the electrodes associated with the additional layers 16 and 18 will be connected in series with the electrodes 26 and 30 associated with the semiconductor component 10. Thus, the device as a whole acts as a synthetic battery, short-wavelength light is absorbed and converted to electricity in the front cell containing element 10 and long-wavelength light is converted to electricity in the rear cells of the incorporation layers 16 and 18. In a further embodiment, an additional battery comprised of layers 16 and 18 can be omitted and the second electrode 30 can be reflective. In this arrangement, the second electrode redirects any unabsorbed light back into the space between the first and second electrodes. The reflected light will contain certain photons having an energy greater than the energy gap of the semiconductor component 10. These photons are at least partially absorbed as they advance toward the first electrode 26. In a further variation, the additional cells formed by layers 16 and 18 are provided as shown in Figure 1, and the second electrode 30 is formed as a selective reflective structure. This structure will reflect high energy photons back toward the first electrode 26, but will be transparent to low energy photons. In a variation of this arrangement, the rear battery can incorporate a plurality of transparent electrodes, and one or more additional cells formed by the low energy gap semiconductor can be placed Placed behind the rear battery, the 俾 causes the additional batteries to absorb lower wavelength light. In a further variation, the semiconductor body can include one or more additional cells in front of the component 10, the additional cells being formed from a semiconductor having a larger energy band than the material of the component 10.

根據本發明一進一步實施例的光伏電池(圖2)類似於上面參考圖1所述的電池。然而，於此情況中，整個半導體元件僅由被設置在該第一電極與偏壓劑126以及該第二電極130之間的一層半導體材料所構成。於此實施例中，該半導體元件全部的厚度小於該空間電荷區的正常厚度。同樣地，此圖中，兩個電極會接觸該空間電荷區。於此實施例中，該第二電極130包含一金屬層131以及一接觸半導體元件110的高度摻雜半導體材料薄層111。於圖中所示的特殊範例中，該半導體110同樣為n型並且層111為一般所指的n+層。層111和半導體主體110的其餘部分雖然為相同的導體類型，也就是，n型；但是，具有高載子濃度，其在某些方面如同金屬。此層能夠促成該半導體主體110與第二電極130的金屬層之間的傳導。抵達該第二電極130的大量電子有助於在該第二電極處維持高濃度的電子。倘若在該第二電極處的電子的濃度夠高的話，便可以不需要藉由摻雜所形成的n⁺層。 A photovoltaic cell (Fig. 2) in accordance with a further embodiment of the present invention is similar to the battery described above with reference to Fig. 1. However, in this case, the entire semiconductor element is composed only of a layer of semiconductor material disposed between the first electrode and the biasing agent 126 and the second electrode 130. In this embodiment, the thickness of the semiconductor element is less than the normal thickness of the space charge region. Similarly, in this figure, the two electrodes will contact the space charge region. In this embodiment, the second electrode 130 includes a metal layer 131 and a thin layer 111 of highly doped semiconductor material contacting the semiconductor component 110. In the particular example shown in the figures, the semiconductor 110 is also n-type and the layer 111 is a generally referred to n+ layer. Layer 111 and the remainder of semiconductor body 110 are of the same conductor type, i.e., n-type; however, have a high carrier concentration which is in some respects like a metal. This layer can contribute to conduction between the semiconductor body 110 and the metal layer of the second electrode 130. The large amount of electrons arriving at the second electrode 130 helps maintain a high concentration of electrons at the second electrode. If the concentration of electrons at the second electrode is sufficiently high, the n ⁺ layer formed by doping may not be required.

根據本發明又一實施例的光伏電池(圖3)類似於圖1與2的電池；不同的係，半導體主體210全部由p型半導體所形成。於此實例中，偏壓層226係由費米能階高於半導體210之費米能階並且功函數低於該半導體之功函數的材料所形成。於此實施例中，該偏壓劑亦會在該半導體中產生能帶彎折。同樣地，此圖中，在該偏壓劑226與該第二電極230之間的厚度方向中的分隔距離或距離小於該空間電荷區的厚度，俾使得該第二電極 230被設置在該空間電荷區裡面。此電池的操作基本上和上面的討論相同，不同的係，電流流動的方向相反。 A photovoltaic cell (Fig. 3) according to yet another embodiment of the present invention is similar to the cells of Figs. 1 and 2; in a different system, the semiconductor body 210 is entirely formed of a p-type semiconductor. In this example, the bias layer 226 is formed of a material having a Fermi level higher than the Fermi level of the semiconductor 210 and having a work function lower than the work function of the semiconductor. In this embodiment, the biasing agent also produces band bending in the semiconductor. Similarly, in this figure, the separation distance or distance in the thickness direction between the biasing agent 226 and the second electrode 230 is smaller than the thickness of the space charge region, so that the second electrode 230 is placed inside the space charge zone. The operation of this battery is basically the same as discussed above, with different systems in which the current flows in the opposite direction.

根據本發明進一步實施例的電池描繪在圖4與5中。該電池包含一第一電極，其併入疊置在該半導體元件的第一表面312上方的複數個電極元件301，其中一個此元件顯示在圖5中。該些獨特的電極元件藉由圖4中概略所示的繞線線路303彼此導體性連接。該些繞線線路希望盡可能的薄，俾使得該些繞線線路僅覆蓋該第一表面312的最小必要區域。 A battery in accordance with a further embodiment of the present invention is depicted in Figures 4 and 5. The battery includes a first electrode that incorporates a plurality of electrode elements 301 stacked over a first surface 312 of the semiconductor component, one of which is shown in FIG. The unique electrode elements are electrically connected to each other by a winding line 303 as schematically shown in FIG. The winding lines are desirably as thin as possible so that the winding lines only cover the minimum necessary area of the first surface 312.

一偏壓劑326同樣疊置在該半導體元件的第一表面312上方。偏壓劑326希望覆蓋該第一表面的大部分，在本文中被稱為「此表面的第一部分」。相反地，該些電極元件301希望覆蓋該第一表面312的一第二、較小的部分。換言之，該些電極元件301被提供在該第一表面312中沒有偏壓劑的區域上。每一個電極元件皆希望包含一或更多個導電層，例如，金屬層。於圖中所示的特殊實施例中，每一個電極元件301皆包含一第一金屬層305以及一接觸該第一表面的第二金屬層307。於其它變化例中，可以僅使用單一金屬層，或者，可以使用兩個以上的金屬層。一電氣絕緣體309會包圍每一個電極元件301，俾使得該些電極元件不會直接接觸該偏壓劑326，且因此，該第一電極整個不會直接接觸該偏壓劑326。該些繞線線路303(圖4)同樣與該偏壓元件絕緣。該偏壓劑326希望為透明；但是，可以為導體或是高度摻雜的半導體。舉例來說，倘若半導體310為n型的話，該偏壓劑326可以包含一p+型半導體327的薄層並且可以視情況包含一介於該p+型半導體327與該半導體元件定義表面312之間的躍遷層，以便改良此些元件的晶格匹配。該偏壓劑不會形成貫穿該電池的導體路徑的一部分，並且並非半導體元件310的一部分。因此，同樣地，被設置在該些電極之間的半導體元件310全部由n型半導體所構成。藉由p+偏壓劑所形成的一寬能隙n型半導體的偏壓可以產生大量的能帶彎折以及大額的內建電壓。這可以減輕因該躍遷層所造成的內建電壓的任何下降。 A biasing agent 326 is also stacked over the first surface 312 of the semiconductor component. The biasing agent 326 desirably covers a substantial portion of the first surface, referred to herein as "the first portion of the surface." Conversely, the electrode elements 301 are intended to cover a second, smaller portion of the first surface 312. In other words, the electrode elements 301 are provided on the first surface 312 where there is no biasing agent. Each of the electrode elements desirably contains one or more conductive layers, for example, a metal layer. In the particular embodiment illustrated in the figures, each of the electrode elements 301 includes a first metal layer 305 and a second metal layer 307 that contacts the first surface. In other variations, only a single metal layer may be used, or more than two metal layers may be used. An electrical insulator 309 surrounds each of the electrode elements 301 such that the electrode elements do not directly contact the biasing agent 326 and, therefore, the first electrode does not directly contact the biasing agent 326. The winding wires 303 (Fig. 4) are also insulated from the biasing element. The biasing agent 326 is desirably transparent; however, it can be a conductor or a highly doped semiconductor. For example, if the semiconductor 310 is n-type, the biasing agent 326 can comprise a thin layer of a p+ type semiconductor 327 and can optionally include a transition between the p+ type semiconductor 327 and the semiconductor element defining surface 312. Layers to improve the lattice matching of these components. The biasing agent does not form a portion of the conductor path through the battery And is not part of the semiconductor component 310. Therefore, similarly, the semiconductor elements 310 disposed between the electrodes are all composed of an n-type semiconductor. The bias of a wide bandgap n-type semiconductor formed by a p+ biasing agent can produce a large amount of band bending and a large amount of built-in voltage. This can alleviate any drop in built-in voltage caused by the transition layer.

圖中所示的電池被連接至一外部負載331，例如，電阻性負載。在操作中，光經由該偏壓劑通往該半導體主體之中，如圖5中的箭頭h_Y所示。然而，對齊該些電極元件301的該主體中的區域仍維持實質上沒有被照射。據此，此些區域不會有任何光生成的載子並且導電係數會遠低於對齊該偏壓劑的區域。 The battery shown in the figure is connected to an external load 331, for example, a resistive load. In operation, light is directed into the semiconductor body via the biasing agent, as indicated by arrow h _Y in FIG. However, the area in the body that aligns the electrode elements 301 remains substantially unirradiated. Accordingly, such regions do not have any light-generated carriers and the conductivity is much lower than the region in which the biasing agent is aligned.

在該半導體中遠離該些電極元件的區域中，該電池和上面討論的實施例非常相同。因此，由箭頭I_PHOTO所符號表示的光電流會在第二電極330與第一表面312之間於厚度方向中流動。在該第一表面312處的載子濃度夠高的前提下，在該電池中遠離電極元件301的區域中的光電流同樣會在橫切於該厚度方向的方向中沿著表面312朝該些電極元件流動，因此，該光電流會通過該些電極元件以及通過外部負載331並且反向回到該第二電極330。 In the region of the semiconductor remote from the electrode elements, the battery is very identical to the embodiment discussed above. Therefore, the photocurrent indicated by the arrow I _PHOTO flows in the thickness direction between the second electrode 330 and the first surface 312. Under the premise that the carrier concentration at the first surface 312 is sufficiently high, the photocurrent in the region away from the electrode member 301 in the battery will also face the surface 312 in a direction transverse to the thickness direction. The electrode elements flow so that the photocurrent passes through the electrode elements as well as through the external load 331 and back to the second electrode 330.

跨越負載331的電壓差如同該第一電極的電極元件301與該第二電極之間的外部偏壓電壓。此外部偏壓傾向於抵消能帶彎折的效果。換言之，由該負載所加諸的外部偏壓會抵消由該偏壓劑加諸在該空間電荷區裡面的電場。舉例來說，舉例來說，曲線320概略代表沒有該外部偏壓電壓時該半導體的導電帶；反之，曲線321概略代表有該外部偏壓電壓時的導電帶。該效果會降低驅動該些載子通過該半導體的電場並且因而傾向於降低該光電流。除此之外，該外部偏壓電壓還傾向於產生與該光電流反向的電流，如圖5中的箭頭I_DARK的符號表示。這會降低在該電池中流動的淨電流。 The voltage difference across the load 331 is like the external bias voltage between the electrode element 301 of the first electrode and the second electrode. The external bias tends to counteract the effect of band bending. In other words, the external bias applied by the load cancels the electric field applied by the biasing agent in the space charge region. For example, curve 320 generally represents a conductive strip of the semiconductor without the external bias voltage; conversely, curve 321 represents a conductive strip with the external bias voltage. This effect reduces the electric field that drives the carriers through the semiconductor and thus tends to reduce the photocurrent. In addition to this, the external bias voltage also tends to produce a current that is opposite to the photocurrent, as indicated by the symbol of arrow I _DARK in FIG. This will reduce the net current flowing in the battery.

然而，因為該外部偏壓電壓被施加在該些電極元件301與該第二電極330之間；所以，此些效應主要出現在對齊該些電極元件的該半導體主體的區域中。此些區域構成該電池的一相對小的部分。因為該半導體的此些區域實質上沒有被照射並且有超低的載子濃度；所以，相較於在有一第一電極覆蓋整個前表面之可對照的電池中，I_DARK會比較小。另外，該半導體中遠離該些電極元件的區域在該半導體內會經歷較小的偏壓相關的電場下降。咸信，此些因素都會提高諸如圖4與5中所示之電池的效能。 However, since the external bias voltage is applied between the electrode elements 301 and the second electrode 330; such effects mainly occur in the region of the semiconductor body in which the electrode elements are aligned. These areas constitute a relatively small portion of the battery. Because such regions of the semiconductor are substantially unirradiated and have an ultra-low carrier concentration; I _DARK will be relatively small compared to a comparable cell that has a first electrode covering the entire front surface. Additionally, regions of the semiconductor that are remote from the electrode elements experience a small bias-dependent electric field drop within the semiconductor. It is believed that these factors will improve the performance of batteries such as those shown in Figures 4 and 5.

根據本發明進一步實施例的電池(圖6)包含一由間接半導體(舉例來說，矽)所形成的半導體元件410。該電池有一第一電極，其併入複數個電極元件401，圖6中僅顯示其中一個電極元件。該些電極元件401於該半導體元件的第一表面412上彼此隔開。該電池還包含一偏壓劑426與一絕緣體409，類似於上面參考圖4與5所討論的偏壓劑與絕緣體。於此電池中，該偏壓劑與半導體之間的相互作用會在黑暗開路情形下形成一具有厚度t_sc的空間電荷區。一第二電極430會在該空間電荷區外面的一位置處接觸該半導體。於此電池中，介於該前方表面412與第二電極430之間的距離d₂大於t_sc。圖中所示的特殊範例併入n型半導體。於該空間電荷區的邊界428與該第二電極430之間的區域中沒有任何黑暗情形下的電場。圖6中概略描繪的導電帶E_C的平坦部分即表示此結果。在操作中，產生於該空間電荷區之中的電子會在該空間電荷區中的電場的影響下通往邊界428並且接著從邊界428處朝該第二電極430擴散。因為該半導體為一間接半導體，所以，該些載子有足夠的壽命抵達該些電極。於此電池中，使用多個隔開的電極元件401配合與該些電極元件絕緣的偏壓劑426可以提供類似於上面參考圖4及5所討論的好處。 A battery (Fig. 6) in accordance with a further embodiment of the present invention includes a semiconductor component 410 formed of an indirect semiconductor (e.g., germanium). The battery has a first electrode that incorporates a plurality of electrode elements 401, and only one of the electrode elements is shown in FIG. The electrode elements 401 are spaced apart from one another on the first surface 412 of the semiconductor component. The battery also includes a biasing agent 426 and an insulator 409 similar to the biasing agents and insulators discussed above with reference to Figures 4 and 5. In this battery, the interaction between the biasing agent and the semiconductor forms a space charge region having a thickness _tsc in the event of an open dark circuit. A second electrode 430 contacts the semiconductor at a location outside of the space charge region. In this battery, the distance d ₂ between the front surface 412 and the second electrode 430 is greater than t _sc . The specific example shown in the figure incorporates an n-type semiconductor. There is no electric field in any dark situation in the region between the boundary 428 of the space charge region and the second electrode 430. The flat portion of the conductive strip E _C depicted schematically in Figure 6 represents this result. In operation, electrons generated in the space charge region will pass to the boundary 428 under the influence of the electric field in the space charge region and then diffuse from the boundary 428 toward the second electrode 430. Because the semiconductor is an indirect semiconductor, the carriers have sufficient lifetime to reach the electrodes. In this battery, the use of a plurality of spaced apart electrode elements 401 in conjunction with biasing agent 426 insulated from the electrode elements can provide benefits similar to those discussed above with respect to Figures 4 and 5.

上面討論的元件的眾多變化與組合皆能夠被運用。舉例來說，於上面參考圖4至6所討論的實施例中，該些電極元件未必為如圖中所示的隔絕圓形元件的形式。於其中一變化例中，該些電極元件具有狹長帶體的形式，該些狹長帶體彼此平行延伸並且在橫切於該些帶體之狹長方向的方向中彼此隔開。於一包含狹長帶體電極元件的排列中，該些繞線線路303(圖4)可被省略。該些獨特電極元件的金屬層可以延伸在該帶體的狹長的方向中，並且因而可以用來攜載電流至一共同導體。亦可以使用用於電氣連接該些獨特電極元件的其它結構。 Numerous variations and combinations of the components discussed above can be utilized. For example, in the embodiments discussed above with reference to Figures 4 through 6, the electrode elements are not necessarily in the form of isolated circular elements as shown. In one variation, the electrode elements are in the form of elongated strips that extend parallel to each other and are spaced apart from one another in a direction transverse to the elongate direction of the strips. The winding wires 303 (Fig. 4) may be omitted in an arrangement including elongated strip electrode elements. The metal layers of the unique electrode elements can extend in the elongated direction of the strip and can thus be used to carry current to a common conductor. Other structures for electrically connecting the unique electrode elements can also be used.

於其它實施例中，圖中被描繪成實心層的各種電極會被形成為多個合成電極，每一者皆包含一組彼此隔開的元件。此些元件可以為不透明；但是，整個合成電極則實質上為透明。於另一變化例中，光可以經由該半導體元件的後方表面被引導至諸如圖2或圖3中所示的電池之中。 In other embodiments, the various electrodes depicted as solid layers in the figures will be formed as a plurality of composite electrodes, each comprising a set of spaced apart elements. Such elements may be opaque; however, the entire synthetic electrode is substantially transparent. In another variation, light may be directed through a rear surface of the semiconductor component to a battery such as that shown in FIG. 2 or 3.

於一進一步的變化例中，該半導體元件被形成為一較大型半導體主體的一部分，其包含額外的半導體層疊置在該偏壓劑與該半導體的第一表面上方。於此排列中，該偏壓劑被設置在該較大型的半導體主體裡面。同樣地，於此排列中，該偏壓劑疊置在該半導體元件的某一面上方。 In a further variation, the semiconductor component is formed as part of a larger semiconductor body including an additional semiconductor layer overlying the biasing agent and the first surface of the semiconductor. In this arrangement, the biasing agent is disposed within the larger semiconductor body. Similarly, in this arrangement, the biasing agent is stacked over a face of the semiconductor component.

於上面討論的實施例中，該偏壓劑雖然直接接觸該半導體元件；然而，該偏壓劑亦可以藉由一如習知的MIS接面中所運用的絕緣體薄層而與該半導體元件分開。舉例來說，此絕緣層能夠被用來取代圖5中所示的躍遷層329。此排列為次佳方式，因為其會降低內建電壓V_BI。 In the embodiments discussed above, the biasing agent directly contacts the semiconductor component; however, the biasing agent can also be separated from the semiconductor component by a thin layer of insulator as employed in conventional MIS junctions. . For example, this insulating layer can be used in place of the transition layer 329 shown in FIG. This arrangement is a sub-optimal method because it reduces the built-in voltage V _BI .

本文中雖然已經參考特殊實施例說明過本發明；不過，應該瞭解的係，此些實施例僅解釋本發明的原理與應用。所以，應該瞭解的係，可以對該些解釋性實施例進行許多修正並且可以設計出其它排列而沒有脫離隨附申請專利範圍所定義之本發明的精神與範疇。 The present invention has been described herein with reference to the specific embodiments; however, it should be understood that these embodiments are merely illustrative of the principles and applications of the invention. Therefore, many modifications of the illustrative embodiments are possible, and other arrangements may be devised without departing from the spirit and scope of the invention as defined by the appended claims.

10‧‧‧半導體元件 10‧‧‧Semiconductor components

12‧‧‧前面 12‧‧‧ front

14‧‧‧後面 14‧‧‧Back

16‧‧‧半導體層或基板層 16‧‧‧Semiconductor or substrate layer

17‧‧‧半導體層或基板層 17‧‧‧Semiconductor or substrate layer

18‧‧‧半導體層或基板層 18‧‧‧Semiconductor or substrate layer

20‧‧‧能階曲線 20‧‧‧ energy level curve

21‧‧‧電極 21‧‧‧ electrodes

22‧‧‧能階曲線 22‧‧‧ energy level curve

23‧‧‧電極 23‧‧‧Electrode

26‧‧‧偏壓劑 26‧‧‧ biasing agent

29‧‧‧外部電路 29‧‧‧External Circuit

30‧‧‧電極 30‧‧‧Electrode

31‧‧‧切換器 31‧‧‧Switcher

33‧‧‧負載 33‧‧‧load

36‧‧‧理論性邊界 36‧‧‧ theoretical boundaries

Claims

一種光伏電池，其包括：(a)一半導體元件，其具有一第一面、一第二面、以及一介於該些面之間的厚度方向；(b)一偏壓劑，其僅疊置在該第一面的一第一部分上方並且接觸該第一部分，該偏壓劑會在該半導體元件中產生能帶彎折；(c)一第一電極，其疊置在該第一面的一第二部分上方並且接觸該第二部分，該第二部分與該第一部分分離，該第一電極沒有與該偏壓劑直接導體性接觸；以及(d)一第二電極，其在一與該第一面隔開的位置處接觸該半導體元件。 A photovoltaic cell comprising: (a) a semiconductor component having a first face, a second face, and a thickness direction between the faces; (b) a biasing agent that overlaps only Above the first portion of the first face and contacting the first portion, the biasing agent generates a band bend in the semiconductor component; (c) a first electrode stacked on the first face Above the second portion and contacting the second portion, the second portion is separated from the first portion, the first electrode is not in direct conductive contact with the biasing agent; and (d) a second electrode is present in the The semiconductor element is contacted at a position spaced apart from the first side.

根據申請專利範圍第1項的光伏電池，其中，該半導體元件有一介於該第一面與該第二電極之間的第一區域，且其中，該第一區域完全為p型或者完全為n型。 The photovoltaic cell of claim 1, wherein the semiconductor component has a first region between the first surface and the second electrode, and wherein the first region is completely p-type or completely n type.

根據申請專利範圍第2項的光伏電池，其中，該第二電極疊置在該半導體元件的該第二面的至少一部分上方並且接觸該部分。 A photovoltaic cell according to claim 2, wherein the second electrode is overlaid on at least a portion of the second face of the semiconductor component and contacts the portion.

根據申請專利範圍第1項的光伏電池，其中，該第一電極在該半導體元件的該第一面上包含彼此隔開的複數個電極元件。 The photovoltaic cell of claim 1, wherein the first electrode comprises a plurality of electrode elements spaced apart from each other on the first side of the semiconductor element.

根據申請專利範圍第4項的光伏電池，其中，每一個電極元件皆包含一接觸該第一面的導電材料以及一分離該導體材料與該偏壓劑的介電材料。 A photovoltaic cell according to claim 4, wherein each of the electrode elements comprises a conductive material contacting the first face and a dielectric material separating the conductive material from the biasing agent.

根據申請專利範圍第4項的光伏電池，其中，該偏壓劑為透明並且每一個該電極元件皆包含一不透明的材料。 The photovoltaic cell of claim 4, wherein the biasing agent is transparent and each of the electrode elements comprises an opaque material.

根據申請專利範圍第1項的光伏電池，其中，該第二電極會歐姆接觸該半導體元件。 A photovoltaic cell according to the first aspect of the invention, wherein the second electrode ohmically contacts the semiconductor component.

根據申請專利範圍第7項的光伏電池，其中，該第二電極包含一接觸該半導體元件的高度摻雜半導體層以及一接觸該高度摻雜半導體層的金屬。 The photovoltaic cell of claim 7, wherein the second electrode comprises a highly doped semiconductor layer contacting the semiconductor element and a metal contacting the highly doped semiconductor layer.

根據申請專利範圍第1項的光伏電池，其中，該偏壓劑包含一接觸該半導體元件之該第一面的透明金屬。 The photovoltaic cell of claim 1, wherein the biasing agent comprises a transparent metal contacting the first side of the semiconductor component.

根據申請專利範圍第1項的光伏電池，其中，該偏壓劑包含一透明的高度摻雜半導體層，其疊置在該半導體元件的該第一面上方。 The photovoltaic cell of claim 1, wherein the biasing agent comprises a transparent highly doped semiconductor layer superposed over the first side of the semiconductor component.

根據申請專利範圍第1項的光伏電池，其中，該半導體元件為一n型半導體以及該偏壓劑的費米能階低於該半導體元件的正常費米能階。 The photovoltaic cell of claim 1, wherein the semiconductor component is an n-type semiconductor and the Fermi level of the biasing agent is lower than a normal Fermi level of the semiconductor component.

根據申請專利範圍第11項的光伏電池，其中，該半導體元件係選擇自由下面所組成的群之中：III-V半導體、II-VI半導體、以及IV族半導體。 The photovoltaic cell according to claim 11, wherein the semiconductor element is selected from the group consisting of: III-V semiconductor, II-VI semiconductor, and Group IV semiconductor.

一種產生電力的方法，其包括下面步驟：(a)維持一半導體的一第一表面的一第一部分接觸一偏壓劑，該偏壓劑的費米能階不同於該半導體的正常費米能階，藉以使該偏壓劑在該半導體中產生能帶彎折，同時另外維持該第一表面的一第二部分接觸一第一電極並且維持該第一電極沒有直接導體性接觸該偏壓劑；以及(b)在步驟(a)期間，維持一第二電極在遠離該第一表面的位置處接觸該半導體；(c)在步驟(a)與(b)期間，將光引導至半導體之中，俾使得該光的至少一部分被該半導體吸收並且被吸收光會將電子從價電帶提升至導電帶；以及 (d)在該些電極處收集生成電流。 A method of generating electrical power, comprising the steps of: (a) maintaining a first portion of a first surface of a semiconductor in contact with a biasing agent having a Fermi level different from a normal Fermi energy of the semiconductor a step of causing the biasing agent to bend the energy band in the semiconductor while additionally maintaining a second portion of the first surface in contact with a first electrode and maintaining the first electrode without direct conductive contact with the biasing agent And (b) during step (a), maintaining a second electrode in contact with the semiconductor at a location remote from the first surface; (c) directing light to the semiconductor during steps (a) and (b) The 俾 causes at least a portion of the light to be absorbed by the semiconductor and the absorbed light lifts the electrons from the valence band to the conductive strip; (d) Collecting generated currents at the electrodes.

根據申請專利範圍第13項的方法，其進一步包括引導該電流通過一介於該些電極之間的負載。 The method of claim 13, further comprising directing the current through a load between the electrodes.

根據申請專利範圍第13項的方法，其進一步包括阻隔光透射進入該半導體中對齊該第一電極之一區域的步驟。 The method of claim 13, further comprising the step of blocking transmission of light into the semiconductor to align one of the regions of the first electrode.

根據申請專利範圍第15項的方法，其中，該第一電極為不透明並且該阻隔步驟至少部分由該第一電極來實施。 The method of claim 15, wherein the first electrode is opaque and the blocking step is performed at least in part by the first electrode.

根據申請專利範圍第13項的方法，其中，該半導體會在直接躍遷過程中吸收該光。 The method of claim 13, wherein the semiconductor absorbs the light during a direct transition.

根據申請專利範圍第13項的方法，其中，該半導體會在間接躍遷過程中吸收該光。 The method of claim 13, wherein the semiconductor absorbs the light during an indirect transition.