TWI607587B - 固晶穩固製程 - Google Patents

固晶穩固製程 Download PDF

Info

Publication number
TWI607587B
TWI607587B TW105129767A TW105129767A TWI607587B TW I607587 B TWI607587 B TW I607587B TW 105129767 A TW105129767 A TW 105129767A TW 105129767 A TW105129767 A TW 105129767A TW I607587 B TWI607587 B TW I607587B
Authority
TW
Taiwan
Prior art keywords
substrate
flux
electrode group
heating
solid crystal
Prior art date
Application number
TW105129767A
Other languages
English (en)
Other versions
TW201810735A (zh
Inventor
詹國光
Original Assignee
台灣琭旦股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 台灣琭旦股份有限公司 filed Critical 台灣琭旦股份有限公司
Priority to TW105129767A priority Critical patent/TWI607587B/zh
Priority to US15/335,722 priority patent/US20180076169A1/en
Application granted granted Critical
Publication of TWI607587B publication Critical patent/TWI607587B/zh
Publication of TW201810735A publication Critical patent/TW201810735A/zh

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K1/00—Soldering, e.g. brazing, or unsoldering
    • B23K1/0008—Soldering, e.g. brazing, or unsoldering specially adapted for particular articles or work
    • B23K1/0016—Brazing of electronic components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1131—Manufacturing methods by local deposition of the material of the bump connector in liquid form
    • H01L2224/1132—Screen printing, i.e. using a stencil
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
    • H01L2224/1141—Manufacturing methods by blanket deposition of the material of the bump connector in liquid form
    • H01L2224/11418—Spray coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13075—Plural core members
    • H01L2224/1308—Plural core members being stacked
    • H01L2224/13084—Four-layer arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13155—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/13166—Titanium [Ti] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/75251—Means for applying energy, e.g. heating means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301—Bonding head
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7565—Means for transporting the components to be connected
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7565—Means for transporting the components to be connected
    • H01L2224/75651—Belt conveyor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81009—Pre-treatment of the bump connector or the bonding area
    • H01L2224/81024—Applying flux to the bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112—Aligning
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112—Aligning
    • H01L2224/81121—Active alignment, i.e. by apparatus steering, e.g. optical alignment using marks or sensors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81801—Soldering or alloying
    • H01L2224/81815—Reflow soldering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818—Bonding techniques
    • H01L2224/81897—Mechanical interlocking, e.g. anchoring, hook and loop-type fastening or the like
    • H01L2224/81898—Press-fitting, i.e. pushing the parts together and fastening by friction, e.g. by compression of one part against the other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/81986—Specific sequence of steps, e.g. repetition of manufacturing steps, time sequence
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/9205—Intermediate bonding steps, i.e. partial connection of the semiconductor or solid-state body during the connecting process
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/37—Effects of the manufacturing process
    • H01L2924/37001—Yield

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)

Description

固晶穩固製程
本發明係有關於一種固晶穩固製程。
發光二極體(LED)因其具有較佳色彩飽和度，且輕薄、省電、及壽命較長等諸多優越的特性，而吸引廠商業者積極研發及應用，如LED背光模組、OLED、AMOLED顯示技術。然而，隨著科技之進步，現有之LED技術已無法滿足所欲應用的層面，舉例來說，目前較常使用的AMOLED顯示技術，其缺點在於色彩過度飽和失真、陽光下無法清楚觀看及長久使用後螢幕有烙印之問題。
因此，需要著手研發新一代的技術來解決目前之問題，其中，研發技術重點之一為微發光二極體(Micro-LED)。微發光二極體可應用於顯示器、顯示屏、穿戴式裝置及抬頭顯示件(如***眼鏡)或VR等等3C產品。然而，由於微發光二極體之技術所用到的尺寸都極小(微米級)，因此，在製程上要求的精度及良率上十分的嚴苛，要如何提升良率及品質，成為現今亟欲改善的目標。
因此，有必要提供一種新穎且具有進步性之固晶穩固製程，以解決上述之問題。
本發明之主要目的在於提供一種固晶穩固製程，透過二次升溫來分別熔融助焊劑及金屬鍍層，可有效確實地將晶片單元穩固定位於基體單元，提高結合精準度及穩定度，能有效提高製程良率。
為達成上述目的，本發明提供一種固晶穩固製程，其包含以下步驟：提供複數微型晶片，各該微型晶片設有一第一電極組；提供一基板，並將該基板定位於一固晶機台，該基板設有與該複數第一電極組相對應之複數第二電極組；提供一呈膏狀之助焊劑，將該助焊劑設於該第二電極組；一第一置放步驟，依一第一排列模式地將部分該複數微型晶片之第一電極組設於該基板之第二電極組，該助焊劑連接該第一及第二電極組，其中，該第一排列模式係於縱向上及橫向上間隔地配置；一第一加熱加壓步驟，以一第一預定溫度加熱使該助焊劑呈液態狀，同時進行加壓動作迫使該第一及第二電極組相互靠近，之後冷卻該助焊劑而使該助焊劑定位住該第一及第二電極組；一第二置放步驟，依一第二排列模式地將部分該複數微型晶片之第一電極組設於該基板之第二電極組，該助焊劑連接該第一及第二電極組，其中，該第二排列模式係與該第一排列模式相反；重複該第一加熱加壓步驟；一第二加熱加壓步驟，以一第二預定溫度加熱並加壓使該第一電極組及該第二電極組熔接，之後冷卻至常溫。
1‧‧‧固晶機台
2‧‧‧微型晶片
21‧‧‧第一電極組
3‧‧‧基板
31‧‧‧第二電極組
4‧‧‧助焊劑
5,5A‧‧‧金屬鍍層
51‧‧‧錫料層
52‧‧‧銅料層
53‧‧‧基底層
54‧‧‧金料層
6‧‧‧吸嘴
7‧‧‧加壓件
8‧‧‧軌道單元
9‧‧‧加熱器
圖1為本發明一實施例之步驟流程圖。
圖2為本發明一實施例之微型晶片結合於基板之作動圖。
圖3為本發明一實施例之第二電極組之局部放大圖。
圖4為本發明一實施例之金屬鍍層之局部放大圖。
圖5及圖6為本發明一實施例第一及第二置放步驟之示意圖。
圖7為本發明一實施例之加熱加壓示意圖。
圖8為本發明又一實施例之金屬鍍層之局部放大圖。
以下僅以實施例說明本發明可能之實施態樣，然並非用以限制本發明所欲保護之範疇，合先敘明。
請參考圖1至圖5，其顯示本發明之一較佳實施例，本發明之固晶穩固製程，其包含以下步驟：提供複數微型晶片2，各該微型晶片2設有一第一電極組21；提供一基板3，並將該基板3定位於一固晶機台1，該基板3設有與該複數第一電極組21相對應之複數第二電極組31；提供一呈膏狀之助焊劑4，將該助焊劑4設於該第二電極組31；一第一置放步驟，依一第一排列模式地將部分該複數微型晶片之第一電極組21設於該基板3之第二電極組31，該助焊劑4連接該第一及第二電極組21,31，其中，該第一排列模式係於縱向上及橫向上間隔地配置；一第一加熱加壓步驟，以一第一預定溫度加熱使該助焊劑4呈液態狀，同時進行加壓動作迫使該第一及第二電極組21,31相互靠近，之後冷卻該助焊劑4而使該助焊劑4定位住該第一及第二電極組21,31；一第二置放步驟，依一第二排列模式地將部分該複數微型晶片之第一電極組21設於該基板3之第二電極組31，該助焊劑4連接該第一及第二電極組21,31，其中，該第二排列模式係與該第一排列模式相反；重複該第一加熱加壓步驟；一第二加熱加壓步驟，以一第二預定溫度加熱並加壓使該第一電極組21及該第二電極組31熔接，之後冷卻至常溫。
值得一提的是，由於該微型晶片2甚小，為了避免夾持力道過大造成該微型晶片2受損，較佳地，係採用一吸嘴6來將該微型晶片2移動至該基板3。同理地，加壓之手法亦可透過專門的一加壓件7來對該微型晶片2施壓，其中， 加壓之壓力大小係為每5平方密爾1公克至100公克(1~100g/5mil2)。該基板3係選自於FR-4基板、BT基板、玻璃、支架、陶瓷、鋁基板、銅基板、矽基板、軟性基板(PI)及藍寶石其中一者。
使用該助焊劑4可以將該第一及第二電極組21,31之表面的氧化物或污質去除，提高結合品質；並且，該助焊劑4還可以保護待焊接表面不會再度氧化。更重要的是，該第一加熱加壓步驟亦為第一次固晶(預定位)，當該助焊劑4冷卻回溫後即會由液態轉變為固態，進而連結固定該第一及第二電極組21,31，換言之，各該微型晶片2可透過該助焊劑4而定位於該基板3。其中，該第一預定溫度較佳係設定介於120℃至230℃之間，對其他元件較不易產生熱影響，也就是說選用該助焊劑4時，其熔點較佳係位於或低於此溫度區間，以期可較快速地對該助焊劑4進行加熱熔融，節省能源消耗、縮短製程時間。
較詳細地說，該第二電極組31另包含有一金屬鍍層5，在該第一加熱加壓步驟中，該助焊劑4係熔接該第一電極組21及該金屬鍍層5。其中，該金屬鍍層5可透過蝕刻的方式形成。較佳地，該金屬鍍層5之上表面係呈平面狀，而有較多且平順的接觸面積，當與該第一電極組21結合後能處於穩固的狀態。
更詳細地說，該金屬鍍層5由外而內依序設有一錫料層51、一銅料層52及一基底層53，該基底層53之材質選自鎳或鈦，其中，該第二預定溫度係大於或等於該錫料層51之熔點。故可以理解的，該第二加熱加壓步驟主要係要熔融該錫料層51來與該第一電極組21相連結，而等到該錫料層51冷卻回溫後即完成整個該固晶穩固製程，故該第二加熱加壓步驟又可稱為第二次固晶。同理地，為了有較佳之升溫時間及節省加工成本，舉例但不限於，該第二預定溫度較佳係設定大於230℃且不大於330℃。於本實施例中，該第一預定溫度係設定為180℃，而該第二預定溫度係設定為260℃，以期讓該錫料層51能確實地完全熔解，並且該助焊劑4可於此溫度狀態下揮發掉，而有較佳之成品。
要補充地說明的是，該金屬鍍層5亦可有其他態樣，如圖8所示之另一實施例之金屬鍍層5A，該金屬鍍層5A另設有一金料層54，該金料層54係覆設於該錫料層51，其中，該金料層54之厚度為0.2μm，當未進行結合前，該金料層54可以防止其他金屬層氧化，而保持在較良好之狀態。
請再參考圖1至圖5之本實施例，於一方向上相鄰的二該微型晶片2之距離(D)係小於200μm，且各該微型晶片2面積係介於10μm2至300μm2之間。由上述可知，各該微型晶片2之尺寸及相鄰間距皆非常細小，故極易因些微變化而產生不良後果，進而降低良率。並且，於本實施例中的各該微型晶片2之面積係小於5平方密爾(mil2)，因此，為了達到有高良率之製程品質，該第一及第二電極組21,31係採用二階段式熱壓結合的方式(即該第一及第二次加熱加壓步驟)。
較進一步來說，將原本該第一及第二電極組21,31所欲結合的行進位移距離切割成二階段進行，讓每次該第一及第二電極組21,31相互靠近的位移量變小，使得熔融狀態的該助焊劑4或該錫料層51較不易有受力而飛濺的情況發生，相鄰的二該微型晶片2較不會有非預期地電性連接而有短路的情況產生，並且可避免造成該基板3或其他電路、元件有不良影響。較佳地，該助焊劑4可以選用不導電且無腐蝕性的免洗系列(如松香有機系)，更可有效避免短路等問題，而有較佳之結合成功率。另一較佳地，該錫料層51之厚度係介於1μm至10μm之間，可更進一步確保該錫料層51受擠壓時不易外溢至二該微型晶片2之間隙間。經過多次實際製程測試，當該錫料層51之厚度為5μm至7μm時，能有較佳的結合品質。
於本實施例中，該助焊劑4係採用單點設置之方式設於該第二電極組31，故除了將該助焊劑4一次全部設於該複數第二電極組31外，亦可隨該第一或第二排列模式的需求依序將該助焊劑4與該複數第二電極相結合。當然，並不侷限於該助焊劑4的設置手法。依各種不同需求，該助焊劑4亦可係採用網版 印刷之方式設於該第二電極組31。或是該助焊劑4係採用噴塗之方式設於該第二電極組31，亦無不可。
要補充地是，請參考圖2，較佳地，該固晶穩固製程另提供有一軌道單元8及一加熱器9，該軌道單元8設有一加熱位置及一冷卻位置，該基板3可於該加熱位置及該冷卻位置之間移動地設於該軌道單元8，該加熱器9係設於該加熱位置而對該基板3進行加熱，等加熱完畢後，該軌道單元8即可帶動該基板3及該複數微型晶片2一同移動至該冷卻位置進行降溫。
綜上，本發明固晶穩固製程透過第一及第二加熱加壓步驟，分階段地熔融助焊劑或錫料層，而進行二次固晶，可以提升微型晶片單元與基板3的結合穩定度。並且，助焊劑及錫料層不易外溢至間隙之間，以避免相鄰的二微型晶片產生短路，而確保結合成功率(良率)。此外，助焊劑可以依需求而依特定分布模式來與複數第二電極做結合，以提高結合成功率。
1‧‧‧固晶機台
2‧‧‧微型晶片
21‧‧‧第一電極組
3‧‧‧基板
31‧‧‧第二電極組
6‧‧‧吸嘴

Claims (10)

  1. 一種固晶穩固製程，包含以下步驟：提供複數微型晶片，各該微型晶片設有一第一電極組；提供一基板，並將該基板定位於一固晶機台，該基板設有與該複數第一電極組相對應之複數第二電極組；提供一呈膏狀之助焊劑，將該助焊劑設於該第二電極組；一第一置放步驟，依一第一排列模式地將部分該複數微型晶片之第一電極組設於該基板之第二電極組，該助焊劑連接該第一及第二電極組，其中，該第一排列模式係於縱向上及橫向上間隔地配置；一第一加熱加壓步驟，以一第一預定溫度加熱使該助焊劑呈液態狀，同時進行加壓動作迫使該第一及第二電極組相互靠近，之後冷卻該助焊劑而使該助焊劑定位住該第一及第二電極組；一第二置放步驟，依一第二排列模式地將部分該複數微型晶片之第一電極組設於該基板之第二電極組，該助焊劑連接該第一及第二電極組，其中，該第二排列模式係與該第一排列模式相反；重複該第一加熱加壓步驟；一第二加熱加壓步驟，以一第二預定溫度加熱並加壓使該第一電極組及該第二電極組熔接，之後冷卻至常溫。
  2. 如請求項1所述的固晶穩固製程，其中該第一預定溫度係介於120℃至230℃之間。
  3. 如請求項1所述的固晶穩固製程，其中該第二預定溫度係大於230℃且不大於330℃。
  4. 如請求項1所述的固晶穩固製程，其中該第二電極組另包含有一金屬鍍層，在該第一加熱加壓步驟中，該助焊劑係熔接該第一電極組及該金屬鍍 層，該金屬鍍層由外而內依序設有一錫料層、一銅料層及一基底層，該基底層之材質選自鎳或鈦，該第二預定溫度係大於或等於該錫料層之熔點。
  5. 如請求項4所述的固晶穩固製程，其中該金屬鍍層另設有一金料層，該金料層係覆設於該錫料層。
  6. 如請求項4所述的固晶穩固製程，其中該錫料層之厚度係介於1μm至10μm之間。
  7. 如請求項6所述的固晶穩固製程，其中該錫料層之厚度為5μm至7μm之間。
  8. 如請求項1所述的固晶穩固製程，其中於一方向上相鄰的二該微型晶片之距離係小於200μm，各該微型晶片之面積係介於10μm2至300μm2之間。
  9. 如請求項1所述的固晶穩固製程，其中該助焊劑係採用網版印刷、單點設置、噴塗其中一者方式設於該第二電極組。
  10. 如請求項7所述的固晶穩固製程，其中該金屬鍍層之上表面係呈平面狀，該第一預定溫度為180℃；該第二預定溫度為260℃；該基板係選自於FR-4基板、BT基板、玻璃、支架、陶瓷、鋁基板、銅基板、矽基板、軟性基板(PI)及藍寶石其中一者；該助焊劑係採用單點設置之方式設於該第二電極組，於一方向上相鄰的二該微型晶片之距離係小於200μm，各該微型晶片之面積係小於5平方密爾(mil2)；該固晶穩固製程另提供有一軌道單元及一加熱器，該軌道單元設有一加熱位置及一冷卻位置，該基板可於該加熱位置及該冷卻位置之間移動地設於該軌道單元，該加熱器係設於該加熱位置而對該基板進行加熱；加壓之壓力大小係為每5平方密爾1公克至100公克(1~100g/5mil2)。
TW105129767A 2016-09-13 2016-09-13 固晶穩固製程 TWI607587B (zh)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW105129767A TWI607587B (zh) 2016-09-13 2016-09-13 固晶穩固製程
US15/335,722 US20180076169A1 (en) 2016-09-13 2016-10-27 Chip bonding process

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW105129767A TWI607587B (zh) 2016-09-13 2016-09-13 固晶穩固製程

Publications (2)

Publication Number Publication Date
TWI607587B true TWI607587B (zh) 2017-12-01
TW201810735A TW201810735A (zh) 2018-03-16

Family

ID=61230545

Family Applications (1)

Application Number Title Priority Date Filing Date
TW105129767A TWI607587B (zh) 2016-09-13 2016-09-13 固晶穩固製程

Country Status (2)

Country Link
US (1) US20180076169A1 (zh)
TW (1) TWI607587B (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111628063A (zh) * 2020-03-04 2020-09-04 深圳雷曼光电科技股份有限公司 一种Micro-LED的固晶方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW553475U (en) * 2002-10-14 2003-09-11 Ase Advanced Semiconductor Eng Flux stage for flip-chip package process
EP1114807B1 (en) * 1999-06-14 2005-07-27 Sumitomo Electric Industries, Ltd. Semiconductor device or heat dissipating substrate therefor using a composite material
TW200611366A (en) * 2004-09-29 2006-04-01 Advanced Semiconductor Eng Flip-chip bonding process and chip package structure and package carrier thereof
TW201127235A (en) * 2010-01-29 2011-08-01 Welland Ind Co Ltd A mounting method and a mounting apparatus for devices with matrix alignment
TW201212135A (en) * 2010-09-01 2012-03-16 Taiwan Semiconductor Mfg Bonding methods

Family Cites Families (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4143385A (en) * 1976-09-30 1979-03-06 Hitachi, Ltd. Photocoupler
US4857801A (en) * 1983-04-18 1989-08-15 Litton Systems Canada Limited Dense LED matrix for high resolution full color video
JP2942025B2 (ja) * 1991-08-02 1999-08-30 株式会社日立製作所 フラックス塗布機構
JP3579944B2 (ja) * 1995-01-27 2004-10-20 ソニー株式会社 表示装置
US6307527B1 (en) * 1998-07-27 2001-10-23 John S. Youngquist LED display assembly
EP1030349B2 (de) * 1999-01-07 2013-12-11 Kulicke & Soffa Die Bonding GmbH Verfahren und Vorrichtung zum Behandeln von auf einem Substrat angeordneten elektronischen Bauteilen, insbesondere von Halbleiterchips
JP4128319B2 (ja) * 1999-12-24 2008-07-30 株式会社新川 マルチチップボンディング方法及び装置
JP4206320B2 (ja) * 2003-09-19 2009-01-07 株式会社ルネサステクノロジ 半導体集積回路装置の製造方法
EP1737029A4 (en) * 2004-03-24 2011-03-30 Tokuyama Corp SUBSTRATE FOR COMPONENTS BONDING AND MANUFACTURING METHOD THEREFOR
US7259030B2 (en) * 2004-03-29 2007-08-21 Articulated Technologies, Llc Roll-to-roll fabricated light sheet and encapsulated semiconductor circuit devices
US7288472B2 (en) * 2004-12-21 2007-10-30 Intel Corporation Method and system for performing die attach using a flame
US8314500B2 (en) * 2006-12-28 2012-11-20 Ultratech, Inc. Interconnections for flip-chip using lead-free solders and having improved reaction barrier layers
KR101165029B1 (ko) * 2007-04-24 2012-07-13 삼성테크윈 주식회사 칩 가열장치, 이를 구비한 플립 칩 본더 및 이를 이용한플립 칩 본딩 방법
JP5167779B2 (ja) * 2007-11-16 2013-03-21 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US8381965B2 (en) * 2010-07-22 2013-02-26 Taiwan Semiconductor Manufacturing Company, Ltd. Thermal compress bonding
EP2630843B1 (en) * 2010-10-19 2014-12-10 Koninklijke Philips N.V. Led circuit arrangement
JP5645592B2 (ja) * 2010-10-21 2014-12-24 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US8486758B2 (en) * 2010-12-20 2013-07-16 Tessera, Inc. Simultaneous wafer bonding and interconnect joining
JP5218686B2 (ja) * 2011-08-08 2013-06-26 Ｊｓｒ株式会社 フラックス組成物、電気的接続構造の形成方法、電気的接続構造および半導体装置
US9105760B2 (en) * 2011-11-07 2015-08-11 Taiwan Semiconductor Manufacturing Company, Ltd. Pick-and-place tool for packaging process
US9273834B2 (en) * 2013-02-25 2016-03-01 Osram Gmbh Method for mounting light radiation sources and light source therefor
US9142501B2 (en) * 2013-03-14 2015-09-22 International Business Machines Corporation Under ball metallurgy (UBM) for improved electromigration
JP5874683B2 (ja) * 2013-05-16 2016-03-02 ソニー株式会社 実装基板の製造方法、および電子機器の製造方法
DE102014103013B4 (de) * 2014-03-06 2017-09-21 Infineon Technologies Ag Verfahren zum Erzeugen einer getrockneten Pastenschicht, Verfahren zum Erzeugen einer Sinterverbindung und Durchlaufanlage zur Durchführung der Verfahren
US9799719B2 (en) * 2014-09-25 2017-10-24 X-Celeprint Limited Active-matrix touchscreen

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1114807B1 (en) * 1999-06-14 2005-07-27 Sumitomo Electric Industries, Ltd. Semiconductor device or heat dissipating substrate therefor using a composite material
TW553475U (en) * 2002-10-14 2003-09-11 Ase Advanced Semiconductor Eng Flux stage for flip-chip package process
TW200611366A (en) * 2004-09-29 2006-04-01 Advanced Semiconductor Eng Flip-chip bonding process and chip package structure and package carrier thereof
TW201127235A (en) * 2010-01-29 2011-08-01 Welland Ind Co Ltd A mounting method and a mounting apparatus for devices with matrix alignment
TW201212135A (en) * 2010-09-01 2012-03-16 Taiwan Semiconductor Mfg Bonding methods

Also Published As

Publication number Publication date
US20180076169A1 (en) 2018-03-15
TW201810735A (zh) 2018-03-16

Similar Documents

Publication Publication Date Title
US11450785B2 (en) Transfer carrier for micro light-emitting element
TWI693648B (zh) 用於組裝發光元件矩陣的多點接合技術
US11798919B2 (en) Transfer carrier and manufacturing method thereof, and method for transferring light-emitting diode chip
CN109256337B (zh) 一种周长毫米级元件共晶焊接装置及焊接方法
TW201537704A (zh) 用以加工半導體裝置的系統及用以加工半導體裝置的方法
JP5765981B2 (ja) 発光装置
TWI607587B (zh) 固晶穩固製程
KR100502043B1 (ko) 전자 디바이스 제조장치, 전자 디바이스 제조방법 및 전자디바이스의 제조 프로그램
JP2013157377A (ja) 半導体装置の半田付け方法および半田付け治具
JP5751258B2 (ja) 半導体装置の製造方法
CN101193498B (zh) 印刷电路板、印刷电路板组件的制造方法和翘曲校正方法
CN107845713A (zh) 固晶稳固方法
US20230005878A1 (en) Temporary Chip Assembly, Display Panel, and Manufacturing Methods of Temporary Chip Assembly and Display Panel
CN110112126A (zh) 显示器件和显示模组及其制造方法
JP6298962B1 (ja) チップの固定方法
CN103188884A (zh) 接合金属印刷电路板和柔性电路的方法及其装置
CN110931627A (zh) 一种微型发光二极管显示背板及其制造方法
TWI813341B (zh) 覆晶接合方法
JP2011044530A (ja) はんだ接合方法およびはんだ接合装置
JP2004281646A (ja) 電子部品の固着方法および固着装置
TWI810025B (zh) 利用轉移方式的超小型發光二極體晶片返修裝置以及返修方法
TWI762290B (zh) 具複數功率元件電源模組的間隔加壓結合法
CN211539850U (zh) 适于半导体产品的回流船
WO2021142960A1 (zh) 一种微型发光二极管显示背板及其制造方法
CN114725078A (zh) 一种背光模组的制造工艺及背光模组