TWI600955B - Pixel array - Google Patents
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本發明是有關於一種畫素陣列，且特別是有關於一種適用於窄邊框(slim border)設計的畫素陣列。The present invention relates to a pixel array, and more particularly to a pixel array suitable for use in a slim border design.
一般來說，為了因應螢幕外型設計朝向輕量化以及顯示區最大化的發展，通常會藉由縮小螢幕周圍用以遮蔽連接線路的非顯示區，使顯示裝置符合窄邊框之設計需求。近年來發展出一種窄化邊框的方法，其在掃描線及資料線之外設置選擇線，其中選擇線透過橋接點與對應的掃描線電性連接。如此一來，晶片可透過這些選擇線將掃描訊號傳遞至對應的掃描線。由於這種佈線設計可使掃描線與資料線由顯示區的同一邊拉線至晶片，因此可窄化非顯示區的寬度，從而符合窄邊框之設計需求。In general, in order to achieve a lightweight design and maximize the display area in response to the screen design, the display device is generally designed to meet the narrow bezel design by reducing the non-display area around the screen to shield the connection line. In recent years, a method for narrowing a frame has been developed, in which a selection line is disposed outside the scanning line and the data line, wherein the selection line is electrically connected to the corresponding scanning line through the bridge point. In this way, the chip can transmit the scan signal to the corresponding scan line through the selection lines. Since the wiring design allows the scan line and the data line to be drawn from the same side of the display area to the wafer, the width of the non-display area can be narrowed to meet the design requirements of the narrow bezel.
然而，受限於選擇線的拉線設計，常造成橋接點在分佈上不連續，使得阻容(RC)不連續。因此，在訊號傳遞時，例如將掃描訊號傳遞至對應的畫素時，對應於相鄰掃描線的相鄰畫素之間容易因其與橋接點的距離差異而產生充電時間的差異，導致條狀雲紋(band mura)的產生，而影響顯示品質。However, the design of the pull wire, which is limited by the selection line, often causes the bridge points to be discontinuous in distribution, so that the resistance (RC) is discontinuous. Therefore, when the signal is transmitted, for example, when the scan signal is transmitted to the corresponding pixel, the difference between the charging time of the adjacent pixels corresponding to the adjacent scanning line is easily caused by the difference in the distance from the bridge point, resulting in a strip. The generation of band mura affects the display quality.
本發明提供一種畫素陣列，其可改善條狀雲紋現象。The present invention provides a pixel array which can improve the stripe moiré phenomenon.
本發明的一種畫素陣列包括多條第一訊號線、多條第二訊號線、多個主動元件、多個畫素電極以及多條選擇線。第二訊號線電性絕緣於第一訊號線，且與第一訊號線交錯，以定義出多個畫素區。主動元件位於畫素區內，且各主動元件電性連接於對應的第一訊號線及對應的第二訊號線。畫素電極對應畫素區設置，且與主動元件電性連接。選擇線與第一訊號線交錯，其中各第一訊號線與其中一選擇線電性連接且在與所述其中一選擇線的交錯處具有橋接點。選擇線電性絕緣於第二訊號線，且相鄰兩條第二訊號線之間設置有至少一選擇線。第一訊號線以及選擇線的數量分別大於第二訊號線的數量，且第i條第一訊號線的橋接點與第(i+1)條第一訊號線的橋接點之間的連線所交錯的第二訊號線的數量為一，i=1到N，且N等於第一訊號線的數量。A pixel array of the present invention includes a plurality of first signal lines, a plurality of second signal lines, a plurality of active elements, a plurality of pixel electrodes, and a plurality of selection lines. The second signal line is electrically insulated from the first signal line and interleaved with the first signal line to define a plurality of pixel areas. The active component is located in the pixel area, and each active component is electrically connected to the corresponding first signal line and the corresponding second signal line. The pixel electrode is disposed corresponding to the pixel region and electrically connected to the active device. The selection line is interleaved with the first signal line, wherein each of the first signal lines is electrically connected to one of the selection lines and has a bridge point at the intersection with the one of the selection lines. The selection line is electrically insulated from the second signal line, and at least one selection line is disposed between the adjacent two second signal lines. The number of the first signal line and the selection line is greater than the number of the second signal line, respectively, and the connection between the bridge point of the first signal line of the ith and the bridge point of the (i+1)th first signal line The number of interleaved second signal lines is one, i=1 to N, and N is equal to the number of first signal lines.
在本發明的一實施例中，上述的第一條第一訊號線的橋接點至最後一條第一訊號線的橋接點的依序連線構成折線，且折線具有至少一轉折點。In an embodiment of the invention, the sequential connection of the bridge point of the first first signal line to the bridge point of the last first signal line constitutes a fold line, and the fold line has at least one turning point.
在本發明的一實施例中，上述的部分的相鄰兩條第二訊號線之間設置有複數選擇線。In an embodiment of the invention, a plurality of selection lines are disposed between adjacent two second signal lines of the portion.
在本發明的一實施例中，上述的部分的相鄰兩條第二訊號線之間有複數橋接點。In an embodiment of the invention, there are a plurality of bridge points between adjacent two second signal lines of the above portion.
在本發明的一實施例中，上述位於相鄰兩條第二訊號線之間的橋接點的數量小於或等於相鄰兩條第二訊號線之間的選擇線的數量。In an embodiment of the invention, the number of the bridge points between the adjacent two second signal lines is less than or equal to the number of the selection lines between the two adjacent second signal lines.
在本發明的一實施例中，上述的橋接點分別與不同條選擇線相交。In an embodiment of the invention, the bridge points respectively intersect different strip selection lines.
在本發明的一實施例中，上述的至少一轉折點的數量為j，且相鄰兩條第二訊號線之間的所述至少一選擇線的數量為j或(j+1)，j≥1。In an embodiment of the invention, the number of the at least one inflection point is j, and the number of the at least one selection line between two adjacent second signal lines is j or (j+1), j≥ 1.
在本發明的一實施例中，上述的相鄰兩條第二訊號線之間的所述至少一選擇線的數量為k，且所述至少一轉折點的數量為k或(k±1)，k≥2。In an embodiment of the present invention, the number of the at least one selection line between the adjacent two second signal lines is k, and the number of the at least one inflection point is k or (k±1), K≥2.
在本發明的一實施例中，上述的選擇線與畫素電極互不重疊。In an embodiment of the invention, the selection line and the pixel electrode do not overlap each other.
在本發明的一實施例中，上述的選擇線與第二訊號線位於同一層，且選擇線與第一訊號線位於不同層。In an embodiment of the invention, the selection line and the second signal line are in the same layer, and the selection line and the first signal line are in different layers.
基於上述，本發明的畫素陣列使兩相鄰第一訊號線的橋接點之間的連線所交錯的第二訊號線的數量為一，以降低相鄰第一訊號線的橋接點之間的距離，使對應於相鄰第一訊號線的相鄰畫素之間的充電時間的差異得以縮小，從而改善條狀雲紋現象，並提升顯示品質。Based on the above, the pixel array of the present invention causes the number of second signal lines interleaved by the connection between the bridge points of two adjacent first signal lines to be one to reduce the bridge point between adjacent first signal lines. The distance between the adjacent pixels corresponding to the adjacent first signal lines is reduced, thereby improving the stripe moiré and improving the display quality.
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。The above described features and advantages of the invention will be apparent from the following description.
圖1A是依照本發明的第一實施例的一種畫素陣列的上視示意圖。圖1B是圖1A中區域A的放大示意圖。圖1C及圖1D分別是圖1B中剖線A-A’及B-B’的剖面示意圖。1A is a top plan view of a pixel array in accordance with a first embodiment of the present invention. Fig. 1B is an enlarged schematic view of a region A in Fig. 1A. 1C and 1D are schematic cross-sectional views of the cross-sectional lines A-A' and B-B' in Fig. 1B, respectively.
請參照圖1A至圖1D，本實施例的畫素陣列100包括多條第一訊號線110、多條第二訊號線120、多個主動元件130、多個畫素電極140以及多條選擇線150。Referring to FIG. 1A to FIG. 1D , the pixel array 100 of the embodiment includes a plurality of first signal lines 110 , a plurality of second signal lines 120 , a plurality of active elements 130 , a plurality of pixel electrodes 140 , and a plurality of selection lines. 150.
第二訊號線120電性絕緣於第一訊號線110，且與第一訊號線110交錯，以定義出多個畫素區P。舉例而言，第一訊號線110沿第一方向D1排列且分別沿第二方向D2延伸。第二訊號線120沿第二方向D2排列且分別沿第一方向D1延伸。第一方向D1與第二方向D2相交，例如第一方向D1垂直於第二方向D2，但不以此為限。The second signal line 120 is electrically insulated from the first signal line 110 and interleaved with the first signal line 110 to define a plurality of pixel areas P. For example, the first signal lines 110 are arranged along the first direction D1 and extend in the second direction D2, respectively. The second signal lines 120 are arranged along the second direction D2 and extend in the first direction D1, respectively. The first direction D1 intersects the second direction D2, for example, the first direction D1 is perpendicular to the second direction D2, but is not limited thereto.
主動元件130位於畫素區P內，且各主動元件130電性連接於對應的第一訊號線110及對應的第二訊號線120。在本實施例中，各畫素區P內設置有一個主動元件130，但不以此為限。在另一實施例中，各畫素區P內可設置有多個主動元件130。The active component 130 is located in the pixel area P, and each active component 130 is electrically connected to the corresponding first signal line 110 and the corresponding second signal line 120. In this embodiment, an active component 130 is disposed in each pixel region P, but is not limited thereto. In another embodiment, a plurality of active components 130 may be disposed in each pixel region P.
主動元件130例如設置在基板S上，且主動元件130包括閘極GE、閘絕緣層GI、通道層CH、源極SE以及汲極DE。在本實施例中，閘極GE以及第一訊號線110設置在基板S上，且第一訊號線110與閘極GE電性連接。閘絕緣層GI覆蓋在閘極GE以及第一訊號線110上，且閘絕緣層GI具有多個開口W1。開口W1曝露出第一訊號線110的部分區域。通道層CH設置在閘絕緣層GI上，且位於閘極GE的上方。源極SE以及汲極DE設置在通道層CH上，且兩者分別位於通道層CH的相對兩側。源極SE與第二訊號線120電性連接。The active device 130 is disposed, for example, on the substrate S, and the active device 130 includes a gate GE, a gate insulating layer GI, a channel layer CH, a source SE, and a drain electrode DE. In this embodiment, the gate electrode GE and the first signal line 110 are disposed on the substrate S, and the first signal line 110 is electrically connected to the gate GE. The gate insulating layer GI covers the gate GE and the first signal line 110, and the gate insulating layer GI has a plurality of openings W1. The opening W1 exposes a partial area of the first signal line 110. The channel layer CH is disposed on the gate insulating layer GI and above the gate GE. The source SE and the drain DE are disposed on the channel layer CH, and the two are respectively located on opposite sides of the channel layer CH. The source SE is electrically connected to the second signal line 120.
本實施例雖以底閘極薄膜電晶體說明主動元件130的實施型態，但不以此為限。在另一實施例中，主動元件130可依據不同的設計需求而改變其種類或疊層架構。此外，本發明亦不用以限定第一訊號線110以及第二訊號線120各別傳遞的訊號種類。在本實施例中，第一訊號線110與閘極GE電性連接，且第二訊號線120與源極SE電性連接，因此，第一訊號線110用以傳遞掃描訊號，且第二訊號線120用以傳遞資料訊號。在另一實施例中，當第二訊號線120與閘極GE電性連接，且第一訊號線110與源極SE電性連接時，第二訊號線120用以傳遞資料訊號，且第一訊號線110用以傳遞掃描訊號。In this embodiment, the implementation of the active device 130 is described in the bottom gate thin film transistor, but is not limited thereto. In another embodiment, the active component 130 can change its kind or stacked architecture depending on different design requirements. In addition, the present invention does not need to limit the types of signals respectively transmitted by the first signal line 110 and the second signal line 120. In this embodiment, the first signal line 110 is electrically connected to the gate GE, and the second signal line 120 is electrically connected to the source SE. Therefore, the first signal line 110 is used to transmit the scan signal, and the second signal is used. Line 120 is used to transmit data signals. In another embodiment, when the second signal line 120 is electrically connected to the gate GE, and the first signal line 110 is electrically connected to the source SE, the second signal line 120 is used to transmit the data signal, and the first The signal line 110 is used to transmit the scan signal.
另外，本實施例的畫素陣列100還可進一步包括絕緣層OG，以保護上述元件，其中絕緣層OG覆蓋在主動元件130、選擇線150及閘絕緣層GI上。此外，絕緣層OG包括多個開口W2，且開口W2曝露出汲極DE的部分區域。畫素電極140對應畫素區P設置，且與主動元件130電性連接。進一步而言，畫素電極140例如是透過開口W2與汲極DE接觸。在本實施例中，畫素電極140進一步覆蓋第一訊號線110以及第二訊號線120的部分區域，且選擇線150與畫素電極140互不重疊，但不以此為限。In addition, the pixel array 100 of the present embodiment may further include an insulating layer OG to protect the above components, wherein the insulating layer OG covers the active device 130, the selection line 150, and the gate insulating layer GI. Further, the insulating layer OG includes a plurality of openings W2, and the opening W2 exposes a partial region of the drain DE. The pixel electrode 140 is disposed corresponding to the pixel region P and is electrically connected to the active device 130. Further, the pixel electrode 140 is in contact with the drain electrode DE, for example, through the opening W2. In this embodiment, the pixel electrode 140 further covers a portion of the first signal line 110 and the second signal line 120, and the selection line 150 and the pixel electrode 140 do not overlap each other, but are not limited thereto.
選擇線150與第一訊號線110交錯且電性絕緣於第二訊號線120，其中各第一訊號線110與其中一選擇線150電性連接且在與所述其中一選擇線150的交錯處具有橋接點X。具體地，選擇線150例如沿第二方向D2排列且分別沿第一方向D1延伸。在本實施例中，選擇線150與第二訊號線120位於同一層，且選擇線150與第一訊號線110位於不同層。進一步而言，閘極GE以及第一訊號線110可由第一金屬層圖案化而成，且第二訊號線120、選擇線150、源極SE以及汲極DE可由第二金屬層圖案化而成，但不以此為限。在另一實施例中，第一訊號線110、源極SE以及汲極DE可由第一金屬層圖案化而成，且閘極GE、第二訊號線120以及選擇線150可由第二金屬層圖案化而成。在此架構下，第一訊號線110與源極SE電性連接而用以傳遞資料訊號，且第二訊號線120與閘極GE電性連接而用以傳遞掃描訊號。此外，選擇線150透過開口W1與第一訊號線110電性連接而用以傳遞資料訊號。需說明的是，上述第一、第二金屬層僅是用以區別不同道製程所形成的膜層，而非用以限定兩者形成的先後順序。在實際製程中，第一金屬層可製作於第二金屬層之前或之後。The selection line 150 is interleaved with the first signal line 110 and electrically insulated from the second signal line 120, wherein each of the first signal lines 110 is electrically connected to one of the selection lines 150 and is interleaved with the one of the selection lines 150. Has a bridge point X. Specifically, the selection lines 150 are arranged, for example, in the second direction D2 and extend in the first direction D1, respectively. In this embodiment, the selection line 150 is in the same layer as the second signal line 120, and the selection line 150 is located at a different layer from the first signal line 110. Further, the gate GE and the first signal line 110 may be patterned by the first metal layer, and the second signal line 120, the selection line 150, the source SE, and the drain DE may be patterned by the second metal layer. , but not limited to this. In another embodiment, the first signal line 110, the source electrode SE, and the drain electrode DE may be patterned by the first metal layer, and the gate GE, the second signal line 120, and the select line 150 may be patterned by the second metal layer. Made out. In this configuration, the first signal line 110 is electrically connected to the source SE for transmitting the data signal, and the second signal line 120 is electrically connected to the gate GE for transmitting the scan signal. In addition, the selection line 150 is electrically connected to the first signal line 110 through the opening W1 for transmitting the data signal. It should be noted that the first and second metal layers are only used to distinguish the film layers formed by different processes, and are not intended to limit the order in which the two are formed. In an actual process, the first metal layer can be formed before or after the second metal layer.
透過選擇線150的設置，第一訊號線110以及第二訊號線120可由畫素陣列100的同一邊拉線至晶片端而與晶片C相接，從而有助於窄化畫素陣列100的左右兩側的非顯示區的寬度WD1，使應用本實施例的畫素陣列100的顯示裝置符合窄邊框之設計需求。Through the setting of the selection line 150, the first signal line 110 and the second signal line 120 can be connected to the wafer C by the same side of the pixel array 100 to the wafer end, thereby contributing to narrowing the left and right of the pixel array 100. The width WD1 of the non-display areas on both sides makes the display device to which the pixel array 100 of the present embodiment is applied conform to the design requirements of the narrow bezel.
在本發明的架構下，第一訊號線110以及選擇線150的數量分別大於第二訊號線120的數量，而選擇線150的數量及其設置形態可依據第一訊號線110與第二訊號線120之間的數量關係而有所不同。然而，相鄰兩條第二訊號線120之間設置有至少一選擇線150，且第i條第一訊號線110的橋接點X與第(i+1)條第一訊號線110的橋接點X之間的連線L所交錯的第二訊號線120的數量為一，i=1到N，且N等於第一訊號線110的數量。In the architecture of the present invention, the number of the first signal line 110 and the selection line 150 is greater than the number of the second signal lines 120, respectively, and the number of the selection lines 150 and the setting form thereof may be according to the first signal line 110 and the second signal line. The quantitative relationship between 120 varies. However, at least one selection line 150 is disposed between the adjacent two second signal lines 120, and the bridging point of the bridge point X of the i-th first signal line 110 and the (i+1)th first signal line 110 The number of second signal lines 120 interleaved by the line L between X is one, i=1 to N, and N is equal to the number of the first signal lines 110.
藉由使每兩相鄰第一訊號線110的橋接點X之間的連線L所交錯的第二訊號線120的數量為一，可降低相鄰第一訊號線110的橋接點X之間在第二方向D2上的距離，亦即縮減對應於相鄰第一訊號線110的相鄰畫素與對應的橋接點X之間的距離的差異，例如使畫素Px與對應的橋接點X1之間的距離Dx與畫素Py與對應的橋接點X2之間的距離Dy的差異得以減縮，從而使第一條第一訊號線110的橋接點X(即橋接點X1)至最後一條第一訊號線110的橋接點X的分佈較為連續。如此一來，在晶片C傳遞訊號(如掃描訊號)至畫素(包括主動元件130及畫素電極140)時，可縮減對應於相鄰第一訊號線110的相鄰畫素之間充電時間的差異，從而改善條狀雲紋現象，並提升顯示品質。The number of the second signal lines 120 interleaved by the connection line L between the bridge points X of each two adjacent first signal lines 110 is one, and the bridge point X between the adjacent first signal lines 110 can be lowered. The distance in the second direction D2, that is, the difference between the distance between the adjacent pixel corresponding to the adjacent first signal line 110 and the corresponding bridge point X, for example, the pixel Px and the corresponding bridge point X1 The difference between the distance Dx and the distance Dy between the pixel Py and the corresponding bridge point X2 is reduced, so that the bridge point X (ie, the bridge point X1) of the first first signal line 110 is the first to the last The distribution of the bridge point X of the signal line 110 is relatively continuous. In this way, when the chip C transmits a signal (such as a scan signal) to the pixel (including the active component 130 and the pixel electrode 140), the charging time between adjacent pixels corresponding to the adjacent first signal line 110 can be reduced. The difference is to improve stripe moiré and improve display quality.
在本實施例中，第一條第一訊號線110的橋接點X至最後一條第一訊號線110的橋接點X的依序連線構成折線PL，且折線PL具有至少一轉折點TP。所述至少一轉折點TP的所在位置即其中至少一橋接點X的位置。在圖1A中，假設轉折點TP對應於第n條第一訊號線110的橋接點X，以下為方便說明，將第n條第一訊號線110以前的橋接點X，也就是第一條至第(n-1)條第一訊號線110的橋接點X，簡稱為前橋接點，而將第n條第一訊號線110以後的橋接點X，也就是第(n+1)條至第N條第一訊號線110的橋接點X，簡稱為後橋接點。In this embodiment, the sequential connection of the bridge point X of the first first signal line 110 to the bridge point X of the last first signal line 110 constitutes a fold line PL, and the fold line PL has at least one turning point TP. The location of the at least one turning point TP is the position of at least one of the bridging points X. In FIG. 1A, it is assumed that the inflection point TP corresponds to the bridging point X of the nth first signal line 110. For convenience of explanation, the bridge point X of the nth first signal line 110, that is, the first to the first (n-1) the bridge point X of the first signal line 110, referred to as the front bridge contact, and the bridge point X after the nth first signal line 110, that is, the (n+1)th to the Nth The bridge point X of the first signal line 110 is simply referred to as a rear bridge contact.
在第一訊號線110的數量大於第二訊號線120的數量的架構下，藉由所述至少一轉折點TP的設計，在不變更(增加)第二訊號線120的數量下，畫素陣列100可形成更多的橋接點X。所述至少一轉折點TP與兩條第二訊號線120之間的所述至少一選擇線150的數量的設計如下。當所述至少一轉折點TP的數量為j時，相鄰兩條第二訊號線120之間的所述至少一選擇線150的數量為j或(j+1)，且j≥1。Under the architecture that the number of the first signal lines 110 is greater than the number of the second signal lines 120, the pixel array 100 is not changed (increased) by the number of the second signal lines 120 by the design of the at least one turning point TP. More bridge points X can be formed. The design of the number of the at least one selection line 150 between the at least one inflection point TP and the two second signal lines 120 is as follows. When the number of the at least one turning point TP is j, the number of the at least one selection line 150 between the adjacent two second signal lines 120 is j or (j+1), and j≥1.
在所述至少一轉折點TP的數量為0時，相鄰兩條第二訊號線120之間的所述至少一選擇線150的數量可為一。然而，在所述至少一轉折點TP的數量≥1時，須在第二訊號線120之間增設與後橋接點連接的選擇線150，以將訊號(如掃描訊號)傳遞至對應於後橋接點的第一訊號線110。藉由增加相鄰兩條第二訊號線120之間的選擇線150的數量，使相鄰兩條第二訊號線120之間設置有複數選擇線150，複數選擇線150的一部分可與前橋接點連接，而複數選擇線150的另一部分可與後橋接點連接。如此，前橋接點與後橋接點可分別與不同條選擇線150相交，亦即第一訊號線110無須共用同一條選擇線150。在此架構下，各後橋接點分別與其中一個前橋接點共同位於相鄰兩條第二訊號線120之間，使得相鄰兩條第二訊號線120之間有複數橋接點X。When the number of the at least one turning point TP is 0, the number of the at least one selection line 150 between the adjacent two second signal lines 120 may be one. However, when the number of the at least one turning point TP is ≥1, a selection line 150 connected to the rear bridge contact point is added between the second signal lines 120 to transmit a signal (such as a scanning signal) to correspond to the rear bridge contact point. The first signal line 110. By adding the number of the selection lines 150 between the adjacent two second signal lines 120, a plurality of selection lines 150 are disposed between the adjacent two second signal lines 120, and a part of the plurality of selection lines 150 can be bridged with the front The points are connected, and another portion of the plurality of selection lines 150 can be connected to the rear bridge contacts. In this way, the front bridge contact and the rear bridge contact can respectively intersect with different strip selection lines 150, that is, the first signal line 110 does not need to share the same selection line 150. In this architecture, each of the rear bridge contacts is located between the adjacent two second signal lines 120 together with one of the front bridge contacts, so that there are a plurality of bridge points X between the adjacent two second signal lines 120.
補充說明的是，相鄰兩條第二訊號線120之間的選擇線150不一定要全與第一訊號線110電性連接。也就是說，位於相鄰兩條第二訊號線120之間的橋接點X的數量可小於或等於相鄰兩條第二訊號線120之間的選擇線150的數量。舉例而言，位於圖1A最左邊的兩條第二訊號線120之間的兩條選擇線150的其中一條可不與第一訊號線110電性連接。在另一實施例中，亦可省略未與第一訊號線110電性連接的選擇線150。It should be noted that the selection line 150 between the adjacent two second signal lines 120 does not have to be electrically connected to the first signal line 110. That is, the number of bridge points X between adjacent two second signal lines 120 may be less than or equal to the number of select lines 150 between adjacent two second signal lines 120. For example, one of the two select lines 150 located between the two second signal lines 120 on the leftmost side of FIG. 1A may not be electrically connected to the first signal line 110. In another embodiment, the selection line 150 that is not electrically connected to the first signal line 110 may also be omitted.
以下藉由圖2至圖6說明畫素陣列100的其他種實施型態，其中相同或相似的元件以相同或相似的標號表示，並不再贅述這些元件的相對配置關係或其功效。圖2至圖6分別是依照本發明的第二至第六實施例的畫素陣列的上視示意圖。Other embodiments of the pixel array 100 will be described below with reference to FIGS. 2 through 6, wherein the same or similar elements are designated by the same or similar reference numerals, and the relative arrangement of the elements or their effects will not be described again. 2 to 6 are top plan views of pixel arrays in accordance with second to sixth embodiments of the present invention, respectively.
請參照圖2，畫素陣列200與圖1A的畫素陣列100的主要差異如下所述。在畫素陣列100中，所述至少一轉折點TP的數量為一，且相鄰兩條第二訊號線120之間的所述至少一選擇線150的數量為二。另一方面，在畫素陣列200中，所述至少一轉折點TP的數量為二，且相鄰兩條第二訊號線120之間的所述至少一選擇線150的數量為三。Referring to FIG. 2, the main differences between the pixel array 200 and the pixel array 100 of FIG. 1A are as follows. In the pixel array 100, the number of the at least one inflection point TP is one, and the number of the at least one selection line 150 between the adjacent two second signal lines 120 is two. On the other hand, in the pixel array 200, the number of the at least one inflection point TP is two, and the number of the at least one selection line 150 between the adjacent two second signal lines 120 is three.
進一步而言，在第二訊號線120的數量不變下，隨著第一訊號線110的增加，可藉由增加轉折點TP的數量及相鄰兩條第二訊號線120之間的選擇線150的數量，使畫素陣列200能夠形成更多的橋接點X。Further, when the number of the second signal lines 120 is constant, as the first signal line 110 increases, the number of the turning points TP and the selecting line 150 between the adjacent two second signal lines 120 can be increased. The number of pixels allows the pixel array 200 to form more bridge points X.
在圖1A及圖2中，轉折點TP位於畫素陣列100、200的邊緣(鄰近最後一條第二訊號線120或第一條第二訊號線120)。然而，轉折點TP的位置可依需求而改變。請參照圖3及圖4，轉折點TP也可位於畫素陣列300、400的中間或邊緣。In FIGS. 1A and 2, the inflection point TP is located at the edge of the pixel array 100, 200 (near the last second signal line 120 or the first second signal line 120). However, the position of the turning point TP can be changed as needed. Referring to FIGS. 3 and 4, the turning point TP may also be located in the middle or edge of the pixel array 300, 400.
另外，當相鄰兩條第二訊號線120之間的所述至少一選擇線150的數量為k時，所述至少一轉折點TP的數量可為k或(k±1)，k≥2。如圖1A及圖2所示，相鄰兩條第二訊號線120之間的所述至少一選擇線150的數量可等於所述至少一轉折點TP的數量加一。如圖3所示，相鄰兩條第二訊號線120之間的所述至少一選擇線150的數量可等於所述至少一轉折點TP的數量。如圖4所示，相鄰兩條第二訊號線120之間的所述至少一選擇線150的數量可等於所述至少一轉折點TP的數量減一。In addition, when the number of the at least one selection line 150 between the adjacent two second signal lines 120 is k, the number of the at least one inflection point TP may be k or (k±1), k≥2. As shown in FIG. 1A and FIG. 2, the number of the at least one selection line 150 between two adjacent second signal lines 120 may be equal to the number of the at least one inflection point TP plus one. As shown in FIG. 3, the number of the at least one selection line 150 between adjacent two second signal lines 120 may be equal to the number of the at least one turning point TP. As shown in FIG. 4, the number of the at least one selection line 150 between adjacent two second signal lines 120 may be equal to the number of the at least one inflection point TP minus one.
請參照圖5，畫素陣列500與圖1A的畫素陣列100的主要差異在於橋接點X的排列方式。在畫素陣列100中，在轉折點TP之前，橋接點X是由畫素陣列100的左上至右下排列，而在轉折點TP之後，橋接點X是由畫素陣列100的右上至左下排列。另一方面，在畫素陣列500中，橋接點X在轉折點TP之前與之後的排列趨勢恰與圖1A相反。圖2至圖4亦可同此改良，於下便不再贅述。Referring to FIG. 5, the main difference between the pixel array 500 and the pixel array 100 of FIG. 1A is the arrangement of the bridge points X. In the pixel array 100, before the turning point TP, the bridge point X is arranged from the upper left to the lower right of the pixel array 100, and after the turning point TP, the bridge point X is arranged from the upper right to the lower left of the pixel array 100. On the other hand, in the pixel array 500, the arrangement tendency of the bridge point X before and after the turning point TP is exactly opposite to that of FIG. 1A. Figures 2 to 4 can also be modified as such, and will not be described again.
請參照圖6，畫素陣列600與圖1A的畫素陣列100的主要差異如下所述。在畫素陣列100中，第二訊號線120及選擇線150是由畫素陣列100的下方出線，而有助於窄化畫素陣列100的左右兩側的非顯示區的寬度WD1。在畫素陣列600中，第二訊號線120及選擇線150是由畫素陣列600的右側出線，而有助於窄化畫素陣列600的上下兩側的非顯示區的寬度WD2。Referring to FIG. 6, the main differences between the pixel array 600 and the pixel array 100 of FIG. 1A are as follows. In the pixel array 100, the second signal line 120 and the selection line 150 are lined from the lower side of the pixel array 100, and contribute to narrowing the width WD1 of the non-display area on the left and right sides of the pixel array 100. In the pixel array 600, the second signal line 120 and the selection line 150 are outgoing from the right side of the pixel array 600, and contribute to narrowing the width WD2 of the non-display area on the upper and lower sides of the pixel array 600.
綜上所述，本發明的畫素陣列使相鄰第一訊號線的橋接點之間的連線所交錯的第二訊號線的數量為一，以降低相鄰第一訊號線的橋接點之間的距離，使相鄰畫素之間的充電時間的差異得以縮小，從而改善條狀雲紋現象，並提升顯示品質。In summary, the pixel array of the present invention causes the number of second signal lines interleaved by the connection between the bridge points of adjacent first signal lines to be one to reduce the bridge point of the adjacent first signal lines. The distance between the adjacent pixels reduces the difference in charging time between adjacent pixels, thereby improving the stripe moiré and improving the display quality.
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.
100、200、300、400、500、600‧‧‧畫素陣列
110‧‧‧第一訊號線
120‧‧‧第二訊號線
130‧‧‧主動元件
140‧‧‧畫素電極
150‧‧‧選擇線
A‧‧‧區域
C‧‧‧晶片
CH‧‧‧通道層
D1‧‧‧第一方向
D2‧‧‧第二方向
DE‧‧‧汲極
Dx、Dy‧‧‧距離
GE‧‧‧閘極
GI‧‧‧閘絕緣層
L‧‧‧連線
OG‧‧‧絕緣層
P‧‧‧畫素區
PL‧‧‧折線
Px、Py‧‧‧畫素
S‧‧‧基板
SE‧‧‧源極
TP‧‧‧轉折點
W1、W2‧‧‧開口
WD1、WD2‧‧‧寬度
X、X1、X2‧‧‧橋接點
A-A’、B-B’‧‧‧剖線100, 200, 300, 400, 500, 600‧‧‧ pixel arrays
110‧‧‧First signal line
120‧‧‧second signal line
130‧‧‧Active components
140‧‧‧ pixel electrodes
150‧‧‧Selection line
A‧‧‧ area
C‧‧‧ wafer
CH‧‧‧ channel layer
D1‧‧‧ first direction
D2‧‧‧ second direction
DE‧‧‧汲
Dx, Dy‧‧‧ distance
GE‧‧‧ gate
GI‧‧‧ brake insulation
L‧‧‧ connection
OG‧‧‧Insulation
P‧‧‧Photo District
PL‧‧‧ fold line
Px, Py‧‧ pixels
S‧‧‧Substrate
SE‧‧‧ source
TP‧‧‧ turning point
W1, W2‧‧‧ openings
WD1, WD2‧‧‧ width
X, X1, X2‧‧‧ bridge points
A-A', B-B'‧‧‧ cut line
圖1A是依照本發明的第一實施例的一種畫素陣列的上視示意圖。 圖1B是圖1A中區域A的放大示意圖。 圖1C及圖1D分別是圖1B中剖線A-A’及B-B’的剖面示意圖。 圖2至圖6分別是依照本發明的第二至第六實施例的畫素陣列的上視示意圖。1A is a top plan view of a pixel array in accordance with a first embodiment of the present invention. Fig. 1B is an enlarged schematic view of a region A in Fig. 1A. 1C and 1D are schematic cross-sectional views of the cross-sectional lines A-A' and B-B' in Fig. 1B, respectively. 2 to 6 are top plan views of pixel arrays in accordance with second to sixth embodiments of the present invention, respectively.
100‧‧‧畫素陣列 100‧‧‧ pixel array
110‧‧‧第一訊號線 110‧‧‧First signal line
120‧‧‧第二訊號線 120‧‧‧second signal line
150‧‧‧選擇線 150‧‧‧Selection line
A‧‧‧區域 A‧‧‧ area
C‧‧‧晶片 C‧‧‧ wafer
D1‧‧‧第一方向 D1‧‧‧ first direction
D2‧‧‧第二方向 D2‧‧‧ second direction
Dx、Dy‧‧‧距離 Dx, Dy‧‧‧ distance
L‧‧‧連線 L‧‧‧ connection
P‧‧‧畫素區 P‧‧‧Photo District
PL‧‧‧折線 PL‧‧‧ fold line
Px、Py‧‧‧畫素 Px, Py‧‧ pixels
TP‧‧‧轉折點 TP‧‧‧ turning point
WD1‧‧‧寬度 WD1‧‧‧Width
X、X1、X2‧‧‧橋接點 X, X1, X2‧‧‧ bridge points
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| TWI356958B (en) * | 2007-05-08 | 2012-01-21 | Chunghwa Picture Tubes Ltd | Liquid crystal display, pixel structure and drivin |
| TW201530240A (en) * | 2014-01-23 | 2015-08-01 | E Ink Holdings Inc | Pixel array |
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| CN1550854A (en) * | 2003-04-30 | 2004-12-01 | 瀚宇彩晶股份有限公司 | Liquid crystal display panel,liquid crystal displayer and method for driving liquid crystal display |
| TWI356958B (en) * | 2007-05-08 | 2012-01-21 | Chunghwa Picture Tubes Ltd | Liquid crystal display, pixel structure and drivin |
| TW201530240A (en) * | 2014-01-23 | 2015-08-01 | E Ink Holdings Inc | Pixel array |
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