TWI597507B - Testing device and testing method - Google Patents
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Description
本發明說明書主要係有關於一測試技術，特別係有關於藉由一測試裝置傳送一時脈信號給待測物，以測試待測物是否有開路/短路發生之測試技術。 The specification of the present invention mainly relates to a testing technique, and particularly relates to a testing technique for transmitting a clock signal to a test object by a test device to test whether an open/short circuit occurs in the object to be tested.
表面黏著技術(Surface-Mount Technology，SMT)係目前常用之將電子元件焊接於電路板(Printed Circuit Board，PCB)表面之技術。有別於使用***式封裝技術(Through Hole Technology，THT)，將電子元件安置在電路板的一面，並將接腳焊在電路板之另一面，表面黏著技術可以大幅降低電子產品的體積。 Surface-Mount Technology (SMT) is a commonly used technique for soldering electronic components to the surface of a Printed Circuit Board (PCB). Unlike the use of Through Hole Technology (THT), electronic components are placed on one side of the board and soldered to the other side of the board. Surface bonding technology can significantly reduce the size of electronic products.
然而，由於USB 3.1 Type-C連接器之腳位係隱藏於元件本體下方，若在使用表面黏著技術將其焊接於電路板(或主機板上)，工廠在生產時並無法以人工或機器視覺設備等檢測方式來檢測電路板之USB 3.1 Type-C連接器有無開路或短路的狀況發生，且若全使用X光(X-Ray)來進行檢測，將會花費較高之成本。 However, since the pin position of the USB 3.1 Type-C connector is hidden under the component body, if it is soldered to the circuit board (or the motherboard) using surface adhesion technology, the factory cannot produce manual or machine vision. Detection methods such as equipment to detect the presence or absence of open circuit or short circuit of the USB 3.1 Type-C connector on the board, and if X-ray (X-Ray) is used for detection, it will cost a lot.
此外，由於USB為係使用差動信號(Differential Signal)傳輸之方式，因此通常會在其內部加入0.1u之交流耦合電容(AC-Coupling capacitance)，此電容會影響一般以直流電VCC為訊號源設計的開路/短路測試治 具之檢測。因此，當在進行USB開路/短路測時(In-Circuit Test，ICT)，將會無法測得正確之結果。 In addition, since USB is a differential signal transmission method, 0.1u AC-coupling capacitance is usually added inside, which affects the design of DC power source VCC. Open/short test With detection. Therefore, when performing an USB In-Circuit Test (ICT), the correct result will not be measured.
因此，如何針對具有交流耦合電容特別是使用表面黏著技術製成方式配置在電路板之裝置(例如：USB Type-C連接器)，進行開路和短路之測試，將是值得討論之課題。 Therefore, how to perform open-circuit and short-circuit tests on devices (such as USB Type-C connectors) with AC coupling capacitors, especially those fabricated using surface adhesion technology, will be a subject worthy of discussion.
有鑑於上述先前技術之問題，本發明提供了藉由一測試裝置傳送一時脈信號給待測物，以測試待測物是否有開路/短路發生之測試方法。 In view of the above prior art problems, the present invention provides a test method for transmitting a clock signal to a test object by a test device to test whether an object to be tested has an open/short circuit.
根據本發明之一實施例提供了一種測試裝置。上述測試裝置用以測試一待測物，其中上述待測物包含一第二連接介面，且上述第二連接介面包含一欲測試之腳位及一接地腳位。上述測試裝置包括一時脈電路、一測試電路以及複數顯示燈。時脈電路產生一時脈信號。測試電路包含一第一連接介面以及一接地端，其中上述第一連接介面包含複數腳位耦接至上述待測物之上述第二連接介面，其中上述複數腳位之一第一腳位耦接至上述時脈電路以及上述待測物之上述接地腳位。複數顯示燈耦接至第一連接介面，且對應至上述複數腳位。 A test apparatus is provided in accordance with an embodiment of the present invention. The test device is configured to test a test object, wherein the test object comprises a second connection interface, and the second connection interface comprises a pin to be tested and a ground pin. The above test device comprises a clock circuit, a test circuit and a plurality of display lights. The clock circuit generates a clock signal. The test circuit includes a first connection interface and a ground connection, wherein the first connection interface includes a plurality of pins coupled to the second connection interface of the object to be tested, wherein one of the plurality of pins is coupled to the first pin And the above grounding circuit of the clock circuit and the object to be tested. The plurality of display lamps are coupled to the first connection interface and correspond to the plurality of pins.
在一些實施例中，上述測試裝置更包括一開關電路。開關電路連接上述接地腳位和上述第一腳位，或連接上述接地腳位和上述接地端。當上述開關電路連接上述 接地腳位及上述接地端時，上述時脈電路耦接至一量測棒，以及上述量測棒傳送上述時脈信號至上述欲測試之腳位。在一些實施例中，上述測試裝置更包括一連接裝置。上述連接裝置用以連接上述第一連接介面與上述第二連接介面。 In some embodiments, the test apparatus further includes a switching circuit. The switch circuit connects the grounding pin and the first pin, or connects the ground pin and the ground. When the above switch circuit is connected to the above When the grounding pin and the grounding end are connected, the clock circuit is coupled to a measuring rod, and the measuring rod transmits the clock signal to the pin to be tested. In some embodiments, the test device further includes a connection device. The connecting device is configured to connect the first connection interface and the second connection interface.
根據本發明之一實施例提供了一種測試方法。上述測試方法用於測試一待測物之一測試裝置，其中上述測試裝置包括複數腳位以及複數顯示燈，且上述複數顯示燈對應上述複數腳位。上述測試方法包括以下步驟：耦接上述測試裝置和上述待測物；藉由上述測試裝置之一時脈電路產生一時脈信號；藉由上述複數腳位之一第一腳位接收上述時脈信號；藉由上述第一腳位傳送上述時脈信號至上述待測物之一接地腳位；以及當上述測試裝置之上述第一腳位收到上述待測物回傳之上述時脈信號時，導通上述複數顯示燈之對應至上述第一腳位之一第一顯示燈。 A test method is provided in accordance with an embodiment of the present invention. The above test method is used for testing a test device of a test object, wherein the test device comprises a plurality of pins and a plurality of display lights, and the plurality of display lights correspond to the plurality of pins. The above test method includes the steps of: coupling the test device and the object to be tested; generating a clock signal by a clock circuit of the test device; receiving the clock signal by the first pin of the plurality of pins; Transmitting the clock signal to one of the grounding pins of the object to be tested by the first pin; and turning on the clock signal when the first pin of the testing device receives the clock signal returned by the object to be tested The plurality of display lamps correspond to one of the first display positions of the first display lamp.
關於本發明其他附加的特徵與優點，此領域之熟習技術人士，在不脫離本發明之精神和範圍內，當可根據本案實施方法中所揭露之執行聯繫程序之使用者裝置、系統、以及方法，做些許的更動與潤飾而得到。 With respect to other additional features and advantages of the present invention, a user device, system, and method for performing the contact procedure disclosed in the method of the present invention can be made by those skilled in the art without departing from the spirit and scope of the present invention. , do a little change and retouch to get.
100‧‧‧測試裝置 100‧‧‧Testing device
110‧‧‧時脈電路 110‧‧‧ clock circuit
120‧‧‧測試電路 120‧‧‧Test circuit
130‧‧‧複數顯示燈 130‧‧‧Multiple display lights
121‧‧‧第一連接介面 121‧‧‧First connection interface
200‧‧‧待測物 200‧‧‧Test object
210‧‧‧第二連接介面 210‧‧‧Second connection interface
220‧‧‧電容 220‧‧‧ Capacitance
300‧‧‧開關電路 300‧‧‧Switch circuit
CLK‧‧‧時脈信號 CLK‧‧‧ clock signal
GND‧‧‧接地端 GND‧‧‧ ground terminal
PGND‧‧‧接地腳位 PGND‧‧‧ grounding pin
400、500‧‧‧流程圖 400, 500‧‧‧ flow chart
第1圖係顯示根據本發明之實施例所述之測試裝置100之方塊圖。 Figure 1 is a block diagram showing a test apparatus 100 in accordance with an embodiment of the present invention.
第2圖係顯示根據本發明之一實施例所述之測試裝置100和待測物200其中一具有電容的腳位之簡易電路示意圖。 2 is a simplified circuit diagram showing one of the test device 100 and the object to be tested 200 having a capacitor according to an embodiment of the present invention.
第3圖係顯示根據本發明之實施例所述之開關電路300之示意圖。 Figure 3 is a schematic diagram showing a switching circuit 300 in accordance with an embodiment of the present invention.
第4圖係根據本發明一實施例所述測試方法之流程圖400。 Figure 4 is a flow chart 400 of a test method in accordance with an embodiment of the present invention.
第5圖係根據本發明另一實施例所述測試方法之流程圖500。 Figure 5 is a flow chart 500 of a test method in accordance with another embodiment of the present invention.
本章節所敘述的是實施本發明之最佳方式，目的在於說明本發明之精神而非用以限定本發明之保護範圍，本發明之保護範圍當視後附之申請專利範圍所界定者為準。 The present invention is described in the following paragraphs, and is intended to be illustrative of the present invention, and is intended to be illustrative of the scope of the invention, and the scope of the present invention is defined by the scope of the appended claims. .
第1圖係顯示根據本發明之實施例所述之測試裝置100之方塊圖。如第1圖所示，測試裝置100中包括一時脈電路110、一測試電路120以及複數顯示燈130。注意地是，在第1圖中之方塊圖，僅係為了方便說明本發明之實施例，但本發明並不以此為限。 Figure 1 is a block diagram showing a test apparatus 100 in accordance with an embodiment of the present invention. As shown in FIG. 1, the test apparatus 100 includes a clock circuit 110, a test circuit 120, and a plurality of display lamps 130. It is noted that the block diagrams in FIG. 1 are merely for convenience of description of the embodiments of the present invention, but the invention is not limited thereto.
根據本發明一實施例，測試電路120包含了一第一連接介面121以及一接地端GND。根據本發明之實施例，第一連接介面121可係符合通用序列匯流排(Universal Serial Bus，USB)3.1(USB3.1Type-C)、快捷周邊組件互連 (Peripheral Component Interconnect Express，PCIe)、快捷串列先進技術附接(Serial Advanced Technology Attachment Express，SATA Express)、高清晰度多媒體介面(High Definition Multimedia Interface，HDMI)、Thunderbolt等有使用差動信號的連接器標準之一者之一連接器，但本發明並不以此為限。根據本發明一實施例，複數顯示燈130中包含了複數顯示燈，且每一顯示燈可係發光二極體(Light-emitting diode，LED)、燈泡、發光元件之一者，但本發明並不以此為限。根據本發明一實施例，複數顯示燈130會耦接於第一連接介面121。 According to an embodiment of the invention, the test circuit 120 includes a first connection interface 121 and a ground GND. According to the embodiment of the present invention, the first connection interface 121 can conform to the Universal Serial Bus (USB) 3.1 (USB3.1Type-C), and the shortcut peripheral component interconnection. (Peripheral Component Interconnect Express, PCIe), Serial Advanced Technology Attachment Express (SATA Express), High Definition Multimedia Interface (HDMI), Thunderbolt, etc. One of the standards of the connector, but the invention is not limited thereto. According to an embodiment of the invention, the plurality of display lamps 130 include a plurality of display lamps, and each of the display lamps may be one of a light-emitting diode (LED), a light bulb, and a light-emitting component, but the present invention Not limited to this. According to an embodiment of the invention, the plurality of display lamps 130 are coupled to the first connection interface 121.
根據本發明一實施例，第一連接介面121包含了複數腳位(圖未顯示)，且複數腳位會對應複數顯示燈130，舉例來說：第一腳位會對應第一顯示燈、第二腳位會對應第二顯示燈等等。 According to an embodiment of the invention, the first connection interface 121 includes a plurality of pins (not shown), and the plurality of pins correspond to the plurality of display lamps 130. For example, the first pin corresponds to the first indicator light, The two feet will correspond to the second indicator light and so on.
當要測試一待測物200時，會將待測物200與測試裝置100相連接。具體來說，根據本發明一實施例，待測物200包含一第二連接介面210，當要測試一待測物200時，待測物200之第二連接介面210會耦接於測試裝置100之測試電路120之第一連接介面121之複數腳位。 When a test object 200 is to be tested, the test object 200 is connected to the test device 100. Specifically, according to an embodiment of the present invention, the object to be tested 200 includes a second connection interface 210. When the object to be tested 200 is to be tested, the second connection interface 210 of the object to be tested 200 is coupled to the testing device 100. The plurality of pins of the first connection interface 121 of the test circuit 120.
根據本發明之實施例，待測物200可係一主機板。根據本發明之實施例，第二連接介面210亦可係符合USB3.1Type-C、PCIe、SATA Express、HDMI、Thunderbolt等連接器標準之一者之一連接器。根據本發明之實施例，第一連接介面121和第二連接介面210會對應相同之連接 器標準，也就是說第二連接介面210中會包含對應第一連接介面121之複數腳位之複數欲測試之腳位。根據本發明一實施例，本發明的測試裝置100還可包含一連接裝置(圖未繪示)，第一連接介面121和第二連接介面210可藉由連接裝置相連結。該連接裝置之兩端具有和第一連接介面121和第二連接介面210對應相同連接器標準之連接介面。 According to an embodiment of the invention, the object to be tested 200 can be a motherboard. According to an embodiment of the present invention, the second connection interface 210 may also be one of the connectors conforming to one of the connector standards of USB3.1Type-C, PCIe, SATA Express, HDMI, Thunderbolt, and the like. According to an embodiment of the invention, the first connection interface 121 and the second connection interface 210 correspond to the same connection The second connection interface 210 includes a plurality of bits to be tested corresponding to the plurality of pins of the first connection interface 121. According to an embodiment of the invention, the testing device 100 of the present invention may further comprise a connecting device (not shown), and the first connecting interface 121 and the second connecting interface 210 may be connected by a connecting device. Both ends of the connecting device have the same connector standard interface as the first connecting interface 121 and the second connecting interface 210.
當待測物200耦接於測試裝置100後，時脈電路110會開始產生時脈信號CLK。 When the object to be tested 200 is coupled to the testing device 100, the clock circuit 110 starts to generate the clock signal CLK.
第2圖係顯示根據本發明之一實施例所述之測試裝置100和待測物200其中一具有電容的腳位之簡易電路示意圖。如第2圖所示，根據本發明一實施例，第二連接介面210包含具有電容220之一欲測試之腳位(即第二連接介面210所包含之複數欲測試之腳位之一者)，以及一接地腳位PGND。在本發明之實施例中，電容220可係表示一交流耦合電容(AC-Coupling capacitance)。第一連接介面121之對應第二連接介面210之欲測試之腳位之一腳位(例如：第一腳位，以下以第一腳位做說明)會耦接至時脈電路110以及待測物200之接地腳位PGND，以形成一迴路。因此，當時脈電路110開始產生時脈信號CLK後，第一連接介面121之第一腳位會將時脈信號CLK傳送給待測物200。若沒有開路(open)之情況發生時，待測物200之接地腳位PGND接收到時脈信號CLK後，會再經由第二連接介面210之欲測試之腳位回傳時脈信號CLK給第一連接介面121之複數腳位。特別說明的是，第2圖僅係顯示第一連 接介面121之第一腳位以及第二連接介面210複數欲測試之腳位之一者，但本發明並不以此為限。也就是說，當在開路測試時，第一連接介面之其他腳位，以及第二連接介面210其他欲測試之腳位亦會進行上述之操作。因此，若沒有開路(open)之情況發生時，待測物200之接地腳位PGND接收到時脈信號CLK後，會經由第二連接介面210所有欲測試之腳位回傳時脈信號CLK給第一連接介面121之所有對應之腳位。根據本發明另一實施例，若第二連接介面210之欲測試之腳位不包含電容220，亦可進行上述開路測試。 2 is a simplified circuit diagram showing one of the test device 100 and the object to be tested 200 having a capacitor according to an embodiment of the present invention. As shown in FIG. 2, in accordance with an embodiment of the present invention, the second connection interface 210 includes one of the capacitors 220 to be tested (ie, one of the plurality of pins to be tested included in the second connection interface 210). And a ground pin PGND. In an embodiment of the invention, capacitor 220 may represent an AC-Coupling capacitance. One of the pins of the first connection interface 121 corresponding to the second connection interface 210 to be tested (eg, the first pin, the following description of the first pin) is coupled to the clock circuit 110 and to be tested. Ground pin PGND of object 200 to form a loop. Therefore, after the clock circuit 110 starts generating the clock signal CLK, the first pin of the first connection interface 121 transmits the clock signal CLK to the object to be tested 200. If there is no open condition, the ground pin PGND of the object to be tested 200 receives the clock signal CLK, and then returns the clock signal CLK to the pin through the second connection interface 210 to be tested. A plurality of pins of the connection interface 121. In particular, Figure 2 shows only the first company. The first pin of the interface 121 and the second connector interface 210 are one of the plurality of pins to be tested, but the invention is not limited thereto. That is to say, when the open circuit test, the other pins of the first connection interface, and the other connection positions of the second connection interface 210 are also performed. Therefore, if no open condition occurs, the ground pin PGND of the object to be tested 200 receives the clock signal CLK, and then returns the clock signal CLK to all the bits to be tested via the second connection interface 210. All corresponding pins of the first connection interface 121. According to another embodiment of the present invention, if the pin to be tested of the second connection interface 210 does not include the capacitor 220, the above open circuit test may also be performed.
因此，當第一連接介面121之複數腳位接收到待測物200回傳之時脈信號CLK後，每一腳位對應之複數顯示燈130之一者就會導通(即所有顯示燈都亮燈)。若有開路(open)之情況發生，待測物200之第二連接介面210則無法正常回傳時脈信號CLK給發生開路之腳位。也就是說，對應發生開路之腳位之複數顯示燈130之一者就無法被導通(即不亮燈)。舉例來說，當待測物200耦接於測試裝置100後，若測試裝置100之第三顯示燈和第五顯示燈未亮燈，即表示第二連接介面210之第三腳位和第五腳位之電路發生開路之情況。因此，藉由本發明實施例所述之測試裝置100，即可測試待測物200之第二連接介面210的哪一腳位之電路發生開路之情況。於另一實施例中，複數顯示燈130所包含之顯示燈可藉由人眼的視覺暫留達到持續亮燈的效果(實際上是在閃爍)。此時，複數顯示燈 130所包含之顯示燈閃爍的頻率會高於人眼視覺暫留的頻率(約為30Hz)。時脈信號CLK的頻率可視為複數顯示燈130所包含之顯示燈的閃爍頻率，因此，時脈信號CLK在頻率的選擇上，時脈信號CLK的頻率高於人眼視覺暫留的頻率為佳，例如：2KHz，但不以此為限。 Therefore, when the plurality of pins of the first connection interface 121 receive the clock signal CLK returned by the object to be tested 200, one of the plurality of display lamps 130 corresponding to each pin position is turned on (ie, all the display lights are on) light). If an open condition occurs, the second connection interface 210 of the object to be tested 200 cannot normally return the clock signal CLK to the open circuit pin. That is to say, one of the plurality of display lamps 130 corresponding to the position of the open circuit cannot be turned on (ie, does not light). For example, after the test object 200 is coupled to the test device 100, if the third display light and the fifth display light of the test device 100 are not lit, the third connection position and the fifth connection interface 210 are indicated. The circuit of the pin is open. Therefore, the test device 100 of the embodiment of the present invention can test the circuit of which pin of the second connection interface 210 of the object to be tested 200 is open. In another embodiment, the display light included in the plurality of display lamps 130 can achieve the effect of continuous lighting (actually blinking) by the visual persistence of the human eye. At this time, the plural display lights The frequency of the display light contained in 130 will be higher than the frequency of the human eye (30 Hz). The frequency of the clock signal CLK can be regarded as the blinking frequency of the display lamp included in the plurality of display lamps 130. Therefore, the frequency of the clock signal CLK is higher than the frequency of the human visual persistence in selecting the frequency of the clock signal CLK. For example: 2KHz, but not limited to this.
根據本發明一實施例，測試裝置100更包括一開關電路。第3圖係顯示根據本發明之實施例所述之開關電路300之示意圖。如第3圖所示，開關電路可用以連接第二連接介面210之接地腳位PGND和第一連接介面121之第一腳位，或連接第二連接介面210之接地腳位PGND和測試電路120之接地端GND。根據本發明一實施例，可藉由一按鈕裝置來切換開關電路300。當開關電路連接第二連接介面210之接地腳位PGND和第一連接介面121之第一腳位時，可進行待測物200之開路測試。開路測試之詳細過程如上述實施例所述，在此便不贅述。 According to an embodiment of the invention, the testing device 100 further includes a switching circuit. Figure 3 is a schematic diagram showing a switching circuit 300 in accordance with an embodiment of the present invention. As shown in FIG. 3, the switch circuit can be used to connect the ground pin PGND of the second connection interface 210 and the first pin of the first connection interface 121, or the ground pin PGND of the second connection interface 210 and the test circuit 120. Ground terminal GND. According to an embodiment of the invention, the switching circuit 300 can be switched by a button device. When the switch circuit is connected to the ground pin PGND of the second connection interface 210 and the first pin of the first connection interface 121, the open circuit test of the object to be tested 200 can be performed. The detailed process of the open circuit test is as described in the above embodiment, and will not be described here.
當開關電路連接第二連接介面210之接地腳位PGND和測試電路120之接地端GND時，可進行待測物200之短路(short)測試。在進行待測物200之短路測試時，一量測棒(圖未顯示)會耦接至時脈電路110。具體來說，使用者可使用量測棒接觸待測物200之一欲測試之腳位在第一連接介面121所對應之一腳位，以藉由量測棒傳送時脈信號CLK至第二連接介面210之該欲測試之腳位。當僅有接觸之腳位所對應之複數顯示燈130之一者亮燈，即表示待測物200之該欲測試之腳位之電路未有短路之情況發生。 當除了接觸之腳位所對應之複數顯示燈130之一者之外，還有複數顯示燈130之其他一或多者亮燈，即表示待測物200之該欲測試之腳位之電路有短路之情況發生。舉例來說，若使用者要檢測第二連接介面210之第二腳位，使用者可使用量測棒接觸第一連接介面121之第二腳位。若僅有對應第一連接介面121之第二腳位之第二顯示燈亮燈，即表示第二連接介面210之第二腳位之電路未有短路之情況發生。若第一連接介面121之第二顯示燈和第三顯示燈同時亮燈，即表示第二連接介面210之第二腳位和第三腳位之間的電路有短路之情況發生。因此，藉由本發明實施例所述之測試裝置100，即可測試待測物200之第二連接介面210的那一腳位之電路發生短路之情況。根據本發明另一實施例，若第二連接介面210之欲測試之腳位不包含電容220，亦可進行上述短路測試。 When the switch circuit is connected to the ground pin PGND of the second connection interface 210 and the ground terminal GND of the test circuit 120, a short test of the object to be tested 200 can be performed. When performing the short-circuit test of the object to be tested 200, a measuring rod (not shown) is coupled to the clock circuit 110. Specifically, the user can use the measuring rod to contact one of the positions of the object to be tested 200 to be tested at one of the positions corresponding to the first connection interface 121 to transmit the clock signal CLK to the second by the measuring rod. The pin of the interface 210 to be tested is connected. When only one of the plurality of display lamps 130 corresponding to the contact pin is illuminated, that is, the circuit of the test object 200 where the bit to be tested is not short-circuited occurs. When one of the plurality of display lamps 130 is in addition to one of the plurality of display lamps 130 corresponding to the contact pin, the other one of the plurality of display lamps 130 is turned on, that is, the circuit of the test object 200 has the circuit to be tested. A short circuit occurs. For example, if the user wants to detect the second pin of the second connection interface 210, the user can use the measuring bar to contact the second pin of the first connection interface 121. If only the second indicator corresponding to the second pin of the first connection interface 121 is lit, it means that the circuit of the second pin of the second connection interface 210 is not short-circuited. If the second indicator light and the third indicator light of the first connection interface 121 are simultaneously illuminated, it indicates that the circuit between the second pin position and the third pin position of the second connection interface 210 is short-circuited. Therefore, the test device 100 of the embodiment of the present invention can test the short circuit of the circuit of the second connection interface 210 of the object to be tested 200. According to another embodiment of the present invention, if the pin to be tested of the second connection interface 210 does not include the capacitor 220, the short circuit test may be performed.
第4圖係根據本發明一實施例所述測試方法之流程圖400，此測試方法適用於藉由測試裝置100測試待測物200是否有開路之情況發生。如第4圖所示，在步驟S410，耦接測試裝置100和待測物200。在步驟S420，藉由測試裝置100之一時脈電路110產生一時脈信號CLK。在步驟S430，藉由測試裝置100之第一連接介面121之複數腳位之一第一腳位接收時脈信號CLK。在步驟S440，藉由上述第一腳位傳送時脈信號CLK至待測物200之一接地腳位PGND。在步驟S450，當測試裝置100之第一腳位收到待測物200回傳之時脈信號CLK時，導通複數顯示燈130之對應至上述第一腳位之一第一顯示燈。 4 is a flow chart 400 of a test method according to an embodiment of the present invention. The test method is applicable to the case where the test device 100 tests whether the object to be tested 200 has an open circuit. As shown in FIG. 4, in step S410, the test apparatus 100 and the object to be tested 200 are coupled. In step S420, a clock signal CLK is generated by the clock circuit 110 of the test device 100. In step S430, the clock signal CLK is received by one of the plurality of pins of the first connection interface 121 of the test device 100. In step S440, the clock signal CLK is transmitted to the ground pin PGND of one of the objects to be tested 200 by the first pin. In step S450, when the first pin of the test device 100 receives the clock signal CLK returned by the object to be tested 200, the first display lamp corresponding to one of the first pin positions is turned on.
特別說明的是，在步驟S450中，測試裝置100之其他未有發生開路之腳位亦會收到待測物200回傳之時脈信號CLK。也就是說，這些未有發生開路之腳位所對應之顯示燈亦會被導通。 Specifically, in step S450, other pins of the test apparatus 100 that have not opened an open circuit also receive the clock signal CLK returned by the object to be tested 200. In other words, the display lights corresponding to these unopened feet will also be turned on.
第5圖係根據本發明另一實施例所述測試方法之流程圖500，此測試方法適用於藉由測試裝置100測試待測物200是否有短路之情況發生。在此測試方法之測試裝置100更包含一開關電路300。開關電路300可連接待測物200之接地腳位PGND和第一連接介面121之第一腳位，或連接待測物200之接地腳位PGND和測試裝置100之一接地端GND。當開關電路300連接待測物200之接地腳位PGND和第一連接介面121之第一腳位時，進行待測物200之開路檢測流程(同流程圖400之步驟)。當開關電路300連接待測物200之接地腳位PGND和測試裝置100之接地端GND時，則進行流程圖500之步驟。 FIG. 5 is a flow chart 500 of a test method according to another embodiment of the present invention. The test method is applicable to the case where the test device 100 tests whether the object to be tested 200 has a short circuit. The test apparatus 100 of this test method further includes a switch circuit 300. The switch circuit 300 can connect the ground pin PGND of the object to be tested 200 and the first pin of the first connection interface 121, or the ground pin PGND of the object to be tested 200 and one of the ground terminals GND of the test device 100. When the switch circuit 300 is connected to the ground pin PGND of the object to be tested 200 and the first pin of the first connection interface 121, the open circuit detection process of the object to be tested 200 is performed (the same as the step of the flowchart 400). When the switch circuit 300 is connected to the ground pin PGND of the object to be tested 200 and the ground terminal GND of the test device 100, the steps of the flowchart 500 are performed.
如第5圖所示，在步驟S510，切換開關電路300，使待測物200之接地腳位PGND連接至測試裝置100之接地端GND。在步驟S520，藉由將量測棒耦接(接觸)至欲測試之腳位，以傳送時脈信號CLK至待測物200之一欲測試之腳位。在步驟S530，當欲測試之腳位收到待測物200回傳之時脈信號CLK時，導通欲測試之腳位所對應之顯示燈。因此，藉由此測試方法，使用者可使用量測棒接觸待測物200欲測試之腳位在第一連接介面121所對應之腳位，以藉由量測棒傳送時脈信號CLK至第二連接介面210之欲測試之腳位。當僅有接觸之腳位所對應之複數顯示燈 130之一者亮燈，即表示待測物200之該腳位之電路未有短路之情況發生。當除了接觸之腳位所對應之複數顯示燈130之一者之外，還有複數顯示燈130之其他一或多者亮燈，即表示待測物200之該腳位與其他顯示燈對應的腳位之電路有短路之情況發生。 As shown in FIG. 5, in step S510, the switch circuit 300 is switched to connect the ground pin PGND of the object to be tested 200 to the ground terminal GND of the test apparatus 100. In step S520, the measuring rod is coupled (contacted) to the pin to be tested to transmit the clock signal CLK to one of the objects to be tested 200 to be tested. In step S530, when the pin to be tested receives the clock signal CLK returned by the object to be tested 200, the display lamp corresponding to the pin to be tested is turned on. Therefore, by using the test method, the user can use the measuring rod to contact the test object 200 to test the pin position corresponding to the pin corresponding to the first connection interface 121, to transmit the clock signal CLK to the first by the measuring rod. The connection of the interface 210 to be tested. When only the contact pin corresponds to the plural display light One of the lights 130 is turned on, that is, the circuit of the pin of the object to be tested 200 is not short-circuited. When one of the plurality of display lamps 130 is in addition to one of the plurality of display lamps 130 corresponding to the contact pin, the other one or more of the plurality of display lamps 130 are illuminated, that is, the pin of the object to be tested 200 corresponds to the other display lamps. The circuit of the pin has a short circuit.
透過本發明之實施例所提出之測試方法，將可針對具有交流耦合電容特別是使用表面黏著技術製成方式配置於電路板之裝置，進行開路和短路之測試。因此，在透過上述測試方法測試連接器的開路和短路時，不需區分測試的腳位是否具有電容即可測試，亦不會因測試的腳位具有電容而誤判測試的結果。 Through the test method proposed in the embodiment of the present invention, the open circuit and the short circuit test can be performed on a device having an AC coupling capacitor, particularly a surface mount technology, which is disposed on a circuit board. Therefore, when testing the open circuit and short circuit of the connector through the above test method, it is not necessary to distinguish whether the tested pin has a capacitance to test, and the test result is not misjudged because the test pin has capacitance.
本說明書中所提到的「一實施例」或「實施例」，表示與實施例有關之所述特定的特徵、結構、或特性是包含根據本發明的至少一實施例中，但並不表示它們存在於每一個實施例中。因此，在本說明書中不同地方出現的「在一實施例中」或「在實施例中」詞組並不必然表示本發明的相同實施例。 The "an embodiment" or "an embodiment" referred to in the specification means that the specific features, structures, or characteristics relating to the embodiments are included in at least one embodiment according to the invention, but are not They are present in every embodiment. Therefore, the phrase "in an embodiment" or "in the embodiment" or "an"
以上段落使用多種層面描述。顯然的，本文的教示可以多種方式實現，而在範例中揭露之任何特定架構或功能僅為一代表性之狀況。根據本文之教示，任何熟知此技藝之人士應理解在本文揭露之各層面可獨立實作或兩種以上之層面可以合併實作。 The above paragraphs are described in various levels. Obviously, the teachings herein can be implemented in a variety of ways, and any particular architecture or function disclosed in the examples is merely representative. In light of the teachings herein, it will be understood by those skilled in the art that the various aspects disclosed herein can be implemented independently or two or more layers can be combined.
雖然本發明已以較佳實施例揭露如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作些許之更動與潤飾，因此本發明 之保護範圍當視後附之申請專利範圍所界定者為準。 While the present invention has been described in its preferred embodiments, the present invention is not intended to limit the invention, and the present invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application.
100‧‧‧測試裝置 100‧‧‧Testing device
110‧‧‧時脈電路 110‧‧‧ clock circuit
120‧‧‧測試電路 120‧‧‧Test circuit
130‧‧‧複數顯示燈 130‧‧‧Multiple display lights
121‧‧‧第一連接介面 121‧‧‧First connection interface
200‧‧‧待測物 200‧‧‧Test object
210‧‧‧第二連接介面 210‧‧‧Second connection interface
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| TW201318089A (en) * | 2011-10-25 | 2013-05-01 | Teradyne Inc | Test system supporting simplified configuration for controlling test block concurrency |
| TW201341812A (en) * | 2012-04-09 | 2013-10-16 | Wistron Corp | Transmitting interface and method for determining transmitting signals |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201809692A (en) | 2018-03-16 |
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