TWI587745B

TWI587745B - Light emitting device driver circuit and control circuit and control method thereof

Info

Publication number: TWI587745B
Application number: TW105110959A
Authority: TW
Inventors: 吳昌諭; 邱韋銘
Original assignee: 立錡科技股份有限公司
Priority date: 2015-05-08
Filing date: 2016-04-07
Publication date: 2017-06-11
Also published as: TW201640958A; CN106131993A

Description

發光元件驅動電路及其中之控制電路與控制方法Light-emitting element driving circuit and control circuit and control method thereof

本發明係有關一種發光元件驅動電路及其中之控制電路與控制方法，特別是指一種改善發光元件電路可調光範圍之發光元件驅動電路及其中之控制電路與控制方法。The invention relates to a light-emitting element driving circuit and a control circuit and a control method thereof, in particular to a light-emitting element driving circuit for improving the dimming range of a light-emitting element circuit and a control circuit and a control method thereof.

請參閱第1圖之先前技術，圖中顯示一種常見的發光元件驅動電路1，包含功率級電路24以及控制電路26。如圖所示，相切調光電路22 (Phase-cut Dimmer Circuit)將交流電源21轉換為一交流相切調光訊號，其中交流相切調光訊號包括交流相切調光電壓Vin及交流相切調光電流Iin；整流電路23將交流相切調光訊號轉換為整流相切調光訊號Vm；功率級電路24與整流電路耦接並將整流相切調光訊號轉換為輸出訊號以驅動發光元件電路25，其中輸出訊號包括輸出電壓V_LED 及輸出電流I_LED ；控制電路26控制功率級電路24之操作，其中控制電路26包括誤差迴授電路261以及操作訊號產生電路262，其中誤差迴授電路261根據相關於該輸出訊號的回授訊號V_FB ，產生操作訊號PWM；功率級電路24根據操作訊號PWM之控制，將整流相切調光訊號轉換為輸出訊號。Referring to the prior art of FIG. 1, a common light-emitting element driving circuit 1 including a power stage circuit 24 and a control circuit 26 is shown. As shown, the phase-cut dimmer circuit 22 converts the AC power source 21 into an AC phase-cut dimming signal, wherein the AC phase-cut dimming signal includes an AC phase-cut dimming voltage Vin and an AC phase. The dimming circuit 23 converts the AC phase-cut dimming signal into a rectified phase-cut dimming signal Vm; the power stage circuit 24 is coupled to the rectifying circuit and converts the rectified phase-cut dimming signal into an output signal to drive the illumination The component circuit 25, wherein the output signal comprises an output voltage V _LED and an output current I _LED ; the control circuit 26 controls the operation of the power stage circuit 24, wherein the control circuit 26 includes an error feedback circuit 261 and an operation signal generating circuit 262, wherein the error feedback The circuit 261 generates an operation signal PWM according to the feedback signal V _FB related to the output signal; the power stage circuit 24 converts the rectified phase-cut dimming signal into an output signal according to the control of the operation signal PWM.

第2A圖為對應第1圖之先前技術中，交流相切調光電壓Vin、整流相切調光訊號Vm、以及交流相切調光電流Iin的波形示意圖。發光元件驅動電路1中，相切調光電路22藉由相切(Phase-cut)將輸入的交流電源（波形未示出）轉換成如第2A圖之交流相切調光電壓Vin，其具有一相切角度(Phase-cut Angle)以及一相切剩餘百分比(Phase-cut Residue Percentage)，以第2A圖中之前緣相切(Leading Edge Phase-cut)之交流相切調光電壓Vin為例，以交流電源之過零點(Zero Crossing Point)為原點，交流電源在該相切角度（如第2A圖中之P0）之前的交流電源受相切調光電路22阻擋，而讓一相切剩餘百分比P0’（以第2A圖為例P0’即為(180-P0)/180•100%）之交流電源通過，該相切角度P0愈大（從另一方面而言，其相切剩餘百分比P0’愈小），被阻擋的交流電源功率愈多，則Vin 可供應的功率愈小，例如第2A圖中之Iin，並因此降低了輸出電流I_LED ，藉此獲得對發光元件電路25調光的效果。FIG. 2A is a waveform diagram of the alternating phase tangent dimming voltage Vin, the rectified tangent dimming signal Vm, and the alternating phase tangent dimming current Iin in the prior art corresponding to FIG. 1. In the light-emitting element drive circuit 1, the tangential dimming circuit 22 converts the input AC power source (waveform not shown) into an AC tangential dimming voltage Vin as shown in FIG. 2A by phase-cut, which has A phase-cut angle and a phase-cut Residue Percentage are taken as an example of the alternating phase tangent dimming voltage Vin of the leading edge phase-cut in FIG. 2A. Taking the Zero Crossing Point of the AC power source as the origin, the AC power supply of the AC power source before the tangent angle (such as P0 in FIG. 2A) is blocked by the Tangent Dimming Circuit 22, and a tangent is made. The remaining percentage P0' (in the case of Figure 2A, P0' is (180-P0)/180•100%), the AC power source passes, and the tangent angle P0 is larger (on the other hand, its tangent residual The smaller the percentage P0', the more power is blocked from the AC power supply, the smaller the power that Vin can supply, such as Iin in Figure 2A, and thus the output current I _{LED is} reduced, thereby obtaining the pair of light-emitting element circuits 25 The effect of dimming.

第2B圖顯示，該先前技術之輸出電流I_LED 對應相切剩餘百分比之特徵曲線圖，其中有一電流轉折點(如圖中圓圈所標示)，其所對應的相切剩餘百分比P1為可藉由改變相切剩餘百分比而調光的臨界值，相切剩餘百分比在大於圖中所示P1以上時，發光元件驅動電路1的回授控制機制可以使輸出電流I_LED 為定值，此時無法調光；而當相切剩餘百分比在小於圖中所示P1以下時，輸出電流I_LED 隨著相切剩餘百分比遞減而遞減，因而可達成調光的功能。FIG. 2B shows a characteristic curve of the prior art output current I _LED corresponding to the tangential remaining percentage, wherein there is a current turning point (as indicated by a circle in the figure), and the corresponding tangential residual percentage P1 can be changed by The critical value of the dimming remaining percentage and the remaining percentage of the tangent are greater than the P1 shown in the figure. The feedback control mechanism of the light-emitting element driving circuit 1 can make the output current I _LED constant, and the dimming cannot be performed at this time. When the tangential residual percentage is less than P1 shown in the figure, the output current I _LED decreases as the tangential remaining percentage decreases, so that the dimming function can be achieved.

第1圖中所示之先前技術，其缺點在於其調光範圍無法控制；首先，其電流轉折點所對應的相切剩餘百分比臨界值(例如第2B圖中之P1)是無法控制的，可能太低或太高，在P1太低的情況下，舉例而言，例如但不限於P1為50%，以致於在調光控制的前半段（相切剩餘百分比＞P1時），有很大的相切剩餘百分比範圍，發光元件電路25對於調光動作會沒有反應；而另一方面，某些相切調光電路（例如但不限於包含某些種類之TRIAC）所能達成的最大相切剩餘百分比可能不足，造成P1有可能相對而言太高，例如P1為80%，而相切調光電路所能達成的最大相切剩餘百分比為60%，則此時P1相對而言太高，以致於相切調光電路即使調光至其最大相切剩餘百分比，發光元件電路25仍無法獲得其最大的亮度所需之電流。The prior art shown in FIG. 1 has the disadvantage that its dimming range cannot be controlled; firstly, the tangent residual percentage threshold corresponding to the current turning point (for example, P1 in FIG. 2B) is uncontrollable, possibly too Low or too high, in the case where P1 is too low, for example, but not limited to P1 is 50%, so that in the first half of the dimming control (the percentage of tangent remaining > P1), there is a large phase Cutting the remaining percentage range, the illuminating element circuit 25 will not react to the dimming action; on the other hand, the maximum tangential remaining percentage that can be achieved with some tangential dimming circuits (such as but not limited to certain types of TRIAC) It may be insufficient, causing P1 to be relatively high, for example, P1 is 80%, and the maximum tangent residual percentage that the tangent dimming circuit can achieve is 60%, then P1 is relatively too high, so that Even if the tangential dimming circuit is dimmed to its maximum tangential remaining percentage, the illuminating element circuit 25 cannot obtain the current required for its maximum brightness.

除了電流轉折點無法控制之外，此先前技術之另一缺點在於，其最小可調光電流例如第2B圖中所示之最小I_LED (Imin)亦無法控制，而造成調光範圍的受限；最小I_LED (Imin)是當相切調光電路22在其最小相切剩餘百分比時，發光元件驅動電路所輸出的I_LED ；在此先前技術中，最小I_LED (Imin)可能會太大，以致於使用者在調整相切調光電路22至最小相切剩餘百分比的情況下，仍然覺得發光元件電路25之亮度太高。In addition to the inability to control the current turning point, another disadvantage of this prior art is that its minimum dimmable current, such as the minimum I _LED (Imin) shown in FIG. 2B, is also uncontrollable, resulting in limited dimming range; The minimum I _LED (Imin) is the I _LED output by the light emitting element driving circuit when the tangent dimming circuit 22 is at its minimum tangent remaining percentage; in this prior art, the minimum I _LED (Imin) may be too large, Therefore, the user still feels that the brightness of the light-emitting element circuit 25 is too high in the case where the user adjusts the tangent dimming circuit 22 to the minimum tangential remaining percentage.

本發明相較於第1圖之先前技術，具有可調整電流轉折點（亦即可調整相切剩餘百分比臨界值，例如第2B圖中之P1）的優點，可避免前述對於調光動作會沒有反應，或是最大的亮度不足之問題。Compared with the prior art of FIG. 1, the present invention has the advantage of adjusting the current turning point (that is, adjusting the tangent residual percentage threshold, for example, P1 in FIG. 2B), which can prevent the aforementioned unresponsive to the dimming action. Or the biggest problem of insufficient brightness.

此外，本發明相較於第1圖之先前技術，還具有可調整最小可調光電流（如第2B圖中之最小I_LED , Imin）的優點，可避免前述之最小亮度過高的問題。Furthermore, the present invention has the advantage of adjusting the minimum dimmable current (e.g., the minimum I _LED , Imin in Figure 2B) compared to the prior art of Figure 1, which avoids the aforementioned problem of excessively high brightness.

就其中一個觀點言，本發明提供了一種控制電路，用以控制一發光元件驅動電路，其中該發光元件驅動電路用以根據一整流相切調光訊號，以驅動一發光元件電路，其中該整流相切調光訊號為一相切後之半弦波，該發光元件驅動電路包含：一功率級電路，包括至少一功率開關，其與該整流電路耦接，用以根據一操作訊號而操作其中該功率開關，以將該整流相切調光訊號轉換為一輸出訊號，而驅動該發光元件電路，其中該輸出訊號包含一輸出電流；其中該控制電路，用以根據一相關於該輸出訊號的回授訊號，產生該操作訊號；該控制電路包含：一箝位電路(Clamping Circuit)，用以產生一箝位訊號；一誤差迴授電路(Error Feedback Circuit)，與該箝位電路耦接，用以根據該相關於該輸出訊號的回授訊號及該箝位訊號，產生一誤差迴授訊號；以及一操作訊號產生電路，與該誤差迴授電路耦接，用以根據該誤差迴授訊號之位準，產生該操作訊號；其中該箝位訊號限制該誤差迴授訊號的上限位準不大於該箝位訊號，使得在該交流相切調光訊號之一相切剩餘百分比小於一預設之相切剩餘百分比時，該輸出電流不大於一預設之箝位電流值。In one aspect, the present invention provides a control circuit for controlling a light-emitting element driving circuit, wherein the light-emitting element driving circuit is configured to drive a light-emitting element circuit according to a rectified phase-cut dimming signal, wherein the rectifying The tangential dimming signal is a tangential half sine wave, and the illuminating element driving circuit comprises: a power stage circuit comprising at least one power switch coupled to the rectifying circuit for operating according to an operation signal The power switch is configured to convert the rectified phase-cut dimming signal into an output signal to drive the light-emitting element circuit, wherein the output signal includes an output current, wherein the control circuit is configured to be based on a signal associated with the output signal The feedback signal generates the operation signal; the control circuit includes: a clamping circuit for generating a clamp signal; and an error feedback circuit coupled to the clamp circuit, Generating an error feedback signal according to the feedback signal associated with the output signal and the clamp signal; and generating an operation signal And the error feedback circuit is coupled to generate the operation signal according to the level of the error feedback signal; wherein the clamp signal limits the upper limit level of the error feedback signal to be no greater than the clamp signal, so that When the tangential residual percentage of one of the AC tangential dimming signals is less than a predetermined tangential remaining percentage, the output current is not greater than a predetermined clamp current value.

在一較佳實施例中，該箝位訊號為一固定值、或是一隨該相切剩餘百分比遞減而線性或非線性遞減之變動值，且該預設之箝位電流值為一隨該相切剩餘百分比遞減而線性或非線性遞減之變動電流值。In a preferred embodiment, the clamp signal is a fixed value, or a linear or non-linear decreasing value that decreases as the tangential remaining percentage decreases, and the preset clamp current value is a A tangential residual percentage is decreasing and a linear or non-linear decreasing fluctuating current value.

在一較佳實施例中，該箝位電路包括：一箝位器，其一端耦接於一固定電位，另一端與該誤差迴授電路耦接，以提供該箝位訊號限制該誤差迴授訊號的上限位準。In a preferred embodiment, the clamping circuit includes: a clamper having one end coupled to a fixed potential and the other end coupled to the error feedback circuit to provide the clamp signal to limit the error feedback The upper limit of the signal.

在一較佳實施例中，該箝位器包括一齊納二極體，該齊納二極體之反向端提供該箝位訊號，該齊納二極體之順向端耦接於該固定電位。In a preferred embodiment, the clamp includes a Zener diode, and the opposite end of the Zener diode provides the clamp signal, and the forward end of the Zener diode is coupled to the fixed end. Potential.

在一較佳實施例中，該箝位電路包括：一箝位參考訊號產生器，用以產生一箝位參考訊號；以及一箝位器，與該箝位參考訊號產生器及該誤差迴授電路耦接，用以根據該箝位參考訊號而產生該箝位訊號，以限制該誤差迴授訊號的上限位準。In a preferred embodiment, the clamping circuit includes: a clamp reference signal generator for generating a clamp reference signal; and a clamper, and the clamp reference signal generator and the error feedback The circuit is coupled to generate the clamp signal according to the clamp reference signal to limit an upper limit level of the error feedback signal.

在一較佳實施例中，該箝位參考訊號產生器，根據一固定電壓源或該固定電壓源之分壓以產生該箝位參考訊號，使得該箝位訊號為該固定值。In a preferred embodiment, the clamp reference signal generator generates a clamp reference signal according to a voltage division of a fixed voltage source or the fixed voltage source, so that the clamp signal is the fixed value.

在一較佳實施例中，該箝位參考訊號產生器根據該整流相切調光訊號產生該箝位參考訊號，使得該箝位訊號為該隨該相切剩餘百分比遞減而線性或非線性遞減之變動值。In a preferred embodiment, the clamp reference signal generator generates the clamp reference signal according to the rectified tangential dimming signal, such that the clamp signal is linearly or nonlinearly decremented as the remaining percentage of the tangency decreases. The value of the change.

在一較佳實施例中，該箝位參考訊號產生器包括：一相切剩餘編碼電路，用以根據該整流相切調光訊號或該整流相切調光訊號之分壓產生一相切剩餘百分比編碼；以及一箝位參考訊號轉換器，用以根據該相切剩餘百分比編碼產生該箝位參考訊號。In a preferred embodiment, the clamp reference signal generator includes: a tangential residual coding circuit for generating a tangent residual according to the voltage of the rectified tangential dimming signal or the rectified tangential dimming signal a percentage code; and a clamp reference signal converter for generating the clamp reference signal according to the tangent residual percentage code.

在一較佳實施例中，該箝位器包括一箝位二極體，該箝位二極體之順向端與該誤差迴授電路耦接，以提供該箝位訊號限制該誤差迴授訊號的上限位準，該箝位二極體之反向端與該箝位參考訊號產生器耦接。In a preferred embodiment, the clamp includes a clamp diode, and the forward end of the clamp diode is coupled to the error feedback circuit to provide the clamp signal to limit the error feedback. The upper limit of the signal, the opposite end of the clamp diode is coupled to the clamp reference signal generator.

在一較佳實施例中，該箝位電路更以一偏移訊號修正調整該箝位訊號。In a preferred embodiment, the clamp circuit further adjusts the clamp signal with an offset signal correction.

在一較佳實施例中，該箝位電路包括至少一偏移二極體，與該箝位參考訊號產生器及該箝位器耦接，用以產生該偏移訊號。In a preferred embodiment, the clamping circuit includes at least one offset diode coupled to the clamp reference signal generator and the clamp to generate the offset signal.

就再另一個觀點言，本發明提供了一種發光元件驅動電路，用以根據一整流相切調光訊號，以驅動一發光元件電路，其中該整流相切調光訊號為一相切後之半弦波，該發光元件驅動電路包含：一功率級電路，包括至少一功率開關，其與該整流電路耦接，用以根據一操作訊號而操作其中該功率開關，以將該整流相切調光訊號轉換為一輸出訊號，而驅動該發光元件電路，其中該輸出訊號包含一輸出電流；以及一控制電路，用以根據一相關於該輸出訊號的回授訊號，產生該操作訊號，該控制電路包括：一箝位電路(Clamping Circuit)，用以產生一箝位訊號；一誤差迴授電路(Error Feedback Circuit)，與該箝位電路耦接，用以根據該相關於該輸出訊號的回授訊號及該箝位訊號，產生一誤差迴授訊號；以及一操作訊號產生電路，與該誤差迴授電路耦接，用以根據該誤差迴授訊號之位準，產生該操作訊號；其中該箝位訊號限制該誤差迴授訊號的上限位準，使得在該交流相切調光訊號之一相切剩餘百分比小於一預設之相切剩餘百分比時，該輸出電流不大於一預設之箝位電流值。In another aspect, the present invention provides a light emitting device driving circuit for driving a light emitting device circuit according to a rectifying and phase-cutting dimming signal, wherein the rectified phase-cut dimming signal is a tangent half The sine wave driving circuit includes: a power stage circuit including at least one power switch coupled to the rectifying circuit for operating the power switch according to an operation signal to dim the rectification The signal is converted into an output signal, and the light-emitting element circuit is driven, wherein the output signal includes an output current; and a control circuit is configured to generate the operation signal according to a feedback signal related to the output signal, the control circuit The method includes: a clamp circuit for generating a clamp signal; and an error feedback circuit coupled to the clamp circuit for transmitting according to the output signal The signal and the clamp signal generate an error feedback signal; and an operation signal generating circuit coupled to the error feedback circuit for returning according to the error The signal signal is generated to generate the operation signal; wherein the clamp signal limits the upper limit level of the error feedback signal, so that the remaining percentage of the one of the AC tangent dimming signals is less than a preset tangent remaining percentage The output current is not greater than a predetermined clamp current value.

就再另一個觀點言，本發明提供了一種控制一發光元件驅動電路之方法，其中該發光元件驅動電路用以根據一整流相切調光訊號，以驅動一發光元件電路，其中該整流相切調光訊號為一相切後之半弦波，該發光元件驅動電路包含：一功率級電路，包括至少一功率開關，其與該整流電路耦接，用以根據一操作訊號而操作其中該功率開關，以將該整流相切調光訊號轉換為一輸出訊號，而驅動該發光元件電路，其中該輸出訊號包含一輸出電流；該控制方法包含：根據一相關於該輸出訊號的回授訊號，產生一操作訊號；以及根據該操作訊號而操作該功率開關；其中該產生該操作訊號之步驟包括：產生一箝位訊號；根據該相關於該輸出訊號的回授訊號及該箝位訊號，產生一誤差迴授訊號；以及根據該誤差迴授訊號之位準，產生該操作訊號；其中該箝位訊號限制該誤差迴授訊號的上限位準，使得在該交流相切調光訊號之一相切剩餘百分比小於一預設之相切剩餘百分比時，該輸出電流不大於一預設之箝位電流值。In still another aspect, the present invention provides a method of controlling a light-emitting element driving circuit, wherein the light-emitting element driving circuit is configured to drive a light-emitting element circuit according to a rectified phase-cut dimming signal, wherein the rectifying phase-cutting The illuminating signal is a tangential half sine wave, and the illuminating device driving circuit comprises: a power stage circuit comprising at least one power switch coupled to the rectifying circuit for operating the power according to an operation signal a switch for converting the rectified tangential dimming signal into an output signal, wherein the output signal includes an output current; the control method includes: according to a feedback signal related to the output signal, Generating an operation signal; and operating the power switch according to the operation signal; wherein the step of generating the operation signal comprises: generating a clamp signal; generating according to the feedback signal related to the output signal and the clamp signal An error feedback signal; and generating the operation signal according to the level of the error feedback signal; wherein the clamp signal is limited The upper limit of the error feedback signal level, such that when one of the optical signal modulated alternating tangential tangential tangential remaining percentage is less than a predetermined percentage of the remainder, the output current is not greater than a predetermined value of the current clamp.

底下藉由具體實施例詳加說明，當更容易瞭解本發明之目的、技術內容、特點及其所達成之功效。The purpose, technical content, features and effects achieved by the present invention will be more readily understood by the detailed description of the embodiments.

第3圖顯示本發明之發光元件驅動電路的一個實施例（發光元件驅動電路2），發光元件驅動電路2包含功率級電路24以及控制電路26。如圖所示，相切調光電路(Phase-cut Circuit) 22將交流電源21轉換為交流相切調光訊號，其具有一相切剩餘百分比(Phase-cut Residue Percentage)，其中交流相切調光訊號包括交流相切調光電壓Vin及交流相切調光電流Iin；整流電路23將交流相切調光訊號轉換為整流相切調光訊號Vm，該整流相切調光訊號Vm為一經過相切後之半弦波；功率級電路24與整流電路23耦接並將整流相切調光訊號轉換為輸出訊號以驅動發光元件電路25，其中輸出訊號包括輸出電壓V_LED 及輸出電流I_LED ；控制電路26控制功率級電路24之操作，其中控制電路26包括誤差迴授電路261、操作訊號產生電路262以及箝位電路263，其中箝位電路263用以產生箝位訊號，誤差迴授電路261與箝位電路263耦接，用以根據相關於該輸出訊號的回授訊號V_FB 及箝位訊號，而產生誤差迴授訊號，操作訊號產生電路262與誤差迴授電路261及箝位電路263耦接，根據誤差迴授訊號而產生操作訊號PWM，操作訊號PWM例如但不限於為脈寬調變訊號 (例如但不限於可為定頻或變頻之脈寬調變訊號，亦可為其他形式的訊號)；其中功率級電路24根據操作訊號PWM之控制，將整流相切調光訊號轉換為輸出訊號。Fig. 3 shows an embodiment (light-emitting element drive circuit 2) of a light-emitting element drive circuit of the present invention, and the light-emitting element drive circuit 2 includes a power stage circuit 24 and a control circuit 26. As shown, a phase-cut circuit 22 converts the AC power source 21 into an AC phase-cut dimming signal having a phase-cut residual percentage (Phase-cut Residue Percentage), wherein the AC phase cuts The optical signal includes an alternating tangent dimming voltage Vin and an alternating phase tangent dimming current Iin; the rectifying circuit 23 converts the alternating phase tangent dimming signal into a rectified phase-cut dimming signal Vm, and the rectifying tangent dimming signal Vm is a pass. The tangential half sine wave; the power stage circuit 24 is coupled to the rectifier circuit 23 and converts the rectified tangential dimming signal into an output signal for driving the illuminating element circuit 25, wherein the output signal comprises an output voltage V _LED and an output current I _LED The control circuit 26 controls the operation of the power stage circuit 24, wherein the control circuit 26 includes an error feedback circuit 261, an operation signal generation circuit 262, and a clamp circuit 263, wherein the clamp circuit 263 is used to generate a clamp signal, and the error feedback circuit The 261 is coupled to the clamp circuit 263 for generating an error feedback signal according to the feedback signal V _FB and the clamp signal associated with the output signal, and the operation signal generating circuit 262 and the error feedback circuit 2 61 and clamp circuit 263 are coupled to generate an operation signal PWM according to the error feedback signal. The operation signal PWM is, for example but not limited to, a pulse width modulation signal (such as, but not limited to, a pulse width modulation signal that can be a fixed frequency or a frequency conversion signal. It can also be other forms of signals; wherein the power stage circuit 24 converts the rectified phase-cut dimming signal into an output signal according to the control of the operation signal PWM.

第3圖所示本發明之發光元件驅動電路2，其中箝位電路263之主要用意在於，產生箝位訊號並將誤差迴授訊號箝位(clamping)，使其不大於該箝位訊號，藉此影響操作訊號PWM之控制，進而使得在交流相切調光訊號之一相切剩餘百分比(Phase-cut Residue Percentage)小於一預設之相切剩餘百分比（所述「預設」之相切剩餘百分比可為一固定值、或可調整之可變動值，下同）時，輸出電流I_LED 不大於一預設之箝位電流值（所述「預設」之箝位電流值可為一固定值、或可調整之可變動值，下同）；其中，該箝位訊號可為一固定箝位值、或是一隨該相切剩餘百分比遞減而線性或非線性遞減之變動箝位值，而本發明藉由不同種類的箝位訊號設計，可以獲得多種優點，細節將詳述於後。FIG. 3 shows a light-emitting device driving circuit 2 of the present invention, wherein the clamping circuit 263 is mainly intended to generate a clamp signal and clamp the error feedback signal so as not to be larger than the clamp signal. This affects the control of the operation signal PWM, such that the phase-cut Residue Percentage of the AC tangential dimming signal is less than a preset tangential remaining percentage (the tangential residual of the "preset" The percentage can be a fixed value or an adjustable variable value, the same as the output current I _{LED is} not greater than a preset clamp current value (the "preset" clamp current value can be a fixed a value, or an adjustable variable value, the same as below; wherein the clamp signal can be a fixed clamp value, or a variable clamp value that linearly or nonlinearly decreases as the tangent residual percentage decreases. However, the present invention can obtain various advantages by different types of clamp signal design, and the details will be described in detail later.

第4A圖顯示本發明之發光元件驅動電路之更具體的實施例（發光元件驅動電路3），發光元件驅動電路3包含功率級電路24（例如但不限於圖中所示的返馳式功率級電路，其包括例如但不限於圖中所示之至少一功率開關Q1），以及控制電路26；在本實施例中，控制電路26包括誤差迴授電路261，其包括誤差放大電路EA；操作訊號產生電路262，其包括PWM比較電路2621及邏輯驅動電路2622；以及箝位電路263，其包括箝位器2631，其一端耦接於一固定電位，另一端控制節點A的上限位準。4A is a more specific embodiment of the light-emitting element driving circuit of the present invention (light-emitting element driving circuit 3), and the light-emitting element driving circuit 3 includes a power stage circuit 24 (such as but not limited to the flyback power stage shown in the drawing) a circuit comprising, for example, but not limited to, at least one power switch Q1) shown in the figure, and a control circuit 26; in the present embodiment, the control circuit 26 includes an error feedback circuit 261 including an error amplifying circuit EA; an operation signal The generating circuit 262 includes a PWM comparing circuit 2621 and a logic driving circuit 2622; and a clamping circuit 263 including a clamper 2631 having one end coupled to a fixed potential and the other end controlling the upper limit level of the node A.

第4A圖中本發明之發光元件驅動電路3，其中功率級電路24根據控制電路26輸出之操作訊號PWM的控制，將整流相切調光訊號轉換為輸出訊號。整流電路23（例如但不限於圖中所示的全波整流器）將交流相切調光訊號轉換為整流相切調光訊號Vm，其中交流相切調光訊號包括交流相切調光電壓Vin及交流相切調光電流Iin；功率級電路24與整流電路23耦接並將整流相切調光訊號轉換為輸出訊號以驅動發光元件電路25，其中輸出訊號包括輸出電壓V_LED 及輸出電流I_LED 。In Fig. 4A, the light-emitting element driving circuit 3 of the present invention, wherein the power stage circuit 24 converts the rectified phase-cut dimming signal into an output signal according to the control of the operation signal PWM outputted by the control circuit 26. The rectifier circuit 23 (such as but not limited to the full-wave rectifier shown in the figure) converts the AC phase-cut dimming signal into a rectified phase-cut dimming signal Vm, wherein the AC-cutting dimming signal includes an AC-cutting dimming voltage Vin and The AC tangential dimming current Iin; the power stage circuit 24 is coupled to the rectifying circuit 23 and converts the rectified tangential dimming signal into an output signal for driving the illuminating element circuit 25, wherein the output signal comprises an output voltage V _LED and an output current I _LED .

第4A圖中本發明之發光元件驅動電路3，其控制電路26中，誤差放大電路EA根據相關於該輸出訊號的回授訊號V_FB 與調節參考訊號V_REF 的差值，於節點A產生誤差迴授訊號COMP；箝位器2631產生箝位訊號Vclamp控制節點A，用以將該誤差迴授訊號COMP箝位於該箝位訊號Vclamp；其中所謂「箝位」係指，當誤差迴授訊號COMP上升至該箝位訊號Vclamp之位準時，誤差迴授訊號COMP受到箝位訊號Vclamp之限制，而不大於該箝位訊號Vclamp；而在誤差迴授訊號COMP小於該箝位訊號Vclamp之位準時，誤差迴授訊號COMP不受Vclamp影響； PWM比較電路2621將誤差迴授訊號COMP與例如但不限於一鋸齒波RAMP相比較，邏輯驅動電路2622根據PWM比較電路2621之比較結果以及例如但不限於與電流相關之訊號（例如但不限於圖中所示，由訊號感測電路2623及零電流偵測電路2624所產生之零電流偵測訊號），而產生操作訊號PWM；操作訊號產生電路262根據受箝位之誤差迴授訊號COMP而調整操作訊號PWM；其中功率級電路24根據該操作訊號PWM的控制，進而使得在交流相切調光訊號之一相切剩餘百分比小於一預設之相切剩餘百分比時，輸出電流I_LED 不大於一預設之箝位電流值。本實施例中，操作訊號產生電路262的內部結構係以準諧振(Quasi Resonant)控制模式為例，此僅為舉例，還可以有其他各種實施方式，例如可以為定頻控制模式（此情況下不需要訊號感測電路2623及零電流偵測電路2624）、或變頻的固定導通時間控制方式（此情況下邏輯驅動電路2622輸出一個固定導通時間的操作訊號PWM）、或變頻的固定關閉時間控制方式（此情況下邏輯驅動電路2622輸出一個固定關閉時間的操作訊號PWM）、或定頻或變頻的電流相關控制模式（此情況下鋸齒波RAMP相關於電感或繞組電流）等等，此為本技術者所熟知，在此不一一詳列。In the light-emitting device driving circuit 3 of the present invention in FIG. 4A, in the control circuit 26, the error amplifying circuit EA generates an error at the node A according to the difference between the feedback signal V _FB and the adjustment reference signal V _REF related to the output signal. The feedback signal COMP; the clamper 2631 generates a clamp signal Vclamp control node A for clamping the error feedback signal COMP to the clamp signal Vclamp; wherein the "clamp" means when the error feedback signal COMP When the clamp signal Vclamp is raised to the level of the clamp signal Vclamp, the error feedback signal COMP is limited by the clamp signal Vclamp, and is not greater than the clamp signal Vclamp; and when the error feedback signal COMP is less than the clamp signal Vclamp, The error feedback signal COMP is not affected by Vclamp; the PWM comparison circuit 2621 compares the error feedback signal COMP with, for example, but not limited to, a sawtooth wave RAMP, and the logic driving circuit 2622 is based on the comparison result of the PWM comparison circuit 2621 and, for example, but not limited to, The current-related signal (such as but not limited to the zero current detection signal generated by the signal sensing circuit 2623 and the zero current detecting circuit 2624) is generated. No. PWM; the operation signal generating circuit 262 adjusts the operation signal PWM according to the clamped error feedback signal COMP; wherein the power stage circuit 24 is tangential to one of the AC phase-cut dimming signals according to the control of the operation signal PWM When the remaining percentage is less than a predetermined tangent remaining percentage, the output current I _{LED is} not greater than a predetermined clamp current value. In this embodiment, the internal structure of the operation signal generating circuit 262 is exemplified by a quasi-resonant control mode. This is merely an example, and other various embodiments may be used, for example, a fixed frequency control mode (in this case) No need for signal sensing circuit 2623 and zero current detection circuit 2624), or fixed on-time control mode of frequency conversion (in this case, logic drive circuit 2622 outputs a fixed on-time operation signal PWM), or fixed off-time control of frequency conversion Mode (in this case, the logic drive circuit 2622 outputs a fixed off time operation signal PWM), or a fixed frequency or variable frequency current related control mode (in this case, the sawtooth RAMP is related to the inductance or winding current), etc. Well known to the skilled person, not detailed here.

前述之本發明之發光元件驅動電路3，在一實施例中，箝位電路263所產生之箝位訊號Vclamp為一固定箝位值，可達成固定COMP箝位(Fixed COMP Clamping)調光模式。在此實施例中，該誤差迴授訊號COMP箝位於該固定箝位值。In the embodiment of the present invention, the clamp signal Vclamp generated by the clamp circuit 263 is a fixed clamp value, and a fixed COMP Clamping dimming mode can be achieved. In this embodiment, the error feedback signal COMP is clamped to the fixed clamp value.

第4B圖顯示此實施例中，未受箝位之誤差迴授訊號COMP’, 受箝位後之誤差迴授訊號COMP及箝位訊號Vclamp，對相切剩餘百分比作圖之特性曲線（此處「未受箝位」之誤差迴授訊號COMP’係指，如第4A圖之箝位電路263不存在的情況下，誤差迴授電路261所產生的誤差迴授訊號，其未受箝位電路263之箝位，下同）；如第4B圖所示，在本實施例中，箝位訊號Vclamp具有一固定箝位值，受箝位後之誤差迴授訊號COMP如實線所示，受固定箝位訊號Vclamp箝位而不大於該固定箝位訊號Vclamp，因此其最高位準低於未受箝位之誤差迴授訊號COMP’。FIG. 4B shows the characteristic curve of the uncorrected error feedback signal COMP′, the clamped error feedback signal COMP and the clamp signal Vclamp, and the tangent residual percentage plotted in this embodiment (here) The "unclamped" error feedback signal COMP' refers to the error feedback signal generated by the error feedback circuit 261 if the clamp circuit 263 of FIG. 4A does not exist, and the clamp circuit is not clamped. In the present embodiment, the clamp signal Vclamp has a fixed clamp value, and the error feedback signal COMP after clamping is as shown by the solid line, and is fixed. The clamp signal Vclamp is clamped no larger than the fixed clamp signal Vclamp, so its highest level is lower than the un-clamped error feedback signal COMP'.

第4C圖顯示此實施例中，輸出電流I_LED 對相切剩餘百分比作圖之特性曲線，如第4C圖所示，虛線為未受箝位之輸出電流I_LED ’，受箝位後之輸出電流I_LED 如實線所示，在相切剩餘百分比小於一預設之相切剩餘百分比（例如圖中所示之電流轉折點所對應的相切剩餘百分比臨界值P1）時，受箝位後之輸出電流I_LED 不大於一預設之箝位電流值；在本實施例中，所述之該預設之箝位電流值隨相切剩餘百分比遞減而遞減，因而得到調光之效果；更進一步，如第4C圖所示，受箝位後之輸出電流I_LED ，其最小輸出電流Imin小於未受箝位之輸出電流I_LED ’之最小電流Imin’ ，而受箝位後之輸出電流I_LED 之電流轉折點所對應的相切剩餘百分比臨界值（例如圖中所示之P1）大於未受箝位之輸出電流I_LED ’之電流轉折點所對應的相切剩餘百分比臨界值（例如圖中所示之P1’），因此，較佳地，本發明之發光元件驅動電路具有較大的可調光範圍。Figure 4C shows the characteristic curve of the output current I _LED plotted against the tangential residual percentage in this embodiment. As shown in Figure 4C, the dotted line is the unclamped output current I _LED ', and the clamped output. The current I _LED is shown as a solid line, and the clamped output is when the tangential residual percentage is less than a predetermined tangential residual percentage (such as the tangent residual percentage threshold P1 corresponding to the current turning point shown in the figure). The current I _{LED is} not greater than a preset clamp current value; in the embodiment, the preset clamp current value is decreased with decreasing tangent residual percentage, thereby obtaining the effect of dimming; further, as shown in FIG. 4C, the output current of the clamp I _LED, which were not less than the minimum current Imin outputted clamping the output current I _LED 'of the minimum current Imin', and the output current of the sum of I _LED clamp The tangent residual percentage threshold corresponding to the current turning point (for example, P1 shown in the figure) is greater than the tangent residual percentage threshold corresponding to the current turning point of the unclamped output current I _LED ' (for example, as shown in the figure) P1'), therefore, better The light-emitting element driving circuit of the present invention has a large dimmable range.

第5圖顯示前述本發明之具有固定COMP箝位(Fixed COMP Clamping)調光模式之發光元件驅動電路（發光元件驅動電路4），其中箝位電路之一種更具體的實施例（箝位電路263），第5圖中箝位器2631包括一齊納二極體D_Z ，該齊納二極體D_Z 之順向端接地(對應於前述第4A圖的固定電位)，其反向端耦接於節點A用以產生箝位訊號Vclamp（對應於該齊納二極體之齊納電壓，即其逆向崩潰電壓），以將該誤差迴授訊號COMP箝位於該箝位訊號Vclamp；由於對一齊納二極體而言，其齊納電壓約為一定值，因此本實施例可達成固定COMP箝位(Fixed COMP Clamping)調光模式。又，顯然，若該齊納二極體D_Z 之順向端連接於任何其他位準的固定電位，則可將該誤差迴授訊號COMP箝位於齊納電壓加上該位準。Fig. 5 is a view showing a light-emitting element drive circuit (light-emitting element drive circuit 4) having a fixed COMP Clamping dimming mode according to the present invention, wherein a more specific embodiment of the clamp circuit (clamp circuit 263) ), FIG. 5 of clamp 2631 includes a Zener diode D _{_Z,} D _Z of the zener diode to the forward end (corresponding to the fixed potential in FIG. 4A), which is coupled to the inverting terminal The node A is configured to generate a clamp signal Vclamp (corresponding to the Zener voltage of the Zener diode, that is, its reverse collapse voltage), to clamp the error feedback signal COMP to the clamp signal Vclamp; In the case of a nanodiode, the Zener voltage is about a certain value, so this embodiment can achieve a fixed COMP Clamping dimming mode. Moreover, it is apparent that if the forward end of the Zener diode D _Z is connected to a fixed potential of any other level, the error feedback signal COMP can be clamped to the Zener voltage plus the level.

第5圖中本實施例之特性曲線圖仍請參考第4B, 4C圖，其中Vclamp對應於前述該齊納二極體之齊納電壓，其餘特性類同，在此不予贅述。For the characteristic diagram of the present embodiment in FIG. 5, please refer to FIG. 4B, FIG. 4C, wherein Vclamp corresponds to the Zener voltage of the Zener diode described above, and other features are similar, and are not described herein.

第6A圖顯示本發明之具有固定COMP箝位(Fixed COMP Clamping)調光模式之發光元件驅動電路（發光元件驅動電路5），其中箝位電路之另一實施例，其中箝位電路263包括箝位器2631及箝位參考訊號產生器2632，箝位參考訊號產生器2632產生箝位參考訊號V_CL ，箝位器2631根據箝位參考訊號V_CL 產生箝位訊號Vclamp控制節點A，以將誤差迴授訊號COMP箝位於該箝位訊號Vclamp。6A is a diagram showing a light-emitting element driving circuit (light-emitting element driving circuit 5) having a fixed COMP Clamping dimming mode of the present invention, wherein another embodiment of the clamping circuit, wherein the clamping circuit 263 includes a tongs The bit detector 2631 and the clamp reference signal generator 2632, the clamp reference signal generator 2632 generates the clamp reference signal V _CL , and the clamp 2631 generates the clamp signal Vclamp control node A according to the clamp reference signal V _CL to The feedback signal COMP clamp is located at the clamp signal Vclamp.

第6B圖顯示第6A圖所示箝位電路之一種更具體的實施例，其中箝位電路263包括箝位器2631及箝位參考訊號產生器2632，其中箝位參考訊號產生器2632包括一固定電壓產生器，例如但不限於圖示之固定電壓V_DD 與電阻所組成之電阻分壓器，或是一固定電壓源(未示出)，以產生一固定箝位參考訊號V_CL ；箝位器2631包括一二極體D1，其具有一順向偏壓V_F ，其反向端與箝位參考訊號產生器2632之輸出耦接，其順向端耦接於節點A用以產生箝位訊號Vclamp（即該固定箝位參考訊號V_CL 加上二極體D1之順向偏壓V_F ），以將該誤差迴授訊號COMP箝位於該箝位訊號Vclamp，達成固定COMP箝位(Fixed COMP Clamping)調光模式。FIG. 6B shows a more specific embodiment of the clamp circuit shown in FIG. 6A, wherein the clamp circuit 263 includes a clamper 2631 and a clamp reference signal generator 2632, wherein the clamp reference signal generator 2632 includes a fixed a voltage generator, such as but not limited to a resistive voltage divider formed by a fixed voltage V _DD and a resistor, or a fixed voltage source (not shown) to generate a fixed clamp reference signal V _CL ; The device 2631 includes a diode D1 having a forward bias voltage V _F coupled to the output of the clamp reference signal generator 2632 and a forward end coupled to the node A for generating a clamp. The signal Vclamp (that is, the fixed clamp reference signal V _CL plus the forward bias voltage V _{F of the} diode D1) is clamped to the clamp signal Vclamp by the error feedback signal COMP to achieve a fixed COMP clamp (Fixed) COMP Clamping) Dimming mode.

第6B圖之箝位電路263，也可以視為第4A圖中之箝位電路263的一個更具體的實施例，其中電阻分壓器之分壓節點的電壓對應於第4A圖的固定電位。The clamp circuit 263 of Fig. 6B can also be regarded as a more specific embodiment of the clamp circuit 263 of Fig. 4A, in which the voltage of the voltage dividing node of the resistor divider corresponds to the fixed potential of Fig. 4A.

第6B圖中本實施例之特性曲線圖仍請參考第4B, 4C圖，其中Vclamp對應於前述該固定箝位參考訊號V_CL 加上二極體D1之順向偏壓V_F ，其餘特性類同，在此不予贅述。For the characteristic diagram of the embodiment in FIG. 6B, please refer to FIG. 4B, FIG. 4C, wherein Vclamp corresponds to the aforementioned fixed clamp reference signal V _CL plus the forward bias voltage V _{F of the} diode D1, and the remaining characteristic classes. Same, it will not be repeated here.

第7A圖顯示本發明之發光元件驅動電路之另一具體的實施例（發光元件驅動電路6），本實施例可達成適應性COMP箝位(Adaptive COMP Clamping)調光模式；本實施例與第4A圖之實施例類似，主要之差別在於，本實施例發光元件驅動電路6，其中箝位參考訊號產生器2632更根據與交流相切調光訊號之相切剩餘百分比相關之訊號（例如但不限於如第7A圖中所示之整流相切調光訊號Vm）而產生箝位參考訊號V_CL ，使得箝位參考訊號V_CL 以及箝位訊號Vclamp皆會隨交流相切調光訊號之相切剩餘百分比變動而變動，其較佳為隨著交流相切調光訊號之相切剩餘百分比遞減而遞減，因而可達成適應性COMP箝位(Adaptive COMP Clamping)調光模式。FIG. 7A shows another specific embodiment of the light-emitting element driving circuit of the present invention (light-emitting element driving circuit 6). This embodiment can achieve an adaptive COMP Clamping dimming mode; this embodiment and the The embodiment of FIG. 4A is similar, and the main difference is that the light-emitting element driving circuit 6 of the present embodiment, wherein the clamp reference signal generator 2632 is further based on a signal related to the tangential remaining percentage of the alternating tangential dimming signal (for example, but not The clamped reference signal V _{CL is} generated by the rectified tangential dimming signal Vm as shown in FIG. 7A, so that the clamp reference signal V _CL and the clamp signal Vclamp are tangent to the AC tangential dimming signal. The remaining percentage changes, which is preferably reduced as the tangential residual percentage of the AC tangential dimming signal decreases, so that an adaptive COMP Clamping dimming mode can be achieved.

第7B圖顯示此實施例中，未受箝位之誤差迴授訊號COMP’, 受箝位後之誤差迴授訊號COMP及箝位訊號Vclamp，對相切剩餘百分比作圖之特性曲線，如第7B圖所示，虛折線為未受箝位之誤差迴授訊號COMP’，虛點線為適應性箝位訊號Vclamp，受箝位後之誤差迴授訊號COMP如實線所示，受箝位訊號Vclamp箝位而不大於該箝位訊號Vclamp，其中箝位訊號Vclamp如圖所示，較佳地，隨著相切剩餘百分比遞減而遞減，而達成適應性COMP箝位(Adaptive COMP Clamping)調光模式。FIG. 7B shows the error feedback signal COMP' of the clamp, the error feedback signal COMP and the clamp signal Vclamp after clamping, and the characteristic curve of the residual percentage of the tangent, as shown in FIG. As shown in Fig. 7B, the imaginary fold line is the uncorrected error feedback signal COMP', the imaginary dotted line is the adaptive clamp signal Vclamp, and the clamped error feedback signal COMP is shown by the solid line, and the clamped signal is received. The Vclamp clamp is not greater than the clamp signal Vclamp, wherein the clamp signal Vclamp is as shown, preferably, decreasing as the tangent residual percentage is decremented, and achieving Adaptive COMP Clamping dimming mode.

第7C圖顯示此實施例中，輸出電流對相切剩餘百分比作圖之特性曲線，如第7C圖所示，虛線為未受箝位之輸出電流I_LED ’，受箝位後之輸出電流I_LED 如實線所示，在相切剩餘百分比小於一預設之相切剩餘百分比（例如圖中所示之電流轉折點P1）時，輸出電流I_LED 不大於一預設之箝位電流值；在本實施例中，該預設之箝位電流值隨相切剩餘百分比遞減而遞減，因而得到調光之效果；與第4C圖類似，相較於先前技術，本發明之發光元件驅動電路具有較大的調光範圍，更進一步，如第7C圖所示，受適應性COMP箝位後之輸出電流I_LED ，較佳地，其最小輸出電流Imin可調整至更低之位準，從另一個角度來說，本實施例中，較佳地，受適應性COMP箝位後之輸出電流I_LED 亦具有更大之斜率，這代表著，以傳統包含TRIAC的調光電路為例，隨著使用者調整調光電路（例如但不限於旋轉調光旋鈕而調整前述之相切調光電路22），較佳地，可以感受到較大的調光範圍以及調光時的亮度變化率，且最小亮度相較於先前技術亦可更小。Figure 7C shows the characteristic curve of the output current plotted against the tangential residual percentage in this embodiment. As shown in Figure 7C, the dotted line is the unclamped output current I _LED ', and the clamped output current I _LED shown in solid line, while the remaining percentage is less than the tangent of the tangent to a predetermined percentage of the remaining (e.g., the current inflection point as shown in FIG Pl), the output current I _LED is not greater than a predetermined current value of the clamp; in the present In an embodiment, the preset clamp current value decreases as the tangential residual percentage decreases, thereby obtaining a dimming effect; similar to FIG. 4C, the light-emitting element driving circuit of the present invention has a larger value than the prior art. The dimming range, further, as shown in Fig. 7C, the output current I _LED after the adaptive COMP clamp, preferably, the minimum output current Imin can be adjusted to a lower level, from another angle In this embodiment, preferably, the output current I _LED clamped by the adaptive COMP also has a larger slope, which represents a traditional dimming circuit including a TRIAC as an example, with the user. Adjust the dimming circuit (for example, but not limited Rotating the dimming knob to adjust the aforementioned tangent dimming circuit 22), preferably, a large dimming range and a brightness change rate during dimming can be felt, and the minimum brightness can be smaller than the prior art. .

第8圖顯示前述本發明之具有適應性COMP箝位之發光元件驅動電路（發光元件驅動電路7），其中箝位電路之一種更具體的實施例（箝位電路263），第8圖中箝位電路263包括箝位器2631及箝位參考訊號產生器2632，其中箝位參考訊號產生器2632包括與相切剩餘百分比相關之電壓產生器，例如但不限於圖示之整流相切調光訊號Vm與電阻所組成之電阻分壓器，用以產生一隨交流相切調光訊號之相切剩餘百分比遞減而遞減之箝位參考訊號V_CL ，箝位參考訊號產生器2632中的電容具有低通濾波的效果；箝位器2631包括一二極體D1，其具有一順向偏壓V_F ，其反向端與箝位參考訊號產生器2632之輸出耦接，其順向端耦接於節點A用以產生箝位訊號Vclamp（即該隨交流相切調光訊號之相切剩餘百分比遞減而遞減之箝位參考訊號V_CL 加上二極體D1之順向偏壓V_F ），以將該誤差迴授訊號COMP箝位於該箝位訊號Vclamp，達成適應性COMP箝位(Adaptive COMP Clamping)調光模式。Figure 8 is a view showing a light-emitting element drive circuit (light-emitting element drive circuit 7) having an adaptive COMP clamp according to the present invention, wherein a more specific embodiment of the clamp circuit (clamp circuit 263), the clamp of Figure 8 The bit circuit 263 includes a clamper 2631 and a clamp reference signal generator 2632, wherein the clamp reference signal generator 2632 includes a voltage generator associated with the tangential remaining percentage, such as but not limited to the illustrated rectified tangential dimming signal. A resistor divider consisting of Vm and a resistor for generating a clamp reference signal V _CL that decreases as the tangential residual percentage of the AC tangential dimming signal decreases, and the capacitance in the clamp reference signal generator 2632 has a low capacitance The effect of the filtering; the clamper 2631 includes a diode D1 having a forward bias voltage V _F , the opposite end of which is coupled to the output of the clamp reference signal generator 2632, and the forward end is coupled to the The node A is configured to generate the clamp signal Vclamp (ie, the clamp reference signal V _CL decremented by the tangential residual percentage of the AC tangent dimming signal plus the forward bias voltage V _{F of the} diode D1) The error feedback signal COM The P clamp is located at the clamp signal Vclamp to achieve an adaptive COMP Clamping dimming mode.

第8圖中本實施例之特性曲線圖仍請參考第7B, 7C圖，其中Vclamp對應於前述，隨交流相切調光訊號之相切剩餘百分比遞減而遞減之箝位參考訊號V_CL 加上二極體D1之順向偏壓V_F ，其餘特性類同，在此不與贅述。For the characteristic diagram of this embodiment in Fig. 8, please refer to the 7B, 7C diagram, wherein Vclamp corresponds to the above, and the clamp reference signal V _{CL is} decremented as the tangential residual percentage of the AC tangential dimming signal decreases. The forward bias voltage V _{F of the} diode D1 is similar to that of the other features, and will not be described here.

第9A圖顯示本發明之發光元件驅動電路之另一具體的實施例（發光元件驅動電路8），本實施例與第8圖之實施例類似，主要之差別在於，本實施例發光元件驅動電路8，其中箝位電路263更包含一偏移訊號V_OFS ，其與箝位參考訊號產生器2632及箝位器2631耦接（例如但不限於如圖中串聯於箝位參考訊號產生器2632及箝位器2631之間），使得箝位訊號Vclamp受該偏移訊號V_OFS 之修正調整，例如但不限於在本實施例中，箝位器2631根據箝位參考訊號V_CL 及該偏移訊號V_OFS ，於節點A產生箝位訊號Vclamp，用以將該誤差迴授訊號COMP箝位於該箝位訊號Vclamp（此處Vclamp對應於箝位參考訊號V_CL 加上二極體D1之順向偏壓V_F ，並減去該偏移訊號V_OFS ）；箝位訊號Vclamp包含偏移訊號V_OFS ，可使前述本發明之發光元件驅動電路之隨相切剩餘百分比變動而變動之誤差迴授訊號COMP 以及輸出電流I_LED 具有更大的調整性，例如以前述第8圖之實施例而言，在調整誤差迴授訊號COMP及輸出電流I_LED 使其具有較佳之斜率時，其某些絕對位準（例如但不限於前述之最小輸出電流、或是最大輸出電流、或是如前述之電流轉折點等）可能未能在較佳的位準上，而加入此偏移訊號V_OFS ，可助於同時將誤差迴授訊號COMP、輸出電流I_LED 之斜率與其絕對位準以及如前述之電流轉折點等，同時調整至較佳之組合。FIG. 9A is a view showing another specific embodiment (light-emitting element driving circuit 8) of the light-emitting element driving circuit of the present invention. This embodiment is similar to the embodiment of FIG. 8, and the main difference is that the light-emitting element driving circuit of the present embodiment The clamping circuit 263 further includes an offset signal V _OFS coupled to the clamp reference signal generator 2632 and the clamp 2631 (for example, but not limited to being connected in series with the clamp reference signal generator 2632 and The clamping signal Vclamp is adjusted by the correction of the offset signal V _OFS . For example, but not limited to, in the embodiment, the clamp 2631 is based on the clamp reference signal V _CL and the offset signal. V _OFS generates a clamp signal Vclamp at node A for clamping the error feedback signal COMP to the clamp signal Vclamp (where Vclamp corresponds to the clamp reference signal V _CL plus the forward bias of the diode D1) Pressing V _F and subtracting the offset signal V _OFS ); the clamp signal Vclamp includes the offset signal V _OFS , which can cause the error feedback signal of the light-emitting element driving circuit of the present invention to vary with the tangential residual percentage variation COMP and output power I _LED having greater adjustability, for example in the embodiment of FIG. 8, in the adjustment error feedback signal COMP and the output current I _LED so as to have the slope preferred that some absolute level (e.g., but Not limited to the aforementioned minimum output current, or maximum output current, or the current turning point as described above, may not be at a preferred level, and the addition of the offset signal V _OFS can help to return the error at the same time. The signal signal COMP, the slope of the output current I _LED and its absolute level, and the current turning point as described above are simultaneously adjusted to a preferred combination.

第9B圖顯示前述本發明之具有適應性COMP箝位(Adaptive COMP Clamping)調光模式之發光元件驅動電路（發光元件驅動電路9），其中箝位電路之另一種更具體的實施例（箝位電路263），第9B圖中箝位電路263包括箝位器2631、箝位參考訊號產生器2632，以及例如但不限於兩個偏移二極體D2及D3，其分別具有順向偏壓V_F2 及V_F3 ，其中偏移二極體D2及D3之串聯組合對應於如第9A圖之偏移訊號V_OFS ，偏移二極體D2及D3之串聯組合之順向端耦接於箝位參考訊號產生器2632，而串聯組合之反向端耦接於箝位器2631；本實施例中，誤差迴授訊號COMP受箝位於箝位訊號Vclamp （此處Vclamp對應於箝位參考訊號V_CL 加上二極體D1之順向偏壓V_F1 ，並減去偏移二極體D2及D3之順向偏壓V_F2 及V_F3 ）。FIG. 9B is a view showing a light-emitting element driving circuit (light-emitting element driving circuit 9) having an adaptive COMP Clamping dimming mode according to the present invention, wherein another more specific embodiment of the clamping circuit (clamping) Circuit 263), the clamping circuit 263 in FIG. 9B includes a clamper 2631, a clamp reference signal generator 2632, and, for example, but not limited to, two offset diodes D2 and D3, each having a forward bias voltage V _F2 and V _F3 , wherein the series combination of the offset diodes D2 and D3 corresponds to the offset signal V _OFS as shown in FIG. 9A , and the forward end of the series combination of the offset diodes D2 and D3 is coupled to the clamp The reference signal generator 2632 is coupled to the clamper 2631. In this embodiment, the error feedback signal COMP is clamped to the clamp signal Vclamp (where Vclamp corresponds to the clamp reference signal V _CL The forward bias voltage V _{F1 of the} diode D1 is added, and the forward bias voltages V _F2 and V _{F3 of the} offset diodes D2 and D3 are subtracted.

第10A圖顯示前述本發明之具有適應性COMP箝位(Adaptive COMP Clamping)調光模式之發光元件驅動電路，其中箝位參考訊號產生器之另一種更具體的實施例（箝位參考訊號產生器2632），第10A圖中箝位參考訊號產生器2632包括相切剩餘百分比編碼電路26321，以及箝位參考訊號轉換器26322；其中相切剩餘編碼電路26321（例如但不限於類比數位轉換器）將例如但不限於Vm之與交流相切調光訊號之相切剩餘百分比相關之訊號轉換成為一相切剩餘百分比訊號（例如但不限於數位編碼），箝位參考訊號轉換器26322（例如但不限於數位類比轉換器）再將該相切剩餘百分比訊號轉換成為一箝位參考訊號V_CL ；本實施例中，可藉由相切剩餘編碼電路26321或是箝位參考訊號轉換器26322之線性或非線性轉換，將相切剩餘百分比相關之訊號Vm線性或非線性地轉換為箝位參考訊號V_CL 。FIG. 10A is a view showing a light-emitting element driving circuit of the present invention having an adaptive COMP Clamping dimming mode, and another more specific embodiment of the clamp reference signal generator (clamp reference signal generator) 2632), the clamp reference signal generator 2632 in FIG. 10A includes a tangent residual percentage encoding circuit 26321, and a clamp reference signal converter 26322; wherein the tangent residual encoding circuit 26321 (such as but not limited to an analog digital converter) For example, but not limited to, the signal associated with the tangential residual percentage of the AC tangential dimming signal is converted to a tangent residual percentage signal (such as, but not limited to, a digital code), clamped reference signal converter 26322 (such as but not limited to The digital analog converter converts the tangent residual percentage signal into a clamp reference signal V _CL ; in this embodiment, the linear or non-linearity of the tangential residual encoding circuit 26321 or the clamp reference signal converter 26322 The linear conversion converts the tangential residual percentage related signal Vm linearly or non-linearly into the clamp reference signal V _CL .

請參閱第10B, 10C圖，在一實施例中，箝位參考訊號V_CL 藉由前述之非線性轉換而具有非線性之特性，進而使得如前述之箝位訊號Vclamp, COMP 及I_LED 等亦具有非線性之特性，較佳為如第10B, 10C圖所示，相對於交流相切調光訊號之相切剩餘百分比為上凹漸增(concave up, increasing)曲線，可達成非線性適應性COMP箝位(Non-linear Adaptive COMP Clamping)調光模式；舉例而言，由於人眼對發光元件亮度之響應為非線性（舉例而言：在光線對人眼而言為高亮度的情況下，人眼對亮度的變化較不敏感），因此，非線性的輸出電流I_LED 可使得使用者在調整調光電路（例如但不限於旋轉調光旋鈕而調整前述之相切調光電路22）時，人眼感覺到的亮度變化更為均勻。Referring to FIGS. 10B and 10C, in an embodiment, the clamp reference signal V _CL has a non-linear characteristic by the aforementioned nonlinear conversion, thereby causing the clamp signals Vclamp, COMP and I _LED as described above. It has a non-linear characteristic, preferably as shown in FIG. 10B and FIG. 10C, and the residual percentage of the tangent relative to the alternating-cut tangent dimming signal is a concave up, increasing curve, which can achieve nonlinear adaptability. Non-linear Adaptive COMP Clamping dimming mode; for example, because the response of the human eye to the brightness of the light-emitting element is non-linear (for example, in the case where the light is high-intensity to the human eye, The human eye is less sensitive to changes in brightness. Therefore, the non-linear output current I _LED allows the user to adjust the dimming circuit (such as, but not limited to, rotating the dimming knob to adjust the aforementioned tangent dimming circuit 22). The brightness perceived by the human eye changes more evenly.

綜合上述，本發明藉由箝位訊號Vclamp，以固定或適應性方式來線性或非線性地箝位誤差迴授訊號COMP，可藉此調整電流轉折點、增大可調光範圍、降低最小輸出電流、及/或調整調光時的變化斜率，這些都是先前技術所無的優點。In summary, the present invention clamps the error feedback signal COMP linearly or non-linearly in a fixed or adaptive manner by the clamp signal Vclamp, thereby adjusting the current turning point, increasing the dimming range, and reducing the minimum output current. And/or adjusting the slope of the change in dimming, these are advantages not available in prior art.

以上已針對較佳實施例來說明本發明，唯以上所述者，僅係為使熟悉本技術者易於了解本發明的內容而已，並非用來限定本發明之權利範圍。所說明之各個實施例，並不限於單獨應用，亦可以組合應用；舉其中一例，偏移訊號V_OFS 亦可以應用於其他固定、線性以及非線性箝位訊號之實施例中，使可調光範圍之設計更有彈性。此外，在本發明之相同精神下，熟悉本技術者可以思及各種等效變化以及各種組合。舉例而言，所示直接連接的電路元件間，可插置不影響電路主要功能的電路元件，如開關或電阻等；又例如，一訊號在電路內部進行處理或運算時，可能經過電壓電流轉換、電流電壓轉換、比例轉換、位準轉換等，因此，本發明所稱「根據某訊號進行處理或運算」，不限於根據該訊號的本身，亦包含於必要時，將該訊號進行上述轉換後，根據轉換後的訊號進行處理或運算；又再如，前述之功率級電路，並不限於前述之返馳式功率級電路，還可為例如但不限於升降壓(buck-boost)或是降壓(buck)等功率級電路；又如，箝位參考訊號產生器還可包含一緩衝器，以增進箝位之性能；再舉一例，本發明除可應用於如前述實施例中之非定頻之準諧振(Quasi Resonant)控制模式之外，亦可應用於例如但不限於臨界導通模式(Critical conduction mode)及谷底切換(Valley Switching)等控制模式，此外，也可以應用於定頻系統，而操作訊號產生電路可包括頻率產生器；本發明也不限於應用操作在連續導通模式CCM或是DCM非連續導通模式下；又如，鋸齒波RAMP可為獨立之鋸齒波，或是相關於電感(或繞組)電流訊號。由此可知，其組合方式甚多，在此不一一列舉說明。因此，本發明的範圍應涵蓋上述及其他所有等效變化。The present invention has been described with reference to the preferred embodiments thereof, and the present invention is not intended to limit the scope of the present invention. The illustrated embodiments are not limited to separate applications, but may be combined. For example, the offset signal V _OFS may also be applied to other fixed, linear, and non-linear clamp signals in embodiments to enable dimming. The design of the range is more flexible. In addition, various equivalent changes and various combinations can be conceived by those skilled in the art in the same spirit of the invention. For example, between directly connected circuit components, circuit components that do not affect the main functions of the circuit, such as switches or resistors, can be inserted. For example, when a signal is processed or operated inside the circuit, voltage and current conversion may occur. , current-voltage conversion, proportional conversion, level conversion, etc., therefore, the term "processing or computing according to a signal" as used in the present invention is not limited to being based on the signal itself, but is also included, if necessary, after the signal is converted as described above. The power stage circuit is not limited to the aforementioned flyback power stage circuit, and may be, for example, but not limited to, buck-boost or drop. A power stage circuit such as buck; for example, the clamp reference signal generator may further include a buffer to improve the performance of the clamp; and as another example, the present invention is applicable to the non-determination as in the foregoing embodiment. In addition to the Quasi Resonant control mode, it can also be applied to controls such as, but not limited to, Critical conduction mode and Valley Switching. In addition, it can also be applied to a fixed frequency system, and the operation signal generating circuit can include a frequency generator; the invention is not limited to the application operation in the continuous conduction mode CCM or the DCM discontinuous conduction mode; for example, the sawtooth wave RAMP It can be an independent sawtooth wave or a current signal related to the inductor (or winding). It can be seen from this that there are many combinations, and the description will not be given here. Therefore, the scope of the invention should be construed as covering the above and all other equivalents.

1,2,3,4,5,6,7,8,9‧‧‧發光元件驅動電路
23‧‧‧整流電路
24‧‧‧功率級電路
25‧‧‧發光元件電路
26‧‧‧控制電路
261‧‧‧誤差迴授電路
262‧‧‧操作訊號產生電路
263‧‧‧箝位電路
2621‧‧‧PWM比較電路
2622‧‧‧邏輯驅動電路
2623‧‧‧訊號感測電路
2624‧‧‧零電流偵測電路
2631‧‧‧箝位器
2632‧‧‧箝位參考訊號產生器
26321‧‧‧相切剩餘編碼電路
26322‧‧‧箝位參考訊號轉換器
COMP,COMP’‧‧‧誤差迴授訊號
D1,D2,D3‧‧‧二極體
D_Z‧‧‧齊納二極體
EA‧‧‧誤差放大電路
I_LED,I_LED’‧‧‧輸出電流
Iin‧‧‧交流相切調光電流
Imin,Imin’‧‧‧最小輸出電流
P0‧‧‧相切角度
P0’‧‧‧相切剩餘百分比
P1,P1’‧‧‧(電流轉折點對應的)相切剩餘百分比臨界值
PWM‧‧‧操作訊號
Q1‧‧‧功率開關
RAMP‧‧‧鋸齒波
V_CL‧‧‧箝位參考訊號
Vclamp‧‧‧箝位訊號
V_DD‧‧‧固定電壓
V_FB‧‧‧相關於輸出訊號的回授訊號
Vin‧‧‧交流相切調光電壓
V_LED‧‧‧輸出電壓
Vm‧‧‧整流相切調光訊號
V_OFS‧‧‧偏移訊號
V_REF‧‧‧調節參考訊號
節點A‧‧‧節點1,2,3,4,5,6,7,8,9‧‧‧Lighting element drive circuit
23‧‧‧Rectifier circuit
24‧‧‧Power level circuit
25‧‧‧Lighting element circuit
26‧‧‧Control circuit
261‧‧‧Error feedback circuit
262‧‧‧Operation signal generation circuit
263‧‧‧Clamp circuit
2621‧‧‧PWM comparison circuit
2622‧‧‧Logic Drive Circuit
2623‧‧‧ Signal sensing circuit
2624‧‧‧zero current detection circuit
2631‧‧‧ clamp
2632‧‧‧Clamp reference signal generator
26321‧‧‧ Tangent residual coding circuit
26322‧‧‧Clamp Reference Signal Converter
COMP, COMP'‧‧‧ error feedback signal
D1, D2, D3‧‧‧ diode
D _Z ‧‧‧Zina diode
EA‧‧‧Error Amplifying Circuit
I _LED , I _LED '‧‧‧ output current
Iin‧‧‧AC tangent dimming current
Imin, Imin'‧‧‧Minimum output current
P0‧‧‧ Tangent angle
P0'‧‧‧ Tangent remaining percentage
P1, P1'‧‧‧ (corresponding to the current turning point) tangent residual percentage threshold
PWM‧‧‧ operation signal
Q1‧‧‧Power switch
RAMP‧‧‧ sawtooth wave
V _CL ‧‧‧Clamp Reference Signal
Vclamp‧‧‧ clamp signal
V _DD ‧‧‧fixed voltage
V _FB ‧‧‧Response signal related to output signal
Vin‧‧‧AC tangent dimming voltage
V _LED ‧‧‧ output voltage
Vm‧‧‧ rectified tangent dimming signal
V _OFS ‧‧‧ offset signal
V _REF ‧‧‧Reconciliation reference signal node A‧‧‧ node

第1圖顯示一種先前技術之發光元件驅動電路的示意圖。第2A, 2B圖為對應於第1圖電路的訊號波形示意圖。第3圖顯示本發明之發光元件驅動電路之一實施例方塊圖。第4A圖顯示本發明之發光元件驅動電路之另一實施例。第4B, 4C圖為對應於第4A圖電路的模擬曲線圖。第5圖顯示本發明之發光元件驅動電路之另一實施例。第6A, 6B圖顯示本發明之發光元件驅動電路之另一實施例及其更具體實施方式。第7A圖顯示本發明之發光元件驅動電路之另一實施例。第7B, 7C圖為對應於第7A圖電路的模擬曲線圖。第8圖顯示本發明之發光元件驅動電路之另一實施例。第9A圖顯示本發明之發光元件驅動電路之另一實施例。第9B圖顯示本發明之發光元件驅動電路之另一實施例。第10A圖顯示本發明之發光元件驅動電路，其中箝位參考訊號產生器之一實施例方塊圖。第10B, 10C圖為對應於第10A圖電路的模擬曲線圖。Figure 1 shows a schematic diagram of a prior art light-emitting element drive circuit. 2A, 2B are schematic diagrams of signal waveforms corresponding to the circuit of Fig. 1. Fig. 3 is a block diagram showing an embodiment of a light-emitting element driving circuit of the present invention. Fig. 4A shows another embodiment of the light-emitting element drive circuit of the present invention. 4B, 4C are simulation curves corresponding to the circuit of Fig. 4A. Fig. 5 shows another embodiment of the light-emitting element drive circuit of the present invention. 6A, 6B are views showing another embodiment of the light-emitting element driving circuit of the present invention and a more specific embodiment thereof. Fig. 7A shows another embodiment of the light-emitting element drive circuit of the present invention. Figures 7B, 7C are analog plots corresponding to the circuit of Figure 7A. Fig. 8 shows another embodiment of the light-emitting element drive circuit of the present invention. Fig. 9A shows another embodiment of the light-emitting element driving circuit of the present invention. Fig. 9B is a view showing another embodiment of the light-emitting element driving circuit of the present invention. Fig. 10A is a block diagram showing an embodiment of a light-emitting element driving circuit of the present invention, wherein a clamp reference signal generator is provided. 10B, 10C are simulation curves corresponding to the circuit of Fig. 10A.

無no

3‧‧‧發光元件驅動電路 3‧‧‧Lighting element drive circuit

23‧‧‧整流電路 23‧‧‧Rectifier circuit

24‧‧‧功率級電路 24‧‧‧Power level circuit

25‧‧‧發光元件電路 25‧‧‧Lighting element circuit

26‧‧‧控制電路 26‧‧‧Control circuit

261‧‧‧誤差迴授電路 261‧‧‧Error feedback circuit

262‧‧‧操作訊號產生電路 262‧‧‧Operation signal generation circuit

263‧‧‧箝位電路 263‧‧‧Clamp circuit

2621‧‧‧PWM比較電路 2621‧‧‧PWM comparison circuit

2622‧‧‧邏輯驅動電路 2622‧‧‧Logic Drive Circuit

2623‧‧‧訊號感測電路 2623‧‧‧ Signal sensing circuit

2624‧‧‧零電流偵測電路 2624‧‧‧zero current detection circuit

2631‧‧‧箝位器 2631‧‧‧ clamp

2632‧‧‧箝位參考訊號產生器 2632‧‧‧Clamp reference signal generator

COMP‧‧‧誤差迴授訊號 COMP‧‧‧ error feedback signal

EA‧‧‧誤差放大電路 EA‧‧‧Error Amplifying Circuit

I_LED‧‧‧輸出電流 I _LED ‧‧‧Output current

Iin‧‧‧交流相切調光電流 Iin‧‧‧AC tangent dimming current

PWM‧‧‧操作訊號 PWM‧‧‧ operation signal

Q1‧‧‧功率開關 Q1‧‧‧Power switch

RAMP‧‧‧鋸齒波 RAMP‧‧‧ sawtooth wave

V_CL‧‧‧箝位參考訊號 V _CL ‧‧‧Clamp Reference Signal

Vclamp‧‧‧箝位訊號 Vclamp‧‧‧ clamp signal

V_FB‧‧‧相關於輸出訊號的回授訊號 V _FB ‧‧‧Response signal related to output signal

Vin‧‧‧交流相切調光電壓 Vin‧‧‧AC tangent dimming voltage

V_LED‧‧‧輸出電壓 V _LED ‧‧‧ output voltage

Vm‧‧‧整流相切調光訊號 Vm‧‧‧ rectified tangent dimming signal

V_REF‧‧‧調節參考訊號 V _REF ‧‧‧Adjust reference signal

節點A‧‧‧節點 Node A‧‧‧ node

Claims

一種控制電路，用以控制一發光元件驅動電路，其中該發光元件驅動電路，用以根據一整流相切調光訊號，以驅動一發光元件電路，其中該整流相切調光訊號為一相切後之半弦波，該發光元件驅動電路包含：一功率級電路，包括至少一功率開關，其與該整流電路耦接，用以根據一操作訊號而操作其中該功率開關，以將該整流相切調光訊號轉換為一輸出訊號，而驅動該發光元件電路，其中該輸出訊號包含一輸出電流；其中該控制電路，用以根據一相關於該輸出訊號的回授訊號，產生該操作訊號；該控制電路包含：一箝位電路(Clamping Circuit)，用以產生一箝位訊號；一誤差迴授電路(Error Feedback Circuit)，與該箝位電路耦接，用以根據該相關於該輸出訊號的回授訊號及該箝位訊號，產生一誤差迴授訊號；以及一操作訊號產生電路，與該誤差迴授電路耦接，用以根據該誤差迴授訊號之位準，產生該操作訊號；其中該箝位訊號限制該誤差迴授訊號的上限位準不大於該箝位訊號，使得在該交流相切調光訊號之一相切剩餘百分比小於一預設之相切剩餘百分比時，該輸出電流不大於一預設之箝位電流值。 A control circuit for controlling a light-emitting element driving circuit, wherein the light-emitting element driving circuit is configured to drive a light-emitting element circuit according to a rectifying and tangential dimming signal, wherein the rectifying and tangential dimming signal is a tangent The latter half-chord wave, the light-emitting element driving circuit comprises: a power stage circuit comprising at least one power switch coupled to the rectifier circuit for operating the power switch according to an operation signal to The modulating optical signal is converted into an output signal, and the illuminating element circuit is driven, wherein the output signal includes an output current; wherein the control circuit is configured to generate the operation signal according to a feedback signal related to the output signal; The control circuit includes: a clamp circuit for generating a clamp signal; an error feedback circuit coupled to the clamp circuit for correlating the output signal The feedback signal and the clamp signal generate an error feedback signal; and an operation signal generating circuit coupled to the error feedback circuit for use Generating the operation signal according to the level of the error feedback signal; wherein the clamp signal limits the upper limit level of the error feedback signal to be no greater than the clamp signal, so that one of the AC phase-cut dimming signals is tangent When the remaining percentage is less than a preset tangent residual percentage, the output current is not greater than a predetermined clamp current value.

如申請專利範圍第1項所述之控制電路，其中該箝位訊號為一固定值、或是一隨該相切剩餘百分比遞減而線性或非線性遞減之變動值，且該預設之箝位電流值為一隨該相切剩餘百分比遞減而線性或非線性遞減之變動電流值。 The control circuit of claim 1, wherein the clamp signal is a fixed value, or a linear or non-linear decreasing variation value as the tangent residual percentage decreases, and the preset clamp is The current value is a variable current value that decreases linearly or nonlinearly as the remaining percentage of the tangent decreases.

如申請專利範圍第2項所述之控制電路，其中該箝位電路包括：一箝位器，其一端耦接於一固定電位，另一端與該誤差迴授電路耦接，以提供該箝位訊號限制該誤差迴授訊號的上限位準。 The control circuit of claim 2, wherein the clamp circuit comprises: a clamper, one end of which is coupled to a fixed potential, and the other end is coupled to the error feedback circuit to provide the clamp The signal limits the upper limit of the error feedback signal.

如申請專利範圍第3項所述之控制電路，其中該箝位器包括一齊納二極體，該齊納二極體之反向端提供該箝位訊號，該齊納二極體之順向端耦接於該固定電位。 The control circuit of claim 3, wherein the clamp comprises a Zener diode, the clamped signal is provided at an opposite end of the Zener diode, and the Zener diode is forward. The terminal is coupled to the fixed potential.

如申請專利範圍第2項所述之控制電路，其中該箝位電路包括：一箝位參考訊號產生器，用以產生一箝位參考訊號；以及一箝位器，與該箝位參考訊號產生器及該誤差迴授電路耦接，用以根據該箝位參考訊號而產生該箝位訊號，以限制該誤差迴授訊號的上限位準。 The control circuit of claim 2, wherein the clamp circuit comprises: a clamp reference signal generator for generating a clamp reference signal; and a clamp device, and the clamp reference signal is generated And the error feedback circuit is coupled to generate the clamp signal according to the clamp reference signal to limit an upper limit level of the error feedback signal.

如申請專利範圍第5項所述之控制電路，其中該箝位參考訊號產生器，根據一固定電壓源或該固定電壓源之分壓以產生該箝位參考訊號，使得該箝位訊號為該固定值。 The control circuit of claim 5, wherein the clamp reference signal generator generates a clamp reference signal according to a voltage of a fixed voltage source or the fixed voltage source, so that the clamp signal is Fixed value.

如申請專利範圍第5項所述之控制電路，其中該箝位參考訊號產生器根據該整流相切調光訊號產生該箝位參考訊號，使得該箝位訊號為該隨該相切剩餘百分比遞減而線性或非線性遞減之變動值。 The control circuit of claim 5, wherein the clamp reference signal generator generates the clamp reference signal according to the rectified tangential dimming signal, such that the clamp signal is decremented by the remaining percentage of the tangent The linear or non-linear decreasing value.

如申請專利範圍第7項所述之控制電路，其中該箝位參考訊號產生器包括：一相切剩餘編碼電路，用以根據該整流相切調光訊號或該整流相切調光訊號之分壓產生一相切剩餘百分比編碼；以及一箝位參考訊號轉換器，用以根據該相切剩餘百分比編碼產生該箝位參考訊號。 The control circuit of claim 7, wherein the clamp reference signal generator comprises: a tangential residual coding circuit for dividing the rectified tangential dimming signal or the rectifying tangential dimming signal The voltage produces a tangent residual percentage code; and a clamp reference signal converter for generating the clamp reference signal based on the tangent residual percentage code.

如申請專利範圍第3、5項至第8項中任一項所述之控制電路，其中該箝位器包括一箝位二極體，該箝位二極體之順向端與該誤差迴授電路耦接，以提供該箝位訊號限制該誤差迴授訊號的上限位準，該箝位二極體之反向端與該箝位參考訊號產生器耦接。 The control circuit according to any one of claims 3 to 5, wherein the clamp comprises a clamp diode, the forward end of the clamp diode and the error back The circuit is coupled to provide the clamp signal to limit the upper limit of the error feedback signal, and the opposite end of the clamp diode is coupled to the clamp reference signal generator.

如申請專利範圍第3、5項至第8項中任一項所述之控制電路，其中該箝位電路更以一偏移訊號修正調整該箝位訊號。 The control circuit of any one of the preceding claims, wherein the clamping circuit further adjusts the clamp signal with an offset signal correction.

如申請專利範圍第10項所述之控制電路，其中該箝位電路包括至少一偏移二極體，與該箝位參考訊號產生器及該箝位器耦接，用以產生該偏移訊號。 The control circuit of claim 10, wherein the clamping circuit comprises at least one offset diode coupled to the clamp reference signal generator and the clamp for generating the offset signal .

一種發光元件驅動電路，用以根據一整流相切調光訊號，以驅動一發光元件電路，其中該整流相切調光訊號為一相切後之半弦波，該發光元件驅動電路包含：一功率級電路，包括至少一功率開關，其與該整流電路耦接，用以根據一操作訊號而操作其中該功率開關，以將該整流相切調光訊號轉換為一輸出訊號，而驅動該發光元件電路，其中該輸出訊號包含一輸出電流；以及一控制電路，用以根據一相關於該輸出訊號的回授訊號，產生該操作訊號，該控制電路包括：一箝位電路(Clamping Circuit)，用以產生一箝位訊號；一誤差迴授電路(Error Feedback Circuit)，與該箝位電路耦接，用以根據該相關於該輸出訊號的回授訊號及該箝位訊號，產生一誤差迴授訊號；以及一操作訊號產生電路，與該誤差迴授電路耦接，用以根據該誤差迴授訊號之位準，產生該操作訊號；其中該箝位訊號限制該誤差迴授訊號的上限位準，使得在該交流相切調光訊號之一相切剩餘百分比小於一預設之相切剩餘百分比時，該輸出電流不大於一預設之箝位電流值。 A illuminating element driving circuit is configured to drive a illuminating element circuit according to a rectified tangential dimming signal, wherein the rectifying tangential dimming signal is a tangent half sine wave, and the illuminating element driving circuit comprises: The power stage circuit includes at least one power switch coupled to the rectifier circuit for operating the power switch according to an operation signal to convert the rectified phase-cut dimming signal into an output signal to drive the illumination The component circuit, wherein the output signal includes an output current; and a control circuit for generating the operation signal according to a feedback signal related to the output signal, the control circuit comprising: a clamping circuit (Clamping Circuit) For generating a clamp signal; an error feedback circuit coupled to the clamp circuit for generating an error back according to the feedback signal associated with the output signal and the clamp signal And an operation signal generating circuit coupled to the error feedback circuit for generating the operation signal according to the level of the error feedback signal; The clamp signal limits the upper limit level of the error feedback signal, so that when the tangential residual percentage of one of the AC tangential dimming signals is less than a preset tangential remaining percentage, the output current is not greater than a preset. Clamp current value.

如申請專利範圍第12項所述之發光元件驅動電路，其中該箝位訊號為一固定值、或是一隨該相切剩餘百分比遞減而線性或非線性遞減之變動值，且該預設之箝位電流值為一隨該相切剩餘百分比遞減而線性或非線性遞減之變動電流值。 The illuminating device driving circuit of claim 12, wherein the clamping signal is a fixed value, or a linear or non-linear decreasing variation value as the tangential remaining percentage decreases, and the preset The clamp current value is a variable current value that decreases linearly or nonlinearly as the remaining percentage of the tangent decreases.

如申請專利範圍第13項所述之發光元件驅動電路，其中該箝位電路包括：一箝位器，其一端耦接於一固定電位，另一端與該誤差迴授電路耦接，以提供該箝位訊號限制該誤差迴授訊號的上限位準。 The illuminating device driving circuit of claim 13, wherein the clamping circuit comprises: a clamping device, one end of which is coupled to a fixed potential, and the other end is coupled to the error feedback circuit to provide the The clamp signal limits the upper limit of the error feedback signal.

如申請專利範圍第14項所述之發光元件驅動電路，其中該箝位器包括一齊納二極體，該齊納二極體之反向端提供該箝位訊號，該齊納二極體之順向端耦接於該固定電位。 The illuminating device driving circuit of claim 14, wherein the clamping device comprises a Zener diode, the clamping end of the Zener diode providing the clamping signal, the Zener diode The forward end is coupled to the fixed potential.

如申請專利範圍第13項所述之發光元件驅動電路，其中該箝位電路包括：一箝位參考訊號產生器，用以產生一箝位參考訊號；以及一箝位器，與該箝位參考訊號產生器及該誤差迴授電路耦接，用以根據該箝位參考訊號而產生該箝位訊號，以限制該誤差迴授訊號的上限位準。 The illuminating device driving circuit of claim 13, wherein the clamping circuit comprises: a clamp reference signal generator for generating a clamp reference signal; and a clamp, and the clamp reference The signal generator and the error feedback circuit are coupled to generate the clamp signal according to the clamp reference signal to limit the upper limit level of the error feedback signal.

如申請專利範圍第16項所述之發光元件驅動電路，其中該箝位參考訊號產生器，根據一固定電壓源或該固定電壓源之分壓以產生該箝位參考訊號，使得該箝位訊號為該固定值。 The illuminating device driving circuit of claim 16, wherein the clamp reference signal generator generates a clamp reference signal according to a voltage of a fixed voltage source or the fixed voltage source, so that the clamp signal is obtained. For this fixed value.

如申請專利範圍第16項所述之發光元件驅動電路，其中該箝位參考訊號產生器根據該整流相切調光訊號產生該箝位參考訊號，使得該箝位訊號為該隨該相切剩餘百分比遞減而線性或非線性遞減之變動值。 The illuminating device driving circuit of claim 16, wherein the clamp reference signal generator generates the clamp reference signal according to the rectified tangential dimming signal, so that the clamp signal is the tangential residual The percentage decreases and the linear or nonlinear decreases.

如申請專利範圍第18項所述之發光元件驅動電路，其中該箝位參考訊號產生器包括：一相切剩餘編碼電路，用以根據該整流相切調光訊號或該整流相切調光訊號之分壓產生一相切剩餘百分比編碼；以及一箝位參考訊號轉換器，用以根據該相切剩餘百分比編碼產生該箝位參考訊號。 The illuminating device driving circuit of claim 18, wherein the clamp reference signal generator comprises: a tangential residual encoding circuit for performing the rectifying tangential dimming signal or the rectifying tangential dimming signal The divided voltage produces a tangent residual percentage code; and a clamp reference signal converter for generating the clamp reference signal according to the tangent residual percentage code.

如申請專利範圍第14、16項至第19項中任一項所述之發光元件驅動電路，其中該箝位器包括一箝位二極體，該箝位二極體之順向端與該誤差迴授電路耦接，以提供該箝位訊號限制該誤差迴授訊號的上限位準，該箝位二極體之反向端與該箝位參考訊號產生器耦接。 The illuminating device driving circuit according to any one of claims 14 to 16, wherein the tongs include a clamping diode, and the directional end of the clamping diode The error feedback circuit is coupled to provide the clamp signal to limit the upper limit level of the error feedback signal, and the opposite end of the clamp diode is coupled to the clamp reference signal generator.

如申請專利範圍第13、16項至第19項中任一項所述之發光元件驅動電路，其中該箝位電路更以一偏移訊號修正調整該箝位訊號。 The illuminating device driving circuit according to any one of claims 13 to 16, wherein the clamping circuit further adjusts the clamping signal with an offset signal correction.

如申請專利範圍第21項所述之發光元件驅動電路，其中該箝位電路包括至少一偏移二極體，與該箝位參考訊號產生器及該箝位器耦接，用以產生該偏移訊號。 The illuminating device driving circuit of claim 21, wherein the clamping circuit comprises at least one offset diode coupled to the clamp reference signal generator and the clamp for generating the bias The mobile number.

一種控制一發光元件驅動電路之方法，其中該發光元件驅動電路，用以根據一整流相切調光訊號，以驅動一發光元件電路，其中該整流相切調光訊號為一相切後之半弦波，該發光元件驅動電路包含：一功率級電路，包括至少一功率開關，其與該整流電路耦接，用以根據一操作訊號而操作其中該功率開關，以將該整流相切調光訊號轉換為一輸出訊號，而驅動該發光元件電路，其中該輸出訊號包含一輸出電流；該控制方法包含：根據一相關於該輸出訊號的回授訊號，產生一操作訊號；以及根據該操作訊號而操作該功率開關；其中該產生該操作訊號之步驟包括：產生一箝位訊號；根據該相關於該輸出訊號的回授訊號及該箝位訊號，產生一誤差迴授訊號；以及根據該誤差迴授訊號之位準，產生該操作訊號；其中該箝位訊號限制該誤差迴授訊號的上限位準，使得在該交流相切調光訊號之一相切剩餘百分比小於一預設之相切剩餘百分比時，該輸出電流不大於一預設之箝位電流值。 A method for controlling a driving circuit of a light-emitting element, wherein the light-emitting element driving circuit is configured to drive a light-emitting element circuit according to a rectified phase-cut dimming signal, wherein the rectified phase-cut dimming signal is a tangent half The sine wave driving circuit includes: a power stage circuit including at least one power switch coupled to the rectifying circuit for operating the power switch according to an operation signal to dim the rectification The signal is converted into an output signal, and the light-emitting element circuit is driven, wherein the output signal includes an output current; the control method includes: Generating an operation signal according to a feedback signal related to the output signal; and operating the power switch according to the operation signal; wherein the step of generating the operation signal comprises: generating a clamp signal; according to the output The feedback signal of the signal and the clamp signal generate an error feedback signal; and generate the operation signal according to the level of the error feedback signal; wherein the clamp signal limits the upper limit of the error feedback signal, The output current is not greater than a predetermined clamp current value when the tangential residual percentage of one of the AC tangential dimming signals is less than a predetermined tangential remaining percentage.

如申請專利範圍第23項所述之控制一發光元件驅動電路之方法，其中該箝位訊號為一固定值、或是一隨該相切剩餘百分比遞減而線性或非線性遞減之變動值，且該預設之箝位電流值為一隨該相切剩餘百分比遞減而線性或非線性遞減之變動電流值。 The method for controlling a light-emitting element driving circuit according to claim 23, wherein the clamping signal is a fixed value, or a linear or non-linear decreasing variation value as the residual percentage of the tangent decreases. The preset clamp current value is a variable current value that decreases linearly or nonlinearly as the remaining percentage of the tangent decreases.

如申請專利範圍第24項所述之控制一發光元件驅動電路之方法，其中該產生該箝位訊號之步驟包括：根據該整流相切調光訊號產生一相切剩餘百分比編碼；以及以隨該相切剩餘百分比線性或非線性編碼產生該箝位訊號。 The method for controlling a light-emitting element driving circuit according to claim 24, wherein the step of generating the clamp signal comprises: generating a tangent residual percentage code according to the rectified tangent dimming signal; The tangent residual percentage linear or non-linear encoding produces the clamp signal.

如申請專利範圍第24項至第25項任一項所述之控制一發光元件驅動電路之方法，其中該產生該操作訊號之步驟更包括產生一偏移訊號，並以該偏移訊號修正調整該箝位訊號。 The method of controlling a light-emitting device driving circuit according to any one of claims 24 to 25, wherein the step of generating the operation signal further comprises: generating an offset signal and correcting the offset signal by using the offset signal The clamp signal.