TWI579964B - Stacked package device and method for fabricating the same - Google Patents
Stacked package device and method for fabricating the same Download PDFInfo
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- TWI579964B TWI579964B TW104114670A TW104114670A TWI579964B TW I579964 B TWI579964 B TW I579964B TW 104114670 A TW104114670 A TW 104114670A TW 104114670 A TW104114670 A TW 104114670A TW I579964 B TWI579964 B TW I579964B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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Description
本發明係關於一種半導體封裝技術，且特別是關於一種利用三維列印技術製造堆疊封裝裝置的方法。 The present invention relates to a semiconductor package technology, and more particularly to a method of fabricating a stacked package device using a three-dimensional printing technique.
隨著電子產品諸如數位相機、手機以及顯示器需求的增加，半導體技術發展的相當快速，且半導體晶片的尺寸有微縮化(miniaturization)的趨勢，而其功能也變得更為複雜。 With the increasing demand for electronic products such as digital cameras, mobile phones, and displays, semiconductor technology has developed quite rapidly, and the size of semiconductor wafers has a trend of miniaturization, and its functions have become more complicated.
一般來說，半導體晶片內具有包括內連接結構的積體電路，而半導體晶片的表面具有露出的接墊，其與內連接結構電性連接。透過接墊，半導體晶片可連接至外部電路。為了操作上的穩定性，半導體晶片通常置放於一密封的封裝體。 Generally, a semiconductor wafer has an integrated circuit including an internal connection structure, and the surface of the semiconductor wafer has an exposed pad electrically connected to the internal connection structure. The semiconductor wafer can be connected to an external circuit through the pads. For operational stability, the semiconductor wafer is typically placed in a sealed package.
半導體封裝體通常透過打線接合(wire bonding)製程及封裝模塑(encapsulation molding)製程，以形成與外部電路電性連接的堆疊封裝裝置。在打線接合製程中，金屬接線係用以自半導體晶片的接墊連接至外部電路。在進行打線接合製程後，接著進行封裝模塑製程，以保護半導體晶片及接線。 The semiconductor package is typically formed by a wire bonding process and an encapsulation molding process to form a stacked package device electrically connected to an external circuit. In the wire bonding process, the metal wiring is used to connect to the external circuit from the pads of the semiconductor wafer. After the wire bonding process, a package molding process is then performed to protect the semiconductor wafer and wiring.
然而，在進行封裝模塑製程前，金屬接線因暴露於環境中而易發生氧化，導致金屬接線的電阻增加。再者，因半導體晶片微縮化及設計複雜性(design complexity)增加， 導致在進行封裝模塑製程期間，模塑成型材料(molding compound)容易造成金屬接線的偏移、橋接及/或斷裂而降低堆疊封裝裝置的可靠度。因此，有必要尋求一種堆疊封裝裝置之製造方法，其可改善上述的問題。 However, prior to the package molding process, the metal wiring is susceptible to oxidation due to exposure to the environment, resulting in an increase in the resistance of the metal wiring. Furthermore, due to the increase in semiconductor wafer miniaturization and design complexity, This causes the molding compound to easily cause offset, bridging, and/or breakage of the metal wiring during the package molding process to reduce the reliability of the stacked package device. Therefore, it is necessary to find a manufacturing method of a stacked package device which can improve the above problems.
本發明一實施例提供一種堆疊封裝裝置之製造方法，包括：將一第二基底貼附於一第一基底上，其中第一基底具有複數第一接墊，且第二基底具有複數第二接墊；以及進行一三維列印，以形成覆蓋第一基底及第二基底的一封裝層以及形成複數接線於封裝層內，其中每一接線具有一第一部連接於第一接墊的其中一者。 An embodiment of the present invention provides a method of manufacturing a stacked package device, comprising: attaching a second substrate to a first substrate, wherein the first substrate has a plurality of first pads, and the second substrate has a plurality of second pads a pad; and performing a three-dimensional printing to form an encapsulation layer covering the first substrate and the second substrate and forming a plurality of wires in the encapsulation layer, wherein each of the wires has a first portion connected to one of the first pads By.
本發明另一實施例提供一種堆疊封裝裝置，包括：一第一基底，其中第一基底具有複數第一接墊；一第二基底，貼附於一第一基底上，其中第二基底具有複數第二接墊；一封裝層，覆蓋第一基底及第二基底；以及複數接線，位於封裝層內，其中每一接線具有一第一部連接於第一接墊的其中一者；其中封裝層及接線係透過三維列印所使用的材料所構成。 Another embodiment of the present invention provides a stacked package device including: a first substrate, wherein the first substrate has a plurality of first pads; and a second substrate is attached to a first substrate, wherein the second substrate has a plurality of a second pad; an encapsulation layer covering the first substrate and the second substrate; and a plurality of wires disposed in the encapsulation layer, wherein each of the wires has a first portion connected to one of the first pads; wherein the encapsulation layer And the wiring system is made up of materials used in three-dimensional printing.
10‧‧‧三維列印機 10‧‧‧3D printer
10a‧‧‧第一列印噴頭 10a‧‧‧First print head
10b‧‧‧第二列印噴頭 10b‧‧‧Second print head
20‧‧‧三維列印 20‧‧‧3D printing
100‧‧‧第一基底 100‧‧‧ first base
102‧‧‧第一接墊 102‧‧‧First mat
110‧‧‧第二基底 110‧‧‧Second substrate
112‧‧‧第二接墊 112‧‧‧second mat
120‧‧‧封裝層 120‧‧‧Encapsulation layer
122‧‧‧接線 122‧‧‧ wiring
122a‧‧‧第一部 122a‧‧‧ first
122b‧‧‧第二部 122b‧‧‧ second
200、200’‧‧‧堆疊封裝裝置 200, 200'‧‧‧Stacked package
300‧‧‧方法 300‧‧‧ method
301、303‧‧‧步驟 301, 303‧‧ steps
第1A至1B及1B-1圖係繪示出根據本發明不同實施例之堆疊封裝裝置之製造方法剖面示意圖。 1A to 1B and 1B-1 are schematic cross-sectional views showing a manufacturing method of a stacked package device according to various embodiments of the present invention.
第2圖係繪示出根據本發明一實施例之堆疊封裝裝置之製造方法流程圖。 2 is a flow chart showing a method of manufacturing a stacked package device according to an embodiment of the present invention.
以下說明本發明實施例之堆疊封裝裝置之製造方法。然而，可輕易了解本發明所提供的實施例僅用於說明以特定方法製作及使用本發明，並非用以侷限本發明的範圍。 A method of manufacturing the stacked package device of the embodiment of the present invention will be described below. However, the present invention is to be understood as being limited to the details of the present invention.
請參照第1B圖，其繪示出根據本發明一實施例之堆疊封裝裝置剖面示意圖。在本實施例中，堆疊封裝裝置200包括：一第一基底100、一第二基底110、一封裝層120以及複數接線122。在一實施例中，第一基底100包括一印刷電路板、一晶圓、一晶片或其組合。再者，第一基底100具有複數第一接墊102位於其表面上。需注意的是第一接墊102的數量取決於設計需求而不局限於第1B圖所示。此處為簡化圖式，僅繪示出二個第一接墊102。 Please refer to FIG. 1B, which is a cross-sectional view of a stacked package device according to an embodiment of the invention. In this embodiment, the stacked package device 200 includes a first substrate 100, a second substrate 110, an encapsulation layer 120, and a plurality of wires 122. In one embodiment, the first substrate 100 includes a printed circuit board, a wafer, a wafer, or a combination thereof. Furthermore, the first substrate 100 has a plurality of first pads 102 on its surface. It should be noted that the number of first pads 102 depends on the design requirements and is not limited to that shown in FIG. 1B. Here, for the simplified drawing, only two first pads 102 are shown.
第二基底110貼附於第一基底100上。第二基底110的尺寸可相同或小於第一基底100的尺寸。在一實施例中，第二基底110包括一晶圓、一晶片或其組合。再者，第二基底110具有複數第二接墊112位於其表面上。需注意的是第二接墊112的數量取決於設計需求而不局限於第1B圖所示。此處為簡化圖式，僅繪示出對應於第一接墊102的二個第二接墊112。 The second substrate 110 is attached to the first substrate 100. The size of the second substrate 110 may be the same or smaller than the size of the first substrate 100. In an embodiment, the second substrate 110 includes a wafer, a wafer, or a combination thereof. Furthermore, the second substrate 110 has a plurality of second pads 112 on its surface. It should be noted that the number of second pads 112 depends on the design requirements and is not limited to that shown in FIG. 1B. Here, for the simplified drawing, only two second pads 112 corresponding to the first pads 102 are shown.
封裝層110覆蓋第一基底100及第二基底110。再者，接線122位於封裝層120內。在本實施例中，每一接線122具有一第一部122a及一第二部122b，其中接線122的第一部122a連接於第一基底100的第一接墊102的其中一者，而接線122的第二部122b連接於第二基底110的第二接墊112的其中一者。如第1B圖所示，接線122的第一部122a與第二部122b被封裝層120隔開而彼此分離，使接線122的第一部122a與第二部 122b分別具有一端露出於封裝層120。在一實施例中，封裝層120上方可額外設置一晶片或晶圓(未繪示)，且透過晶片或晶圓上的接墊來連接接線122中分離的第一部122a與第二部122b。 The encapsulation layer 110 covers the first substrate 100 and the second substrate 110. Again, the wires 122 are located within the encapsulation layer 120. In this embodiment, each of the wires 122 has a first portion 122a and a second portion 122b, wherein the first portion 122a of the wire 122 is connected to one of the first pads 102 of the first substrate 100, and the wires are connected. The second portion 122b of the 122 is coupled to one of the second pads 112 of the second substrate 110. As shown in FIG. 1B, the first portion 122a and the second portion 122b of the wiring 122 are separated from each other by the encapsulation layer 120, so that the first portion 122a and the second portion of the wiring 122 are separated. Each of 122b has one end exposed to the encapsulation layer 120. In an embodiment, a wafer or a wafer (not shown) may be additionally disposed on the package layer 120, and the first portion 122a and the second portion 122b separated from the wiring 122 are connected through pads on the wafer or the wafer. .
在本實施例中，封裝層120以及接線122係透過三維列印所使用的材料所構成。舉例來說，封裝層120包括適用於三維列印技術的模塑成型(molding compound)材料、陶瓷材料、高分子材料、樹脂材料或介電材料。再者，接線122包括適用於三維列印技術的導電金屬，例如金、銀、銅、鋁或其合金或其他金屬合金。 In the present embodiment, the encapsulation layer 120 and the wiring 122 are formed by using materials used for three-dimensional printing. For example, the encapsulation layer 120 includes a molding compound material, a ceramic material, a polymer material, a resin material, or a dielectric material suitable for three-dimensional printing technology. Further, the wiring 122 includes a conductive metal suitable for three-dimensional printing techniques, such as gold, silver, copper, aluminum or alloys thereof or other metal alloys.
請參照第1B-1圖，其繪示出根據本發明另一實施例之堆疊封裝裝置剖面示意圖，其中相同於第1B圖的部件係使用相同的標號並省略其說明。在本實施例中，堆疊封裝裝置200’的結構相似於第1B圖中堆疊封裝裝置200的結構，不同之處在於堆疊封裝裝置200’中，接線122的第一部122a與第二部122b未被封裝層120隔開而彼此相連，且接線122的第一部122a與第二部122b完全位於封裝層120內而未露出於封裝層120。亦即，封裝層120完全覆蓋接線122的第一部122a與第二部122b。 Referring to FIG. 1B-1, a cross-sectional view of a stacked package device according to another embodiment of the present invention is illustrated, wherein components identical to those of FIG. 1B are given the same reference numerals and the description thereof is omitted. In the present embodiment, the structure of the stacked package device 200' is similar to that of the stacked package device 200 in FIG. 1B, except that in the stacked package device 200', the first portion 122a and the second portion 122b of the wire 122 are not The first and second portions 122a and 122b of the wiring 122 are completely disposed in the encapsulation layer 120 and are not exposed to the encapsulation layer 120. That is, the encapsulation layer 120 completely covers the first portion 122a and the second portion 122b of the wiring 122.
接下來，請參照第1A、1B圖及第2圖，其中第1A及1B圖係繪示出根據本發明一實施例之堆疊封裝裝置之製造方法剖面示意圖，且第2圖係繪示出根據本發明一實施例之堆疊封裝裝置之製造方法300流程圖。在本實施例中，方法300開始於步驟301，提供一第一基底100及一第二基底110，其中第二基底110的尺寸可相同或小於第一基底100的尺寸。此處為簡 化說明，係以第二基底110的尺寸小於第一基底100的尺寸作為範例說明，如第1A圖所示。在一實施例中，第一基底100可為一印刷電路板、一晶圓、一晶片或其組合。第一基底100可具有複數第一接墊102位於其表面上。再者，第二基底110包括一晶圓、一晶片或其組合。相似地，第二基底110具有複數第二接墊112位於其表面上。需注意的是第一接墊102以及第二接墊112的數量取決於設計需求而不局限於第1A圖所示。此處為簡化圖式，僅繪示出二個第一接墊102以及對應於第一接墊102的二個第二接墊112。 Next, please refer to FIGS. 1A, 1B and 2, wherein FIGS. 1A and 1B are schematic cross-sectional views showing a manufacturing method of a stacked package device according to an embodiment of the present invention, and FIG. 2 is a diagram showing A flowchart of a method 300 of manufacturing a stacked package device in accordance with an embodiment of the present invention. In the present embodiment, the method 300 begins in step 301 by providing a first substrate 100 and a second substrate 110, wherein the second substrate 110 may be the same size or smaller than the size of the first substrate 100. Here is Jane The description is made by taking the size of the second substrate 110 smaller than the size of the first substrate 100 as an example, as shown in FIG. 1A. In an embodiment, the first substrate 100 can be a printed circuit board, a wafer, a wafer, or a combination thereof. The first substrate 100 can have a plurality of first pads 102 on its surface. Furthermore, the second substrate 110 comprises a wafer, a wafer or a combination thereof. Similarly, the second substrate 110 has a plurality of second pads 112 on its surface. It should be noted that the number of the first pads 102 and the second pads 112 depends on the design requirements and is not limited to the one shown in FIG. 1A. Here, for the simplified drawing, only two first pads 102 and two second pads 112 corresponding to the first pads 102 are shown.
接著，仍請參照第1A及2圖，將第二基底110貼附於第一基底100上。舉例來說，可於第一基底100的上表面或於第二基底110的下表面形成一黏著層(未繪示)，再透過黏著層使第二基底110貼附於第一基底100上。 Next, please refer to FIGS. 1A and 2 to attach the second substrate 110 to the first substrate 100. For example, an adhesive layer (not shown) may be formed on the upper surface of the first substrate 100 or on the lower surface of the second substrate 110, and the second substrate 110 may be attached to the first substrate 100 through the adhesive layer.
接著，請參照第1B及2圖，進行步驟303，透過一三維列印機10進行一三維列印20，以形成覆蓋第一基底100以及第二基底110的一封裝層120，且形成複數接線122於封裝層120內。在本實施例中，在三維列印20之後，可同時形成封裝層120以及接線122。舉例來說，在進行三維列印20期間，三維列印機10利用第一列印噴頭10a來形成封裝層120，而利用第二列印噴頭10b來形成接線122。也就是說，用以進行三維列印20的三維列印機10具有至少二個列印噴頭，使三維列印20進行期間同時形成至少二種不同的材料。 Next, referring to FIGS. 1B and 2, step 303 is performed to perform a three-dimensional printing 20 through a three-dimensional printer 10 to form an encapsulation layer 120 covering the first substrate 100 and the second substrate 110, and forming a plurality of wirings. 122 is within the encapsulation layer 120. In the present embodiment, after the three-dimensional printing 20, the encapsulation layer 120 and the wiring 122 can be simultaneously formed. For example, during three-dimensional printing 20, three-dimensional printer 10 utilizes first print head 10a to form package layer 120, while second print head 10b utilizes second print head 10b to form wire 122. That is, the three-dimensional printer 10 for performing the three-dimensional printing 20 has at least two printing heads for simultaneously forming at least two different materials during the three-dimensional printing 20.
在本實施例中，封裝層120包括模塑成型材料、陶瓷材料、高分子材料、樹脂材料或介電材料。再者，接線122 包括導電金屬，例如金、銀、銅、鋁或其合金或其他金屬合金。 In the present embodiment, the encapsulation layer 120 includes a molding material, a ceramic material, a polymer material, a resin material, or a dielectric material. Furthermore, the wiring 122 Included are conductive metals such as gold, silver, copper, aluminum or alloys thereof or other metal alloys.
在本實施例中，形成於封裝層120內的每一接線122具有一第一部122a及一第二部122b，其中接線122的第一部122a連接於第一基底100的第一接墊102的其中一者，而接線122的第二部122b連接於第二基底110的第二接墊112的其中一者。在本實施例中，可透過調整三維列印20的列印程式，使形成的封裝層120具有所需的厚度，且接線122的第一部122a與第二部122b被封裝層120隔開而彼此分離，使接線122的第一部122a與第二部122b分別具有一端露出於封裝層120。如此一來，便完成堆疊封裝裝置200的製造，如第1B圖所示。 In this embodiment, each of the wires 122 formed in the encapsulation layer 120 has a first portion 122a and a second portion 122b, wherein the first portion 122a of the wire 122 is connected to the first pad 102 of the first substrate 100. One of the second portions 122b of the wiring 122 is connected to one of the second pads 112 of the second substrate 110. In this embodiment, the printed package layer 120 can be formed to have a desired thickness by adjusting the printing process of the three-dimensional print 20, and the first portion 122a of the wiring 122 and the second portion 122b are separated by the encapsulation layer 120. Separated from each other, the first portion 122a and the second portion 122b of the wiring 122 have one end exposed to the encapsulation layer 120, respectively. In this way, the manufacture of the stacked package device 200 is completed, as shown in FIG. 1B.
在本實施例中，封裝層120上方可額外貼附一晶片或晶圓(未繪示)，且透過晶片或晶圓上的接墊來連接接線122中分離的第一部122a與第二部122b。可以理解的是由於形成的接線122具有彼此分離且露出於封裝層120表面的第一部122a與第二部122b。因此，無須再藉由任何研磨製程(例如，化學機械研磨)來使位於封裝層120內的接線122露出於其表面。 In this embodiment, a wafer or a wafer (not shown) may be additionally attached over the encapsulation layer 120, and the first portion 122a and the second portion separated from the wiring 122 are connected through pads on the wafer or the wafer. 122b. It can be understood that the formed wiring 122 has the first portion 122a and the second portion 122b which are separated from each other and exposed on the surface of the encapsulation layer 120. Therefore, it is no longer necessary to expose the wiring 122 located in the encapsulation layer 120 to the surface thereof by any polishing process (for example, chemical mechanical polishing).
另外，請參照第1A、1B-1圖及第2圖，其中第1A及1B-1圖係繪示出根據本發明另一實施例之堆疊封裝裝置之製造方法剖面示意圖，且第2圖係繪示出根據本發明一實施例之堆疊封裝裝置之製造方法300流程圖。在本實施例中，在進行方法300中的步驟301(如第1A及2圖所示)之後，可透過方法300中的步驟303形成如第1B-1圖所示的封裝層120及複數接線122而完成堆疊封裝裝置200’的製作。不同於第1B圖的實施例，在本實施例中，可透過調整三維列印20的可透過調整三維 列印20的列印程式，使形成的封裝層120除了覆蓋第一基底100及第二基底110之外，還完全覆蓋接線122。再者，接線122的第一部122a與第二部122b未被封裝層120隔開而彼此相連並分別連接於第一接墊102以及第二接墊112。 1A, 1B-1, and 2, wherein FIGS. 1A and 1B-1 are schematic cross-sectional views showing a method of fabricating a stacked package device according to another embodiment of the present invention, and FIG. A flow chart of a method 300 of fabricating a stacked package device in accordance with an embodiment of the present invention is shown. In this embodiment, after performing step 301 in the method 300 (as shown in FIGS. 1A and 2), the encapsulation layer 120 and the plurality of wirings as shown in FIG. 1B-1 can be formed through step 303 in the method 300. The fabrication of the stacked package device 200' is completed 122. Different from the embodiment of FIG. 1B, in this embodiment, the three-dimensional print 20 can be adjusted to adjust the three-dimensionality. The printing program of the printing 20 is such that the formed encapsulation layer 120 completely covers the wiring 122 in addition to the first substrate 100 and the second substrate 110. Moreover, the first portion 122a and the second portion 122b of the wire 122 are not separated from each other by the encapsulation layer 120 and are connected to each other and connected to the first pad 102 and the second pad 112, respectively.
根據上述實施例，由於封裝層以及接線係透過三維列印製作而成，因此可有效縮短堆疊封裝裝置的製造時間。再者，接線材料的選擇彈性大，無須受限於延展性佳的材料。另外，由於封裝層以及接線可透過三維列印而同時形成，因此可避免接線氧化或發生偏移、橋接及/或斷裂，進而提升堆疊封裝裝置的可靠度。再者，相較於傳統的打線接合及封裝模塑製程，利用三維列印製作封裝層以及接線可有效簡化製程步驟及降低製造成本。 According to the above embodiment, since the package layer and the wiring system are fabricated by three-dimensional printing, the manufacturing time of the stacked package device can be effectively shortened. Furthermore, the choice of wiring materials is flexible and does not have to be limited to materials with good ductility. In addition, since the encapsulation layer and the wiring can be simultaneously formed by three-dimensional printing, the wiring can be prevented from being oxidized or offset, bridged, and/or broken, thereby improving the reliability of the stacked package device. Furthermore, the use of three-dimensional printing to form the encapsulation layer and wiring can simplify the process steps and reduce the manufacturing cost compared to the conventional wire bonding and package molding processes.
雖然本發明已以較佳實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can be modified and retouched without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.
300‧‧‧方法 300‧‧‧ method
301、303‧‧‧步驟 301, 303‧‧ steps
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| US20150021628A1 (en) * | 2013-07-16 | 2015-01-22 | Cree, Inc. | Solid state lighting devices and fabrication methods including deposited light-affecting elements |
| US20150091118A1 (en) * | 2011-05-03 | 2015-04-02 | Tessera, Inc. | Package-on-package assembly with wire bonds to encapsulation surface |
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| US20150091118A1 (en) * | 2011-05-03 | 2015-04-02 | Tessera, Inc. | Package-on-package assembly with wire bonds to encapsulation surface |
| US20150021628A1 (en) * | 2013-07-16 | 2015-01-22 | Cree, Inc. | Solid state lighting devices and fabrication methods including deposited light-affecting elements |
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