TWI571533B - Novel metal-plating structure having characteristic of whisker mitigation - Google Patents
Novel metal-plating structure having characteristic of whisker mitigation Download PDFInfo
- Publication number
- TWI571533B TWI571533B TW104107243A TW104107243A TWI571533B TW I571533 B TWI571533 B TW I571533B TW 104107243 A TW104107243 A TW 104107243A TW 104107243 A TW104107243 A TW 104107243A TW I571533 B TWI571533 B TW I571533B
- Authority
- TW
- Taiwan
- Prior art keywords
- whisker
- tin
- plating structure
- layer
- substrate
- Prior art date
Links
Landscapes
- Electroplating Methods And Accessories (AREA)
Description
本發明係關於焊錫材料之相關領域,尤指一種可抑制錫鬚晶生長的新穎鍍層結構。 The invention relates to the related field of solder materials, in particular to a novel plating structure capable of suppressing the growth of whisker crystals.
在目前的電子元件封裝技術中,主要是以銅或鐵鎳合金作為晶片與印刷電路板之間電性連接的導線架,由於這兩種導線架材料與印刷電路板之間的接合狀況不佳,因此就需要在導線架表面披覆銲錫鍍層,以協助導線架和印刷電路板之間的接合作用。 In the current electronic component packaging technology, copper or iron-nickel alloy is mainly used as a lead frame electrically connected between the wafer and the printed circuit board, because the bonding between the two lead frame materials and the printed circuit board is not good. Therefore, it is necessary to coat the surface of the lead frame with a solder plating to assist the bonding between the lead frame and the printed circuit board.
傳統上是以錫鉛合金做為導線架表面披覆的銲錫鍍層;然而,由於鉛具毒性且不利於環保,因此目前多以無鉛銲料取代傳統的錫鉛銲料。可惜的是,無鉛銲料在室溫下會產生自發性的錫鬚晶(tin whisker)生長;並且,當錫鬚晶成長到一定長度,其將會連接導線架的兩個相鄰的引腳,而導致短路現象發生,並且在錫鬚晶成長至接近兩個相鄰引腳之間距時,就會有尖端放電的現象產生,而其所產生的火花會導致封裝的電子元件失效。 Traditionally, tin-lead alloy is used as a solder coating for the surface of the lead frame; however, since lead is toxic and environmentally friendly, conventional tin-lead solder is currently replaced by lead-free solder. Unfortunately, lead-free solders produce spontaneous whisker growth at room temperature; and, when the whisker crystals grow to a certain length, they will connect the two adjacent pins of the leadframe. As a result of the short circuit, and when the whisker crystal grows close to the distance between two adjacent pins, there is a phenomenon of tip discharge, and the spark generated by it causes the electronic components of the package to fail.
雷有鑑於此,一種抑制錫鬚晶生長的方法係被提出。請參閱第一圖,係習用的一種抑制錫鬚晶生長的方法的流程圖;並且,請同時參閱第二圖,係由抑制錫鬚晶生長的方法所製成的一多層材料結構的示意圖。該抑制錫鬚晶生長的方法主要包括以下3個步驟。 In view of this, a method for suppressing the growth of whisker crystals has been proposed. Please refer to the first figure, which is a flow chart of a method for suppressing the growth of tin whisker crystals; and, referring to the second figure, a schematic diagram of a multilayer material structure made by a method for suppressing whisker crystal growth. . The method for suppressing whisker crystal growth mainly includes the following three steps.
如第一圖與第二圖所示,首先,該方法係執行步驟(S01’),提供一鐵鎳合金基材202’;其中,該鐵鎳合金基材202’所含有的鎳的重量百分比係介於42wt%至60wt%之間。接著,係執行步驟(S02’),在該鐵鎳合金基材202’的表面上形成一鎳層204’,且該鎳層204’的厚度係介於1μm至2μm之間。最後,係執行步驟(S03’),在該鎳層204’上形成一錫層206’,其中該鎳層204’的厚度係介於3μm至20μm之間;如此,該鎳層204’係可抑制應力於錫層206’之中產生,藉此方式進一步地抑制該錫層206’的錫鬚晶的生長,進而避免錫鬚晶於該錫層206’之表面上產生。 As shown in the first and second figures, firstly, the method performs the step (S01') to provide an iron-nickel alloy substrate 202'; wherein the iron-nickel alloy substrate 202' contains nickel by weight The system is between 42 wt% and 60 wt%. Next, a step (S02') is performed to form a nickel layer 204' on the surface of the iron-nickel alloy substrate 202', and the thickness of the nickel layer 204' is between 1 μm and 2 μm. Finally, a step (S03') is performed to form a tin layer 206' on the nickel layer 204', wherein the thickness of the nickel layer 204' is between 3 μm and 20 μm; thus, the nickel layer 204' is The suppression stress is generated in the tin layer 206', thereby further suppressing the growth of the whisker crystal of the tin layer 206', thereby preventing the whisker crystal from being generated on the surface of the tin layer 206'.
經由上述之方法,吾人可以得知的是,藉由在銅/錫介面中置入一層厚度介於3μm至20μm之間的電鍍鎳層作為中間層(underlayer),係的確可以有效防止錫鬚晶於錫表面之上產生。然而,另一方面,吾人必須考慮的是,電鍍製程所產生的廢料係有害於環境的;此外,厚度最高達20μm電鍍鎳層亦會早成電子元件封裝的整體成本的增加。 According to the above method, it can be known that by placing an electroplated nickel layer having a thickness between 3 μm and 20 μm as an underlayer in the copper/tin interface, the tin whisker can be effectively prevented. Produced on the surface of the tin. However, on the other hand, we must consider that the waste generated by the electroplating process is harmful to the environment; in addition, the electroplated nickel layer up to 20 μm thick will also increase the overall cost of the electronic component package.
因此,有鑑於習用的抑制錫鬚晶生長的方法仍具有缺點與不足,本案之發明人係極力加以研究發明,終於研發完成本發明之一種可抑制錫鬚晶生長的新穎鍍層結構。 Therefore, in view of the drawbacks and disadvantages of the conventional method for suppressing the growth of whisker crystals, the inventors of the present invention have vigorously studied and invented, and finally developed a novel plating structure of the present invention which can suppress the growth of whisker crystals.
本發明之主要目的,在於提供一種可抑制錫鬚晶生長的新穎鍍層結構,主要係由一錫鬚晶抑制層與一錫層所構成;其中,本發明係以鎳-鈷-鈀合金或鎳-鈀合金製成該錫鬚晶抑制層。由實驗資料證明,所述錫鬚晶抑制層的確能夠有效抑制自錫層所伸出的錫鬚晶之生長;因此,本發明所提出的新穎鍍層結構係能夠取代習用的抑制錫鬚晶生長的方法,進而有效地改善銅/錫介面之間的相互反應及錫鬚晶的生成。 The main object of the present invention is to provide a novel plating structure capable of suppressing the growth of whisker crystals, mainly composed of a tin whisker inhibiting layer and a tin layer; wherein the present invention is a nickel-cobalt-palladium alloy or nickel. A palladium alloy is used to form the tin whisker suppression layer. It is proved by experimental data that the tin whisker suppression layer can effectively suppress the growth of whisker crystals protruding from the tin layer; therefore, the novel plating structure proposed by the present invention can replace the conventional suppression of whisker crystal growth. The method further effectively improves the mutual reaction between the copper/tin interface and the formation of whisker crystals.
因此,為了達成本發明之主要目的,本案之發明人提出一種可抑制錫鬚晶生長的新穎鍍層結構,係包括:一錫鬚晶抑制層,係形成於該基材之上;以及一錫層,係形成於該錫鬚晶抑制層之上;其中,該錫鬚晶抑制層為一鎳-鈷-鈀合金,且該鎳-鈷-鈀合金之成分組成為(A)Ni-(B)Co-(C)Pd;並且,A表示為(100-1.5-0.5-x-y)wt%,B表示為(1.5+x)wt%,且C表示為(0.5+y)wt%; 其中,x的值係介於0至1.5之間,且y的值係介於0至1.0%之間。 Therefore, in order to achieve the main object of the present invention, the inventors of the present invention have proposed a novel plating structure capable of suppressing the growth of whisker crystals, comprising: a tin whisker suppression layer formed on the substrate; and a tin layer Formed on the tin whisker suppression layer; wherein the tin whisker suppression layer is a nickel-cobalt-palladium alloy, and the composition of the nickel-cobalt-palladium alloy is (A)Ni-(B) Co-(C)Pd; and, A represents (100-1.5-0.5-xy) wt%, B represents (1.5+x) wt%, and C represents (0.5+y) wt%; Wherein, the value of x is between 0 and 1.5, and the value of y is between 0 and 1.0%.
並且,為了達成本發明之主要目的,本案之發明人提出一種可抑制錫鬚晶生長的新穎鍍層結構之另一實施例,係包括:一錫鬚晶抑制層,係形成於該基材之上;以及一錫層,係形成於該錫鬚晶抑制層之上;其中,該錫鬚晶抑制層為一鎳-鈷-鈀合金,且該鎳-鈷-鈀合金之成分組成為(A)Ni-(C)Pd;並且,A表示為(100-1.5-z)wt%,且C表示為(1.5+z)wt%;其中,z的值係介於0至1.5之間。 Moreover, in order to achieve the main object of the present invention, the inventors of the present invention have proposed another embodiment of a novel plating structure capable of suppressing whisker crystal growth, comprising: a tin whisker suppression layer formed on the substrate And a tin layer formed on the tin whisker suppression layer; wherein the tin whisker suppression layer is a nickel-cobalt-palladium alloy, and the composition of the nickel-cobalt-palladium alloy is (A) Ni-(C)Pd; and, A represents (100-1.5-z) wt%, and C represents (1.5+z) wt%; wherein z has a value between 0 and 1.5.
1‧‧‧新穎鍍層結構 1‧‧‧New plating structure
10‧‧‧基材 10‧‧‧Substrate
11‧‧‧錫鬚晶抑制層 11‧‧‧ tin whisker suppression layer
12‧‧‧錫層 12‧‧‧ tin layer
10a‧‧‧外部導電基材 10a‧‧‧External conductive substrate
101‧‧‧附著力改善層 101‧‧‧Adhesion improvement layer
201’~203’‧‧‧方法步驟 201’~203’‧‧‧ method steps
202’‧‧‧鐵鎳合金基材 202'‧‧‧Iron Nickel Alloy Substrate
204’‧‧‧鎳層 204'‧‧‧ Nickel
206’‧‧‧錫層 206’‧‧‧ tin layer
第一圖為習用的一種抑制錫鬚晶生長的方法的流程圖;第二圖為經由該抑制錫鬚晶生長的方法所製成的一多層材料結構的示意圖;第三圖係本發明之一種可抑制錫鬚晶生長的新穎鍍層結構之示意性剖視圖;第四圖係本發明之新穎鍍層結構之第二示意性剖視圖;以及 第五圖係新穎鍍層結構之掃描式電子顯微鏡影像圖。 The first figure is a flow chart of a conventional method for suppressing whisker crystal growth; the second figure is a schematic diagram of a multilayer material structure produced by the method for suppressing whisker crystal growth; A schematic cross-sectional view of a novel plating structure capable of suppressing whisker crystal growth; and a fourth schematic view showing a second schematic cross-sectional view of the novel plating structure of the present invention; The fifth figure is a scanning electron microscope image of a novel plating structure.
為了能夠更清楚地描述本發明所提出之一種可抑制錫鬚晶生長的新穎鍍層結構,以下將配合圖式,詳盡說明本發明之較佳實施例。 In order to more clearly describe the novel plating structure proposed by the present invention which can suppress the growth of whisker crystals, the preferred embodiments of the present invention will be described in detail below with reference to the drawings.
請參閱第三圖,係本發明之一種可抑制錫鬚晶生長的新穎鍍層結構之示意性剖視圖。如第三圖所示,本發明之新穎鍍層結構1係形成於一基材10之上,並且其結構上係包括形成於該基材10之上的一錫鬚晶抑制層11以及形成於該錫鬚晶抑制層11之上的一錫層12。於此新穎鍍層結構1之中,所述的錫鬚晶抑制層11係為一鎳-鈷-鈀合金,且該鎳-鈷-鈀合金之成分組成為(A)Ni-(B)Co-(C)Pd;其中,A表示為(100-1.5-0.5-x-y)wt%,B表示為(1.5+x)wt%,且C表示為(0.5+y)wt%。於此,x的值係介於0至1.5之間,且y的值係介於0至1.0%之間。 Please refer to the third drawing, which is a schematic cross-sectional view of a novel plating structure of the present invention which can suppress whisker crystal growth. As shown in the third figure, the novel plating structure 1 of the present invention is formed on a substrate 10, and structurally includes a tin whisker suppression layer 11 formed on the substrate 10 and formed thereon. A tin layer 12 above the tin whisker suppression layer 11. In the novel plating structure 1, the tin whisker inhibiting layer 11 is a nickel-cobalt-palladium alloy, and the composition of the nickel-cobalt-palladium alloy is (A) Ni-(B)Co- (C) Pd; wherein A represents (100-1.5-0.5-xy) wt%, B represents (1.5+x) wt%, and C represents (0.5+y) wt%. Here, the value of x is between 0 and 1.5, and the value of y is between 0 and 1.0%.
眾所周知的是,在目前的半導體製程技術與電子元件封裝技術中,主要係以導電性金屬來作為焊接金屬墊或晶片與印刷電路板之間電性連接的導線架;因此,前述之基材10指的是導線架或者矽晶圓,亦即,基材10之材質可以是矽、銅、銅合金、鐵、鐵合金、金、或者金合金。另外,基材10也可以是指形成於矽晶圓、導線架、或印 刷電路板之上的導電金屬。因此,於本發明中,又將矽晶圓、導線架、或印刷電路板稱之為外部導電基材10a(如第三圖所示)。 It is well known that in the current semiconductor process technology and electronic component packaging technology, a conductive metal is mainly used as a lead frame for soldering a metal pad or an electrical connection between a wafer and a printed circuit board; therefore, the aforementioned substrate 10 Refers to the lead frame or the germanium wafer, that is, the material of the substrate 10 may be tantalum, copper, copper alloy, iron, iron alloy, gold, or gold alloy. In addition, the substrate 10 may also be formed on a germanium wafer, a lead frame, or a stamp. Brush the conductive metal above the board. Therefore, in the present invention, the germanium wafer, the lead frame, or the printed circuit board is referred to as an outer conductive substrate 10a (as shown in the third figure).
請繼續參閱第四圖,係本發明之新穎鍍層結構之第二示意性剖視圖。如第四圖所示,製程上通常會於基材10與外部導電基材10a間形成一附著力改善層101,例如於金屬銅與矽晶圓之間形成一鈦層,以藉此附著力改善層101增加金屬材質之基材10(例如銅)與外部導電基材10a間附著力。並且,除了金屬鈦之外,該附著力改善層101也可以由金屬鉬或者金屬鉻製成。 Please refer to the fourth figure for a second schematic cross-sectional view of the novel plating structure of the present invention. As shown in the fourth figure, an adhesion improving layer 101 is usually formed between the substrate 10 and the outer conductive substrate 10a, for example, a titanium layer is formed between the metal copper and the germanium wafer to thereby adhere thereto. The improvement layer 101 increases the adhesion between the metal substrate 10 (for example, copper) and the external conductive substrate 10a. Also, the adhesion improving layer 101 may be made of metal molybdenum or metallic chromium in addition to titanium metal.
於此,必須特別說明的是,雖然上述說明指出所述錫鬚晶抑制層11為一鎳-鈷-鈀合金,但並非以此限制本發明之可能實施態樣。在其它可能的應用中,亦可以鎳-鈀合金作為該錫鬚晶抑制層11,並且該錫鬚晶抑制層11的成分組成為(A)Ni-(C)Pd;其中,A表示為(100-1.5-z)wt%,且C表示為(1.5+z)wt%。於此,z的值係介於0至1.5之間。 Here, it must be particularly noted that although the above description indicates that the whisker suppressing layer 11 is a nickel-cobalt-palladium alloy, it is not intended to limit the possible embodiments of the present invention. In other possible applications, a nickel-palladium alloy may also be used as the tin whisker suppression layer 11, and the composition of the whisker suppression layer 11 is (A) Ni-(C)Pd; wherein A is expressed as ( 100-1.5-z) wt%, and C is expressed as (1.5 + z) wt%. Here, the value of z is between 0 and 1.5.
如此,上述係清楚說明本發明之可抑制錫鬚晶生長的新穎鍍層結構1之構成及其成分組成。繼續地,以下將說明所述新穎鍍層結構之可行性。請參閱第五圖,係新穎鍍層結構1之掃描式電子顯微鏡影像圖。其中,第五圖之影像(a)-(h)係為不同 成分組成之新穎鍍層結構1的SEM影像,整理如下列表(一)所示。 Thus, the above-mentioned system clearly demonstrates the constitution and composition of the novel plating structure 1 of the present invention which can suppress whisker crystal growth. Continuing, the feasibility of the novel plating structure will be explained below. Please refer to the fifth figure, which is a scanning electron microscope image of the novel plating structure 1. Among them, the images (a)-(h) of the fifth figure are different. The SEM image of the novel coating structure 1 of the composition is shown in the following list (1).
由影像(a)-影像(d)可以發現,相較於純鎳製成之錫鬚晶抑制層11,由鎳-鈀合金所製成的錫鬚晶抑制層11能有效抑制錫鬚晶自該錫層12伸出,並且,抑制錫鬚晶生長之效果係隨著鈀的重量百分比之提升(由0.5wt%~3.0wt%)而增加。進一步地,由影像(e)-影像(h)可以發現,由鎳-鈷-鈀合金所製成的錫鬚晶抑制層11係同樣能夠有效抑制錫鬚晶自該錫層 12伸出;並且,在固定鈀的重量百分比的情況下,抑制錫鬚晶生長之效果係隨著鈷的重量百分比之提升(由0.5wt%~3.0wt%)而增加。 From the image (a)-image (d), it can be found that the tin whisker suppression layer 11 made of a nickel-palladium alloy can effectively suppress tin whisker crystals compared to the tin whisker suppression layer 11 made of pure nickel. The tin layer 12 is extended, and the effect of suppressing whisker crystal growth increases as the weight percentage of palladium increases (from 0.5 wt% to 3.0 wt%). Further, it can be found from the image (e)-image (h) that the tin whisker suppression layer 11 made of the nickel-cobalt-palladium alloy can also effectively suppress the tin whisker crystal from the tin layer. 12 is extended; and, in the case of fixing the weight percentage of palladium, the effect of suppressing whisker crystal growth increases as the weight percentage of cobalt increases (from 0.5 wt% to 3.0 wt%).
如此,透過上述所呈現的各種實驗數據,吾人可以進一步地得知本發明最主要的優點在於:本發明係以鎳-鈷-鈀合金或鎳-鈀合金製成該錫鬚晶抑制層;並且,由實驗資料證明,所述錫鬚晶抑制層的確能夠有效抑制自錫層所伸出的錫鬚晶之生長;因此,本發明所提出的新穎鍍層結構係能夠取代習用的抑制錫鬚晶生長的方法,進而有效地改善銅/錫介面之間的相互反應及錫鬚晶的生成。 Thus, through the various experimental data presented above, we can further understand that the most important advantage of the present invention is that the present invention is made of a tin-cobalt-palladium alloy or a nickel-palladium alloy to form the tin whisker suppression layer; It is proved by experimental data that the tin whisker suppression layer can effectively suppress the growth of whisker crystals protruding from the tin layer; therefore, the novel plating structure proposed by the present invention can replace the conventional suppression of whisker crystal growth. The method further effectively improves the mutual reaction between the copper/tin interface and the formation of whisker crystals.
必須加以強調的是,上述之詳細說明係針對本發明可行實施例之具體說明,惟該實施例並非用以限制本發明之專利範圍,凡未脫離本發明技藝精神所為之等效實施或變更,均應包含於本案之專利範圍中。 It is to be understood that the foregoing detailed description of the embodiments of the present invention is not intended to Both should be included in the scope of the patent in this case.
1‧‧‧新穎鍍層結構 1‧‧‧New plating structure
10‧‧‧基材 10‧‧‧Substrate
11‧‧‧錫鬚晶抑制層 11‧‧‧ tin whisker suppression layer
12‧‧‧錫層 12‧‧‧ tin layer
10a‧‧‧外部導電基材 10a‧‧‧External conductive substrate
Claims (4)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW104107243A TWI571533B (en) | 2015-03-06 | 2015-03-06 | Novel metal-plating structure having characteristic of whisker mitigation |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW104107243A TWI571533B (en) | 2015-03-06 | 2015-03-06 | Novel metal-plating structure having characteristic of whisker mitigation |
Publications (2)
Publication Number | Publication Date |
---|---|
TW201632658A TW201632658A (en) | 2016-09-16 |
TWI571533B true TWI571533B (en) | 2017-02-21 |
Family
ID=57443174
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW104107243A TWI571533B (en) | 2015-03-06 | 2015-03-06 | Novel metal-plating structure having characteristic of whisker mitigation |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI571533B (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5384204A (en) * | 1990-07-27 | 1995-01-24 | Shinko Electric Industries Co. Ltd. | Tape automated bonding in semiconductor technique |
-
2015
- 2015-03-06 TW TW104107243A patent/TWI571533B/en not_active IP Right Cessation
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5384204A (en) * | 1990-07-27 | 1995-01-24 | Shinko Electric Industries Co. Ltd. | Tape automated bonding in semiconductor technique |
Also Published As
Publication number | Publication date |
---|---|
TW201632658A (en) | 2016-09-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4431606B2 (en) | Semiconductor device, semiconductor device mounting method, and semiconductor device mounting structure | |
JP6432466B2 (en) | Bonded body, power module substrate with heat sink, heat sink, method for manufacturing bonded body, method for manufacturing power module substrate with heat sink, and method for manufacturing heat sink | |
TWI618798B (en) | Lead-free solder alloy | |
JP5679094B1 (en) | Lead-free solder alloy | |
WO2016031754A1 (en) | Assembly, power-module substrate provided with heat sink, heat sink, method for manufacturing assembly, method for manufacturing power-module substrate provided with heat sink, and method for manufacturing heat sink | |
US7642130B2 (en) | Manufacturing method of wiring substrate | |
JP2008506038A (en) | Electronic component having a tin rich deposit layer and process for depositing a tin rich deposit layer | |
JP6119911B1 (en) | Solder alloys, solder balls and solder joints | |
US9233521B2 (en) | Tin whisker mitigation material using thin film metallic glass underlayer | |
TWI571533B (en) | Novel metal-plating structure having characteristic of whisker mitigation | |
TWI364342B (en) | Whisker-free coating structure and method of fabricating the same | |
JP6031784B2 (en) | Power module substrate and manufacturing method thereof | |
TWI621738B (en) | Novel metal-plating structure having characteristic of whisker mitigation | |
TW201114952A (en) | Method for inhibiting growth of tin whiskers | |
TWI415978B (en) | Method for inhibiting growth of tin whiskers | |
JP6931869B2 (en) | Semiconductor device | |
JP4324032B2 (en) | Flexible printed circuit board having component mounting portion and electrolytic plating method | |
JP2007329224A (en) | Coil component | |
JP4046642B2 (en) | Metal materials for electronic parts that prevent whisker generation | |
JP2017175061A (en) | Heat Resistant Ceramic Circuit Board | |
TWI405876B (en) | Method for inhibiting growth of tin whiskers | |
JP4307038B2 (en) | Method for producing metal material for electronic parts which prevents whisker generation during use | |
JP2007059681A (en) | Printed circuit board and its manufacturing method | |
WO2013172155A1 (en) | Metal coating film and electronic component provided with metal coating film | |
JP4935755B2 (en) | Manufacturing method of electronic parts |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |