TWI567212B - A Method for Preparing High Temperature Creep Grounding Substrate for Semiconductor Equipment by PVD - Google Patents
A Method for Preparing High Temperature Creep Grounding Substrate for Semiconductor Equipment by PVD Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims description 52
- 238000000034 method Methods 0.000 title claims description 35
- 239000004065 semiconductor Substances 0.000 title claims description 29
- 238000005240 physical vapour deposition Methods 0.000 claims description 33
- 238000000576 coating method Methods 0.000 claims description 28
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 24
- 239000011248 coating agent Substances 0.000 claims description 24
- 229910052782 aluminium Inorganic materials 0.000 claims description 21
- 229910052751 metal Inorganic materials 0.000 claims description 15
- 239000002184 metal Substances 0.000 claims description 15
- 238000000151 deposition Methods 0.000 claims description 8
- 230000008021 deposition Effects 0.000 claims description 8
- 238000001771 vacuum deposition Methods 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 6
- 229910052799 carbon Inorganic materials 0.000 claims description 4
- 239000010935 stainless steel Substances 0.000 claims description 4
- 229910001220 stainless steel Inorganic materials 0.000 claims description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 3
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 claims description 3
- 229910000990 Ni alloy Inorganic materials 0.000 claims description 3
- 229910000831 Steel Inorganic materials 0.000 claims description 3
- 238000005498 polishing Methods 0.000 claims description 3
- 239000010959 steel Substances 0.000 claims description 3
- 238000005516 engineering process Methods 0.000 claims description 2
- 238000004140 cleaning Methods 0.000 claims 1
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 8
- 229910052759 nickel Inorganic materials 0.000 description 4
- 229910045601 alloy Inorganic materials 0.000 description 3
- 239000000956 alloy Substances 0.000 description 3
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 238000010288 cold spraying Methods 0.000 description 2
- 238000005530 etching Methods 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000002360 preparation method Methods 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000003912 environmental pollution Methods 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 229910021645 metal ion Inorganic materials 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
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- H01L21/28044—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer
- H01L21/28061—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities the conductor comprising at least another non-silicon conductive layer the conductor comprising a metal or metal silicide formed by deposition, e.g. sputter deposition, i.e. without a silicidation reaction
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- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
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- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
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- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
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- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
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Description
本發明屬於一種製備半導體裝備用抗高溫蠕變接地基片的方法，具體是關於一種PVD製備半導體裝備用抗高溫蠕變接地基片的方法。 The invention belongs to a method for preparing a high temperature resistant creep grounding substrate for semiconductor equipment, in particular to a method for preparing a high temperature resistant creep grounding substrate for semiconductor equipment by PVD.
半導體裝備中的接地基片處於高溫等離子輻射和氟化物氣體共同作用環境，不僅要求其具有良好的導電性能，而且對其抗高溫蠕變性也提出了越來越高的要求。 The grounding substrate in semiconductor equipment is in a high-temperature plasma radiation and fluoride gas interaction environment, which not only requires good electrical conductivity, but also puts higher and higher requirements on its high temperature creep resistance.
純鋁材料是半導體裝備、尤其是大型積體電路裝備中理想的導電材料，這主要是因為鋁除了具有良好的導電性外，在積體電路刻蝕、光刻以及鍍膜等工藝過程中對元器件的污染最小。但是鋁的熔點較低，只能在較低溫度下(300℃以下)使用，隨著工藝優化設計的要求，接地基片所處腔室的溫度不斷提高，已超過350℃，且還在提高，甚至超過400℃，此時純鋁材料本身已無法滿足使用要求。 Pure aluminum material is an ideal conductive material in semiconductor equipment, especially large integrated circuit equipment. This is mainly because aluminum has good conductivity, and it is in the process of integrated circuit etching, photolithography and coating. The device is least polluted. However, aluminum has a lower melting point and can only be used at lower temperatures (below 300 ° C). With the optimization of the process design, the temperature of the chamber in which the grounding substrate is placed is continuously increased, exceeding 350 ° C, and is still improving. Even more than 400 ° C, at this time the pure aluminum material itself can not meet the requirements of use.
不銹鋼、鎳基合金等具備優異的高溫性能，但是導電性較差，而且在強等離子輻射條件下釋放鐵、鎳等有害金屬離子，污染半導體工藝環境，導致刻蝕、光刻以及鍍膜過程中元器件報廢。 Stainless steel, nickel-based alloys, etc. have excellent high-temperature properties, but poor conductivity, and release harmful metal ions such as iron and nickel under strong plasma irradiation conditions, polluting the semiconductor process environment, leading to components in etching, photolithography and coating processes. scrapped.
本發明提供一種PVD(即物理氣相沉積)製備半導體裝備用抗高溫蠕變接地基片的方法，以不銹鋼、鎳合金或耐熱鋼等高溫力學性能較好的材料作為半導體裝備用抗高溫蠕變接地基片的基體，在其表面製備厚度均勻、結合力良好的無氧化純鋁塗層，一方面利用純鋁的導電性能及其與大型積體電路工藝的相容性，另一方面利用基體的力學性能解決接地基片抗高溫蠕變性不夠的問題。 The invention provides a method for preparing a high temperature resistant creep grounding substrate for semiconductor equipment by PVD (ie physical vapor deposition), and a material with high temperature mechanical properties such as stainless steel, nickel alloy or heat resistant steel is used as high temperature creep resistance for semiconductor equipment. The base of the grounding substrate is prepared on the surface of the surface of the non-oxidized pure aluminum coating with uniform thickness and good bonding force. On the one hand, the conductive property of pure aluminum and its compatibility with the large integrated circuit process are utilized, and on the other hand, the substrate is utilized. The mechanical properties solve the problem of insufficient grounding resistance to high temperature creep.
本發明的技術方案如下：一種PVD製備半導體裝備用抗高溫蠕變接地基片的方法，以不銹鋼、鎳合金或耐熱鋼材料作為半導體裝備用抗高溫蠕變接地基片的基體，採用PVD技術在該基體表面製備無氧化純鋁塗層，製得半導體裝備用抗高溫蠕變接地基片。 The technical scheme of the present invention is as follows: a method for preparing a high temperature resistant creep grounding substrate for semiconductor equipment by using PVD, using stainless steel, nickel alloy or heat resistant steel material as a base body of a high temperature resistant creep grounding substrate for semiconductor equipment, using PVD technology in A non-oxidized pure aluminum coating was prepared on the surface of the substrate to prepare a high temperature resistant creep grounding substrate for semiconductor equipment.
所述的PVD製備半導體裝備用抗高溫蠕變接地基片的方法，具體步驟如下：(1)該基體的前處理：將該基體表面先進行紋理處理，紋理處理工藝參數為：320#砂紙拋光，去除基體表面積碳層，再用無水乙醇進行清洗；(2)採用物理氣相沉積工藝製備純鋁塗層，利用PVD真空鍍膜系統，使氣態的鋁原子定向沉積於該基體表面，形成無氧化純鋁塗層。 The method for preparing a high temperature creep grounding substrate for semiconductor equipment is as follows: (1) pretreatment of the substrate: the surface of the substrate is first textured, and the texture processing parameter is: 320# sandpaper polishing The carbon layer of the surface area of the substrate is removed, and then washed with anhydrous ethanol; (2) a pure aluminum coating is prepared by a physical vapor deposition process, and a gaseous aluminum atom is deposited on the surface of the substrate by a PVD vacuum coating system to form an oxidation-free layer. Pure aluminum coating.
所述的PVD製備半導體裝備用抗高溫蠕變接地基片的方法，其物理氣相沉積工藝參數如下：距離550mm，陰極電壓20~40V，電流70~90A，真空度1×10-3~6×10-3Pa，輔助沉積電壓800V，輔助沉積電流1A， 純鋁塗層厚度1~50微米。 The PVD method for preparing a high temperature creep grounding substrate for a semiconductor device has the following physical vapor deposition process parameters: a distance of 550 mm, a cathode voltage of 20 to 40 V, a current of 70 to 90 A, and a degree of vacuum of 1×10 -3 to 6 ×10 -3 Pa, auxiliary deposition voltage 800V, auxiliary deposition current 1A, pure aluminum coating thickness 1~50 microns.
所述的PVD製備半導體裝備用抗高溫蠕變接地基片的方法，其中該PVD真空鍍膜系統包括：真空室、轉架、金屬陰極、聚焦線圈、電源、輔助陰極、陽極、電壓表和偏轉電磁線圈，兩個轉架對稱設置於真空室中，轉架用於放置該基體，轉架之間設置偏轉電磁線圈，金屬陰極與偏轉電磁線圈相對應；轉架與輔助陰極相對應，在輔助陰極與轉架之間的通道兩側分別設置陽極，輔助陰極與轉架上的基體之間設置電壓表，金屬陰極通過電源供電，金屬陰極的兩側設置聚焦線圈。 The PVD method for preparing a high temperature creep grounding substrate for a semiconductor device, wherein the PVD vacuum coating system comprises: a vacuum chamber, a rotating frame, a metal cathode, a focusing coil, a power source, an auxiliary cathode, an anode, a voltmeter, and a deflection electromagnetic a coil, two turrets are symmetrically disposed in the vacuum chamber, the turret is used to place the base body, a deflection electromagnetic coil is disposed between the turrets, the metal cathode corresponds to the deflection electromagnetic coil; the turret corresponds to the auxiliary cathode, and the auxiliary cathode is An anode is arranged on both sides of the channel between the rotating frame and the voltmeter is arranged between the auxiliary cathode and the base body on the turret. The metal cathode is powered by the power source, and the focus coil is arranged on both sides of the metal cathode.
所述的PVD製備半導體裝備用抗高溫蠕變接地基片的方法，其中該轉架的外部為環形帶，環形帶設置一處開口，開口處以彈簧連接。 The PVD method for preparing a high temperature resistant creep grounding substrate for a semiconductor device, wherein the outer portion of the turret is an endless belt, the annular belt is provided with an opening, and the opening is connected by a spring.
本發明的有益效果如下： The beneficial effects of the present invention are as follows:
1．本發明是用PVD法製備半導體裝備用抗高溫蠕變接地基片(1-50微米)，和冷噴塗方法(100微米以上)相比較所製備的塗層厚度薄、與基體結合良好、塗層緻密，導電性能良好。 1. The invention adopts the PVD method to prepare a high temperature resistant creep grounding substrate for semiconductor equipment (1-50 micrometers), and the coating prepared by comparison with the cold spraying method (100 micrometers or more) is thin, has good bonding with the substrate, and is coated. Dense and good electrical conductivity.
2．本發明採用PVD方法，純鋁塗層是在真空條件下氣相沉積形成的，因此塗層緻密沒有氧化，從而提高接地基片的導電性能。 2. The invention adopts the PVD method, and the pure aluminum coating is formed by vapor deposition under vacuum conditions, so that the coating is dense without oxidation, thereby improving the electrical conductivity of the grounded substrate.
3．本發明還具有沉積效率高、安全、成本低和無環境污染等特點。 3. The invention also has the characteristics of high deposition efficiency, safety, low cost and no environmental pollution.
4、半導體裝備中接地基片非常薄，處於柔軟狀態，因此稱之為軟基片。在軟基片上製備導電塗層，要達到厚度均勻、結合力良好很難實現。本發明採用轉架和偏轉電磁線圈，減少了大顆粒鋁的產生，通過PVD法製備鋁塗層，能夠實現噴塗的塗層厚度均勻、結合力良好，薄膜厚 度控制在1-50微米範圍，結合強度達10-15MPa。 4. The grounding substrate in semiconductor equipment is very thin and in a soft state, so it is called a soft substrate. It is difficult to achieve a conductive coating on a soft substrate to achieve uniform thickness and good bonding force. The invention adopts the rotating frame and the deflection electromagnetic coil to reduce the generation of large-particle aluminum. The aluminum coating is prepared by the PVD method, and the coating thickness of the coating can be uniform, the bonding force is good, and the film thickness is thick. The degree of control is in the range of 1-50 microns, and the bonding strength is 10-15 MPa.
1‧‧‧真空室 1‧‧‧vacuum room
2‧‧‧轉架 2‧‧‧Turning
3‧‧‧金屬陰極 3‧‧‧Metal cathode
4‧‧‧聚焦線圈 4‧‧‧ Focus coil
5‧‧‧電源 5‧‧‧Power supply
6‧‧‧偏轉電磁線圈 6‧‧‧ deflection electromagnetic coil
7‧‧‧輔助陰極 7‧‧‧Auxiliary cathode
8‧‧‧陽極 8‧‧‧Anode
9‧‧‧電壓表 9‧‧‧Voltagemeter
10‧‧‧環形帶 10‧‧‧Ring belt
11‧‧‧彈簧 11‧‧‧ Spring
圖1為本發明的PVD真空鍍膜系統結構圖；圖2為本發明的轉架結構圖。 1 is a structural view of a PVD vacuum coating system of the present invention; and FIG. 2 is a structural view of a turret of the present invention.
如圖1、2所示，PVD真空鍍膜系統包括：真空室1、轉架2、金屬陰極3(純鋁靶)、聚焦線圈4、電源5、輔助陰極7、陽極8、電壓表9和偏轉電磁線圈6，兩個轉架2對稱設置於真空室1中，轉架2之間設置偏轉電磁線圈6，金屬陰極3與偏轉電磁線圈6相對應；轉架2與輔助陰極7相對應，在輔助陰極7與轉架2之間的通道兩側分別設置陽極8，輔助陰極7與轉架2上的半導體裝備用抗高溫蠕變接地基片的基體之間設置電壓表9，金屬陰極3通過電源5供電，金屬陰極3的兩側設置聚焦線圈4。轉架2的外部為環形帶10，環形帶10設置一處開口，開口處以彈簧11連接，半導體裝備用抗高溫蠕變接地基片的基體放置在環形帶10上，兩端予以固定，彈簧11的漲力使該基體緊繃，可以減少基體在鍍膜過程中由於溫度的變化產生形變的影響，從而提高膜層品質。 As shown in Figures 1 and 2, the PVD vacuum coating system includes: vacuum chamber 1, turret 2, metal cathode 3 (pure aluminum target), focus coil 4, power source 5, auxiliary cathode 7, anode 8, voltmeter 9 and deflection. The electromagnetic coil 6, the two turrets 2 are symmetrically disposed in the vacuum chamber 1, the deflection electromagnetic coil 6 is disposed between the turrets 2, the metal cathode 3 corresponds to the deflection electromagnetic coil 6, and the turret 2 corresponds to the auxiliary cathode 7, An anode 8 is disposed on each side of the channel between the auxiliary cathode 7 and the turret 2, and a voltmeter 9 is disposed between the auxiliary cathode 7 and the substrate of the high temperature creep grounding substrate for semiconductor equipment on the turret 2, and the metal cathode 3 passes through The power source 5 is powered, and the focus coil 4 is disposed on both sides of the metal cathode 3. The outer part of the turret 2 is an endless belt 10, and the endless belt 10 is provided with an opening. The opening is connected by a spring 11. The semiconductor device is placed on the endless belt 10 with a base body of a high temperature resistant creep grounding substrate, and the ends are fixed. The tensile force makes the substrate tight, which can reduce the influence of deformation of the substrate during the coating process due to temperature changes, thereby improving the quality of the film.
本發明PVD製備半導體裝備用抗高溫蠕變接地基片的方法，具體步驟如下：(1)該基體的前處理：將該基體表面先進行紋理處理，紋理處理工藝參數為：320#砂紙拋光，去除基體表面積碳層，再用無水乙醇 進行清洗；(2)採用物理氣相沉積工藝製備純鋁塗層，利用PVD真空鍍膜系統，使氣態的鋁原子定向沉積於該基體表面，形成純鋁塗層，製得半導體裝備用抗高溫蠕變接地基片。其物理氣相沉積工藝參數如下：距離550mm，陰極電壓20~40V，電流70~90A，真空度1×10-3~6×10-3Pa，輔助沉積電壓800V，輔助沉積電流1A，塗層厚度1~50微米。 The method for preparing a high temperature resistant creep grounding substrate for semiconductor equipment according to the PVD of the present invention is as follows: (1) pretreatment of the substrate: the surface of the substrate is first textured, and the texture processing parameter is: 320# sandpaper polishing, The carbon layer of the surface area of the substrate is removed and then washed with absolute ethanol; (2) a pure aluminum coating is prepared by a physical vapor deposition process, and a gaseous aluminum atom is deposited on the surface of the substrate by a PVD vacuum coating system to form a pure aluminum coating. A layer is used to produce a high temperature resistant creep grounding substrate for semiconductor equipment. The physical vapor deposition process parameters are as follows: distance 550mm, cathode voltage 20~40V, current 70~90A, vacuum degree 1×10 -3 ~6×10 -3 Pa, auxiliary deposition voltage 800V, auxiliary deposition current 1A, coating The thickness is 1~50 microns.
本實施例中，採用特定的工藝可以實現真空狀態下的金屬鋁塗層沉積，這種工藝過程能夠在鎳基合金等材料上形成均勻緻密的Al塗層，而不影響基體材料的性能，為製備高性能無氧塗層提供一種重要的工藝方法，採用PVD方法在鎳基合金表面成功地製備出性能良好的導電塗層。導電塗層的具體性能參數如下：導電性(5-7)×10-8歐姆/米，結合強度10-15MPa，詳見表1。 In this embodiment, a metal aluminum coating deposition under vacuum can be realized by a specific process, which can form a uniform and dense Al coating on a nickel-based alloy or the like without affecting the performance of the base material. The preparation of high performance oxygen-free coatings provides an important process for the successful preparation of conductive coatings on nickel-based alloy surfaces using the PVD method. The specific performance parameters of the conductive coating are as follows: conductivity (5-7) × 10 -8 ohm / m, bonding strength 10-15MPa, see Table 1 for details.
和冷噴塗製備的接地基片相比較，採用PVD法製備的半導體裝備用抗高溫蠕變接地基片具有塗層薄的特點。 Compared with the grounding substrate prepared by cold spraying, the high temperature creep grounding substrate for semiconductor equipment prepared by the PVD method has the characteristics of thin coating.
以上是本發明的優選實施例，在不脫離本發明構思的前提下，採用其他的PVD技術製備的半導體工藝裝備用抗高溫蠕變接地基片，也應視為本發明的保護範圍。 The above is a preferred embodiment of the present invention, and the high temperature creep grounding substrate for semiconductor process equipment prepared by using other PVD techniques should also be regarded as the protection scope of the present invention without departing from the concept of the present invention.
1‧‧‧真空室 1‧‧‧vacuum room
2‧‧‧轉架 2‧‧‧Turning
3‧‧‧金屬陰極 3‧‧‧Metal cathode
4‧‧‧聚焦線圈 4‧‧‧ Focus coil
5‧‧‧電源 5‧‧‧Power supply
6‧‧‧偏轉電磁線圈 6‧‧‧ deflection electromagnetic coil
7‧‧‧輔助陰極 7‧‧‧Auxiliary cathode
8‧‧‧陽極 8‧‧‧Anode
9‧‧‧電壓表 9‧‧‧Voltagemeter
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