TWI566082B - Fan supply circuit - Google Patents

Fan supply circuit Download PDF

Info

Publication number
TWI566082B
TWI566082B TW103140153A TW103140153A TWI566082B TW I566082 B TWI566082 B TW I566082B TW 103140153 A TW103140153 A TW 103140153A TW 103140153 A TW103140153 A TW 103140153A TW I566082 B TWI566082 B TW I566082B
Authority
TW
Taiwan
Prior art keywords
fan
transistor
management chip
power supply
state
Prior art date
Application number
TW103140153A
Other languages
Chinese (zh)
Other versions
TW201617770A (en
Inventor
閔捷
陳俊生
Original Assignee
鴻海精密工業股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 鴻海精密工業股份有限公司 filed Critical 鴻海精密工業股份有限公司
Publication of TW201617770A publication Critical patent/TW201617770A/en
Application granted granted Critical
Publication of TWI566082B publication Critical patent/TWI566082B/en

Links

Landscapes

  • Cooling Or The Like Of Electrical Apparatus (AREA)
  • Amplifiers (AREA)

Description

風扇供電電路 Fan power supply circuit

本發明涉及一種風扇供電電路。 The invention relates to a fan power supply circuit.

很多電子設備通常於其內部設置了風扇,如一般電腦設置有CPU風扇,系統風扇,硬碟機風扇等等,該等風扇主要之作用就是對電子設備進行散熱。電腦包括正常工作狀態(S0狀態,電腦正常工作,所有硬體設備全部處於打開或正常工作)及待機狀態,所述待機狀態一般包括睡眠(S3狀態,通常稱為STR,Suspend to RAM,掛起到記憶體,即將運行中之資料寫入記憶體後關閉硬碟機)狀態、休眠(S4狀態,亦稱為STD,Suspend to Disk,掛起到硬碟機,即記憶體資訊寫入硬碟機,然後所有部件停止工作)狀態及關閉(S5狀態,即所有硬體設備全部均關閉,亦即電腦處於關機狀態)狀態。當電腦從S0狀態進入到S3或S4或S5其中一個待機狀態時,其內部之風扇由於突然失去供電而停止工作。但是電腦內部還殘餘著大量熱量,該等熱量只能藉由被動散熱來釋放。電腦內部之溫度於剛進入待機狀態後之一段時間內仍然較高,對電腦之內部電路之安全性及可靠性帶來一定之風險。 Many electronic devices usually have a fan inside. For example, a general computer is provided with a CPU fan, a system fan, a hard disk fan, etc., and the main function of the fans is to dissipate heat from the electronic device. The computer includes normal working state (S0 state, the computer works normally, all hardware devices are all open or working normally) and standby state, the standby state generally includes sleep (S3 state, usually called STR, Suspend to RAM, hangs Go to the memory, write the data in the memory to the memory and turn off the hard disk drive) state, sleep (S4 state, also known as STD, Suspend to Disk, suspend to the hard disk drive, that is, the memory information is written to the hard disk Machine, then all components stop working) state and shutdown (S5 state, that is, all hardware devices are turned off, that is, the computer is turned off). When the computer enters the S3 or S4 or S5 standby state from the S0 state, the internal fan stops working due to sudden loss of power supply. However, there is still a lot of heat left inside the computer, and the heat can only be released by passive heat dissipation. The temperature inside the computer is still high for a period of time just after entering the standby state, which poses a certain risk to the safety and reliability of the internal circuit of the computer.

鑒於以上內容,有必要提供一種電腦進入待機狀態時散熱效果較好之風扇供電電路。 In view of the above, it is necessary to provide a fan power supply circuit with better heat dissipation when the computer enters the standby state.

一種風扇供電電路,包括第一電源、第二電源、管理晶片及連接所述管理晶片之控制電路,所述控制電路包括連接所述管理晶片之及閘及連接所述及閘之電晶體,所述電晶體連接所述第二電源,所述管理晶片用於檢測電腦之工作狀態,所述第一電源用在於所述管理晶片偵測到所述電腦處於正常工作狀態時給所述風扇供電,所述第一電源還用在於所述管理晶片偵測到所述電腦處於待機狀態時不供電給所述風扇,所述待機狀態包括睡眠狀態、休眠狀態及關閉狀態,所述管理晶片包括一第一端、一第二端及一第三端,所述管理晶片之第一端、第二端及第三端分別在於電腦處於睡眠狀態、休眠狀態及關閉狀態時發送第一電平訊號給所述及閘,所述及閘接收到所述第一電平訊號後輸出第二電平訊號導通所述電晶體,所述第二電源於所述電晶體導通後給所述風扇供電。 A fan power supply circuit includes a first power source, a second power source, a management chip, and a control circuit for connecting the management chip, the control circuit includes a gate connecting the management chip and a transistor connecting the gate The transistor is connected to the second power source, the management chip is used for detecting the working state of the computer, and the first power source is used to supply power to the fan when the management chip detects that the computer is in a normal working state. The first power source is further configured to: when the management chip detects that the computer is in a standby state, the power is not supplied to the fan, and the standby state includes a sleep state, a sleep state, and a closed state, and the management chip includes a first a first end, a second end, and a third end, wherein the first end, the second end, and the third end of the management chip respectively send a first level signal to the computer when the computer is in a sleep state, a sleep state, and a closed state And the gate, after receiving the first level signal, outputting a second level signal to turn on the transistor, the second power source is to the wind after the transistor is turned on powered by.

與習知技術相比,上述風扇供電電路中,當電腦處於待機狀態時,所述管理晶片導通所述控制電路,所述第二電源給所述風扇供電,從而所述風扇給所述電腦散熱。 Compared with the prior art, in the fan power supply circuit, when the computer is in the standby state, the management chip turns on the control circuit, and the second power source supplies power to the fan, so that the fan dissipates heat to the computer. .

10‧‧‧供電電源 10‧‧‧Power supply

11‧‧‧第一電源 11‧‧‧First power supply

13‧‧‧第二電源 13‧‧‧second power supply

15‧‧‧第三電源 15‧‧‧ Third power supply

20‧‧‧風扇 20‧‧‧Fan

30‧‧‧控制電路 30‧‧‧Control circuit

31‧‧‧及閘 31‧‧‧ and gate

33‧‧‧電晶體 33‧‧‧Optoelectronics

35‧‧‧可變電阻 35‧‧‧Variable resistor

37‧‧‧肖特基二極體 37‧‧‧Schottky diode

40‧‧‧管理晶片 40‧‧‧Management Wafer

41‧‧‧第一端 41‧‧‧ first end

43‧‧‧第二端 43‧‧‧ second end

45‧‧‧第三端 45‧‧‧ third end

圖1係本發明風扇供電電路之一較佳實施方式之一功能模組圖。 1 is a functional block diagram of one preferred embodiment of a fan power supply circuit of the present invention.

圖2係本發明風扇供電電路之一較佳實施方式之一電路連接圖。 2 is a circuit connection diagram of a preferred embodiment of a fan power supply circuit of the present invention.

請參閱圖1,本發明風扇供電電路之一較佳實施方式包括一供電電源10、一連接所述供電電源10之控制電路30、一連接所述控制電路30之管理晶片40。所述供電電源10用於給一風扇20供電。所述控制電路30用於連接所述風扇20。於一實施例中,所述管理晶 片40為一南橋晶片,所述管理晶片40用於偵測及電腦之工作狀態並用於根據電腦之工作狀態而輸出不同之電平訊號,所述電腦之工作狀態包括正常工作狀態(S0狀態,電腦正常工作,所有硬體設備全部處於打開或正常工作)及待機狀態,所述待機狀態包括睡眠狀態(S3狀態)、休眠狀態(S4狀態)及關閉狀態(S5狀態)。 Referring to FIG. 1, a preferred embodiment of the fan power supply circuit of the present invention includes a power supply 10, a control circuit 30 connected to the power supply 10, and a management chip 40 connected to the control circuit 30. The power supply 10 is used to supply power to a fan 20. The control circuit 30 is used to connect the fan 20. In an embodiment, the management crystal The chip 40 is a south bridge chip, and the management chip 40 is used for detecting the working state of the computer and for outputting different level signals according to the working state of the computer, and the working state of the computer includes a normal working state (S0 state, The computer works normally, all hardware devices are in an open or normal operation, and the standby state includes a sleep state (S3 state), a sleep state (S4 state), and a shutdown state (S5 state).

請參閱圖2,所述供電電源10包括一第一電源11、一第二電源13及一第三電源15。所述第三電源15用在於電腦處於正常工作狀態時給所述風扇20供電。當所述電腦處於待機狀態時,所述第三電源15不供電給所述風扇20,所述第二電源13給所述風扇20供電。 Referring to FIG. 2 , the power supply 10 includes a first power source 11 , a second power source 13 , and a third power source 15 . The third power source 15 is used to supply power to the fan 20 when the computer is in a normal working state. When the computer is in a standby state, the third power source 15 does not supply power to the fan 20, and the second power source 13 supplies power to the fan 20.

所述控制電路30包括一連接所述管理晶片40之及閘31、一連接所述及閘31之電晶體33、一連接所述電晶體33之可變電阻35及一肖特基二極體37。於一實施例中,所述電晶體33為一P溝道場效應管。 The control circuit 30 includes a gate 31 connecting the management wafer 40, a transistor 33 connecting the gate 31, a variable resistor 35 connecting the transistor 33, and a Schottky diode. 37. In one embodiment, the transistor 33 is a P-channel FET.

所述管理晶片40包括一第一端41、一第二端43及一第三端45。所述管理晶片40之第一端41用在於電腦處於S3狀態輸出一第一訊號、及關閉狀態(S5狀態)、所述管理晶片40之第二端43用在於電腦處於S4狀態時輸出第二訊號,所述管理晶片40之第三端45用在於電腦處於S5狀態輸出一第三訊號。所述第一訊號、所述第二訊號及所述第三訊號均為低電平訊號。 The management wafer 40 includes a first end 41, a second end 43, and a third end 45. The first end 41 of the management chip 40 is used to output a first signal and a closed state (S5 state) when the computer is in the S3 state, and the second end 43 of the management chip 40 is used to output the second when the computer is in the S4 state. The third end 45 of the management chip 40 is used to output a third signal when the computer is in the S5 state. The first signal, the second signal, and the third signal are all low level signals.

所述管理晶片40之第一端41、第二端43及第三端45作為所述及閘31之三輸入,所述及閘31之電源端連接所述第一電源11,所述及閘31之輸出連接所述電晶體33之閘極G,所述電晶體33之源極S連接所述第二電源13,所述電晶體33之汲極D連接所述可變電阻35 之一端,所述可變電阻35之另一端連接所述肖特基二極體37之一正極端,所述肖特基二極體37之另一正極端連接所述第三電源15,所述肖特基二極體37之公共端連接所述風扇20之電源端VCC,所述風扇20之接地端GND接地。 The first end 41, the second end 43 and the third end 45 of the management chip 40 are input as the third input of the gate 31, and the power terminal of the gate 31 is connected to the first power source 11, the gate The output of 31 is connected to the gate G of the transistor 33, the source S of the transistor 33 is connected to the second power source 13, and the drain D of the transistor 33 is connected to the variable resistor 35. One end of the variable resistor 35 is connected to one of the positive ends of the Schottky diode 37, and the other positive end of the Schottky diode 37 is connected to the third power source 15 The common end of the Schottky diode 37 is connected to the power terminal VCC of the fan 20, and the ground terminal GND of the fan 20 is grounded.

所述風扇供電電路之工作原理為:當所述電腦處於正常工作狀態時,所述第三電源15給所述風扇20供電,所述風扇20可以正常轉動。當所述管理晶片40偵測到所述電腦處於所述S3狀態時,所述管理晶片40之第一端41發送所述第一訊號給所述及閘31;當所述管理晶片40偵測到所述電腦處於所述S4狀態時,所述管理晶片40之第二端43發送所述第二訊號給所述及閘31;當所述管理晶片40偵測到所述電腦處於所述S5狀態時,所述管理晶片40之第三端45發送所述第三訊號給所述及閘31;所述及閘31接收到所述第一訊號或所述第二訊號或所述第三訊號均輸出一低電平之第四電平訊號給所述電晶體33,所述電晶體33接收到所述第四電平訊號後導通,從而所述第二電源13給所述風扇20供電。所述風扇20可以繼續轉動,從而為所述電腦散熱。所述可變電阻35之電阻值逐漸變大。所述風扇20之轉速逐漸減小。當所述可變電阻35之電阻值變大到一參考值時,所述風扇20停止轉動。 The working principle of the fan power supply circuit is that when the computer is in a normal working state, the third power source 15 supplies power to the fan 20, and the fan 20 can rotate normally. When the management chip 40 detects that the computer is in the S3 state, the first end 41 of the management chip 40 sends the first signal to the gate 31; when the management chip 40 detects When the computer is in the S4 state, the second end 43 of the management chip 40 sends the second signal to the gate 31; when the management chip 40 detects that the computer is in the S5 In the state, the third end 45 of the management chip 40 sends the third signal to the AND gate 31; the gate 31 receives the first signal or the second signal or the third signal A fourth level signal of a low level is output to the transistor 33. The transistor 33 is turned on after receiving the fourth level signal, so that the second power source 13 supplies power to the fan 20. The fan 20 can continue to rotate to dissipate heat from the computer. The resistance value of the variable resistor 35 gradually becomes larger. The rotational speed of the fan 20 is gradually reduced. When the resistance value of the variable resistor 35 becomes large to a reference value, the fan 20 stops rotating.

於所述風扇供電電路中,當所述管理晶片40偵測到所述電腦處於S3、S4及S5這三種待機狀態時,所述控制電路30導通,所述第二電源13給所述風扇20供電,從而所述風扇20給所述電腦散熱。 In the fan power supply circuit, when the management chip 40 detects that the computer is in the three standby states S3, S4, and S5, the control circuit 30 is turned on, and the second power source 13 is given to the fan 20. Power is supplied so that the fan 20 dissipates heat to the computer.

綜上所述,本發明確已符合發明專利之要件,遂依法提出專利申請。惟,以上所述者僅為本發明之較佳實施方式,自不能以此限制本案之申請專利範圍。舉凡熟悉本案技藝之人士爰依本發明之 精神所作之等效修飾或變化,皆應涵蓋於以下申請專利範圍內。 In summary, the present invention has indeed met the requirements of the invention patent, and has filed a patent application according to law. However, the above description is only a preferred embodiment of the present invention, and it is not possible to limit the scope of the patent application of the present invention. Anyone familiar with the skill of the case is dependent on the present invention. Equivalent modifications or variations made by the spirit are to be covered by the following patents.

10‧‧‧供電電源 10‧‧‧Power supply

20‧‧‧風扇 20‧‧‧Fan

30‧‧‧控制電路 30‧‧‧Control circuit

40‧‧‧管理晶片 40‧‧‧Management Wafer

Claims (9)

一種風扇供電電路,包括第一電源、第二電源、管理晶片及連接所述管理晶片之控制電路,所述控制電路包括連接所述管理晶片之及閘及連接所述及閘之電晶體,所述電晶體連接所述第二電源,所述管理晶片用於檢測電腦之工作狀態,所述第一電源用在於所述管理晶片偵測到所述電腦處於正常工作狀態時給所述風扇供電,所述第一電源還用在於所述管理晶片偵測到所述電腦處於待機狀態時不供電給所述風扇,所述待機狀態包括睡眠狀態、休眠狀態及關閉狀態,所述管理晶片包括一第一端、一第二端及一第三端,所述管理晶片之第一端、第二端及第三端分別在於電腦處於睡眠狀態、休眠狀態及關閉狀態時發送第一電平訊號給所述及閘,所述及閘接收到所述第一電平訊號後輸出第二電平訊號導通所述電晶體,所述第二電源於所述電晶體導通後給所述風扇供電。 A fan power supply circuit includes a first power source, a second power source, a management chip, and a control circuit for connecting the management chip, the control circuit includes a gate connecting the management chip and a transistor connecting the gate The transistor is connected to the second power source, the management chip is used for detecting the working state of the computer, and the first power source is used to supply power to the fan when the management chip detects that the computer is in a normal working state. The first power source is further configured to: when the management chip detects that the computer is in a standby state, the power is not supplied to the fan, and the standby state includes a sleep state, a sleep state, and a closed state, and the management chip includes a first a first end, a second end, and a third end, wherein the first end, the second end, and the third end of the management chip respectively send a first level signal to the computer when the computer is in a sleep state, a sleep state, and a closed state And the gate, after receiving the first level signal, outputting a second level signal to turn on the transistor, the second power source is to the wind after the transistor is turned on powered by. 如請求項第1項所述之風扇供電電路,其中所述電晶體為P型場效應管。 The fan power supply circuit of claim 1, wherein the transistor is a P-type field effect transistor. 如請求項第2項所述之風扇供電電路,其中所述第二電平訊號為低電平訊號。 The fan power supply circuit of claim 2, wherein the second level signal is a low level signal. 如請求項第1項所述之風扇供電電路,其中所述第一電平訊號為低電平訊號。 The fan power supply circuit of claim 1, wherein the first level signal is a low level signal. 如請求項第1項所述之風扇供電電路,其中所述待機狀態為睡眠狀態或休眠狀態。 The fan power supply circuit of claim 1, wherein the standby state is a sleep state or a sleep state. 如請求項第1項所述之風扇供電電路,其中所述控制電路還包括肖特基二極體,所述肖特基二極體之公共端用於連接所述風扇,所述肖特基二極體之一正極端連接所述第一電源,所述肖特基二極體之另一正極端連接所述第二電源。 The fan power supply circuit of claim 1, wherein the control circuit further comprises a Schottky diode, the common end of the Schottky diode is used to connect the fan, the Schottky One positive terminal of the diode is connected to the first power source, and the other positive terminal of the Schottky diode is connected to the second power source. 如請求項第6項所述之風扇供電電路,其中所述控制電路還包括可變電阻,所述可變電阻之一端連接所述電晶體,所述可變電阻之另一端連接所述肖特基二極體之另一正極端。 The fan power supply circuit of claim 6, wherein the control circuit further comprises a variable resistor, one end of the variable resistor is connected to the transistor, and the other end of the variable resistor is connected to the SCHOTT The other positive terminal of the base diode. 如請求項第7項所述之風扇供電電路,其中所述電晶體為場效應管,所述電晶體之汲極連接所述可變電阻,所述電晶體之源極連接所述第二電源,所述電晶體之閘極連接所述及閘之輸出端。 The fan power supply circuit of claim 7, wherein the transistor is a field effect transistor, a drain of the transistor is connected to the variable resistor, and a source of the transistor is connected to the second power source The gate of the transistor is connected to the output end of the gate. 如請求項第1項所述之風扇供電電路,其中所述管理晶片為南橋晶片。 The fan power supply circuit of claim 1, wherein the management chip is a south bridge wafer.
TW103140153A 2014-11-13 2014-11-20 Fan supply circuit TWI566082B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201410639206.9A CN105652996A (en) 2014-11-13 2014-11-13 Fan power supply circuit

Publications (2)

Publication Number Publication Date
TW201617770A TW201617770A (en) 2016-05-16
TWI566082B true TWI566082B (en) 2017-01-11

Family

ID=56478621

Family Applications (1)

Application Number Title Priority Date Filing Date
TW103140153A TWI566082B (en) 2014-11-13 2014-11-20 Fan supply circuit

Country Status (2)

Country Link
CN (1) CN105652996A (en)
TW (1) TWI566082B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106968978B (en) * 2017-03-29 2018-11-06 嵊州市森汇知识产权运营有限公司 Data center's fan control circuitry
CN107218243B (en) * 2017-07-28 2018-12-21 青岛海信电器股份有限公司 Fan control device and electronic equipment

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW392106B (en) * 1998-02-17 2000-06-01 Asustek Comp Inc Delay switch device for cooling fan on computer main board
TWM384344U (en) * 2010-01-29 2010-07-11 Etasis Electronics Corp Power supply device and controlling module of heat dissipating device thereof
TW201112935A (en) * 2009-09-29 2011-04-01 Hon Hai Prec Ind Co Ltd Fan delay controlling system
US20120326648A1 (en) * 2011-06-24 2012-12-27 Hon Hai Precision Industry Co., Ltd. Fan delay control circuit
US20140139163A1 (en) * 2012-11-21 2014-05-22 Hon Hai Precision Industry Co., Ltd. Fan control circuit

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102032206B (en) * 2009-09-25 2014-08-20 鸿富锦精密工业(深圳)有限公司 Fan time-delay control system
CN102052340A (en) * 2009-10-28 2011-05-11 鸿富锦精密工业(深圳)有限公司 Fan control circuit

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW392106B (en) * 1998-02-17 2000-06-01 Asustek Comp Inc Delay switch device for cooling fan on computer main board
TW201112935A (en) * 2009-09-29 2011-04-01 Hon Hai Prec Ind Co Ltd Fan delay controlling system
TWM384344U (en) * 2010-01-29 2010-07-11 Etasis Electronics Corp Power supply device and controlling module of heat dissipating device thereof
US20120326648A1 (en) * 2011-06-24 2012-12-27 Hon Hai Precision Industry Co., Ltd. Fan delay control circuit
US20140139163A1 (en) * 2012-11-21 2014-05-22 Hon Hai Precision Industry Co., Ltd. Fan control circuit

Also Published As

Publication number Publication date
TW201617770A (en) 2016-05-16
CN105652996A (en) 2016-06-08

Similar Documents

Publication Publication Date Title
US9430305B2 (en) Server system
US20150006919A1 (en) Usb otg device with power mode switch function
JP2014099165A5 (en) Microcontroller
US20070292257A1 (en) Apparatus and method to provide reduced fan noise at startup
JP2014209306A5 (en)
US9018798B2 (en) Power supply circuit
TWI574149B (en) Interface supply circuit
TWI566082B (en) Fan supply circuit
TWI583134B (en) Interface supply circuit
TW201422918A (en) Control circuit for fan
TW201328096A (en) Power protection circuit
JP2015188213A5 (en)
JP2009265216A (en) Liquid crystal display device
TWI444817B (en) Computer device
TW201422919A (en) Circuit for controlling fan
TWI580140B (en) Interface supply system
US10630075B2 (en) Multi-level output circuit having centralized ESD protection
TWI559134B (en) Computing system and method for respectively displaying information corresponding to host under booting state or standby state
TW201327125A (en) Power supply system for memory
TWI578703B (en) Power control circuit of usb
TW201310215A (en) Computer
US20140313873A1 (en) Detecting apparatus for hard disk drive
TWI624753B (en) Electronic device and mainboard and protecting circuit of electronic device
TW201329691A (en) Electronic system with power saving function
TWI544218B (en) Over current detection system and detection circuit

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees