TWI557854B - Integrated millimeter-wave chip package - Google Patents
Integrated millimeter-wave chip package Download PDFInfo
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- TWI557854B TWI557854B TW103143653A TW103143653A TWI557854B TW I557854 B TWI557854 B TW I557854B TW 103143653 A TW103143653 A TW 103143653A TW 103143653 A TW103143653 A TW 103143653A TW I557854 B TWI557854 B TW I557854B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Description
本發明是有關於一種封裝結構，是有關於一種整合式毫米波晶片封裝結構。 The present invention relates to a package structure relating to an integrated millimeter wave chip package structure.
無線接收器的應用在近兩年美國消費電子展中成為焦點，宣告無線千兆聯盟(Wireless Gigabit Alliance，WiGi)與無線高畫質(Wireless HD)標準應用的時代來臨。國內外學界與大廠也陸續開發出毫米波頻段的晶片；然而，此頻段晶片的封裝卻尚未有完整解決方案。 The application of wireless receivers has become the focus of the Consumer Electronics Show in the past two years, and the era of wireless Gigabit Alliance (WiGi) and wireless HD (HD) standard applications is coming. Domestic and foreign academic circles and large manufacturers have also developed wafers in the millimeter wave band; however, there is no complete solution for the packaging of this band of chips.
一般打線(Wire-bond)封裝不適用於射頻晶片封裝，而使用低溫共燒多層陶瓷(Low-Temperature Co-fired Ceramics,LTCC)與覆晶封裝，則因製程條件導致基板收縮且製程效能不足，加上所欲封裝晶片銲墊尺寸及間距過小，導致組裝良率過低。因此，目前極需提供一種能有效整合射頻晶片及天線的封裝結構。 The wire-bond package is not suitable for RF chip packaging. Low-Temperature Co-fired Ceramics (LTCC) and flip-chip packages are used to shrink the substrate due to process conditions and the process performance is insufficient. In addition, the size and spacing of the wafer pads to be packaged are too small, resulting in low assembly yield. Therefore, it is highly desirable to provide a package structure that can effectively integrate RF chips and antennas.
本發明可提供一種能有效整合射頻晶片及天線的封裝結構，垂直整合天線與射頻積體電路晶片的封裝，設計位於不同層的天線與射頻晶片的位置上下垂直對應，將兩者間的傳輸距離最小化，減少天線與射頻晶片間傳輸路徑造成之高頻訊號損耗。 The invention can provide a package structure capable of effectively integrating a radio frequency chip and an antenna, vertically integrating the antenna and the package of the RF integrated circuit chip, and designing the antennas at different layers to vertically correspond to the position of the RF chip, and the transmission distance between the two Minimize and reduce the high frequency signal loss caused by the transmission path between the antenna and the RF chip.
本發明可提供一種整合式毫米波晶片封裝結構，至少包括中介層結構、晶片與基板。該中介層結構包括第一金屬層、第二金屬層、位於該第一、第二金屬層之間的絕緣支撐層，且該中介層結構包括至少一第一電鍍通孔結構，該第一電鍍通孔結構貫穿該第一金屬層、該絕緣支撐層以及該第二金屬層，並電性連接該第一金屬層以及該第二金屬層。該晶片連結至該中介層結構，該晶片具有主動面以及位於該主動面上之接觸墊。該基板連結至該中介層結構。該基板至少包括一絕緣層與位於絕緣層上的第三金屬層，該第三金屬層位於該基板朝向該中介層結構的一側，該中介層結構之該第一金屬層至少包括一天線圖案，該天線圖案位於該晶片的上方，該晶片透過該中介層結構之該第一電鍍通孔結構電性連接該天線圖案。在另一實施例，該天線圖案可設置在下方。 The invention can provide an integrated millimeter wave chip package structure comprising at least an interposer structure, a wafer and a substrate. The interposer structure includes a first metal layer, a second metal layer, an insulating support layer between the first and second metal layers, and the interposer structure includes at least one first plated through hole structure, the first plating The via structure extends through the first metal layer, the insulating support layer, and the second metal layer, and electrically connects the first metal layer and the second metal layer. The wafer is bonded to the interposer structure, the wafer having an active surface and contact pads on the active surface. The substrate is bonded to the interposer structure. The substrate includes at least an insulating layer and a third metal layer on the insulating layer, the third metal layer is located on a side of the substrate facing the interposer structure, and the first metal layer of the interposer structure includes at least one antenna pattern The antenna pattern is located above the wafer, and the wafer is electrically connected to the antenna pattern through the first plated through hole structure of the interposer structure. In another embodiment, the antenna pattern can be disposed below.
在本發明的一實施例中，上述的整合式毫米波晶片封裝結構中的該基板具有一下凹式晶穴，該晶片內埋於該下凹式晶穴而該晶片之該主動面朝向該中介層結構之該第二金屬層，該晶片透過位於該接觸墊與該第二金屬層之間的凸塊物理性連結至該中 介層結構，並且該晶片透過該凸塊以及該第一電鍍通孔結構電性連結該天線圖案。 In an embodiment of the present invention, the substrate in the integrated millimeter wave chip package structure has a concave cavity, and the wafer is buried in the concave cavity and the active surface of the wafer faces the intermediary. The second metal layer of the layer structure, the wafer is physically coupled to the bump through the bump between the contact pad and the second metal layer a via structure, and the wafer electrically connects the antenna pattern through the bump and the first plated through hole structure.
在本發明的另一實施例中，上述的整合式毫米波晶片封裝結構中的該基板具有一開口露出該晶片，該晶片之該主動面朝向該中介層結構之該第二金屬層，該晶片透過位於該接觸墊與該第二金屬層之間的凸塊物理性連結至該中介層結構，並且該晶片透過該凸塊以及該第一電鍍通孔結構電性連結該天線圖案。 In another embodiment of the present invention, the substrate in the integrated millimeter wave chip package structure has an opening exposing the wafer, the active surface of the wafer facing the second metal layer of the interposer structure, the wafer The interposer is physically coupled to the interposer structure through a bump between the contact pad and the second metal layer, and the wafer is electrically connected to the antenna pattern through the bump and the first plated through hole structure.
在本發明的一實施例中，上述的整合式毫米波晶片封裝結構中的該基板更包括第四金屬層與第二電鍍通孔結構，該第四金屬層位於該絕緣層相對於該第三金屬層之另一面，該第二電鍍通孔結構貫穿該基板而連接該絕緣層兩側的該第三金屬層與該第四金屬層。 In an embodiment of the present invention, the substrate in the integrated millimeter wave chip package structure further includes a fourth metal layer and a second plated through hole structure, wherein the fourth metal layer is located at the insulating layer relative to the third On the other side of the metal layer, the second plated through hole structure penetrates the substrate to connect the third metal layer and the fourth metal layer on both sides of the insulating layer.
在本發明的一實施例中，上述的整合式毫米波晶片封裝結構更包括另一基板連結至該基板，該另一基板包括置於該基板與該另一基板之間的銲球，該另一基板透過該銲球使該基板與該另一基板物理性連結且電性相連。 In an embodiment of the invention, the integrated millimeter wave chip package structure further includes another substrate coupled to the substrate, the other substrate including a solder ball disposed between the substrate and the other substrate, the other A substrate is physically and electrically connected to the other substrate through the solder ball.
在本發明的一實施例中，上述的整合式毫米波晶片封裝結構中的該中介層結構更包括一或多層佈線層，位於該絕緣支撐層之中且位於該天線圖案以及該第二金屬層之間。 In an embodiment of the present invention, the interposer structure in the integrated millimeter wave chip package structure further includes one or more wiring layers, located in the insulating support layer and located in the antenna pattern and the second metal layer. between.
在本發明的一實施例中，上述的整合式毫米波晶片封裝結構中的晶片為射頻晶片。 In an embodiment of the invention, the wafer in the integrated millimeter wave chip package structure is a radio frequency wafer.
基於上述，本發明將天線圖案配置在晶片的上方或下 方，再利用內埋孔與導通孔電性連接天線以及晶片，進而可藉由此垂直的封裝架構而整合天線以及晶片的封裝，而減少天線和晶片之間的訊號傳輸距離，達到減少訊號傳輸損耗的目的。 Based on the above, the present invention arranges the antenna pattern above or below the wafer Then, the embedded hole and the via hole are electrically connected to the antenna and the chip, thereby integrating the antenna and the package of the chip by the vertical package structure, thereby reducing the signal transmission distance between the antenna and the chip, thereby reducing signal transmission. The purpose of loss.
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。 The above described features and advantages of the invention will be apparent from the following description.
10、20、30、40、50、60‧‧‧封裝結構 10, 20, 30, 40, 50, 60‧‧‧ package structure
100、400‧‧‧中介層結構 100, 400‧‧‧Intermediary structure
102‧‧‧第一金屬層 102‧‧‧First metal layer
104‧‧‧第二金屬層 104‧‧‧Second metal layer
106、406‧‧‧絕緣支撐層 106, 406‧‧ ‧ insulating support layer
108、408‧‧‧佈線層 108, 408‧‧‧ wiring layer
109、409‧‧‧金屬填孔結構 109, 409‧‧‧Metal hole filling structure
110、110A‧‧‧天線圖案 110, 110A‧‧‧ antenna pattern
112、114、214、218、302‧‧‧銲墊 112, 114, 214, 218, 302‧‧ ‧ pads
120、220、420‧‧‧電鍍通孔結構 120, 220, 420‧‧‧ plated through hole structure
130‧‧‧底膠層 130‧‧‧Under layer
140‧‧‧黏膠層 140‧‧‧Adhesive layer
150‧‧‧毫米波晶片 150‧‧‧ millimeter wave wafer
150a‧‧‧主動面 150a‧‧‧ active face
152‧‧‧接觸墊 152‧‧‧Contact pads
160、230‧‧‧凸塊 160, 230‧‧ ‧ bumps
180‧‧‧佈線 180‧‧‧Wiring
200、200A、200B、300‧‧‧基板 200, 200A, 200B, 300‧‧‧ substrates
202‧‧‧下凹式晶穴 202‧‧‧ concave concave hole
203‧‧‧開口 203‧‧‧ openings
210‧‧‧絕緣層 210‧‧‧Insulation
212‧‧‧第三金屬層 212‧‧‧ Third metal layer
216‧‧‧第四金屬層 216‧‧‧ fourth metal layer
310‧‧‧銲球 310‧‧‧ solder balls
402‧‧‧上金屬層 402‧‧‧Upper metal layer
404‧‧‧下金屬層 404‧‧‧Under metal layer
圖1是依照本發明的一實施例的一種整合式毫米波晶片封裝結構的剖面示意圖。 1 is a cross-sectional view of an integrated millimeter wave chip package structure in accordance with an embodiment of the present invention.
圖2是依照本發明的另一實施例的一種整合式毫米波晶片封裝結構的剖面示意圖。 2 is a cross-sectional view of an integrated millimeter wave chip package structure in accordance with another embodiment of the present invention.
圖3是依照本發明的又一實施例的一種整合式毫米波晶片封裝結構的剖面示意圖。 3 is a cross-sectional view of an integrated millimeter wave chip package structure in accordance with yet another embodiment of the present invention.
圖4是依照本發明的另一實施例的一種整合式毫米波晶片封裝結構的剖面示意圖。 4 is a cross-sectional view of an integrated millimeter wave chip package structure in accordance with another embodiment of the present invention.
圖5是依照本發明的另一實施例的一種整合式毫米波晶片封裝結構的剖面示意圖。 5 is a cross-sectional view of an integrated millimeter wave chip package structure in accordance with another embodiment of the present invention.
圖6是依照本發明的另一實施例的一種整合式毫米波晶片封裝結構的剖面示意圖。 6 is a cross-sectional view showing an integrated millimeter wave chip package structure in accordance with another embodiment of the present invention.
圖7是依照本發明的一實施例的一種整合式毫米波晶片封裝結構的部分俯視示意圖。 7 is a partial top plan view of an integrated millimeter wave chip package structure in accordance with an embodiment of the present invention.
圖8是另一種毫米波晶片封裝結構的部分俯視示意圖。 Figure 8 is a partial top plan view of another millimeter wave chip package structure.
圖9為毫米波天線增益對導通孔長度之導波波長(Guide Wavelength)圖。 Figure 9 is a diagram showing the Guide Wavelength of the millimeter wave antenna gain versus the via length.
圖10是毫米波天線輻射效率頻率響應圖。 Figure 10 is a graph showing the frequency response of the millimeter wave antenna radiation efficiency.
毫米波泛指波長為1~10毫米範圍的電波，若換算成頻率，約在30G~300GHz範圍；因此，毫米波晶片也就是指波長在毫米波範圍的射頻收發晶片。下述實施例中類似或相同元件、部分或結構將以相同標號表示之。其文中之順序或上下等描述是用以方便理解但並非用以限定其相對位置或範圍。 The millimeter wave refers to a wave with a wavelength of 1 to 10 mm. If it is converted into a frequency, it is in the range of 30 G to 300 GHz. Therefore, the millimeter wave chip refers to a radio frequency transmitting and receiving chip having a wavelength in the millimeter wave range. Similar or identical elements, parts or structures in the following embodiments will be denoted by the same reference numerals. The order of the text or the above and below descriptions are used to facilitate understanding but not to limit their relative positions or ranges.
圖1是依照本發明的一實施例的一種整合式毫米波晶片封裝結構的剖面示意圖。 1 is a cross-sectional view of an integrated millimeter wave chip package structure in accordance with an embodiment of the present invention.
參考圖1，整合式毫米波晶片封裝結構10，包括中介層結構100、毫米波晶片150與基板200。中介層結構100包括第一金屬層102、第二金屬層104、位於該第一、第二金屬層102/104之間的一絕緣支撐層106以及至少一電鍍通孔結構(plated through hole)120。該電鍍通孔結構120貫穿該中介層結構100(貫穿該第一金屬層102、該絕緣支撐層106以及該第二金屬層104)，電性連接該第一金屬層102以及該第二金屬層104。該第一金屬層102至少包括一天線圖案110。而該第二金屬層104可為一線路層而包括多個銲墊112與銲墊114。電鍍通孔結構120之形成方式包括蝕 刻或雷射鑽孔形成貫通孔再電鍍形成電鍍通孔結構以達成。 Referring to FIG. 1, an integrated millimeter wave chip package structure 10 includes an interposer structure 100, a millimeter wave wafer 150, and a substrate 200. The interposer structure 100 includes a first metal layer 102, a second metal layer 104, an insulating support layer 106 between the first and second metal layers 102/104, and at least one plated through hole 120. . The plated through hole structure 120 is electrically connected to the first metal layer 102 and the second metal layer. 104. The first metal layer 102 includes at least one antenna pattern 110. The second metal layer 104 can be a circuit layer and includes a plurality of pads 112 and pads 114. The formation of the plated through hole structure 120 includes etching The engraved or laser drilled hole is formed into a through hole and then plated to form a plated through hole structure.
相較於封裝結構利用導線或佈線來連接天線圖案，本發明整合式毫米波晶片封裝結構可利用電鍍通孔結構(亦即導通孔)來電性連接天線圖案，也就是以導通孔的方式連接並將訊號饋入到天線。 Compared with the package structure, the antenna pattern is connected by wires or wires. The integrated millimeter wave chip package structure of the present invention can electrically connect the antenna patterns by using a plated through hole structure (ie, a via hole), that is, the via holes are connected and Feed the signal to the antenna.
參見圖1，該中介層結構100更包括一佈線層108以及一金屬填孔結構109，該佈線層108位於該絕緣支撐層106之中並位於該天線圖案110以及第二金屬層104之間，該金屬填孔結構109位於該佈線層108與該銲墊114之間而電性連結該佈線層108與該銲墊114。其中該佈線層108不與該電鍍通孔結構120連接。該佈線層108可以做為接地層，接地層亦可有屏蔽的功能，以保護毫米波晶片150避免受到過多的電磁干擾(EMI)，而不當地影響本發明的整合式毫米波晶片封裝結構的操作。本發明不限定佈線層為單層而可以為多層配置，透過更多層佈線層之配置，可以幫助該封裝結構整合更多元件或使封裝結構之佈線更有彈性。 Referring to FIG. 1, the interposer structure 100 further includes a wiring layer 108 and a metal via structure 109. The wiring layer 108 is located in the insulating support layer 106 and between the antenna pattern 110 and the second metal layer 104. The metal via structure 109 is located between the wiring layer 108 and the pad 114 to electrically connect the wiring layer 108 and the pad 114 . The wiring layer 108 is not connected to the plated through hole structure 120. The wiring layer 108 can be used as a ground layer, and the ground layer can also have a shielding function to protect the millimeter wave wafer 150 from excessive electromagnetic interference (EMI), thereby unduly affecting the integrated millimeter wave chip package structure of the present invention. operating. The invention does not limit the wiring layer to a single layer but can be configured in a plurality of layers. The configuration of the plurality of wiring layers can help the package structure to integrate more components or make the wiring of the package structure more flexible.
該基板200至少包括一絕緣層210與位於絕緣層210上的第三金屬層212，該第三金屬層212位於該基板200朝向該第二金屬層104的一側且包括多個銲墊214。該基板200具有一下凹式晶穴202，而該毫米波晶片150內埋於該下凹式晶穴202中而透過一黏膠層140黏附固定至該基板200之凹穴內或黏膠層140以空氣取代。該毫米波晶片150具有一主動面150a以及位於主動面150a上之接觸墊152，而該毫米波晶片150內埋於該下凹式晶穴 202中，但其主動面150a朝向該中介層結構100之第二金屬層104，該毫米波晶片150透過位於第二金屬層104與接觸墊152之間的凸塊160或錫球或金球，分別電性連結該晶片之接觸墊152與該第二金屬層104(銲墊112)。此外，該天線圖案110透過該電鍍通孔結構120與凸塊160(銲墊112與接觸墊152)，而電性連接該天線圖案110與該毫米波晶片150。此處，該基板200例如為一印刷電路板或陶瓷基板。 The substrate 200 includes at least an insulating layer 210 and a third metal layer 212 on the insulating layer 210. The third metal layer 212 is located on a side of the substrate 200 facing the second metal layer 104 and includes a plurality of pads 214. The substrate 200 has a recessed cavity 202, and the millimeter wave wafer 150 is embedded in the recessed cavity 202 and adhered to the recess of the substrate 200 or the adhesive layer 140 through an adhesive layer 140. Replaced by air. The millimeter wave wafer 150 has an active surface 150a and a contact pad 152 on the active surface 150a. The millimeter wave wafer 150 is buried in the concave cavity. 202, but the active surface 150a faces the second metal layer 104 of the interposer structure 100, and the millimeter wave wafer 150 passes through the bump 160 or the solder ball or the golden ball between the second metal layer 104 and the contact pad 152. The contact pads 152 of the wafer and the second metal layer 104 (pad 112) are electrically connected. In addition, the antenna pattern 110 is electrically connected to the antenna pattern 110 and the millimeter wave wafer 150 through the plated through hole structure 120 and the bumps 160 (the pads 112 and the contact pads 152). Here, the substrate 200 is, for example, a printed circuit board or a ceramic substrate.
參考圖1，該天線圖案110可位於該毫米波晶片150的上方。此處，不論是文中描述上方或是下方，端視此封裝結構之放置方向而定，但是並不妨礙此領域者之理解，主要是該天線圖案之位置須與晶片配置之位置對齊，基本上該天線圖案110之圖案分布區域應等於或大於其下晶片之大小，但兩者位置是完全或部分對應的。 Referring to FIG. 1, the antenna pattern 110 may be located above the millimeter wave wafer 150. Here, whether it is above or below the description, depending on the orientation of the package structure, it does not hinder the understanding of the field, mainly because the position of the antenna pattern must be aligned with the position of the wafer configuration, basically The pattern distribution area of the antenna pattern 110 should be equal to or larger than the size of the lower wafer, but the positions of the two are completely or partially corresponding.
參考圖1，該中介層結構100疊合於該基板200上，該中介層結構100透過位於第二金屬層104(銲墊114)與第三金屬層212(銲墊214)之間的凸塊230或錫球或金球，而電性連接第二金屬層104與第三金屬層212。該中介層結構100與該基板200之間可更包括一底膠層130，幫助兩者與凸塊間之固著。也就是說，毫米波晶片150與基板200透過位於第二金屬層104之焊墊114與晶片之間的凸塊160以及位於第二金屬層104與第三金屬層212之間的凸塊230達到電性連接。 Referring to FIG. 1, the interposer structure 100 is superposed on the substrate 200. The interposer structure 100 passes through the bump between the second metal layer 104 (pad 114) and the third metal layer 212 (pad 214). 230 or a solder ball or a gold ball, and electrically connecting the second metal layer 104 and the third metal layer 212. The interposer structure 100 and the substrate 200 may further include a primer layer 130 to assist the adhesion between the two and the bumps. That is, the millimeter wave wafer 150 and the substrate 200 are transmitted through the bumps 160 between the pads 114 and the wafers of the second metal layer 104 and the bumps 230 between the second metal layer 104 and the third metal layer 212. Electrical connection.
因此，圖1所示的整合式毫米波晶片封裝結構10將天線 圖案110配置於毫米波晶片150之上方，並且透過電鍍通孔結構120而電性連接該天線圖案110與該毫米波晶片150，而垂直整合式毫米波晶片封裝結構10，在無須打線的情況下，大大縮短天線圖案110與該毫米波晶片150之間訊號傳輸距離。 Therefore, the integrated millimeter wave chip package structure 10 shown in FIG. 1 will have an antenna The pattern 110 is disposed above the millimeter wave wafer 150 and electrically connected to the antenna pattern 110 and the millimeter wave wafer 150 through the plated through hole structure 120, and the vertically integrated millimeter wave chip package structure 10 without the need for wire bonding The signal transmission distance between the antenna pattern 110 and the millimeter wave wafer 150 is greatly shortened.
圖2是依照本發明的另一實施例的一種整合式毫米波晶片封裝結構的剖面示意圖。參見圖2，整合式毫米波晶片封裝結構20，包括中介層結構100、毫米波晶片150、基板200A與基板300。此處，除了相同的中介層結構100外，圖2之該基板200A與圖1之基板200相當類似，但基板200A包括絕緣層210與分位於絕緣層210兩面的第三金屬層212與第四金屬層216。該第三金屬層212包括多個銲墊214，而該第四金屬層216包括多個銲墊218。此外，基板200A更包括電鍍通孔結構220貫穿該基板200A以及連接絕緣層210兩側的第三金屬層212與第四金屬層216。 2 is a cross-sectional view of an integrated millimeter wave chip package structure in accordance with another embodiment of the present invention. Referring to FIG. 2, the integrated millimeter wave chip package structure 20 includes an interposer structure 100, a millimeter wave wafer 150, a substrate 200A, and a substrate 300. Here, the substrate 200A of FIG. 2 is substantially similar to the substrate 200 of FIG. 1 except for the same interposer structure 100, but the substrate 200A includes an insulating layer 210 and a third metal layer 212 and a fourth portion which are respectively disposed on both sides of the insulating layer 210. Metal layer 216. The third metal layer 212 includes a plurality of pads 214 and the fourth metal layer 216 includes a plurality of pads 218. In addition, the substrate 200A further includes a plated through hole structure 220 penetrating the substrate 200A and the third metal layer 212 and the fourth metal layer 216 connecting the two sides of the insulating layer 210.
該基板300包括置設於銲墊302上之銲球310，該基板300透過置設於銲墊302上之銲球310以及該基板200A之銲墊218，而使該基板200A與該基板300物理性連結且電性相連。此處，該基板200A例如為一承載基板，而該基板300為一印刷電路板，故透過凸塊160、230與銲球310可進一步使毫米波晶片150電性連接至印刷電路板。 The substrate 300 includes a solder ball 310 disposed on the pad 302. The substrate 300 passes through the solder ball 310 disposed on the pad 302 and the pad 218 of the substrate 200A to physically align the substrate 200A with the substrate 300. Sexually connected and electrically connected. Here, the substrate 200A is, for example, a carrier substrate, and the substrate 300 is a printed circuit board. Therefore, the millimeter wave wafer 150 can be further electrically connected to the printed circuit board through the bumps 160, 230 and the solder balls 310.
圖3是依照本發明的又一實施例的一種整合式毫米波晶片封裝結構的剖面示意圖。參見圖3，整合式毫米波晶片封裝結構30，包括中介層結構100、毫米波晶片150、基板200B與基板300。 此處，該基板200B與圖2之基板200A相當類似，雖然基板200A具有一下凹式晶穴，但基板200B則具有一開口203露出該毫米波晶片150，該毫米波晶片150透過位於第二金屬層104與晶片接觸墊152之間的凸塊160，而與中介層結構100達到物理連結。整合式毫米波晶片封裝結構30將天線圖案110配置於毫米波晶片150之上方，並且透過電鍍通孔結構120而電性連接該天線圖案110與該毫米波晶片150，而垂直整合式毫米波晶片封裝結構30，縮短天線圖案110與該毫米波晶片150之間訊號傳輸距離。 3 is a cross-sectional view of an integrated millimeter wave chip package structure in accordance with yet another embodiment of the present invention. Referring to FIG. 3, the integrated millimeter wave chip package structure 30 includes an interposer structure 100, a millimeter wave wafer 150, a substrate 200B, and a substrate 300. Here, the substrate 200B is quite similar to the substrate 200A of FIG. 2. Although the substrate 200A has a recessed crystal cavity, the substrate 200B has an opening 203 exposing the millimeter wave wafer 150, and the millimeter wave wafer 150 is transmitted through the second metal. The bumps 160 between the layer 104 and the wafer contact pads 152 are physically coupled to the interposer structure 100. The integrated millimeter wave chip package structure 30 is disposed above the millimeter wave wafer 150 and electrically connected to the antenna pattern 110 and the millimeter wave wafer 150 through the plated through hole structure 120, and the vertically integrated millimeter wave wafer The package structure 30 shortens the signal transmission distance between the antenna pattern 110 and the millimeter wave wafer 150.
圖4是依照本發明的另一實施例的一種整合式毫米波晶片封裝結構的剖面示意圖。參見圖4，整合式毫米波晶片封裝結構40，包括中介層結構100、毫米波晶片150、基板200與另一中介層結構400。此處，除了與圖1相同的中介層結構100及基板200外，圖4之毫米波晶片封裝結構40包括另一中介層結構400位於該基板200與該中介層結構100之間，該中介層結構400並以凸塊160、230與其上下之該基板200與該中介層結構100連結。該中介層結構400與圖1之該中介層結構100相當類似，該中介層結構400包括上金屬層402、下金屬層404、位於之間的絕緣支撐層406、佈線層408、金屬填孔結構409以及至少一電鍍通孔結構420。該中介層結構400之上金屬層402可以為線路層，但是也可以更包括一天線圖案，端視產品設計而定。而下金屬層404可為一線路層而包括多個銲墊。該中介層結構400透過凸塊160、230電性連接中介層結構100、毫米波晶片150以及基板200。搭配凸 塊160與金屬填孔結構409，天線圖案110透過電鍍通孔結構120、420而與毫米波晶片150電性相連。圖4之毫米波晶片封裝結構40包括另一中介層結構400可以整合被動元件或天線圖案或匹配網路至封裝結構中。 4 is a cross-sectional view of an integrated millimeter wave chip package structure in accordance with another embodiment of the present invention. Referring to FIG. 4, the integrated millimeter wave chip package structure 40 includes an interposer structure 100, a millimeter wave wafer 150, a substrate 200, and another interposer structure 400. Here, in addition to the same interposer structure 100 and substrate 200 as in FIG. 1, the millimeter wave chip package structure 40 of FIG. 4 includes another interposer structure 400 between the substrate 200 and the interposer structure 100, the interposer The structure 400 is coupled to the interposer structure 100 by the bumps 160, 230 and the substrate 200 above and below it. The interposer structure 400 is substantially similar to the interposer structure 100 of FIG. 1. The interposer structure 400 includes an upper metal layer 402, a lower metal layer 404, an insulating support layer 406 between them, a wiring layer 408, and a metal fill structure. 409 and at least one plated through hole structure 420. The metal layer 402 above the interposer structure 400 may be a circuit layer, but may further include an antenna pattern depending on the product design. The lower metal layer 404 can be a wiring layer and includes a plurality of pads. The interposer structure 400 is electrically connected to the interposer structure 100, the millimeter wave wafer 150, and the substrate 200 through the bumps 160 and 230. Matching convex The block 160 and the metal hole filling structure 409, the antenna pattern 110 is electrically connected to the millimeter wave wafer 150 through the plated through hole structures 120 and 420. The millimeter wave chip package structure 40 of FIG. 4 includes another interposer structure 400 that can integrate passive components or antenna patterns or matching networks into the package structure.
圖5是依照本發明的另一實施例的一種整合式毫米波晶片封裝結構的剖面示意圖。參見圖5，整合式毫米波晶片封裝結構50，包括中介層結構100、毫米波晶片150、基板200A、基板300與另一中介層結構400。此處，整合式毫米波晶片封裝結構50與整合式毫米波晶片封裝結構20頗為類似，除了整合式毫米波晶片封裝結構50包括另一中介層結構400位於該基板200A與該中介層結構100之間，該中介層結構400並以凸塊160、230與其上下之該基板200A與該中介層結構100連結。同樣地，該基板300透過置設於銲墊302上之銲球310，而使該基板200A與該基板300物理性連結且電性相連。此處，該基板200A例如為一承載基板，而該基板300為一印刷電路板，故透過凸塊160、230與銲球310可進一步使毫米波晶片150電性連接至印刷電路板。 5 is a cross-sectional view of an integrated millimeter wave chip package structure in accordance with another embodiment of the present invention. Referring to FIG. 5, the integrated millimeter wave chip package structure 50 includes an interposer structure 100, a millimeter wave wafer 150, a substrate 200A, a substrate 300, and another interposer structure 400. Here, the integrated millimeter wave chip package structure 50 is quite similar to the integrated millimeter wave chip package structure 20 except that the integrated millimeter wave chip package structure 50 includes another interposer structure 400 located on the substrate 200A and the interposer structure 100. The interposer structure 400 is connected to the interposer structure 100 by the bumps 160 and 230 and the substrate 200A above and below the bumps 160 and 230. Similarly, the substrate 300 passes through the solder balls 310 disposed on the pad 302, and the substrate 200A is physically and electrically connected to the substrate 300. Here, the substrate 200A is, for example, a carrier substrate, and the substrate 300 is a printed circuit board. Therefore, the millimeter wave wafer 150 can be further electrically connected to the printed circuit board through the bumps 160, 230 and the solder balls 310.
圖6是依照本發明的另一實施例的一種整合式毫米波晶片封裝結構的剖面示意圖。參見圖6，整合式毫米波晶片封裝結構60，包括中介層結構100、毫米波晶片150、基板200B、基板300與另一中介層結構400。此處，整合式毫米波晶片封裝結構60與整合式毫米波晶片封裝結構50頗為類似，不過雖然毫米波晶片封裝結構50之基板200A具有一下凹式晶穴，但毫米波晶片封裝結 構60之基板200B具有一開口203露出該毫米波晶片150，該毫米波晶片150透過凸塊160而與中介層結構400達到物理連結。整合式毫米波晶片封裝結構60將天線圖案110配置於毫米波晶片150之上方，搭配凸塊160與電鍍通孔結構120、420而電性連接該天線圖案110與該毫米波晶片150，故垂直整合式毫米波晶片封裝結構60。 6 is a cross-sectional view showing an integrated millimeter wave chip package structure in accordance with another embodiment of the present invention. Referring to FIG. 6, the integrated millimeter wave chip package structure 60 includes an interposer structure 100, a millimeter wave wafer 150, a substrate 200B, a substrate 300, and another interposer structure 400. Here, the integrated millimeter wave chip package structure 60 is quite similar to the integrated millimeter wave chip package structure 50, but although the substrate 200A of the millimeter wave chip package structure 50 has a concave cavity, the millimeter wave chip package junction The substrate 200B of the structure 60 has an opening 203 exposing the millimeter wave wafer 150, and the millimeter wave wafer 150 is physically connected to the interposer structure 400 through the bumps 160. The integrated millimeter wave chip package structure 60 is disposed above the millimeter wave wafer 150, and is electrically connected to the antenna pattern 110 and the millimeter wave wafer 150 by using the bump 160 and the plated through hole structures 120 and 420. Integrated millimeter wave chip package structure 60.
圖7的整合式毫米波晶片封裝結構可以視為是針對圖1或圖3的天線圖案110的部分俯視示意圖。參見圖7，天線圖案110與電鍍通孔結構120直接連接，採垂直饋入方式，故形成天線圖案所需佈局面積較小。 The integrated millimeter wave chip package structure of FIG. 7 can be considered as a partial top view for the antenna pattern 110 of FIG. 1 or 3. Referring to FIG. 7, the antenna pattern 110 is directly connected to the plated through hole structure 120, and the vertical feed mode is adopted, so that the layout area required for forming the antenna pattern is small.
圖8是另一種毫米波晶片封裝結構的俯視示意圖。相對於圖7之天線圖案110與電鍍通孔結構120直接連接，圖8之天線圖案110A，可以仍舊搭配使用佈線180而從側向饋入達成電性連結。 Figure 8 is a top plan view of another millimeter wave chip package structure. The antenna pattern 110 of FIG. 7 is directly connected to the plated through hole structure 120. The antenna pattern 110A of FIG. 8 can still be used with the wire 180 to be electrically fed from the side.
在本發明的前述各實施例中，雖然只有繪示出一個晶片或單一個天線圖案，但本發明之範圍並不限於此，整合式封裝結構中可以配置多個晶片或多個天線圖案。而該些實施例中，毫米波晶片150可為射頻晶片，第一、第二、第三或第四金屬層等材質可包括為鋁、銅、鎳、金與或銀等金屬。該天線圖案可為射頻天線圖案，例如是微帶式天線(patch antenna)，較佳為60GHz頻帶之天線圖案。 In the foregoing embodiments of the present invention, although only one wafer or a single antenna pattern is illustrated, the scope of the present invention is not limited thereto, and a plurality of wafers or a plurality of antenna patterns may be disposed in the integrated package structure. In these embodiments, the millimeter wave wafer 150 may be a radio frequency wafer, and the first, second, third or fourth metal layers may be made of a metal such as aluminum, copper, nickel, gold or silver. The antenna pattern may be a radio frequency antenna pattern, such as a patch antenna, preferably an antenna pattern of the 60 GHz band.
本發明實施例中整合式毫米波晶片封裝結構利用具有電 鍍通孔結構之中介層結構，而使其上天線圖案與晶片電性連接，因此，無須搭配使用佈線或導線饋入方式來連接天線圖案，而使得形成天線圖案所需佈局面積較小，達到節省佈局面積之目的。 The integrated millimeter wave chip package structure in the embodiment of the invention utilizes electricity The interposer structure of the through-hole structure is plated, and the upper antenna pattern is electrically connected to the wafer. Therefore, it is not necessary to use the wiring or the wire feeding method to connect the antenna pattern, so that the layout area required for forming the antenna pattern is small, reaching Save the layout area.
綜上所述，本發明可使用電鍍通孔結構(導通孔)的方式電性連接與饋入訊號到天線。相較於利用導線或佈線來連接天線圖案，本發明實施例使用電鍍通孔結構(導通孔)的方式電性連接與饋入訊號到天線，因此天線所占用基板的面積較小。圖9為毫米波60GHz微帶式天線增益對導通孔長度之等效波長圖，天線之導通孔長度介於八分之一導波波長至之十六分之一導波波長之間。依據本發明實施例之結構，導通孔之長度約為十一分之一導波波長時，天線增益為6.3dBi，效益較佳。圖10是毫米波天線輻射效率頻率響應圖。根據搭配使用之晶片與產品設計電性要求，以導波波長為D來看，導通孔之長度可設計為搭配導波波長D之十一分之一，亦即D/11。如圖10所示，於60GHz時，使用導帶線饋入方式之天線增益為6.1dBi，天線輻射效率80%(虛線所示)；而使用導通孔饋入方式(導通孔之長度約D/11)之天線增益為6.3dBi，輻射效率83%(實線所示)，確實改善天線效能。 In summary, the present invention can electrically connect and feed signals to the antenna using a plated through hole structure (via). Compared with the use of a wire or a wire to connect the antenna pattern, the embodiment of the present invention electrically connects and feeds the signal to the antenna by using a plated through hole structure (via), so that the area occupied by the antenna is small. Figure 9 is an equivalent wavelength diagram of the gain of the millimeter wave 60 GHz microstrip antenna versus the length of the via hole. The via length of the antenna is between one-eighth of the waveguide wavelength and one-sixteenth of the waveguide wavelength. According to the structure of the embodiment of the present invention, when the length of the via hole is about one-tenth of the waveguide wavelength, the antenna gain is 6.3 dBi, and the benefit is better. Figure 10 is a graph showing the frequency response of the millimeter wave antenna radiation efficiency. According to the matching requirements of the wafer and product design, the length of the via hole can be designed to match one-tenth of the wavelength D of the guided wave, that is, D/11. As shown in FIG. 10, at 60 GHz, the antenna gain using the conduction line feed mode is 6.1 dBi, the antenna radiation efficiency is 80% (shown by a broken line), and the via hole feed mode is used (the length of the via hole is about D/ 11) The antenna gain is 6.3dBi and the radiation efficiency is 83% (shown by the solid line), which really improves the antenna performance.
本發明可將晶片內埋在下凹式或具開口的基板內，降低封裝結構之整體厚度。另外，相對於採用導線或佈線方式連接天線之封裝結構，本案晶片搭配貫孔導通結構來連接天線圖案，可減少天線佈局所需面積，不損及甚至增強天線效能，本發明確實有效地整合射頻晶片與天線圖案於封裝結構中，達到減少毫米波 功率耗損，提升封裝模組效能。由於本案實施例中透過將天線圖案配置於晶片配置位置之上方或下方，並且透過電鍍導通孔結構來電性連接天線圖案與晶片，而將訊號傳輸路徑變短減少高頻訊號損耗。 The invention can embed the wafer in a recessed or open substrate to reduce the overall thickness of the package structure. In addition, compared with the package structure in which the antenna is connected by wire or wiring, the wafer of the present invention is connected with the through-hole conduction structure to connect the antenna pattern, thereby reducing the area required for the antenna layout, without impairing or even enhancing the antenna performance, and the present invention effectively integrates the RF. Wafer and antenna pattern in the package structure to reduce millimeter waves Power consumption, improve package module performance. In the embodiment of the present invention, by disposing the antenna pattern above or below the wafer arrangement position and electrically connecting the antenna pattern and the wafer through the plated via structure, the signal transmission path is shortened to reduce high frequency signal loss.
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.
10‧‧‧封裝結構 10‧‧‧Package structure
100‧‧‧中介層結構 100‧‧‧Intermediary structure
102‧‧‧第一金屬層 102‧‧‧First metal layer
104‧‧‧第二金屬層 104‧‧‧Second metal layer
106‧‧‧絕緣支撐層 106‧‧‧Insulating support layer
108‧‧‧佈線層 108‧‧‧ wiring layer
109‧‧‧金屬填孔結構 109‧‧‧Metal hole filling structure
110‧‧‧天線圖案 110‧‧‧Antenna pattern
112、114、214‧‧‧銲墊 112, 114, 214‧‧ ‧ pads
120‧‧‧電鍍通孔結構 120‧‧‧Electroplated through-hole structure
130‧‧‧底膠層 130‧‧‧Under layer
140‧‧‧黏膠層 140‧‧‧Adhesive layer
150‧‧‧毫米波晶片 150‧‧‧ millimeter wave wafer
150a‧‧‧主動面 150a‧‧‧ active face
152‧‧‧接觸墊 152‧‧‧Contact pads
160、230‧‧‧凸塊 160, 230‧‧ ‧ bumps
200‧‧‧基板 200‧‧‧Substrate
202‧‧‧下凹式晶穴 202‧‧‧ concave concave hole
210‧‧‧絕緣層 210‧‧‧Insulation
212‧‧‧第三金屬層 212‧‧‧ Third metal layer
Claims (14)
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| TW103143653A TWI557854B (en) | 2014-12-15 | 2014-12-15 | Integrated millimeter-wave chip package |
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| WO2018125213A1 (en) * | 2016-12-30 | 2018-07-05 | Intel Corporation | Recessed semiconductor die in a die stack to accommodate a component |
| TWI684260B (en) * | 2017-05-11 | 2020-02-01 | 矽品精密工業股份有限公司 | Electronic package and method for fabricating the same |
| TWI637474B (en) * | 2017-06-03 | 2018-10-01 | 力成科技股份有限公司 | Package structure and manufacturing method thereof |
| US11380979B2 (en) | 2018-03-29 | 2022-07-05 | Intel Corporation | Antenna modules and communication devices |
| US11509037B2 (en) * | 2018-05-29 | 2022-11-22 | Intel Corporation | Integrated circuit packages, antenna modules, and communication devices |
| KR102066903B1 (en) * | 2018-07-03 | 2020-01-16 | 삼성전자주식회사 | Antenna module |
| CN113035832B (en) * | 2021-05-25 | 2022-07-08 | 甬矽电子(宁波)股份有限公司 | Wafer-level chip packaging structure, manufacturing method thereof and electronic equipment |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
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| US7592202B2 (en) * | 2006-03-31 | 2009-09-22 | Intel Corporation | Embedding device in substrate cavity |
| US8536695B2 (en) * | 2011-03-08 | 2013-09-17 | Georgia Tech Research Corporation | Chip-last embedded interconnect structures |
| TW201436361A (en) * | 2013-03-04 | 2014-09-16 | Advanced Semiconductor Eng | Semiconductor package including antenna substrate and manufacturing method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US7592202B2 (en) * | 2006-03-31 | 2009-09-22 | Intel Corporation | Embedding device in substrate cavity |
| US8536695B2 (en) * | 2011-03-08 | 2013-09-17 | Georgia Tech Research Corporation | Chip-last embedded interconnect structures |
| TW201436361A (en) * | 2013-03-04 | 2014-09-16 | Advanced Semiconductor Eng | Semiconductor package including antenna substrate and manufacturing method thereof |
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