TWI553796B - Packaging method and system of temperature sensing chip - Google Patents
Packaging method and system of temperature sensing chip Download PDFInfo
- Publication number
- TWI553796B TWI553796B TW104126766A TW104126766A TWI553796B TW I553796 B TWI553796 B TW I553796B TW 104126766 A TW104126766 A TW 104126766A TW 104126766 A TW104126766 A TW 104126766A TW I553796 B TWI553796 B TW I553796B
- Authority
- TW
- Taiwan
- Prior art keywords
- chamber
- wafer
- substrate
- temperature measurement
- temperature
- Prior art date
Links
Landscapes
- Laser Beam Processing (AREA)
- Measuring Temperature Or Quantity Of Heat (AREA)
Description
下列敘述是有關於一種溫測晶片封裝方法及其系統,特別是有關於使用相連接的腔室進行溫測晶片封裝以及檢測的技術。The following description relates to a temperature measurement wafer packaging method and system thereof, and more particularly to techniques for temperature measurement wafer packaging and inspection using a connected chamber.
目前,紅外線(IR)視頻攝影機已經被應用於記錄及貯存連續之熱影像,在紅外線(IR)視頻攝影機中包含一溫測晶片,其包含溫度感測元件陣列(array),每一溫度感測元件可根據其接收到的紅外線輻射能量而對應地改變其電阻值,因此每一溫度感測元件的電阻值改變可對應熱能量的強弱,每一溫度感測元件陣列便可產生一熱影像。At present, infrared (IR) video cameras have been used to record and store continuous thermal images. In an infrared (IR) video camera, a temperature measurement wafer is included, which includes an array of temperature sensing elements, each temperature sensing. The component can change its resistance value according to the infrared radiation energy received by the component. Therefore, the resistance value change of each temperature sensing component can correspond to the thermal energy intensity, and each temperature sensing component array can generate a thermal image.
溫測晶片係設置在一基座上,然後以蓋體與基座封裝,而且為了避免封裝空間中產生熱對流而影響溫度感測元件陣列所感測的熱能量,封裝空間係維持在真空狀態,而溫度感測元件陣列的靈敏度係與封裝空間之真空程度有關。The temperature measuring chip is disposed on a pedestal and then encapsulated by the cover and the pedestal, and the package space is maintained in a vacuum state in order to avoid thermal convection in the package space and affect the thermal energy sensed by the temperature sensing element array. The sensitivity of the array of temperature sensing elements is related to the degree of vacuum in the package space.
由於行動電話已普遍設置相機,因此,如何增加此相機的應用便是許多製造商重視的領域。如果熱感應技術可應用於行動電話上,對消費者將是一大福音。然而,目前溫測相機的價格仍然偏高,不利於普及。其中一原因,是目前溫測晶片的封裝流程以及檢測流程並未整合,導致成本無法有效下降。Since mobile phones have universal cameras, how to increase the application of this camera is an area that many manufacturers value. If thermal sensing technology can be applied to mobile phones, it will be a great boon to consumers. However, the current price of temperature measurement cameras is still high, which is not conducive to popularization. One of the reasons is that the current packaging process and the inspection process of the temperature measurement chip are not integrated, resulting in an inefficient cost reduction.
有鑑於上述問題,本發明之目的係提供一種溫測晶片封裝方法以及系統,可有效提高溫測晶片封裝以及檢測的效率。In view of the above problems, an object of the present invention is to provide a temperature measurement chip packaging method and system, which can effectively improve the efficiency of temperature measurement chip packaging and detection.
基於上述目的,本發明係提供一種溫測晶片封裝方法,其包含下列步驟。(a)提供第一腔室,將基板以及複數個溫測晶片運輸至第一腔室,基板上係區分為複數個晶片區以及複數個銲接區,並在第一腔室內將複數個溫測晶片分別焊接至複數個晶片區;(b)提供與第一腔室相連的第二腔室,將複數個晶圓蓋體、複數個密封體以及結合有複數個溫測晶片的基板運輸至第二腔室,複數個晶圓蓋體內個別設有凹槽,並在第二腔室內分別將複數個密封體放置在基板之複數個銲接區上,並將複數個晶圓蓋體對準設置於基板上,使得複數個溫測晶片分別位於複數個晶圓蓋體個別的凹槽內;(c)提供與第二腔室相連的第三腔室,將覆上複數個晶圓蓋體的基板運輸至第三腔室,使用雷射照射基板之複數個銲接區,以熔融密封體,致使複數個晶圓蓋體與基板結合以形成複數個封裝結構;(d)提供與第三腔室相連且具有檢測窗的第四腔室,將複數個封裝結構運輸至第四腔室,並以檢測光透過檢測窗照射複數個封裝結構以進行光電檢測,以篩選或分級複數個封裝結構。Based on the above objects, the present invention provides a temperature measurement wafer packaging method comprising the following steps. (a) providing a first chamber for transporting the substrate and the plurality of temperature measuring wafers to the first chamber, the substrate being divided into a plurality of wafer areas and a plurality of welding areas, and the plurality of temperature measuring units in the first chamber Soldering the wafers to the plurality of wafer regions; (b) providing a second chamber connected to the first chamber, transporting the plurality of wafer covers, the plurality of sealing bodies, and the substrate combined with the plurality of temperature measuring wafers to the first a two-chamber, a plurality of wafer covers are individually provided with grooves, and a plurality of sealing bodies are respectively placed on the plurality of soldering regions of the substrate in the second chamber, and the plurality of wafer covers are aligned On the substrate, the plurality of temperature measuring wafers are respectively located in the individual grooves of the plurality of wafer covers; (c) providing a third chamber connected to the second chamber, and the substrate covering the plurality of wafer covers Transporting to the third chamber, irradiating the plurality of soldering regions of the substrate with a laser to melt the sealing body, so that the plurality of wafer covers are combined with the substrate to form a plurality of package structures; (d) providing connection with the third chamber And a fourth chamber having a detection window, which will have a plurality of seals Structure to the fourth transport chamber, and to detect light transmitted through the irradiation detection window for a plurality of photodetector package, or to screen for classifying a plurality of package.
較佳地,在步驟(b)中將複數個晶圓蓋體放置於基板上之後以及步驟(c)中使用雷射之前,更包含分別對複數個晶圓蓋體進行一預壓(pre-bonding)。Preferably, after the plurality of wafer covers are placed on the substrate in the step (b) and before the laser is used in the step (c), the pre-pressing of the plurality of wafer covers is performed separately (pre- Bonding).
較佳地,在第一腔室與第二腔室之間、第二腔室與第三腔室之間、第三腔室與第四腔室之間係設置至少一機械手臂或是至少一傳送帶進行運輸。Preferably, at least one mechanical arm or at least one is disposed between the first chamber and the second chamber, between the second chamber and the third chamber, and between the third chamber and the fourth chamber. Conveyor belt for transportation.
較佳地,第二腔室以及第三腔室分別具有一幫浦,複數個幫浦用以排出第二腔室以及第三腔室內的空氣,將第二腔室以及第三腔室維持在真空狀態。Preferably, the second chamber and the third chamber respectively have a pump, and the plurality of pumps are used to discharge the air in the second chamber and the third chamber, and the second chamber and the third chamber are maintained at Vacuum state.
較佳地,在步驟(c)中更包含對基板進行加熱。Preferably, in step (c), the substrate is further heated.
較佳地,在步驟(a)中更包含提供複數個吸氣劑,並將吸氣劑分別設置在基板之表面上。Preferably, in step (a), a plurality of getters are further provided, and the getter is separately disposed on the surface of the substrate.
較佳地,在步驟(b)中更包含提供複數個吸氣劑,並將複數個吸氣劑分別設置在複數個凹槽之表面上。Preferably, in step (b), a plurality of getters are further provided, and a plurality of getters are respectively disposed on the surfaces of the plurality of grooves.
較佳地,本發明之溫測晶片封裝方法更包含:在第四腔室中切割複數個封裝結構以及將不同等級之複數個封裝結構分別從第四腔室之複數個出料口輸出。Preferably, the temperature measurement chip packaging method of the present invention further comprises: cutting a plurality of package structures in the fourth chamber and outputting a plurality of package structures of different levels from the plurality of discharge ports of the fourth chamber.
基於上述目的,本發明再提供一種溫測晶片封裝系統,其包含第一腔室、第二腔室、第三腔室、第四腔室、發光裝置以及複數個運輸裝置。第一腔室具有複數個第一入料口、第一出料口以及焊接裝置,基板、複數個溫測晶片以及銲料係分別從複數個第一入料口運輸至第一腔室,基板上係區分為複數個晶片區以及複數個銲接區,焊接裝置可將複數個溫測晶片分別透過銲料焊接至複數個晶片區。第二腔室具有複數個第二入料口、第二出料口以及安裝裝置,複數個第二入料口之一係與第一出料口相通,而複數個晶圓蓋體、複數個密封體以及結合有複數個溫測晶片的基板係分別從複數個第二入料口運輸至第二腔室,複數個晶圓蓋體內個別設有凹槽,分別將複數個密封體放置在基板之複數個銲接區上,並將複數個晶圓蓋體對準設置於基板上,使得複數個溫測晶片分別位於複數個凹槽內且複數個晶圓蓋體係置於複數個密封體上。第三腔室具有第三入料口、第三出料口以及雷射裝置,第三入料口係與第二出料口相通,已覆上複數個晶圓蓋體的基板係從第三入料口運輸至第三腔室,雷射裝置發出雷射照射基板之複數個銲接區,以熔融密封體,致使複數個晶圓蓋體與基板結合以形成複數個封裝結構。發光裝置係設置於第四腔室之外部,發光裝置係發出檢測光。第四腔室具有第四入料口、至少一第四出料口、檢測窗以及晶片檢測裝置,第四入料口係與第三出料口相通,複數個封裝結構係透過第四入料口運輸至第四腔室,晶片檢測裝置可電性連接複數個封裝結構以接收穿透檢測窗之檢測光進行光電檢測,以篩選或分級複數個封裝結構。複數個運輸裝置用以分別進行第一腔室與第二腔室之間、第二腔室與第三腔室之間、第三腔室與第四腔室之間的運輸。In view of the above, the present invention further provides a temperature measurement wafer packaging system including a first chamber, a second chamber, a third chamber, a fourth chamber, a light emitting device, and a plurality of transport devices. The first chamber has a plurality of first inlets, a first outlet, and a welding device, and the substrate, the plurality of temperature measuring wafers, and the soldering system are respectively transported from the plurality of first inlets to the first chamber, on the substrate The system is divided into a plurality of wafer regions and a plurality of soldering regions, and the soldering device can respectively solder a plurality of temperature measuring wafers to a plurality of wafer regions through soldering. The second chamber has a plurality of second inlets, a second outlet, and a mounting device, and one of the plurality of second inlets is in communication with the first outlet, and the plurality of wafer covers, the plurality of The sealing body and the substrate combined with the plurality of temperature measuring wafers are respectively transported from the plurality of second inlets to the second chamber, and the plurality of wafer covers are individually provided with grooves, and the plurality of sealing bodies are respectively placed on the substrate. The plurality of wafer covers are aligned on the substrate, such that the plurality of temperature measurement wafers are respectively located in the plurality of grooves and the plurality of wafer cover systems are disposed on the plurality of sealing bodies. The third chamber has a third inlet port, a third discharge port, and a laser device. The third inlet port communicates with the second discharge port, and the substrate plate that has covered the plurality of wafer covers is from the third The inlet port is transported to the third chamber, and the laser device emits a plurality of soldering regions of the laser to irradiate the substrate to melt the sealing body, so that the plurality of wafer covers are combined with the substrate to form a plurality of package structures. The illuminating device is disposed outside the fourth chamber, and the illuminating device emits the detecting light. The fourth chamber has a fourth inlet, at least a fourth outlet, a detection window and a wafer detecting device. The fourth inlet is in communication with the third outlet, and the plurality of packaging structures are passed through the fourth inlet. The port is transported to the fourth chamber, and the wafer detecting device can be electrically connected to the plurality of package structures to receive the detection light penetrating the detection window for photoelectric detection to filter or classify the plurality of package structures. A plurality of transport devices are used to transport between the first chamber and the second chamber, between the second chamber and the third chamber, and between the third chamber and the fourth chamber, respectively.
較佳地,第二腔室更包含預壓裝置,在複數個晶圓蓋體放置於基板上之後預壓裝置對晶圓蓋體進行一預壓(pre-bonding)。Preferably, the second chamber further comprises a pre-pressing device for pre-bonding the wafer cover after the plurality of wafer covers are placed on the substrate.
較佳地,複數個運輸裝置包含至少一機械手臂、至少一傳送帶或兩者之組合。Preferably, the plurality of transport devices comprise at least one robotic arm, at least one conveyor belt, or a combination of both.
較佳地,第二腔室以及第三腔室分別具有一幫浦,複數個幫浦用以排出第二腔室以及第三腔室內的空氣,將第二腔室以及第三腔室維持在真空狀態。Preferably, the second chamber and the third chamber respectively have a pump, and the plurality of pumps are used to discharge the air in the second chamber and the third chamber, and the second chamber and the third chamber are maintained at Vacuum state.
較佳地,第三腔室更包含加熱裝置,用以對基板進行加熱。Preferably, the third chamber further comprises heating means for heating the substrate.
較佳地,第四腔室更包含一切割裝置,用以分離複數個封裝結構,且不同等級之複數個封裝結構分別從第四腔室之複數個出料口輸出。Preferably, the fourth chamber further comprises a cutting device for separating the plurality of package structures, and the plurality of package structures of different levels are respectively output from the plurality of discharge ports of the fourth chamber.
於此使用,詞彙“與/或”包含一或多個相關條列項目之任何或所有組合。當“至少其一”之敘述前綴於一元件清單前時,係修飾整個清單元件而非修飾清單中之個別元件。As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items. When the phrase "at least one of" is preceded by a list of elements, the entire list of elements is modified instead of the individual elements in the list.
參閱第1圖至第7圖,其為根據本發明之溫測晶片封裝系統之示意圖以及方塊圖。圖中,溫測晶片封裝系統包含第一腔室10、第二腔室20、第三腔室30、第四腔室40、發光裝置42以及複數個運輸裝置。複數個運輸裝置可包含至少一機械手臂、至少一傳送帶或兩者之組合,用以分別進行第一腔室10與第二腔室20之間、第二腔室20與第三腔室30之間、第三腔室30與第四腔室40之間的運輸。Referring to Figures 1 through 7, which are schematic and block diagrams of a temperature-controlled wafer package system in accordance with the present invention. In the figure, the temperature measurement wafer packaging system includes a first chamber 10, a second chamber 20, a third chamber 30, a fourth chamber 40, a light emitting device 42, and a plurality of transport devices. The plurality of transport devices may include at least one robot arm, at least one conveyor belt, or a combination of the two for separately performing between the first chamber 10 and the second chamber 20, and between the second chamber 20 and the third chamber 30. Transportation between the third chamber 30 and the fourth chamber 40.
第一腔室10具有複數個第一入料口101、第一出料口102以及焊接裝置103,而基板70、複數個溫測晶片52以及銲料512係分別從複數個第一入料口101運輸至第一腔室10,基板70上係區分為複數個晶片區71以及複數個銲接區72,焊接裝置103可將複數個溫測晶片52分別透過焊料512焊接至複數個晶片區71,如第3圖所示。焊接區72可由鋁或其他金屬形成。其中,基板70可以為一整片的基材,或是單顆或是多顆晶片載體的連板。The first chamber 10 has a plurality of first inlets 101, a first outlet 102, and a welding device 103, and the substrate 70, the plurality of temperature measuring wafers 52, and the solder 512 are respectively from the plurality of first inlets 101. The substrate 70 is transported to the plurality of wafer regions 71 and the plurality of solder regions 72. The soldering device 103 can solder the plurality of temperature sensing wafers 52 through the solder 512 to the plurality of wafer regions 71, such as Figure 3 shows. The weld zone 72 can be formed from aluminum or other metals. The substrate 70 can be a whole piece of substrate, or a single or multiple wafer carrier.
第二腔室20具有複數個第二入料口201、第二出料口202以及安裝裝置22,而複數個第二入料口201之一係與第一出料口102相通,而複數個晶圓蓋體54、複數個密封體55以及結合有複數個溫測晶片52的基板70係分別從複數個第二入料口201運輸至第二腔室20。其中,雖第3圖至第7圖僅示出單一晶圓蓋體54針對單一溫測晶片52的封裝流程,但本發明不限於此實施例,實質上,可在基板上以複數個晶圓蓋體54分別對應複數個溫測晶片52之位置進行封裝,且複數個晶圓蓋體54可為彼此連接或一體成形的,待封裝完畢後再針對個別的封裝結構進行切割。The second chamber 20 has a plurality of second inlets 201, a second outlet 202, and a mounting device 22, and one of the plurality of second inlets 201 is in communication with the first outlet 102, and a plurality of The wafer cover 54, the plurality of sealing bodies 55, and the substrate 70 combined with the plurality of temperature measuring wafers 52 are transported from the plurality of second inlets 201 to the second chamber 20, respectively. The third to seventh figures only show the packaging flow of the single wafer cover 54 for the single temperature measurement chip 52. However, the present invention is not limited to the embodiment, and substantially, a plurality of wafers can be used on the substrate. The cover body 54 is respectively packaged corresponding to the positions of the plurality of temperature measurement wafers 52, and the plurality of wafer cover bodies 54 may be connected to each other or integrally formed, and then cut for individual package structures after being packaged.
晶圓蓋體54內設有凹槽542,且安裝裝置22將晶圓蓋體54對準設置於基板70上,即對準銲接區72,使得溫測晶片52分別位於凹槽542內,如第4圖以及第5圖所示。此外,基板70上除了有設置晶片之晶片區71外,其周圍亦設置有打線區73,打線區73係至少設置有嵌入基板70表面之接腳墊片521,接腳墊片521係透過基板70內的金屬導線514電性連接溫測晶片52。值得一提的是,基板70上可預先設置用於容納溫測晶片52及密封體55的複數個槽,使得溫測晶片52及密封體55可嵌入基板70之表面。The wafer cover 54 is provided with a recess 542, and the mounting device 22 aligns the wafer cover 54 on the substrate 70, that is, the soldering area 72, so that the temperature measuring wafer 52 is respectively located in the recess 542, such as Figure 4 and Figure 5 show. In addition, the substrate 70 is provided with a wire bonding area 73 around the wafer area 71 on which the wafer is disposed. The wire bonding area 73 is provided with at least a pin pad 521 embedded in the surface of the substrate 70, and the pin pad 521 is transmitted through the substrate. The metal wire 514 within the 70 is electrically connected to the temperature measuring wafer 52. It is worth mentioning that a plurality of slots for accommodating the temperature measuring wafer 52 and the sealing body 55 can be preset on the substrate 70, so that the temperature measuring wafer 52 and the sealing body 55 can be embedded in the surface of the substrate 70.
此外,具體實施時,第二腔室20視需要更可包含一預壓裝置21,在晶圓蓋體54放置於基板70上之後預壓裝置21對晶圓蓋體54進行一預壓(pre-bonding)。晶圓蓋體54用一紅外線可穿透之材料所形成,例如鍺(Ge)、矽或琉化玻璃。In addition, in a specific implementation, the second chamber 20 may further include a pre-pressing device 21, and the pre-pressing device 21 pre-presses the wafer cover 54 after the wafer cover 54 is placed on the substrate 70. -bonding). The wafer cover 54 is formed of an infrared permeable material such as germanium (Ge), germanium or bismuth glass.
此外,具體實施時,第一腔室10或第二腔室20視需要更可輸入複數個吸氣劑80,其分別在第一腔室10中設置在基板70之表面上;或者在第二腔室20中設置於凹槽542之表面上。在第2圖中,此實施例係以吸氣劑80輸入至第二腔室20作為舉例,但並不以此為限制。In addition, in a specific implementation, the first chamber 10 or the second chamber 20 may further input a plurality of getters 80, which are respectively disposed on the surface of the substrate 70 in the first chamber 10; or in the second The chamber 20 is disposed on the surface of the recess 542. In the second embodiment, this embodiment is exemplified by the getter 80 being input to the second chamber 20, but is not limited thereto.
第三腔室30具有第三入料口301、第三出料口302以及雷射裝置31,第三入料口301係與第二出料口202相通,已覆上晶圓蓋體54的基板70係從第三入料口301運輸至第三腔室30,雷射裝置31發出雷射311照射基板70之複數個銲接區72,以熔融密封體55,致使複數個晶圓蓋體54與基板70結合以形成複數個封裝結構56。The third chamber 30 has a third inlet 301, a third outlet 302, and a laser device 31. The third inlet 301 communicates with the second outlet 202 and is covered with the wafer cover 54. The substrate 70 is transported from the third inlet 301 to the third chamber 30, and the laser device 31 emits a plurality of lands 72 of the substrate 710 by the laser 311 to melt the sealing body 55, thereby causing the plurality of wafer covers 54. The substrate 70 is combined to form a plurality of package structures 56.
此外,具體實施時,第三腔室30更包含一加熱裝置,用以對基板70進行加熱,以進一步加速基板70之脫氣(outgassing)。In addition, in a specific implementation, the third chamber 30 further includes a heating device for heating the substrate 70 to further accelerate the outgassing of the substrate 70.
由於真空度之高低係影響溫測晶片52的靈敏度,所以第二腔室20以及第三腔室30分別具有一幫浦,用以排出第二腔室20以及第三腔室30內的空氣,將第二腔室20以及第三腔室30維持在真空狀態。Since the degree of vacuum affects the sensitivity of the temperature measuring wafer 52, the second chamber 20 and the third chamber 30 respectively have a pump for discharging the air in the second chamber 20 and the third chamber 30, The second chamber 20 and the third chamber 30 are maintained in a vacuum state.
第四腔室40具有第四入料口401、至少一第四出料口402、檢測窗41以及晶片檢測裝置43,第四入料口401係與第三出料口302相通,複數個封裝結構56係透過第四入料口401運輸至第四腔室40。發光裝置42係設置於第四腔室40之外部,發光裝置42係發出檢測光421且穿透檢測窗41射入第四腔室40。晶片檢測裝置43可電性連接複數個封裝結構56以接收穿透檢測窗41之檢測光421進行檢測,以篩選或分級複數個封裝結構56。The fourth chamber 40 has a fourth inlet 401, at least a fourth outlet 402, a detection window 41, and a wafer detecting device 43. The fourth inlet 401 is in communication with the third outlet 302, and the plurality of packages Structure 56 is transported through fourth inlet port 401 to fourth chamber 40. The light-emitting device 42 is disposed outside the fourth chamber 40, and the light-emitting device 42 emits the detection light 421 and penetrates the detection window 41 into the fourth chamber 40. The wafer detecting device 43 can be electrically connected to the plurality of package structures 56 to receive the detection light 421 of the penetration detecting window 41 for detection to filter or classify the plurality of package structures 56.
第四腔室40更包含一切割裝置,用以切割複數個封裝結構56,且不同等級之複數個封裝結構56分別從第四腔室40之複數個出料口輸出。The fourth chamber 40 further includes a cutting device for cutting a plurality of package structures 56, and a plurality of different package structures 56 are output from the plurality of discharge ports of the fourth chamber 40, respectively.
請參閱第8圖,其繪示本發明之溫測晶片封裝方法之步驟流程圖。圖中,溫測晶片封裝方法係參考第1圖至第7圖中的元件符號進行說明,包含下列步驟。在步驟S1,提供第一腔室10,並將一基板70以及複數個溫測晶片52運輸至第一腔室10,基板70上係區分為複數個晶片區71以及複數個銲接區72,並在第一腔室10內將複數個溫測晶片52分別焊接至複數個晶片區71。Please refer to FIG. 8 , which is a flow chart showing the steps of the temperature measurement chip packaging method of the present invention. In the figure, the temperature measurement chip packaging method is described with reference to the component symbols in FIGS. 1 to 7, and includes the following steps. In step S1, a first chamber 10 is provided, and a substrate 70 and a plurality of temperature measuring wafers 52 are transported to the first chamber 10. The substrate 70 is divided into a plurality of wafer regions 71 and a plurality of soldering regions 72, and A plurality of temperature measuring wafers 52 are respectively soldered to the plurality of wafer regions 71 in the first chamber 10.
在步驟S2,提供與第一腔室10相連的一第二腔室20,將複數個晶圓蓋體54、複數個密封體55以及結合有複數個溫測晶片52的基板70運輸至第二腔室20,複數個晶圓蓋體54內分別設有凹槽542,並在第二腔室20內分別將複數個密封體55放置在基板70之複數個銲接區72上,並將複數個晶圓蓋體54分別對準設置於基板70上,使得複數個溫測晶片52分別位於複數個凹槽542內。In step S2, a second chamber 20 connected to the first chamber 10 is provided, and the plurality of wafer covers 54, the plurality of sealing bodies 55, and the substrate 70 combined with the plurality of temperature measuring wafers 52 are transported to the second a plurality of wafer covers 54 are respectively provided with recesses 542, and a plurality of sealing bodies 55 are respectively placed on the plurality of soldering regions 72 of the substrate 70 in the second chamber 20, and a plurality of the plurality of soldering regions 72 are respectively disposed on the plurality of soldering regions 72 of the substrate 70. The wafer cover bodies 54 are respectively disposed on the substrate 70 such that the plurality of temperature measurement wafers 52 are respectively located in the plurality of grooves 542.
在步驟S3,提供與第二腔室20相連的一第三腔室30,將覆上複數個晶圓蓋體54的基板70運輸至第三腔室30,使用一雷射311照射基板70之複數個銲接區72,以熔融密封體55,致使複數個晶圓蓋體54與基板70結合以形成複數個封裝結構56。在步驟S3中,視需要更可包含對基板70進行加熱。In step S3, a third chamber 30 connected to the second chamber 20 is provided, and the substrate 70 covered with the plurality of wafer covers 54 is transported to the third chamber 30, and the substrate 70 is irradiated with a laser 311. A plurality of lands 72 are formed to melt the sealing body 55 such that a plurality of wafer covers 54 are bonded to the substrate 70 to form a plurality of package structures 56. In step S3, the substrate 70 may be further heated as needed.
實施上,可將複數個晶圓蓋體54放置於基板70上之後以及步驟S3中使用雷射311之前,更包含對晶圓蓋體54進行一預壓(pre-bonding)。此外,第二腔室20以及第三腔室30分別具有一幫浦,複數個幫浦用以排出第二腔室20以及第三腔室30內的空氣,將第二腔室20以及第三腔室30維持在真空狀態。In practice, after the plurality of wafer covers 54 are placed on the substrate 70 and before the laser 311 is used in step S3, a pre-bonding of the wafer cover 54 is further included. In addition, the second chamber 20 and the third chamber 30 respectively have a pump, and a plurality of pumps are used to discharge the air in the second chamber 20 and the third chamber 30, and the second chamber 20 and the third chamber The chamber 30 is maintained in a vacuum state.
此外,在步驟S1或步驟S2中更包含提供複數個吸氣劑80,並將吸氣劑80分別設置在基板70之表面上或是在複數個凹槽542之表面上。In addition, in step S1 or step S2, a plurality of getters 80 are further provided, and the getter 80 is disposed on the surface of the substrate 70 or on the surface of the plurality of grooves 542, respectively.
在步驟S4,提供與第三腔室30相連且具有一檢測窗41的一第四腔室40,將複數個封裝結構56運輸至第四腔室40,並以一檢測光421透過檢測窗41照射複數個封裝結構56以進行檢測,以篩選或分級複數個封裝結構56。In step S4, a fourth chamber 40 connected to the third chamber 30 and having a detection window 41 is provided, and the plurality of package structures 56 are transported to the fourth chamber 40, and the detection light is passed through the detection window 41. A plurality of package structures 56 are illuminated for detection to screen or classify a plurality of package structures 56.
最後,在步驟S5,在第四腔室40中切割複數個封裝結構56以及將不同等級之複數個封裝結構56分別從第四腔室40之複數個出料口輸出。Finally, in step S5, a plurality of package structures 56 are cut in the fourth chamber 40 and a plurality of package structures 56 of different levels are respectively output from the plurality of discharge ports of the fourth chamber 40.
執行上述步驟S1~S4時,第一腔室10與第二腔室20之間、第二腔室20與第三腔室30之間、第三腔室30與第四腔室40之間的運輸係使用至少一機械手臂或是至少一傳送帶來進行。When the above steps S1 to S4 are performed, between the first chamber 10 and the second chamber 20, between the second chamber 20 and the third chamber 30, and between the third chamber 30 and the fourth chamber 40 The transport is carried out using at least one robotic arm or at least one conveyor.
在較佳實施例之詳細說明中所提出之具體實施例僅用以方便說明本發明之技術內容,而非將本發明狹義地限制於上述實施例,在不超出本發明之精神及以下申請專利範圍之情況,所做之種種變化實施,皆屬於本發明之範圍。The specific embodiments of the present invention are intended to be illustrative only and not to limit the invention to the above embodiments, without departing from the spirit of the invention and the following claims. The scope of the invention and the various changes made are within the scope of the invention.
10‧‧‧第一腔室
101‧‧‧第一入料口
102‧‧‧第一出料口
103‧‧‧焊接裝置
20‧‧‧第二腔室
201‧‧‧第二入料口
202‧‧‧第二出料口
21‧‧‧預壓裝置
22‧‧‧安裝裝置
30‧‧‧第三腔室
301‧‧‧第三入料口
302‧‧‧第三出料口
31‧‧‧雷射裝置
311‧‧‧雷射
40‧‧‧第四腔室
401‧‧‧第四入料口
402‧‧‧第四出料口
41‧‧‧檢測窗
42‧‧‧發光裝置
421‧‧‧檢測光
43‧‧‧晶片檢測裝置
51‧‧‧槽型基座
511‧‧‧邊緣部
512‧‧‧銲料
514‧‧‧導線
52‧‧‧溫測晶片
521‧‧‧接腳墊片
53‧‧‧蓋體
54‧‧‧晶圓蓋體
542‧‧‧凹槽
55‧‧‧密封體
56‧‧‧封裝結構
70‧‧‧基板
71‧‧‧晶片區
72‧‧‧銲接區
73‧‧‧打線區
80‧‧‧吸氣劑
S1~S5‧‧‧步驟10‧‧‧ first chamber
101‧‧‧First inlet
102‧‧‧First discharge opening
103‧‧‧Welding device
20‧‧‧Second chamber
201‧‧‧Second inlet
202‧‧‧Second outlet
21‧‧‧Preloading device
22‧‧‧Installation device
30‧‧‧ third chamber
301‧‧‧ third inlet
302‧‧‧ Third discharge opening
31‧‧‧ Laser device
311‧‧‧Laser
40‧‧‧fourth chamber
401‧‧‧fourth inlet
402‧‧‧fourth discharge opening
41‧‧‧Detection window
42‧‧‧Lighting device
421‧‧‧Detection light
43‧‧‧ wafer inspection device
51‧‧‧ slot base
511‧‧‧Edge
512‧‧‧ solder
514‧‧‧Wire
52‧‧‧Wet Wafer
521‧‧‧foot pads
53‧‧‧ Cover
54‧‧‧ wafer cover
542‧‧‧ Groove
55‧‧‧ Sealing body
56‧‧‧Package structure
70‧‧‧Substrate
71‧‧‧ wafer area
72‧‧‧Weld area
73‧‧‧Line area
80‧‧‧ getter
S1~S5‧‧‧Steps
本發明之上述及其他特徵及優勢將藉由參照附圖詳細說明其例示性實施例而變得更顯而易知,其中:第1圖係為根據本發明之溫測晶片封裝系統之示意圖;第2圖係為根據本發明之溫測晶片封裝系統之方塊示意圖;第3圖至第7圖係為根據本發明在不同腔室進行操作之示意圖;以及第8圖係為根據本發明之溫測晶片封裝方法之步驟流程圖。The above and other features and advantages of the present invention will become more apparent from the detailed description of the exemplary embodiments illustrated in the accompanying drawings in which: FIG. 1 is a schematic diagram of a temperature-controlled wafer packaging system in accordance with the present invention; 2 is a block diagram of a temperature measurement wafer package system in accordance with the present invention; FIGS. 3 through 7 are schematic views of operation in different chambers in accordance with the present invention; and FIG. 8 is a temperature according to the present invention. A flow chart of the steps of the chip packaging method.
S1~S5‧‧‧步驟 S1~S5‧‧‧Steps
Claims (17)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW104126766A TWI553796B (en) | 2015-08-18 | 2015-08-18 | Packaging method and system of temperature sensing chip |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW104126766A TWI553796B (en) | 2015-08-18 | 2015-08-18 | Packaging method and system of temperature sensing chip |
Publications (2)
Publication Number | Publication Date |
---|---|
TWI553796B true TWI553796B (en) | 2016-10-11 |
TW201709433A TW201709433A (en) | 2017-03-01 |
Family
ID=57848284
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW104126766A TWI553796B (en) | 2015-08-18 | 2015-08-18 | Packaging method and system of temperature sensing chip |
Country Status (1)
Country | Link |
---|---|
TW (1) | TWI553796B (en) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0695941A2 (en) * | 1994-06-08 | 1996-02-07 | Affymax Technologies N.V. | Method and apparatus for packaging a chip |
WO2006067784A1 (en) * | 2004-12-23 | 2006-06-29 | Rafael Armament Development Authority Ltd. | Chip packaging |
US20060219924A1 (en) * | 2005-04-01 | 2006-10-05 | Tzong-Sheng Lee | Infrared imaging sensor and vacuum packaging method thereof |
US20140170797A1 (en) * | 2012-12-17 | 2014-06-19 | Stack Devices Corp. | Sensor chip protective image sensor packaging method |
-
2015
- 2015-08-18 TW TW104126766A patent/TWI553796B/en not_active IP Right Cessation
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0695941A2 (en) * | 1994-06-08 | 1996-02-07 | Affymax Technologies N.V. | Method and apparatus for packaging a chip |
WO2006067784A1 (en) * | 2004-12-23 | 2006-06-29 | Rafael Armament Development Authority Ltd. | Chip packaging |
US20060219924A1 (en) * | 2005-04-01 | 2006-10-05 | Tzong-Sheng Lee | Infrared imaging sensor and vacuum packaging method thereof |
US20140170797A1 (en) * | 2012-12-17 | 2014-06-19 | Stack Devices Corp. | Sensor chip protective image sensor packaging method |
Also Published As
Publication number | Publication date |
---|---|
TW201709433A (en) | 2017-03-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6437590B2 (en) | Assembly of wafer stack | |
US9038883B2 (en) | VCSEL packaging | |
US9564569B1 (en) | Hermetic solution for thermal and optical sensor-in-package | |
KR102146777B1 (en) | Package picker for transferring semiconductor packages and apparatus including the same | |
US7663095B2 (en) | Photodetector with embedded infrared filter | |
TW201707218A (en) | Methods for fabricating a plurality of optoelectronic devices from a wafer that includes a plurality of light detector sensor areas | |
JP2015534713A (en) | Paneling process for SMT sensor devices | |
US10126462B2 (en) | Proximity sensor, electronic apparatus and method for manufacturing proximity sensor | |
JP2009170730A (en) | Inspecting apparatus for back irradiating type solid-state imaging device | |
US7998779B2 (en) | Solid-state imaging device and method of fabricating solid-state imaging device | |
TW201639181A (en) | Wafer level optoelectronic device packages with crosstalk barriers and methods for making the same | |
KR20200099148A (en) | Infrared device | |
US10381504B2 (en) | Wafer level packaging, optical detection sensor and method of forming same | |
TWI553796B (en) | Packaging method and system of temperature sensing chip | |
CN105047588B (en) | Method and apparatus for checking chip before bonding | |
TWI613429B (en) | Infrared sensor with high-vacuum packaging structure and method for packaging the same | |
US9417344B1 (en) | Glass cap wirebond protection for imaging tiles in an X or gamma ray indirect imaging detector | |
TWI543305B (en) | Device package method and structure thereof | |
TWI613428B (en) | High-vacuum infrared sensor and method for packaging the same | |
JP5930021B2 (en) | Electronic component inspection apparatus and method | |
KR102626352B1 (en) | Method and device for inspecting defect on substrate | |
TW201604997A (en) | Wafer level packaging structure for temperature sensing element | |
EP1751792A1 (en) | Semiconductor package with transparent lid | |
TWI725545B (en) | Solder ring positioning method | |
KR101496050B1 (en) | Apparatus for inspecting light-emitting devices |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
MM4A | Annulment or lapse of patent due to non-payment of fees |