TWI551048B - Linear triangular wave generator with stray effect compensation and associated method for compensating stray effect - Google Patents
Linear triangular wave generator with stray effect compensation and associated method for compensating stray effect Download PDFInfo
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Description
本發明為有關一種三角波產生器,尤指一種具雜散效應補償之線性三角波產生器及其雜散效應補償方法。The invention relates to a triangular wave generator, in particular to a linear triangular wave generator with spurious effect compensation and a method for compensating the same.
常見的線性斜波產生器或三角波訊號產生器為利用定電流源對電容器充電,輸出之訊號與比較器上的參考電壓進行比較,再取得比較器輸出端的訊號後,控制電流源切換。然因製程的非理想性,如雜散效應、偏移效應等,會影響製程訊號的線性程度。The constant linear ramp generator or triangular wave signal generator charges the capacitor with a constant current source, and the output signal is compared with the reference voltage on the comparator, and then the signal of the output of the comparator is obtained, and then the current source is switched. However, the non-ideality of the process, such as spurious effects, offset effects, etc., will affect the linearity of the process signal.
習知去除雜散效應的方式如林俊偉等,於期刊IEICE Electronics Express 發表的「Linearity enhancement technique of ramp generator for ADC testing」,其包含有一電流源、一實體電容、一電容雜散元件以及一負阻抗轉換器,利用該電流源對該實體電容進行充放電,產生一訊號以及造成一雜散效應的該電容雜散元件,於該負阻抗轉換器上設計一與該電容雜散元件相匹配的負向匹配阻抗,以補償該雜散效應。Conventional methods for removing spurious effects, such as Lin Junwei et al., "Linearity enhancement technique of ramp generator for ADC testing", published in the journal IEICE Electronics Express, include a current source, a physical capacitor, a capacitive stray component, and a negative impedance. The converter uses the current source to charge and discharge the solid capacitor to generate a signal and the capacitive stray component causing a spurious effect, and designing a negative impedance matching the capacitive stray component on the negative impedance converter The impedance is matched to compensate for this spurious effect.
該負向匹配阻抗乃是基於該負阻抗轉換器中之一運算放大器為理想的情況下所得,然而,該運算放大器於現實中並非理想,導致該負向匹配阻抗不準確而無法與該電容雜散元件相匹配,使輸出之訊號不線性,因此如何進一步校準該負向匹配阻抗、輸出線性的訊號,實為相關業者共同努力的目標。The negative matching impedance is obtained based on the fact that one of the negative impedance converters is ideal. However, the operational amplifier is not ideal in reality, and the negative matching impedance is inaccurate and cannot be mixed with the capacitor. The components are matched so that the output signal is not linear. Therefore, how to further calibrate the negative matching impedance and output the linear signal is the goal of the related industry.
本發明的主要目的,在於解決該負向匹配阻抗不準確而無法與該電容雜散元件相匹配,進而使輸出之訊號不線性的問題。The main object of the present invention is to solve the problem that the negative matching impedance is inaccurate and cannot be matched with the capacitive stray element, thereby making the output signal non-linear.
為達上述目的,本發明提供一種具雜散效應補償之線性三角波產生器,其包含有一線性三角波產生模組、一負阻抗轉換模組、一阻抗感測模組以及一切換模組,該線性三角波產生模組包含有一第一電流源以及電性連接該第一電流源的實體電容與一雜散元件,該雜散元件係由該第一電流源與該實體電容之雜散效應產生,該第一電流源對該實體電容進行充放電,以產生一線性三角波訊號,該負阻抗轉換模組電性連接於該線性三角波產生模組,並包含有一補償該雜散元件之阻抗的負向匹配阻抗,該切換模組電性連接於該負阻抗轉換模組以及該阻抗感測模組,其包含有切換該阻抗感測模組之感測組態的一第一切換態以及一第二切換態,以供該阻抗感測模組進行該負向匹配阻抗與該雜散元件之阻抗的匹配程度的感測。To achieve the above objective, the present invention provides a linear triangular wave generator with spurious effect compensation, comprising a linear triangular wave generating module, a negative impedance converting module, an impedance sensing module and a switching module, the linear The triangular wave generating module includes a first current source and a physical capacitor and a stray component electrically connected to the first current source, and the stray component is generated by a stray effect of the first current source and the solid capacitor, The first current source charges and discharges the solid capacitor to generate a linear triangular wave signal. The negative impedance conversion module is electrically connected to the linear triangular wave generating module, and includes a negative matching that compensates the impedance of the stray component. The impedance module is electrically connected to the negative impedance conversion module and the impedance sensing module, and includes a first switching state and a second switching for switching the sensing configuration of the impedance sensing module. a state for the impedance sensing module to sense the degree of matching of the negative matching impedance with the impedance of the stray element.
為達上述目的,本發明另提供一種線性三角波產生器之雜散效應的補償方法其包含下列步驟:To achieve the above object, the present invention further provides a method for compensating for spurious effects of a linear triangular wave generator, which comprises the following steps:
S1:利用一線性三角波產生模組中的一第一電流源對一實體電容進行充放電,以產生一三角波訊號,且該線性三角波產生模組更具有一因雜散效應產生的雜散元件;S1: charging and discharging a solid capacitor by using a first current source in a linear triangular wave generating module to generate a triangular wave signal, and the linear triangular wave generating module further has a stray component generated by a spurious effect;
S2:於一負阻抗轉換模組中設計一與該雜散元件相匹配的負向匹配阻抗;S2: design a negative matching impedance matched to the stray element in a negative impedance conversion module;
S3:將該負阻抗轉換模組電性連接於該第一電流源且並聯於該實體電容,藉由該負向匹配阻抗補償該雜散元件之阻抗;S3: electrically connecting the negative impedance conversion module to the first current source and parallel to the physical capacitor, and compensating the impedance of the stray component by the negative matching impedance;
S4:利用一阻抗感測模組感測該負向匹配阻抗與該雜散元件之阻抗的匹配程度;S4: sensing, by using an impedance sensing module, a matching degree of the negative matching impedance and an impedance of the stray component;
S5:將一切換模組電性連接於該負阻抗轉換模組以及該阻抗感測模組,包含有切換該阻抗感測模組之感測組態的一第一切換態以及一第二切換態,以供該阻抗感測模組進行該負向匹配阻抗與該雜散元件之阻抗的匹配程度的感測;以及S5: electrically connecting a switching module to the negative impedance conversion module and the impedance sensing module, including a first switching state and a second switching for switching a sensing configuration of the impedance sensing module a state for the impedance sensing module to sense the degree of matching of the negative matching impedance with the impedance of the stray element;
S6:依據該阻抗感測模組之感測結果調校該負向匹配阻抗之數值,使輸出一線性三角波訊號。S6: Adjust the value of the negative matching impedance according to the sensing result of the impedance sensing module to output a linear triangular wave signal.
由上述可知,本發明藉由該負阻抗轉換模組中的該負向匹配阻抗補償該雜散元件所造成的雜散效應,並更進一步利用該阻抗感測模組感測該負向匹配阻抗與該雜散元件之阻抗的匹配程度,再依據該阻抗感測模組之感測結果調校該負向匹配阻抗,使輸出該線性三角波訊號。As can be seen from the above, the present invention compensates for the spurious effect caused by the stray component by the negative matching impedance in the negative impedance conversion module, and further utilizes the impedance sensing module to sense the negative matching impedance. The degree of matching with the impedance of the stray element is adjusted according to the sensing result of the impedance sensing module to output the linear triangular wave signal.
有關本發明的詳細說明及技術內容,現就配合圖式說明如下:The detailed description and technical content of the present invention will now be described as follows:
請參閱「圖1」所示,為本發明的電路示意圖,其包含有一線性三角波產生模組10、一負阻抗轉換模組20、一阻抗感測模組30以及一切換模組40,該線性三角波產生模組10電性連接於該負阻抗轉換模組20,該切換模組40電性連接於該負阻抗轉換模組20以及該阻抗感測模組30。該線性三角波產生模組10包含有一第一電流源11、一實體電容12、一雜散元件13、一時脈切換單元14以及一窗型比較單元15,該時脈切換單元14電性連接於該第一電流源11與該實體電容12,並控制該第一電流源11對該實體電容12進行充放電,而輸出一三角波訊號,當CLK開關形成通路、 開關形成斷路時,為進行充電狀態,反之,當CLK開關形成斷路、 開關形成通路時,為放電狀態,並因該第一電流源11與該實體電容12的雜散效應而產生該雜散元件13,該雜散元件13又包含有一因該實體電容12而產生的電容雜散元件131以及一因該第一電流源11而產生的第一電流源雜散元件132,該窗型比較單元15電性連接於該第一電流源11且並聯於該實體電容12,其係根據該窗型比較單元15的控制該時脈切換單元14進行充放電,以控制該三角波訊號的輸出上下限。 Please refer to FIG. 1 , which is a schematic circuit diagram of the present invention. The circuit includes a linear triangular wave generating module 10 , a negative impedance converting module 20 , an impedance sensing module 30 , and a switching module 40 . The triangular wave generating module 10 is electrically connected to the negative impedance converting module 20 , and the switching module 40 is electrically connected to the negative impedance converting module 20 and the impedance sensing module 30 . The linear triangular wave generating module 10 includes a first current source 11 , a physical capacitor 12 , a stray component 13 , a clock switching unit 14 , and a window type comparing unit 15 . The clock switching unit 14 is electrically connected to the a first current source 11 and the physical capacitor 12, and controlling the first current source 11 to charge and discharge the solid capacitor 12, and output a triangular wave signal, when the CLK switch forms a path, When the switch forms an open circuit, it is in a charging state, and vice versa, when the CLK switch forms an open circuit, When the switch forms a path, it is in a discharge state, and the stray element 13 is generated due to the stray effect of the first current source 11 and the solid capacitor 12, and the stray element 13 further includes a capacitor 12 a capacitive stray element 131 and a first current source stray element 132 generated by the first current source 11 , the window type comparing unit 15 is electrically connected to the first current source 11 and connected to the physical capacitor 12 , The clock switching unit 14 performs charging and discharging according to the control of the window type comparing unit 15 to control the upper and lower limits of the output of the triangular wave signal.
該負阻抗轉換模組20電性連接於該線性三角波產生模組10,包含有一負向匹配阻抗21、一第一運算放大單元22、一第一電阻23以及一第二電阻24,該第一運算放大單元22包含有一第一反向輸入端221、一第一非反向輸入端222以及一第一輸出端223,該第一非反向輸入端222電性連接於該第一電流源11且與該實體電容12並聯,該第一輸出端223電性連接於該切換模組40,該第一電阻23之兩端分別電性連接於該第一反向輸入端221與該切換模組40,該第二電阻24之兩端電性連接於該第一反向輸入端221與一接地端,該負向匹配阻抗21之兩端分別電性連接於該第一非反向輸入端222以及該切換模組40。藉由該負向匹配阻抗21的設置可以補償該雜散元件13之阻抗,使雜散效應不會對電路造成影響,然因該負阻抗轉換模組20於實現過程中,該第一運算放大單元22並非理想,仍無法避免製程之非理想性的影響,因此,為進一步提升其精確度,再連接該阻抗感測模組30進行二次調校。其中,該負向匹配阻抗21有一對應於該電容雜散元件131的電容負向匹配阻抗211以及一對應於該第一電流源雜散元件132的第一電流源負向匹配阻抗212。The negative impedance conversion module 20 is electrically connected to the linear triangular wave generation module 10, and includes a negative matching impedance 21, a first operational amplification unit 22, a first resistor 23, and a second resistor 24. The operational amplifier unit 22 includes a first inverting input terminal 221 , a first non-inverting input terminal 222 , and a first output terminal 223 . The first non-inverting input terminal 222 is electrically connected to the first current source 11 . The first output end 223 is electrically connected to the switching module 40. The two ends of the first resistor 23 are electrically connected to the first inverting input terminal 221 and the switching module. The two ends of the second resistor 24 are electrically connected to the first inverting input end 221 and a ground end. The two ends of the negative matching impedance 21 are electrically connected to the first non-inverting input end 222 respectively. And the switching module 40. The impedance of the stray element 13 can be compensated by the setting of the negative matching impedance 21, so that the spurious effect does not affect the circuit, but the first operational amplification is performed during the implementation of the negative impedance conversion module 20. The unit 22 is not ideal, and the influence of the non-ideality of the process cannot be avoided. Therefore, in order to further improve the accuracy, the impedance sensing module 30 is connected to perform secondary adjustment. The negative matching impedance 21 has a capacitance negative matching impedance 211 corresponding to the capacitive stray element 131 and a first current source negative matching impedance 212 corresponding to the first current source stray element 132.
而該切換模組40電性連接於該負阻抗轉換模組20以及該阻抗感測模組30,並包含有切換該阻抗感測模組30之感測組態的一第一切換態以及一第二切換態,以供該阻抗感測模組30進行該電容負向匹配阻抗211與該雜散元件13之阻抗的匹配程度的感測。又,該阻抗感測模組30包含有一第二運算放大單元31、一反相單元32、一第一開關33、一第二開關34、一第一電容35、一第二電容36以及一第二電流源37,該第二運算放大單元31包含有一第二反向輸入端311、一第二非反向輸入端312以及一第二輸出端313,該第二非反向輸入端312電性連接於該切換模組40,該第一開關33之兩端分別電性連接於該第二輸出端313以及該第一電容35,該第一電容35遠離該第一開關33之一端電性連接於該第一非反向輸入端222,該第二開關34之兩端電性連接於該負向匹配阻抗21以及該第二輸出端313,該第二電容36之兩端電性連接於該切換模組40以及該第一非反向輸入端222,該反相單元32電性連接於該第二輸出端313以及該第二電流源37,該反相單元32控制該第二電流源37對該阻抗感測模組30進行正、反向的充放電,於本實施例中,該第二電流源37是以一個做為舉例說明,實際運作時可以為兩個,分別進行充電與放電。The switching module 40 is electrically connected to the negative impedance conversion module 20 and the impedance sensing module 30, and includes a first switching state for switching the sensing configuration of the impedance sensing module 30 and a The second switching state is used by the impedance sensing module 30 to sense the matching degree of the capacitance negative matching impedance 211 and the impedance of the stray element 13. The impedance sensing module 30 includes a second operational amplifying unit 31, an inverting unit 32, a first switch 33, a second switch 34, a first capacitor 35, a second capacitor 36, and a first a second current source 37, the second operational amplifier unit 31 includes a second inverting input terminal 311, a second non-inverting input terminal 312, and a second output terminal 313. The second non-inverting input terminal 312 is electrically Connected to the switching module 40, the two ends of the first switch 33 are electrically connected to the second output end 313 and the first capacitor 35, and the first capacitor 35 is electrically connected to one end of the first switch 33. The two ends of the second switch 34 are electrically connected to the negative matching impedance 21 and the second output end 313, and the two ends of the second capacitor 36 are electrically connected to the second non-inverting input terminal 222. The switching module 40 and the first non-inverting input terminal 222 are electrically connected to the second output terminal 313 and the second current source 37. The inverting unit 32 controls the second current source 37. The impedance sensing module 30 is charged and discharged in the forward and reverse directions. In this embodiment, the second current source 37 is As a way of example, it may be two, respectively, the actual charging and discharging operation.
當該切換模組40切換成該第一切換態時,使該第一運算放大單元22之第一輸出端223以及該第二運算放大單元31之第二非反向輸入端312電性連接於該第二電容36;當該切換模組40切換成該第二切換態時,使該第一運算放大單元22之第一輸出端223以及該第二運算放大單元31之第二非反向輸入端312電性連接於該第一電阻23以及該負向匹配阻抗21。並當 形成通路、CK1形成斷路時,該阻抗感測模組30感測該負向匹配阻抗21與該雜散元件13之阻抗的匹配程度,反之,則是對該雜散元件13之阻抗進行補償。 When the switching module 40 is switched to the first switching state, the first output end 223 of the first operational amplifying unit 22 and the second non-inverting input end 312 of the second operational amplifying unit 31 are electrically connected to The second capacitor 36 is configured to: when the switching module 40 is switched to the second switching state, the first output end 223 of the first operational amplifying unit 22 and the second non-inverting input of the second operational amplifying unit 31 The terminal 312 is electrically connected to the first resistor 23 and the negative matching impedance 21 . And when When the path is formed and CK1 is broken, the impedance sensing module 30 senses the degree of matching between the negative matching impedance 21 and the impedance of the stray element 13, and conversely, compensates the impedance of the stray element 13.
續搭配參閱「圖2A」至「圖2E」,為該阻抗感測模組30之四個感測組態的控制方法及其電路示意圖。當該切換模組40切換成該第一切換態、該第一開關33連通、該第二開關34未連通時,形成一第一組態50,並產生一第一訊號週期;當該切換模組40切換成該第一切換態、該第一開關33未連通、該第二開關34連通時,形成一第二組態51,並產生一第二訊號週期;當該切換模組40切換成該第二切換態、該第一開關33連通、該第二開關34未連通時,形成一第三組態52,並產生一第三訊號週期;當該切換模組40切換成該第一切換態、該第一開關33以及第二開關34未連通時,形成一第四組態53,並產生一第四訊號週期。透過四個組態的切換以將該第一運算放大單元22之非理想條件一併考慮,將該第一訊號週期、該第二訊號週期、該第三訊號週期以及該第四訊號週期進行分析,而得到該電容負向匹配阻抗211與該雜散元件13之阻抗的匹配程度的結果,可以更進一步校準該電容負向匹配阻抗211,於本實施例中,為增強補償雜散效應的能力,利用電腦模擬實,對該電容負向匹配阻抗211進行調整,而製作時直接以內接的方式製作而成,若為直接實作調整,則將該電容負向匹配阻抗211以外接的形式實現,藉由調整替換該電容負向匹配阻抗211,而輸出一線性三角波訊號。Continued collocation refers to "FIG. 2A" to "FIG. 2E", which is a control method of the four sensing configurations of the impedance sensing module 30 and a circuit diagram thereof. When the switching module 40 is switched to the first switching state, the first switch 33 is connected, and the second switch 34 is not connected, a first configuration 50 is formed, and a first signal period is generated; when the switching mode is When the group 40 is switched to the first switching state, the first switch 33 is not connected, and the second switch 34 is connected, a second configuration 51 is formed, and a second signal period is generated; when the switching module 40 is switched to The second switching state, the first switch 33 is connected, and the second switch 34 is not connected, forming a third configuration 52, and generating a third signal period; when the switching module 40 switches to the first switching When the first switch 33 and the second switch 34 are not connected, a fourth configuration 53 is formed and a fourth signal period is generated. The first signal period, the second signal period, the third signal period, and the fourth signal period are analyzed by considering the non-ideal conditions of the first operational amplification unit 22 by switching between four configurations. As a result of obtaining the degree of matching between the negative impedance matching impedance 211 of the capacitor and the impedance of the stray element 13, the capacitance negative matching impedance 211 can be further calibrated. In this embodiment, the ability to compensate for spurious effects is enhanced. The negative matching impedance 211 of the capacitor is adjusted by using a computer simulation, and is directly formed by an internal connection during the production process. If the direct implementation is adjusted, the capacitor is negatively matched to the impedance 211. A linear triangular wave signal is output by adjusting the capacitor to negatively match the impedance 211.
於本實施例中,該第一訊號週期可表示為: In this embodiment, the first signal period can be expressed as:
該第二訊號週期可表示為: The second signal period can be expressed as:
該第三訊號週期可表示為: The third signal period can be expressed as:
該第四訊號週期可表示為: The fourth signal period can be expressed as:
其中,R x、C x為該電容負向匹配阻抗211的阻抗值,I為輸入電流,C 1為該第一電容35,V 1為該阻抗感測模組30的輸出電壓,t d為該第一運算放大單元22、該第二運算放大單元31的延遲時間。 Wherein, R x and C x are impedance values of the capacitor negative matching impedance 211, I is an input current, C 1 is the first capacitor 35, and V 1 is an output voltage of the impedance sensing module 30, and t d is The delay time of the first operational amplification unit 22 and the second operational amplification unit 31.
對該第一訊號週期、該第二訊號週期、該第三訊號週期以及該第四訊號週期進行分析計算,可以進一步求得該電容負向匹配阻抗211的阻抗值,並可以表示為: 再據此調整替換該電容負向匹配阻抗211。 The first signal period, the second signal period, the third signal period, and the fourth signal period are analyzed and calculated, and the impedance value of the capacitor negative matching impedance 211 can be further determined, and can be expressed as: The capacitor negative matching impedance 211 is replaced by this adjustment.
續搭配參閱「圖3」所示,為進一步說明,本發明更揭露雜散效應的補償方法,包含下列步驟:Referring to FIG. 3 for further description, the present invention further discloses a method for compensating for spurious effects, which includes the following steps:
S1:利用一線性三角波產生模組10中的一第一電流源11對一實體電容12進行充放電,以產生一三角波訊號,並因此產生一因雜散效應產生的雜散元件13,該雜散元件13包含有一因該實體電容12而產生的電容雜散元件131以及一因該第一電流源11而產生的第一電流源雜散元件132。 為更進一步說明該線性三角波產生模組10產生該三角波訊號的方法,於S1步驟中更包含有以下步驟:S1: charging and discharging a physical capacitor 12 by using a first current source 11 in a linear triangular wave generating module 10 to generate a triangular wave signal, and thus generating a stray element 13 generated by a spurious effect. The dispersing element 13 includes a capacitive stray element 131 generated by the solid capacitor 12 and a first current source stray element 132 generated by the first current source 11. To further illustrate the method for generating the triangular wave signal by the linear triangular wave generating module 10, the following steps are further included in the step S1:
S1A:利用一時脈切換單元14控制該第一電流源11對該實體電容12進行充放電,當CLK開關形成通路、 開關形成斷路時,為進行充電狀態,反之,當CLK開關形成斷路、 開關形成通路時,為放電狀態,而產生該三角波訊號。 S1A: controlling the first current source 11 to charge and discharge the physical capacitor 12 by using a clock switching unit 14, when the CLK switch forms a path, When the switch forms an open circuit, it is in a charging state, and vice versa, when the CLK switch forms an open circuit, When the switch forms a path, it is in a discharged state, and the triangular wave signal is generated.
S1B:藉由一窗型比較單元15控制該三角波訊號的輸出上下限,再根據輸出的上下限控制該時脈切換單元14進行充放電。S1B: The upper and lower limits of the output of the triangular wave signal are controlled by a window type comparing unit 15, and the clock switching unit 14 is controlled to perform charging and discharging according to the upper and lower limits of the output.
S2:計算出一與該雜散元件13相匹配的負向匹配阻抗21,並與一第一電阻23、一第二電阻24以及一第一運算放大單元22電性連接形成一負阻抗轉換模組20。S2: Calculating a negative matching impedance 21 matched with the stray element 13 and electrically connecting with a first resistor 23, a second resistor 24, and a first operational amplifying unit 22 to form a negative impedance converting mode. Group 20.
S3:將該負阻抗轉換模組20電性連接於該第一電流源11且並聯於該實體電容12,當CK1開關形成通路、 開關形成斷路時,該負向匹配阻抗21對該雜散元件13之阻抗進行補償; S3: the negative impedance conversion module 20 is electrically connected to the first current source 11 and connected in parallel to the physical capacitor 12, when the CK1 switch forms a path, When the switch forms an open circuit, the negative matching impedance 21 compensates the impedance of the stray element 13;
S4:將一第二運算放大單元31、一反相單元32、一第一開關33、一第二開關34、一第一電容35、一第二電容36以及一第二電流源37電性連接形成一阻抗感測模組30,利用該阻抗感測模組30感測該電容負向匹配阻抗211的阻抗值;S4: electrically connecting a second operational amplifying unit 31, an inverting unit 32, a first switch 33, a second switch 34, a first capacitor 35, a second capacitor 36, and a second current source 37. Forming an impedance sensing module 30, and sensing the impedance value of the negative impedance matching impedance 211 by using the impedance sensing module 30;
S5:將一切換模組40電性連接於該負阻抗轉換模組20以及該阻抗感測模組30,包含有一第一切換態以及一第二切換態,搭配該第一開關33以及該第二開關34,以切換該阻抗感測模組30之感測模式,供該阻抗感測模組30進行該電容負向匹配阻抗211與該電容雜散元件131之阻抗的匹配程度的感測。S5: The switch module 40 is electrically connected to the negative impedance conversion module 20 and the impedance sensing module 30, and includes a first switching state and a second switching state, and the first switch 33 and the first The second switch 34 switches the sensing mode of the impedance sensing module 30 for the impedance sensing module 30 to sense the matching degree of the capacitance negative matching impedance 211 and the impedance of the capacitive stray element 131.
其中,於S5步驟中,更包含下列步驟進行感測:Wherein, in step S5, the following steps are further included for sensing:
S5A:如「圖2B」,將該切換模組40切換成該第一切換態、該第一開關33形成通路、該第二開關34形成斷路,使該阻抗感測模組30形成一第一組態50,並產生一第一訊號週期;S5A: as shown in FIG. 2B, the switching module 40 is switched to the first switching state, the first switch 33 forms a path, and the second switch 34 forms an open circuit, so that the impedance sensing module 30 forms a first Configuring 50 and generating a first signal period;
S5B:如「圖2C」,將該切換模組40切換成該第一切換態、該第一開關33形成斷路、該第二開關34形成通路,使該阻抗感測模組30形成一第二組態51,並產生一第二訊號週期;S5B: as shown in FIG. 2C, the switching module 40 is switched to the first switching state, the first switch 33 forms an open circuit, and the second switch 34 forms a path, so that the impedance sensing module 30 forms a second Configuring 51 and generating a second signal period;
S5C:如「圖2D」,將該切換模組40切換成該第二切換態、該第一開關33形成通路、該第二開關34形成斷路,使該阻抗感測模組30形成一第三組態52,並產生一第三訊號週期;S5C: as shown in FIG. 2D, the switching module 40 is switched to the second switching state, the first switch 33 forms a path, and the second switch 34 forms an open circuit, so that the impedance sensing module 30 forms a third Configuration 52 and generating a third signal period;
S5D:如「圖2E」,將該切換模組40切換成該第一切換態、該第一開關33與該第二開關34形成斷路,使該阻抗感測模組30形成一第四組態53,並產生一第四訊號週期;以及S5D: as shown in FIG. 2E, the switching module 40 is switched to the first switching state, and the first switch 33 and the second switch 34 form an open circuit, so that the impedance sensing module 30 forms a fourth configuration. 53, and generate a fourth signal cycle;
S5E:分析該第一組態50、該第二組態51、該第三組態52以及該第四組態53之震盪訊號的週期,進而將該第一運算放大電路的非理想條件一併考慮,而得到該電容負向匹配阻抗211與該電容雜散元件131之阻抗的匹配程度的結果。S5E: analyzing the period of the first configuration 50, the second configuration 51, the third configuration 52, and the oscillation signal of the fourth configuration 53 to further combine the non-ideal conditions of the first operational amplifier circuit Considering, the result of matching the negative matching impedance 211 of the capacitor with the impedance of the capacitive stray element 131 is obtained.
S6:依據該阻抗感測模組30之感測結果調校該電容負向匹配阻抗211之數值,補償該電容雜散元件131之阻抗,使輸出一線性三角波訊號。S6: Adjust the value of the negative impedance matching impedance 211 according to the sensing result of the impedance sensing module 30, and compensate the impedance of the capacitive stray component 131 to output a linear triangular wave signal.
綜上所述,本發明具有以下特點:In summary, the present invention has the following features:
一、藉由該負向匹配阻抗的設置,可以補償該雜散元件之阻抗,使輸出線性三角波訊號。1. By setting the negative matching impedance, the impedance of the stray element can be compensated to output a linear triangular wave signal.
二、利用該感測阻抗模組感測該負向匹配阻抗,並做進一步的調校,使該負向匹配阻抗與該雜散元件之阻抗更為匹配,輸出更接近理想的線性三角波訊號。Second, the sensing impedance module is used to sense the negative matching impedance, and further adjustment is made to make the negative matching impedance and the impedance of the stray component more closely match, and the output is closer to the ideal linear triangular wave signal.
因此本發明極具進步性及符合申請發明專利的要件,爰依法提出申請,祈鈞局早日賜准專利,實感德便。Therefore, the present invention is highly progressive and conforms to the requirements of the invention patent application, and the application is made according to law, and the praying office grants the patent as soon as possible.
以上已將本發明做一詳細說明,惟以上所述者,僅爲本發明的一較佳實施例而已,當不能限定本發明實施的範圍。即凡依本發明申請範圍所作的均等變化與修飾等,皆應仍屬本發明的專利涵蓋範圍內。The present invention has been described in detail above, but the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the scope of the invention. That is, the equivalent changes and modifications made by the scope of the present application should remain within the scope of the patent of the present invention.
10‧‧‧線性三角波產生模組
11‧‧‧第一電流源
12‧‧‧實體電容
13‧‧‧雜散元件
131‧‧‧電容雜散元件
132‧‧‧第一電流源雜散元件
14‧‧‧時脈切換單元
15‧‧‧窗型比較單元
20‧‧‧負阻抗轉換模組
21‧‧‧負向匹配阻抗
211‧‧‧電容負向匹配阻抗
212‧‧‧第一電流源負向匹配阻抗
22‧‧‧第一運算放大單元
221‧‧‧第一反向輸入端
222‧‧‧第一非反向輸入端
223‧‧‧第一輸出端
23‧‧‧第一電阻
24‧‧‧第二電阻
30‧‧‧阻抗感測模組
31‧‧‧第二運算放大單元
311‧‧‧第二反向輸入端
312‧‧‧第二非反向輸入端
313‧‧‧第二輸出端
32‧‧‧反相單元
33‧‧‧第一開關
34‧‧‧第二開關
35‧‧‧第一電容
36‧‧‧第二電容
37‧‧‧第二電流源
40‧‧‧切換模組
50‧‧‧第一組態
51‧‧‧第二組態
52‧‧‧第三組態
53‧‧‧第四組態10‧‧‧Linear triangular wave generation module
11‧‧‧First current source
12‧‧‧Solid capacitance
13‧‧‧ Stray components
131‧‧‧Capacitor stray components
132‧‧‧First current source stray components
14‧‧‧clock switching unit
15‧‧‧Window type comparison unit
20‧‧‧Negative impedance conversion module
21‧‧‧Negative matching impedance
211‧‧‧Capacitor negative matching impedance
212‧‧‧First current source negative matching impedance
22‧‧‧First operational amplification unit
221‧‧‧First reverse input
222‧‧‧First non-inverting input
223‧‧‧first output
23‧‧‧First resistance
24‧‧‧second resistance
30‧‧‧ Impedance Sensing Module
31‧‧‧Second operational amplification unit
311‧‧‧second reverse input
312‧‧‧Second non-inverting input
313‧‧‧second output
32‧‧‧Inverting unit
33‧‧‧First switch
34‧‧‧second switch
35‧‧‧first capacitor
36‧‧‧second capacitor
37‧‧‧second current source
40‧‧‧Switch Module
50‧‧‧First configuration
51‧‧‧Second configuration
52‧‧‧ Third configuration
53‧‧‧fourth configuration
圖1,為本發明的電路示意圖。 圖2A,為本發明阻抗感測模組之感測組態切換方式。 圖2B,為本發明阻抗感測模組之第一組態電路示意圖。 圖2C,為本發明阻抗感測模組之第二組態電路示意圖。 圖2D,為本發明阻抗感測模組之第三組態電路示意圖。 圖2E,為本發明阻抗感測模組之第四組態電路示意圖。 圖3,為本發明操作方法流程圖。Figure 1 is a schematic diagram of the circuit of the present invention. 2A is a schematic diagram of a sensing configuration switching manner of the impedance sensing module of the present invention. 2B is a schematic diagram of a first configuration circuit of the impedance sensing module of the present invention. 2C is a schematic diagram of a second configuration circuit of the impedance sensing module of the present invention. 2D is a schematic diagram of a third configuration circuit of the impedance sensing module of the present invention. 2E is a schematic diagram of a fourth configuration circuit of the impedance sensing module of the present invention. Figure 3 is a flow chart of the method of operation of the present invention.
10‧‧‧線性三角波產生模組 10‧‧‧Linear triangular wave generation module
11‧‧‧第一電流源 11‧‧‧First current source
12‧‧‧實體電容 12‧‧‧Solid capacitance
13‧‧‧雜散元件 13‧‧‧ Stray components
131‧‧‧電容雜散元件 131‧‧‧Capacitor stray components
132‧‧‧第一電流源雜散元件 132‧‧‧First current source stray components
14‧‧‧時脈切換單元 14‧‧‧clock switching unit
15‧‧‧窗型比較單元 15‧‧‧Window type comparison unit
20‧‧‧負阻抗轉換模組 20‧‧‧Negative impedance conversion module
21‧‧‧負向匹配阻抗 21‧‧‧Negative matching impedance
211‧‧‧電容負向匹配阻抗 211‧‧‧Capacitor negative matching impedance
212‧‧‧第一電流源負向匹配阻抗 212‧‧‧First current source negative matching impedance
22‧‧‧第一運算放大單元 22‧‧‧First operational amplification unit
221‧‧‧第一反向輸入端 221‧‧‧First reverse input
222‧‧‧第一非反向輸入端 222‧‧‧First non-inverting input
223‧‧‧第一輸出端 223‧‧‧first output
23‧‧‧第一電阻 23‧‧‧First resistance
24‧‧‧第二電阻 24‧‧‧second resistance
30‧‧‧阻抗感測模組 30‧‧‧ Impedance Sensing Module
31‧‧‧第二運算放大單元 31‧‧‧Second operational amplification unit
311‧‧‧第二反向輸入端 311‧‧‧second reverse input
312‧‧‧第二非反向輸入端 312‧‧‧Second non-inverting input
313‧‧‧第二輸出端 313‧‧‧second output
32‧‧‧反相單元 32‧‧‧Inverting unit
33‧‧‧第一開關 33‧‧‧First switch
34‧‧‧第二開關 34‧‧‧second switch
35‧‧‧第一電容 35‧‧‧first capacitor
36‧‧‧第二電容 36‧‧‧second capacitor
37‧‧‧第二電流源 37‧‧‧second current source
40‧‧‧切換模組 40‧‧‧Switch Module
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US4180786A (en) * | 1978-07-31 | 1979-12-25 | Hughes Aircraft Company | Impedance-matching circuit using negative low-noise resistance |
US4988958A (en) * | 1988-04-28 | 1991-01-29 | Matsushita Electric Industrial Co., Ltd. | Amplitude-controlled trapezoidal wave generating circuit |
US6081185A (en) * | 1997-11-24 | 2000-06-27 | Valeo Securite Habitacle | Motor vehicle equipped with a system for detecting the approach of a user |
CN1790904A (en) * | 2004-12-16 | 2006-06-21 | 中国科学院半导体研究所 | Full-integrated highly-linear triangular-wave generator |
US20070115069A1 (en) * | 2005-11-23 | 2007-05-24 | Oki Electric Industry Co., Ltd. | Voltage controlled oscillator with full adder |
TW200906062A (en) * | 2007-07-19 | 2009-02-01 | Elite Semiconductor Esmt | Triangle wave generating circuit and method thereof |
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US4180786A (en) * | 1978-07-31 | 1979-12-25 | Hughes Aircraft Company | Impedance-matching circuit using negative low-noise resistance |
US4988958A (en) * | 1988-04-28 | 1991-01-29 | Matsushita Electric Industrial Co., Ltd. | Amplitude-controlled trapezoidal wave generating circuit |
US6081185A (en) * | 1997-11-24 | 2000-06-27 | Valeo Securite Habitacle | Motor vehicle equipped with a system for detecting the approach of a user |
CN1790904A (en) * | 2004-12-16 | 2006-06-21 | 中国科学院半导体研究所 | Full-integrated highly-linear triangular-wave generator |
US20070115069A1 (en) * | 2005-11-23 | 2007-05-24 | Oki Electric Industry Co., Ltd. | Voltage controlled oscillator with full adder |
TW200906062A (en) * | 2007-07-19 | 2009-02-01 | Elite Semiconductor Esmt | Triangle wave generating circuit and method thereof |
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