TWI548592B - An oxide sintered body, a sputtering target, and an oxide semiconductor thin film obtained therefrom - Google Patents

An oxide sintered body, a sputtering target, and an oxide semiconductor thin film obtained therefrom Download PDF

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TWI548592B
TWI548592B TW104107884A TW104107884A TWI548592B TW I548592 B TWI548592 B TW I548592B TW 104107884 A TW104107884 A TW 104107884A TW 104107884 A TW104107884 A TW 104107884A TW I548592 B TWI548592 B TW I548592B
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Taiwan
Prior art keywords
phase
sintered body
oxide
gallium
thin film
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TW104107884A
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English (en)
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TW201538432A (zh
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Tokuyuki Nakayama
Eiichiro Nishimura
Masashi Iwara
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Sumitomo Metal Mining Co
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    • C04B35/01Shaped ceramic products characterised by their composition; Ceramics compositions; Processing powders of inorganic compounds preparatory to the manufacturing of ceramic products based on oxide ceramics
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Description

氧化物燒結體、濺鍍用靶及使用其而得之氧化物半導體薄膜
本發明係關於一種氧化物燒結體、靶及使用其而得之氧化物半導體薄膜,更詳細而言係關於一種藉由含有氮而可使結晶質氧化物半導體薄膜的載子濃度降低之濺鍍用靶、最適於獲得該濺鍍用靶之含有氮之氧化物燒結體,以及使用該濺鍍用靶而獲得之顯示低載子濃度與高載子遷移率之結晶質的含有氮之氧化物半導體薄膜。
薄膜電晶體(Thin Film Transistor,TFT)係場效電晶體(Field Effect Transistor,以下稱為FET)之1種。TFT係具備閘極端子、源極端子及汲極端子作為基本構成之三端子元件,係具有如下功能之主動元件:使用成膜於基板上之半導體薄膜作為電子或電洞移動之通道層,對閘極端子施加電壓,控制流至通道層之電流,而切換源極端子與汲極端子間之電流。TFT係目前最多地被實用化之電子器件(device),作為其代表性用途有液晶驅動用元件。
作為TFT,目前最廣泛使用的是以多晶矽膜或非晶矽膜作為通道層材料之金屬-絕緣體-半導體-FET(Metal-Insulator-Semiconductor-FET,MIS-FET)。使用矽之MIS-FET由於對於可見光為不透明,故無 法構成透明電路。因此,於應用MIS-FET作為液晶顯示器之液晶驅動用切換元件之情形時,該器件使顯示器像素之開口率變小。
又,最近,隨著要求液晶之高精細化,逐漸亦對液晶驅動用切換元件要求高速驅動。為了實現高速驅動,必須將電子或電洞之遷移率至少高於非晶矽之電子或電洞之遷移率的半導體薄膜用於通道層。
針對此種狀況,專利文獻1中提出有一種透明半絕緣性非晶質氧化物薄膜,以及特徵在於將該透明半絕緣性非晶質氧化物薄膜作為通道層之薄膜電晶體,上述透明半絕緣性非晶質氧化物薄膜藉由氣相成膜法而成膜,係由In、Ga、Zn及O元素構成之透明非晶質氧化物薄膜,其特徵在於:關於該氧化物之組成,結晶化時之組成為InGaO3(ZnO)m(m為未達6之自然數),於未添加雜質離子之情況下,為載子遷移率(亦稱為載子電子遷移率)超過1cm2V-1sec-1,且載子濃度(亦稱為載子電子濃度)為1016cm-3以下之半絕緣性。
然而,業界指出專利文獻1中提出之藉由濺鍍法、脈衝雷射蒸鍍法之任一氣相成膜法而成膜,由In、Ga、Zn及O元素構成之透明非晶質氧化物薄膜(a-IGZO膜)雖然顯示約1~10cm2V-1sec-1之範圍之相對較高的電子載子遷移率,但非晶質氧化物薄膜原本就容易產生氧缺失,且對於熱等外部因素,電子載子之行為未必穩定,該等情況會造成不良影響,而於形成TFT等器件之情形時,不穩定性經常成為問題。
作為解決此種問題之材料,專利文獻2中提出一種薄膜電晶體,其特徵在於使用如下氧化物薄膜:鎵固溶於氧化銦,原子比Ga/(Ga+In)為0.001~0.12,銦與鎵相對於全部金屬原子之含有率為80原子%以上,具 有In2O3之方鐵錳礦結構;作為其原料,提出有一種氧化物燒結體,其特徵在於:鎵固溶於氧化銦,原子比Ga/(Ga+In)為0.001~0.12,銦與鎵相對於全部金屬原子之含有率為80原子%以上,具有In2O3之方鐵錳礦結構。
然而,專利文獻2之實施例1~8中記載之載子濃度為1018cm-3左右,對應用於TFT之氧化物半導體薄膜而言過高,是待解決之課題。
另一方面,專利文獻3或4中揭示有一種濺鍍用靶,其由除In、Ga、Zn以外亦進而含有規定濃度之氮之氧化物燒結體構成。
然而,於專利文獻3或4中,由於將含有氧化銦之成形體於不含有氧氣之環境以及1000℃以上之溫度的條件下進行燒結,故氧化銦會分解而生成銦。其結果,無法獲得目標之氮氧化物燒結體。
[專利文獻1]日本特開2010-219538號公報
[專利文獻2]WO2010/032422號公報
[專利文獻3]日本特開2012-140706號公報
[專利文獻4]日本特開2011-058011號公報
[專利文獻5]日本特開2012-253372號公報
本發明之目的在於提供一種藉由含有氮不含有鋅而可使結晶質氧化物半導體薄膜的載子濃度降低之濺鍍用靶、最適於獲得該濺鍍用靶之含有氮之氧化物燒結體以及使用該濺鍍用靶而獲得之顯示低載子濃度與高載子遷移率之結晶質的含有氮之氧化物半導體薄膜。
本發明人等試製了於由銦與鎵構成之氧化物中微量添加有 各種元素之氧化物燒結體。並且,反覆進行如下實驗:將氧化物燒結體加工成濺鍍用靶並進行濺鍍成膜,對所獲得之非晶質氧化物薄膜實施熱處理,藉此形成結晶質氧化物半導體薄膜。
尤其是藉由使以氧化物之形式含有銦及鎵之氧化物燒結體中進而含有氮,可獲得重要結果。亦即發現:(1)於使用上述氧化物燒結體作為例如濺鍍用靶之情形時,所形成的結晶質氧化物半導體薄膜亦含有氮,藉此可降低上述結晶質氧化物半導體薄膜之載子濃度及提高載子遷移率;以及(2)藉由使上述含有氮之氧化物燒結體不含有鋅,可提高燒結溫度,使燒結體密度提高,並且使氮有效率地固溶置換至上述氧化物燒結體之方鐵錳礦結構的氧晶格位置;並且(3)藉由採用氧氣體積分率超過20%之環境中之常壓燒結法,亦會使氧化物燒結體之燒結體密度提高,並且使氮有效率地固溶置換至上述氧化物燒結體之方鐵錳礦結構的氧晶格位置。
即,本發明之第1係一種氧化物燒結體,其以氧化物之形式含有銦及鎵,上述鎵之含量以Ga/(In+Ga)原子數比計為0.005以上,未達0.20,含有氮,不含有鋅,其特徵在於:實質上不含有纖鋅礦型結構之GaN相。
本發明之第2係第1發明之氧化物燒結體,其中上述鎵之含量以Ga/(In+Ga)原子數比計為0.05以上,0.15以下。
本發明之第3係第1或第2發明之氧化物燒結體,其氮濃度為1×1019atoms/cm3以上。
本發明之第4係第1或第2發明之氧化物燒結體,其僅由方鐵錳礦型結構之In2O3相構成。
本發明之第5係第1或第2發明之氧化物燒結體,其由方鐵錳礦型結構之In2O3相、作為除In2O3相以外之生成相的β-Ga2O3型結構之GaInO3相,或β-Ga2O3型結構之GaInO3相及(Ga,In)2O3相構成。
本發明之第6係第5發明之氧化物燒結體,其中下述式1所定義之β-Ga2O3型結構的GaInO3相之X射線繞射峰強度比為38%以下之範圍。
100×I[GaInO3相(111)]/{I[In2O3相(400)]+I[GaInO3相(111)]}[%] 式1
本發明之第7係第1或第2發明之氧化物燒結體,其不含有β-Ga2O3型結構之Ga2O3相。
本發明之第8係第1或第2發明之氧化物燒結體,其藉由氧氣體積分率超過20%之環境中之常壓燒結法進行燒結。
本發明之第9係一種濺鍍用靶,其對第1或第2發明之氧化物燒結體進行加工而獲得。
本發明之第10係一種結晶質氧化物半導體薄膜,其使用第9發明之濺鍍用靶並藉由濺鍍法形成於基板上後,藉由氧化性環境下之熱處理而使之結晶化。
本發明之第11係一種結晶質氧化物半導體薄膜,其以氧化物之形式含有銦及鎵,含有氮,不含有鋅,鎵之含量以Ga/(In+Ga)原子數比計為0.005以上,未達0.20,且氮濃度為1×1018atoms/cm3以上,載子遷移率為10cm2V-1sec-1以上。
本發明之第12係第11發明之結晶質氧化物半導體薄膜,其 中上述鎵之含量以Ga/(In+Ga)原子數比計為0.05以上,0.15以下。
本發明之第13係第11或第12發明之結晶質氧化物半導體薄膜,其僅由方鐵錳礦型結構之In2O3相構成。
本發明之第14係第11或第12發明之結晶質氧化物半導體薄膜,其不含有纖鋅礦型結構之GaN相。
本發明之第15係第11或第12發明之結晶質氧化物半導體薄膜,其載子濃度為1.0×1018cm-3以下。
本發明之以氧化物之形式含有銦及鎵且含有氮不含有鋅之氧化物燒結體,例如於用作濺鍍用靶之情形時,可使藉由濺鍍成膜形成然後藉由熱處理獲得的本發明之結晶質氧化物半導體薄膜亦含有氮。上述結晶質氧化物半導體薄膜由於具有方鐵錳礦結構,負三價之氮離子置換固溶於負二價之氧的位置,故可獲得載子濃度降低之效果。因此,於將本發明之結晶質氧化物半導體薄膜應用於TFT之情形時,可提高TFT之導通/斷開(on/off)。因此,本發明之氧化物燒結體、靶及使用其而得之氧化物半導體薄膜於工業上極為有用。
以下,對本發明之氧化物燒結體、濺鍍用靶及使用其而得之氧化物薄膜進行詳細說明。
本發明之氧化物燒結體以氧化物之形式含有銦及鎵,且含有氮,其特徵在於:不含有鋅。
鎵之含量以Ga/(In+Ga)原子數比計為0.005以上,未達0.20,較佳為0.05以上,0.15以下。鎵與氧之鍵結能力強,具有使本發明之結晶質氧化物半導體薄膜的氧缺失量降低之效果。於鎵之含量以Ga/(In+Ga)原子數比計未達0.005之情形時,無法充分獲得該效果。另一方面,於0.20以上之情形時,由於鎵過量,故無法獲得對於結晶質氧化物半導體薄膜而言充分高的載子遷移率。
本發明之氧化物燒結體除如上述所規定之組成範圍的銦與鎵以外,亦含有氮。氮濃度較佳為1×1019atoms/cm3以上。於氧化物燒結體之氮濃度未達1×1019atoms/cm3之情形時,無法於所獲得之結晶質氧化物半導體薄膜含有對於獲得載子濃度降低效果而言充分之量的氮。再者,氮之濃度較佳藉由D-SIMS(Dynamic-Secondary Ion Mass Spectrometry,動態二次離子質譜法)測量。
本發明之氧化物燒結體不含有鋅。於含有鋅之情形時,由於在到達進行燒結的溫度之前會開始鋅之揮發,故必須降低燒結溫度。降低燒結溫度會使氧化物燒結體之高密度化變得困難,並且阻礙氧化物燒結體中之氮的固溶。
1.氧化物燒結體組織
本發明之氧化物燒結體較佳主要由方鐵錳礦型結構之In2O3相構成。此處,鎵較佳固溶於In2O3相。鎵置換至作為正三價離子之銦的晶格位置。因不進行燒結等原因,鎵不固溶於In2O3相而形成β-Ga2O3型結構之Ga2O3相 之情況並不佳。Ga2O3相由於缺乏導電性,故成為異常放電之原因。
氮較佳置換固溶於採取方鐵錳礦結構之In2O3相的負二價離子即氧之晶格位置。再者,氮亦可存在於In2O3相之晶格間位置或晶界等。如下所述,由於在燒結步驟曝露於1300℃以上之高溫之氧化環境,故認為無法於上述位置存在大量氮而達到會擔憂使本發明之氧化物燒結體或所形成的結晶質氧化物半導體薄膜的特性降低之影響的程度。
本發明之氧化物燒結體較佳主要由方鐵錳礦型結構之In2O3相構成,尤其於鎵之含量以Ga/(In+Ga)原子數比計超過0.08之情形時,較佳除In2O3相以外,亦於下述式1所定義之X射線繞射峰強度比為38%以下之範圍內僅含有β-Ga2O3型結構之GaInO3相,或含有β-Ga2O3型結構之GaInO3相與(Ga,In)2O3相。
100×I[GaInO3相(111)]/{I[In2O3相(400)]+I[GaInO3相(111)]}[%] 式1
(式中,I[In2O3相(400)]為方鐵錳礦型結構之In2O3相的(400)峰強度,I[GaInO3相(111)]表示β-Ga2O3型結構之複合氧化物β-GaInO3相(111)峰強度)
再者,於β-Ga2O3型結構之GaInO3相及(Ga,In)2O3相亦可含有氮。如下所述,更佳使用氮化鎵粉末作為本發明之氧化物燒結體的原料,於該情形時,較佳於氧化物燒結體實質上不含有纖鋅礦型結構之GaN相。所謂實質上不含有,意指纖鋅礦型結構之GaN相相對於全部生成相之重量比率為5%以下,更佳為3%以下,進而較佳為1%以下,再進而較佳為0%。再者,上述重量比率可藉由利用X射線繞射測量之裏特沃爾德分析(Rietveld analysis)而求出。再者,只要纖鋅礦型結構之GaN相相對於全部生成相之重量比率為5%以下,則不會於藉由直流濺鍍法進行成膜時造成問題。
2.氧化物燒結體之製造方法
本發明之氧化物燒結體以由氧化銦粉末與氧化鎵粉末構成之氧化物粉末以及由氮化鎵粉末及/或氮化銦粉末構成之氮化物粉末作為原料粉末。作為氮化物粉末,氮化鎵粉末因氮發生解離之溫度高於氮化銦粉末,故更佳。
於本發明之氧化物燒結體之製造步驟中,將該等原料粉末混合後,加以成形,藉由常壓燒結法對成形物進行燒結。本發明之氧化物燒結體組織之生成相強烈取決於氧化物燒結體之各步驟中的製造條件,例如原料粉末之粒徑、混合條件及燒結條件。
本發明之氧化物燒結體之組織較佳主要由方鐵錳礦型結構之In2O3相構成,較佳使上述各原料粉末之平均粒徑在3μm以下,更佳為1.5μm以下。如上所述,尤其於鎵之含量以Ga/(In+Ga)原子數比計超過0.08之情形時,有除In2O3相以外亦含有β-Ga2O3型結構之GaInO3相、或β-Ga2O3型結構之GaInO3相與(Ga,In)2O3相之情形,為了儘量抑制該等相之生成,較佳使各原料粉末之平均粒徑在1.5μm以下。
氧化銦粉末為ITO(銦-錫氧化物)之原料,燒結性優異之微細氧化銦粉末的開發隨著ITO之改良而一併得到發展。氧化銦粉末由於作為ITO用原料而持續大量地使用,故最近可獲得平均粒徑0.8μm以下之原料粉末。但是,於氧化鎵粉末之情形時,由於與氧化銦粉末相比使用量依然較少,故難以獲得平均粒徑1.5μm以下之原料粉末。因此,於只能獲 得粗大之氧化鎵粉末的情形時,必須將其粉碎至平均粒徑1.5μm以下。對於氮化鎵粉末及/或氮化銦粉末亦相同。
氮化鎵粉末相對於原料粉末中氧化鎵粉末與氮化鎵粉末的總量之重量比(以下設為氮化鎵粉末重量比)較佳為0.60以下。若超過0.60則難以進行成形或燒結,於0.70時氧化物燒結體之密度顯著降低。
於本發明之氧化物燒結體之燒結步驟中,較佳應用常壓燒結法。常壓燒結法係簡便且於工業上有利之方法,就低成本之觀點而言亦為較佳之手段。
於使用常壓燒結法之情形時,如上所述,首先製作成形體。將原料粉末放入樹脂製堝中,利用濕式球磨機等將其與黏合劑(例如PVA)等一併混合。於本發明之氧化物燒結體主要由方鐵錳礦型結構之In2O3相構成,尤其於鎵之含量以Ga/(In+Ga)原子數比計超過0.08之情形時,為了抑制除In2O3相以外之β-Ga2O3型結構之GaInO3相或β-Ga2O3型結構之GaInO3相與(Ga,In)2O3相之生成,較佳進行18小時以上之上述球磨機混合。此時,作為混合用球,只要使用硬質ZrO2球即可。於混合後,將漿料取出,並進行過濾、乾燥、造粒。其後,利用冷均壓對所獲得之造粒物施加9.8MPa(0.1ton/cm2)~294MPa(3ton/cm2)左右之壓力使其成形,而製成成形體。
於常壓燒結法之燒結步驟中,較佳設為存在氧氣之環境,更佳為環境中之氧氣體積分率超過20%。尤其是藉由氧氣體積分率超過20%,氧化物燒結體進一步高密度化。藉由環境中過量之氧氣,於燒結初期先進行成形體表面之燒結。繼而進行成形體內部之還原狀態下之燒結,最終獲 得高密度之氧化物燒結體。於在成形體內部進行燒結之過程中,自原料粉末之氮化鎵及/或氮化銦解離之氮會置換固溶於方鐵錳礦型結構之In2O3相的負二價離子即氧之晶格位置。再者,於除In2O3相以外生成β-Ga2O3型結構之GaInO3相或β-Ga2O3型結構之GaInO3相與(Ga,In)2O3相之情形時,氮亦可置換固溶於該等相之負二價離子即氧之晶格位置。
於不存在氧氣之環境中,由於未先進行成形體表面之燒結,故結果燒結體之高密度化不會進行。若不存在氧氣,則尤其於900~1000℃左右氧化銦會分解而生成金屬銦,因此難以獲得目標氧化物燒結體。
常壓燒結之溫度範圍較佳為1300~1550℃,更佳於向燒結爐內之大氣中導入氧氣的環境下以1350~1450℃進行燒結。燒結時間較佳為10~30小時,更佳為15~25小時。
藉由使燒結溫度為上述範圍,並使用上述調整為平均粒徑1.5μm以下之由氧化銦粉末與氧化鎵粉末構成之氧化物粉末,以及由氮化鎵粉末、氮化銦粉末、或該等之混合粉末構成之氮化物粉末作為原料粉末,可獲得如下氧化物燒結體:主要由方鐵錳礦型結構之In2O3相構成,尤其於鎵之含量以Ga/(In+Ga)原子數比計超過0.08之情形時,除In2O3相以外的β-Ga2O3型結構之GaInO3相或β-Ga2O3型結構之GaInO3相與(Ga,In)2O3相之生成被極力抑制,且含有氮。
於燒結溫度未達1300℃之情形時,燒結反應不充分進行。另一方面,若燒結溫度超過1550℃,則高密度化不會進行,另一方面,燒結爐之構件與氧化物燒結體會發生反應,而無法獲得目標氧化物燒結體。尤其於鎵之含量以Ga/(In+Ga)原子數比計超過0.10之情形時,較佳使 燒結溫度在1450℃以下。其原因在於:於1500℃左右之溫度區域中,(Ga,In)2O3相之形成變得顯著。
關於至燒結溫度為止之升溫速度,為了防止燒結體之破裂,進行脫黏合劑,較佳使升溫速度為0.2~5℃/分鐘之範圍。只要為該範圍,則亦可視需要組合不同之升溫速度而升溫至燒結溫度。於升溫過程中,為了進行脫黏合劑或燒結,亦可於特定溫度下保持一定時間。較佳於燒結後進行冷卻時,停止導入氧氣,並以0.2~5℃/分鐘、尤其是0.2℃/分鐘以上未達1℃/分鐘之範圍的降溫速度降溫至1000℃。
3.靶
本發明之氧化物燒結體可用作薄膜形成用靶,尤其適合作為濺鍍用靶。於用作濺鍍用靶之情形時,可將上述氧化物燒結體切斷為規定大小,對表面進行研磨加工,並與襯板接著而獲得。靶形狀較佳為平板形,亦可為圓筒形。於使用圓筒形靶之情形時,較佳抑制因靶旋轉所引起之微粒產生。
為了用作濺鍍用靶,較重要的是將本發明之氧化物燒結體進行高密度化。但是,由於鎵之含量越高,則氧化物燒結體之密度越降低,故較佳之密度根據鎵之含量而異。於鎵之含量以Ga/(In+Ga)原子數比計為0.005以上,未達0.20之情形時,較佳為6.7g/cm3以上。於密度低至未達6.7g/cm3之情形時,有時會成為於量產中使用濺鍍成膜時產生瘤塊(nodule)之原因。
本發明之氧化物燒結體亦適合作為蒸鍍用靶(或者亦稱為平板)。於用作蒸鍍用靶之情形時,與濺鍍用靶相比,必須將氧化物燒結體控 制為更低密度。具體而言,較佳為3.0g/cm3以上,5.5g/cm3以下。
4.氧化物半導體薄膜及其成膜方法
本發明之結晶質氧化物半導體薄膜可藉由如下方式獲得:使用上述濺鍍用靶,並藉由濺鍍法於基板上暫時形成非晶質薄膜,繼而實施熱處理。
於非晶質薄膜形成步驟中,使用一般之濺鍍法,尤其若為直流(DC)濺鍍法,則成膜時之熱影響少,可實現高速成膜,因此於工業上有利。於藉由直流濺鍍法而形成本發明之氧化物半導體薄膜時,較佳使用由惰性氣體與氧氣,尤其是氬氣與氧氣構成之混合氣體作為濺鍍氣體。又,較佳使濺鍍裝置之腔室內為0.1~1Pa、尤其是0.2~0.8Pa之壓力進行濺鍍。
基板以玻璃基板為代表,較佳為無鹼玻璃,於樹脂板或樹脂膜中只要為可耐受上述製程之溫度者則可使用。
關於上述非晶質薄膜形成步驟,例如可於真空排氣至2×10-4Pa以下後,導入由氬氣與氧氣構成之混合氣體,使氣體壓力為0.2~0.5Pa,並以相對於靶之面積的直流電力,即直流電力密度成為1~4W/cm2左右之範圍的方式施加直流電力而產生直流電漿,從而實施預濺鍍。較佳於進行該預濺鍍5~30分鐘後,視需要對基板位置進行修正,其後進行濺鍍。
於上述非晶質薄膜形成步驟中之濺鍍法成膜時,為了提高成膜速度,而提高所投入之直流電力。本發明之氧化物燒結體主要由方鐵錳礦型結構之In2O3相構成,尤其於鎵之含量以Ga/(In+Ga)原子數比計超過0.08之情形時,有除In2O3相以外亦含有β-Ga2O3型結構之GaInO3相或β-Ga2O3型結構之GaInO3相與(Ga,In)2O3相之情形。認為氧化物燒結體組織幾乎被In2O3相佔有之情形時,β-Ga2O3型結構之GaInO3相及(Ga,In)2O3相會 隨著濺鍍之進行而成為瘤塊成長之起點。但是,本發明之氧化物燒結體藉由控制原料粉末之粒徑或燒結條件而儘量抑制其等相之生成,實質上微細分散,故不會成為瘤塊成長之起點。因此,即便提高所投入之直流電力,亦會抑制瘤塊產生,而不易引起電弧放電等異常放電。再者,β-Ga2O3型結構之GaInO3相及(Ga,In)2O3相雖然導電性不及In2O3相,但具有僅次於In2O3相之導電性,因此該等相本身不會成為異常放電之原因。
本發明之結晶質氧化物半導體薄膜可藉由形成上述非晶質薄膜後使之結晶化而獲得。作為結晶化之方法,例如有如下方法:於室溫附近等低溫下暫時形成非晶質膜,其後,以結晶化溫度以上進行熱處理而使氧化物薄膜結晶化;或者藉由將基板加熱至氧化物薄膜之結晶化溫度以上而成膜結晶質之氧化物薄膜。該等2種方法之加熱溫度可為約700℃以下,例如與專利文獻5記載之公知之半導體製程相比,於處理溫度方面無較大差異。
上述非晶質薄膜及結晶質氧化物半導體薄膜之銦及鎵之組成,與本發明之氧化物燒結體之組成大致相同。即為以氧化物之形式含有銦及鎵且含有氮之結晶質氧化物半導體薄膜。鎵之含量以Ga/(In+Ga)原子數比計為0.005以上,未達0.20,較佳為0.05以上,0.15以下。
上述非晶質薄膜及結晶質氧化物半導體薄膜中所含有之氮之濃度與本發明之氧化物燒結體同樣,較佳為1×1018atoms/cm3以上。
本發明之結晶質氧化物半導體薄膜較佳僅由方鐵錳礦結構之In2O3相構成。於In2O3相中,與氧化物燒結體相同,於正三價離子之銦的晶格位置置換固溶有鎵,且於負二價離子之氧的晶格位置置換固溶有氮。 作為除In2O3相以外之生成相,容易生成GaInO3相,除In2O3相以外之生成相由於會成為載子遷移率降低之要因,故欠佳。本發明之氧化物半導體薄膜藉由使固溶有鎵及氮之In2O3相結晶化,而使載子濃度降低,載子遷移率提高。載子濃度較佳為1.0×1018cm-3以下,更佳為3.0×1017cm-3以下。載子遷移率較佳為10cm2V-1sec-1以上,更佳為15cm2V-1sec-1以上。
本發明之結晶質氧化物半導體薄膜藉由濕式蝕刻或乾式蝕刻而實施TFT等用途中所必需之微細加工。於在低溫下暫時形成非晶質膜,其後,以結晶化溫度以上進行熱處理而使氧化物薄膜結晶化之情形時,可於形成非晶質膜後藉由使用弱酸之濕式蝕刻而實施微細加工。只要為弱酸則大體可使用,較佳為以草酸為主成分之弱酸。例如可使用關東化學製造之ITO-06N等。於藉由將基板加熱至氧化物薄膜之結晶化溫度以上而成膜結晶質之氧化物薄膜之情形時,可應用例如利用氯化鐵水溶液之類的強酸進行之濕式蝕刻或乾式蝕刻,若考慮到對TFT周邊之損傷,則較佳為乾式蝕刻。
本發明之氧化物燒結體僅由方鐵錳礦型結構之In2O3相構成,或者由In2O3相及除In2O3相以外之β-Ga2O3型結構之GaInO3相構成,或者由In2O3相及除In2O3相以外之β-Ga2O3型結構的GaInO3相與(Ga,In)2O3相構成。即便於將該等燒結體中之任一者作為成膜原料之情形時,於低溫下所形成之薄膜為非晶質膜,因此可如上所述般藉由利用弱酸之濕式蝕刻而容易地加工成所需形狀。於該情形時,於低溫所形成之薄膜由於藉由含有氮之效果而將結晶化溫度提高至250℃左右,故成為穩定之非晶質膜。但是,於如專利文獻2般氧化物燒結體僅由In2O3相構成,不含有氮之情形時, 會於低溫下所形成之薄膜中生成微晶。即,於濕式蝕刻步驟中發生產生殘渣等問題。
本發明之結晶質氧化物半導體薄膜的膜厚並無限定,為10~500nm,較佳為20~300nm,進而較佳為30~100nm。若未達10nm,則無法獲得充分之結晶性,結果未實現高載子遷移率。另一方面,若超過500nm,則會產生生產性之問題,故欠佳。
又,本發明之結晶質氧化物半導體薄膜於可見光範圍(400~800nm)內之平均透射率較佳為80%以上,更佳為85%以上,進而較佳為90%以上。於應用在透明TFT之情形時,若平均透射率未達80%,則作為透明顯示器件之液晶元件或有機EL元件等之光提取效率降低。
本發明之結晶質氧化物半導體薄膜於可見光範圍內的光之吸收小,透射率高。專利文獻1中記載之a-IGZO膜由於含有鋅,故尤其於可見光範圍短波長側之光的吸收大。相對於此,本發明之氧化物半導體薄膜由於不含有鋅,故於可見光範圍短波長側之光的吸收小,例如於波長400nm下之消光係數顯示0.05以下。因此,波長400nm附近之藍色光的透射率高,就提高液晶元件或有機EL元件等之顯色而言,適於該等TFT之通道層用材料等。
[實施例]
以下,使用本發明之實施例進一步詳細地進行說明,但本發明並不受該等實施例限定。
<氧化物燒結體之評價>
藉由ICP發光分光法而調查所獲得之氧化物燒結體的金屬元素之組 成。又,藉由D-SIMS(Dynamic-Secondary Ion Mass Spectrometry)而測量燒結體中之氮量。使用所獲得之氧化物燒結體之殘材,並使用X射線繞射裝置(飛利浦製造)進行利用粉末法之生成相的鑑定。
<氧化物薄膜之基本特性評價>
藉由ICP發光分光法調查所獲得之氧化物薄膜的組成。氧化物薄膜之膜厚利用表面粗糙度計(Tencor公司製造)進行測量。成膜速度根據膜厚與成膜時間而算出。氧化物薄膜之載子濃度及遷移率藉由霍耳效應(Hall effect)測量裝置(東陽特克尼卡製造)而求出。膜之生成相藉由X射線繞射測量而鑑定。
(實施例1~17)
將氧化銦粉末與氧化鎵粉末以及氮化鎵粉末以平均粒徑成為1.5μm以下之方式進行調整而製成原料粉末。以成為如表1之Ga/(In+Ga)原子數比,以及氧化鎵粉末與氮化鎵粉末之重量比的方式調配該等原料粉末,並與水一併放入樹脂製堝中,利用濕式球磨機進行混合。此時,使用硬質ZrO2球,使混合時間為18小時。於混合後,將漿料取出,並進行過濾、乾燥、造粒。利用冷均壓機對造粒物施加3ton/cm2之壓力而使其成形。
其次,以如下方式對成形體進行燒結。於以相對於爐內容積每0.1m3為5公升/分鐘之比率向燒結爐內之大氣中導入氧氣的環境中,以1350~1450℃之燒結溫度燒結20小時。此時,以1℃/分鐘進行升溫,於燒結後之冷卻時,停止導入氧氣,並以10℃/分鐘降溫至1000℃。
藉由ICP發光分光法進行所獲得之氧化物燒結體之組成分析,結果關於金屬元素,於任一實施例中均確認到與調配原料粉末時之添 加組成大致相同。氧化物燒結體之氮量如表1所示為1.0~800×1019atoms/cm3
其次,藉由X射線繞射測量進行氧化物燒結體之相鑑定,結果於實施例1~11中,僅確認到方鐵錳礦型結構之In2O3相的繞射峰,或者僅確認到方鐵錳礦型結構之In2O3相、β-Ga2O3型結構之GaInO3相及(Ga,In)2O3相之繞射峰,未確認到纖鋅礦型結構之GaN相或β-Ga2O3型結構之Ga2O3相。再者,於含有β-Ga2O3型結構之GaInO3相之情形時,將下述式1所定義之β-Ga2O3結構之GaInO3相的X射線繞射峰強度比示於表1。
100×I[GaInO3相(111)]/{I[In2O3相(400)]+I[GaInO3相(111)]}[%] 式1
又,對氧化物燒結體之密度進行測量,結果為6.75~7.07g/cm3
將氧化物燒結體加工成直徑152mm、厚度5mm之大小,並利用杯形磨石以最大高度Rz成為3.0μm以下之方式對濺鍍面進行研 磨。使用金屬銦將所加工之氧化物燒結體接合至無氧銅製之襯板,而製成濺鍍用靶。
使用實施例1~13之濺鍍用靶及無鹼玻璃基板(Corning#7059),不進行基板加熱而於室溫藉由直流濺鍍進行成膜。於無電弧放電抑制功能之裝備有直流電源的磁控濺鍍裝置(突起(Tokki)製造)之陰極安裝上述濺鍍靶。此時將靶-基板(保持器)間距離固定為60mm。於真空排氣至2×10-4Pa以下後,以根據各靶之鎵量成為適當之氧氣比率的方式導入氬氣與氧氣之混合氣體,並將氣體壓力調整為0.6Pa。施加直流電力300W(1.64W/cm2)而產生直流電漿。預濺鍍10分鐘後,於濺鍍靶之正上方,即靜止對向位置配置基板,而形成膜厚50nm之氧化物薄膜。確認所獲得之氧化物薄膜之組成與靶大致相同。又,X射線繞射測量之結果確認為非晶質。在大氣中、於300~475℃對所獲得之非晶質氧化物薄膜實施30分鐘熱處理。關於熱處理後之氧化物薄膜,X射線繞射測量之結果確認已結晶化,以In2O3(222)為主峰。進行所獲得之結晶質氧化物半導體薄膜的霍耳效應測量,求出載子濃度及遷移率。將所獲得之評價結果匯整記載於表2。
(比較例1)
設為與實施例3相同之Ga/(In+Ga)原子數比以及氧化鎵粉末與氮化鎵粉末之重量比,並且以按Zn/(In+Ga+Zn)原子數比計成為0.10之方式調配氧化鋅,藉由相同之方法而製作成形體。將所獲得之成形體於與實施例3相同之條件下進行燒結。
關於所獲得之氧化物燒結體,氧化鋅揮發,結果與燒結爐中所使用之氧化鋁製的燒結用構件發生激烈反應。又,由於生成經還原之金屬鋅,故殘留有燒結體熔融之痕跡。確認因該影響而使燒結之高密度化不會進行。因此,未實施針對氧化物燒結體之金屬元素的組成分析、氮量測量及密度測量,又,無法實施濺鍍評價。
(比較例2~5)
以成為如表3之Ga/(In+Ga)原子數比以及氧化鎵粉末與氮化鎵粉末之重量比的方式調配與實施例1~13相同之原料粉末,藉由相同之方法製作氧化物燒結體。
藉由ICP發光分光法進行所獲得之氧化物燒結體之組成分析,結果關於金屬元素,於本比較例中亦確認到與調配原料粉末時之添加組成大致相同。又,氧化物燒結體之氮量如表3所示為0.55~78×1019atoms/cm3
其次,藉由X射線繞射測量進行氧化物燒結體之相鑑定。於比較例2中,僅確認到方鐵錳礦型結構之In2O3相的繞射峰。於比較例3中,除方鐵錳礦型結構之In2O3相的繞射峰以外,亦確認到纖鋅礦型結構之GaN相的繞射峰,裏特沃爾德分析中之GaN相相對於全部相之重量比率超過5%。於比較例4中,確認到方鐵錳礦型結構之In2O3相、β-Ga2O3型結構之GaInO3相的繞射峰。於比較例5中,確認到β-Ga2O3型結構之Ga2O3相的繞射峰。又,對氧化物燒結體之密度進行測量,結果比較例3止於6.04g/cm3,與相同鎵含量之實施例4相比較低。
以與實施例1~13同樣之方式對上述氧化物燒結體進行加工而獲得濺鍍靶。使用所獲得之濺鍍靶,於與實施例1~13相同之濺鍍條件下,於室溫在無鹼玻璃基板(Corning#7059)上成膜膜厚50nm之氧化物薄膜。再者,關於比較例3,於薄膜形成過程中頻繁發生電弧放電。
確認所獲得之氧化物薄膜的組成與靶大致相同。又,X射線 繞射測量之結果確認為非晶質。在大氣中,於300~500℃對所獲得之非晶質氧化物薄膜實施30分鐘熱處理。關於熱處理後之氧化物薄膜,X射線繞射測量之結果確認已結晶化,以In2O3(222)為主峰。進行所獲得之結晶質氧化物半導體薄膜的霍耳效應測量,求出載子濃度及遷移率。將所獲得之評價結果匯整記載於表4。
(比較例6)
以成為如表3之Ga/(In+Ga)原子數比以及氧化鎵粉末與氮化鎵粉末之重量比的方式調配與實施例1~17相同之原料粉末,藉由相同之方法而製作成形體。將燒結環境變更為氮氣,並將燒結溫度變更為1200℃,除此以外,於與實施例1~13相同之條件下對所獲得之成形體進行燒結。
關於所獲得之氧化物燒結體,得知氧化銦被還原而生成金屬銦,該金屬銦已揮發。此外,確認亦存在β-Ga2O3型結構之Ga2O3相及纖鋅礦型結構之GaN相。再者,確認若於氮氣環境下進一步提高燒結溫度,則會進行氧化銦之分解,利用燒結之高密度化完全不會進行。
因此,未實施針對氧化物燒結體之金屬元素之組成分析、氮量測量及密度測量,又,無法實施濺鍍評價。
「評價」
於表1及表3中,將本發明之氧化物燒結體的實施例與比較例進行對 比。
於實施例1~13中,顯示出如下氧化物燒結體之特性,該氧化物燒結體以氧化物之形式含有銦及鎵,且含有氮,不含有鋅,鎵含量被控制為以Ga/(In+Ga)原子數比計為0.005以上,未達0.20。得知實施例1~17之氧化物燒結體以氮化鎵粉末重量比成為0.01以上,未達0.20之方式調配,結果其氮濃度成為1×1019atoms/cm3以上。並且,得知所獲得之燒結體於實施例1~13之鎵含量以Ga/(In+Ga)原子數比計為0.005以上,未達0.20時,顯示出6.75g/cm3以上之高燒結體密度。
根據實施例1~7,於鎵含量以Ga/(In+Ga)原子數比計為0.005~0.08之情形時,僅由方鐵錳礦型結構之In2O3相構成,實質上不含有纖鋅礦型結構之GaN相,又,不存在β-Ga2O3型結構之Ga2O3相。又,根據實施例8~13,於鎵含量以Ga/(In+Ga)原子數比計為0.09以上,未達0.20之情形時,由方鐵錳礦型結構之In2O3相及作為除In2O3相以外之生成相的β-Ga2O3型結構之GaInO3相或β-Ga2O3型結構之GaInO3相與(Ga,In)2O3相構成,實質上不含有纖鋅礦型結構之GaN相,又,不存在β-Ga2O3型結構之Ga2O3相。
相對於此,於比較例1中,顯示出鎵含量與實施例3相同,並且含有以Zn/(In+Ga+Zn)原子數比計為0.10之氧化鋅的氧化物燒結體之燒結結果,其結果,於以與實施例3完全相同之條件進行燒結之情形時,氧化鋅激烈地揮發,或分解而生成金屬鋅,而未獲得本發明之目標之氧化物燒結體。
又,比較例2之鎵含量以Ga/(In+Ga)原子數比計為0.001 之氧化物燒結體,雖然以原料粉末中之氮化鎵粉末重量比成為0.60之方式調配,但氮濃度未達1×1019atoms/cm3
並且,比較例3之鎵含量以Ga/(In+Ga)原子數比計為0.05之氧化物燒結體,以原料粉末中之氮化鎵粉末重量比成為0.70之方式調配,結果燒結體密度止於相對較低之6.04g/cm3,並且未僅由方鐵錳礦型結構之In2O3相構成,含有成為濺鍍成膜中電弧放電之原因的纖鋅礦型結構之GaN相。
比較例5之鎵含量以Ga/(In+Ga)原子數比計為0.80之氧化物燒結體,除方鐵錳礦型結構之In2O3相以外,亦含有成為濺鍍成膜時之電弧放電的原因之β-Ga2O3型結構之Ga2O3相。
另一方面,比較例6之鎵含量以Ga/(In+Ga)原子數比計為0.10之氧化物燒結體於使燒結環境不含有氧氣之氮氣環境中進行燒結,結果於1200℃之相對低溫下,氧化銦被還原而生成金屬銦,而未獲得本發明之目標之氧化物燒結體。
其次,於表2及表4中,將本發明之氧化物半導體薄膜之實施例與比較例進行對比。
於實施例1~13中,顯示出如下氧化物半導體薄膜之特性,該氧化物半導體薄膜係以氧化物之形式含有銦及鎵,且含有氮,不含有鋅之結晶質氧化物半導體薄膜,鎵含量被控制為以Ga/(In+Ga)原子數比計為0.005以上,未達0.20。得知實施例1~13之氧化物半導體薄膜均僅由方鐵錳礦型結構之In2O3相構成,氮濃度成為1×1018atoms/cm3以上。又,得知實施例1~13之氧化物半導體薄膜之載子濃度為1.0×1018cm-3以下,載子 遷移率為10cm2V-1sec-1以上。尤其實施例4~12之鎵含量以Ga/(In+Ga)原子數比計為0.05~0.15之氧化物半導體薄膜顯示出載子遷移率為15cm2V-1sec-1以上之優異特性。
相對於此,比較例2之鎵含量以Ga/(In+Ga)原子數比計為0.001之氧化物半導體薄膜雖然僅由方鐵錳礦型結構之In2O3相構成,但氮濃度未達1×1018atoms/cm3,並且載子遷移率未達10cm2V-1sec-1
另一方面,比較例4之鎵含量以Ga/(In+Ga)原子數比計為0.65之氧化物半導體薄膜,即便於以製程之上限溫度即700℃進行熱處理之情形時,亦未生成方鐵錳礦型結構之In2O3相而保持非晶質狀態。因此,載子濃度超過1.0×1018cm-3

Claims (15)

  1. 一種氧化物燒結體,其以氧化物之形式含有銦及鎵,該鎵之含量以Ga/(In+Ga)原子數比計為0.005以上,未達0.20,含有氮,不含有鋅,其特徵在於:實質上不含有纖鋅礦型結構之GaN相。
  2. 如申請專利範圍第1項之氧化物燒結體,其中,該鎵之含量以Ga/(In+Ga)原子數比計為0.05以上,0.15以下。
  3. 如申請專利範圍第1或2項之氧化物燒結體,其氮濃度為1×1019atoms/cm3以上。
  4. 如申請專利範圍第1或2項之氧化物燒結體,其僅由方鐵錳礦型結構之In2O3相構成。
  5. 如申請專利範圍第1或2項之氧化物燒結體,其由方鐵錳礦型結構之In2O3相、作為除In2O3相以外之生成相的β-Ga2O3型結構之GaInO3相或β-Ga2O3型結構之GaInO3相及(Ga,In)2O3相構成。
  6. 如申請專利範圍第5項之氧化物燒結體,其中,下述式1所定義之β-Ga2O3型結構的GaInO3相之X射線繞射峰強度比為38%以下之範圍,100×I[GaInO3相(111)]/{I[In2O3相(400)]+I[GaInO3相(111)]}[%] 式1。
  7. 如申請專利範圍第1或2項之氧化物燒結體,其不含有β-Ga2O3型結構之Ga2O3相。
  8. 如申請專利範圍第1或2項之氧化物燒結體,其藉由氧氣體積分率超過20%之環境中之常壓燒結法進行燒結。
  9. 一種濺鍍用靶,其對申請專利範圍第1或2項之氧化物燒 結體進行加工而獲得。
  10. 一種結晶質氧化物半導體薄膜,其使用申請專利範圍第9項之濺鍍用靶並藉由濺鍍法於基板上形成非晶質膜後,藉由氧化性環境之熱處理而使該非晶質膜結晶化。
  11. 一種結晶質氧化物半導體薄膜,其以氧化物之形式含有銦及鎵,含有氮,不含有鋅,鎵之含量以Ga/(In+Ga)原子數比計為0.005以上,未達0.20,且氮濃度為1×1018atoms/cm3以上,載子遷移率為10cm2V-1sec-1以上。
  12. 如申請專利範圍第11項之結晶質氧化物半導體薄膜,其中,該鎵之含量以Ga/(In+Ga)原子數比計為0.05以上,0.15以下。
  13. 如申請專利範圍第11或12項之結晶質氧化物半導體薄膜,其僅由方鐵錳礦型結構之In2O3相構成。
  14. 如申請專利範圍第11或12項之結晶質氧化物半導體薄膜,其不含有纖鋅礦型結構之GaN相。
  15. 如申請專利範圍第11或12項之結晶質氧化物半導體薄膜,其載子濃度為1.0×1018cm-3以下。
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WO2015137274A1 (ja) 2015-09-17
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