TWI544472B - Source driver, display driving circuit, and display apparatus - Google Patents
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Description
本發明是有關於一種顯示驅動技術，且特別是有關於一種可根據顯示面板的驅動狀態調整功率模式的源極驅動器、顯示驅動電路及顯示裝置。 The present invention relates to a display driving technique, and more particularly to a source driver, a display driving circuit, and a display device that can adjust a power mode according to a driving state of a display panel.
隨著電子技術的進步，電子產品成為人們生活中重要的工具。而如何能在提供電子產品高品質的顯示畫面之餘，同時能維持電子產品的使用時間，則是現在電子產品主要需要解決的問題。 With the advancement of electronic technology, electronic products have become an important tool in people's lives. How to maintain the high-quality display of electronic products while maintaining the use time of electronic products is a major problem that electronic products need to solve now.
現有用以驅動液晶顯示面板的顯示驅動電路通常是由時序控制器、閘極驅動器以及源極驅動器所組成。由於現有的顯示面板的規格各不相同，應用條件也有所差異。例如不同的系統電壓、畫面更新率或面板負載等。因此，源極驅動器內一般會內建有一功率模式選擇器，其可根據從外部接收的控制訊號來調整源極驅動器的功率模式，藉以盡量的平衡顯示品質與省電的需求。 The display driving circuit currently used to drive the liquid crystal display panel is usually composed of a timing controller, a gate driver, and a source driver. Due to the different specifications of the existing display panels, the application conditions are also different. For example, different system voltages, screen update rates, or panel loads. Therefore, a power mode selector is generally built in the source driver, which can adjust the power mode of the source driver according to the control signal received from the outside, so as to balance the display quality and the power saving requirement as much as possible.
然而，在現有的技術下，由於顯示裝置中的顯示驅動電 路與顯示面板是分別進行設計的，因此在裝配顯示裝置時，僅能仰賴工程人員根據顯示面板的規格來對應的手動調整源極驅動器的功率模式，才能夠使得顯示驅動電路與顯示面板之間的搭配達到最佳化的省電及顯示效能。如此一來便會造成許多人力及時間成本的提升。 However, under the existing technology, due to display driving power in the display device The road and the display panel are separately designed. Therefore, when the display device is assembled, only the power mode of the source driver can be manually adjusted according to the specifications of the display panel, so that the display driving circuit and the display panel can be made. The combination achieves optimal power saving and display performance. As a result, many manpower and time costs will increase.
本發明提供一種源極驅動器、顯示驅動電路及顯示裝置，其可感測顯示面板的驅動狀態，並且據以自動地調整源極驅動器的功率模式。 The present invention provides a source driver, a display driving circuit, and a display device that can sense a driving state of a display panel and automatically adjust a power mode of the source driver.
本發明的源極驅動器適於驅動顯示面板。所述源極驅動器包括多個驅動通道、感測單元以及功率模式選擇單元。所述多個驅動通道用以接收畫面資料。各個驅動通道依據畫面資料產生畫素驅動訊號以提供給顯示面板。感測單元用以感測顯示面板的驅動狀態，並且依據驅動狀態產生模式選擇訊號。功率模式選擇單元耦接所述多個驅動通道與感測單元，並且依據關聯於顯示面板的驅動狀態的模式選擇訊號來設定各個驅動通道的功率模式，從而令所述多個驅動通道基於被設定的功率模式以對應的電壓轉換速率(slew rate)來產生所述多個畫素驅動訊號。 The source driver of the present invention is adapted to drive a display panel. The source driver includes a plurality of driving channels, a sensing unit, and a power mode selection unit. The plurality of drive channels are configured to receive picture material. Each driving channel generates a pixel driving signal according to the picture data to provide to the display panel. The sensing unit is configured to sense a driving state of the display panel, and generate a mode selection signal according to the driving state. The power mode selection unit is coupled to the plurality of driving channels and the sensing unit, and sets a power mode of each driving channel according to a mode selection signal associated with a driving state of the display panel, so that the plurality of driving channels are set based on The power mode generates the plurality of pixel drive signals at a corresponding voltage slew rate.
在本發明一實施例中，各個驅動通道包括資料轉換電路以及運算放大器。資料轉換電路接收時序控制訊號與畫面資料，用以依據時序控制訊號鎖存畫面資料，並且將被鎖存的畫面資料 轉換為輸出電壓。運算放大器耦接資料轉換電路。運算放大器用以基於參考電源將輸出電壓轉換為對應的畫素驅動訊號，其中參考電源大小關聯於所述多個畫素驅動訊號的電壓轉換速率。 In an embodiment of the invention, each of the drive channels includes a data conversion circuit and an operational amplifier. The data conversion circuit receives the timing control signal and the picture data for latching the picture data according to the timing control signal, and the screen data to be latched Converted to output voltage. The operational amplifier is coupled to the data conversion circuit. The operational amplifier is configured to convert the output voltage into a corresponding pixel driving signal based on the reference power source, wherein the reference power source size is associated with a voltage conversion rate of the plurality of pixel driving signals.
在本發明一實施例中，功率模式選擇單元包括可調整(adjustable)電源產生電路以及電源控制電路。可調整電源產生電路用以依據模式選擇訊號產生電源訊號。電源控制電路用以基於電源訊號產生參考電源來控制運算放大器的運作。 In an embodiment of the invention, the power mode selection unit includes an adjustable power generation circuit and a power control circuit. The adjustable power generation circuit is configured to generate a power signal according to the mode selection signal. The power control circuit is configured to generate a reference power based on the power signal to control the operation of the operational amplifier.
在本發明一實施例中，驅動狀態為顯示面板的系統電壓。 In an embodiment of the invention, the driving state is a system voltage of the display panel.
在本發明一實施例中，感測單元包括電壓取樣電路以及訊號產生電路。電壓取樣電路用以取樣系統電壓，並且據以產生電壓指示訊號。訊號產生電路耦接電壓取樣電路，用以依據指示系統電壓大小的電壓指示訊號產生對應於不同功率模式的模式。 In an embodiment of the invention, the sensing unit includes a voltage sampling circuit and a signal generating circuit. The voltage sampling circuit is configured to sample the system voltage and generate a voltage indicating signal accordingly. The signal generating circuit is coupled to the voltage sampling circuit for generating a mode corresponding to different power modes according to the voltage indicating signal indicating the magnitude of the system voltage.
在本發明一實施例中，當感測單元偵測到系統電壓為第一電壓時，感測單元產生第一模式選擇訊號，使得功率模式選擇單元依據第一模式選擇訊號設定功率模式為第一功率位階。當感測單元偵測到系統電壓為大於第一電壓的第二電壓時，感測單元產生第二模式選擇訊號，使得功率模式選擇單元依據第二模式選擇訊號設定功率模式為第二功率位階。第二功率位階所對應的電壓轉換速率大於第一功率位階所對應的電壓轉換速率。 In an embodiment of the invention, when the sensing unit detects that the system voltage is the first voltage, the sensing unit generates a first mode selection signal, so that the power mode selection unit sets the power mode according to the first mode selection mode. Power level. When the sensing unit detects that the system voltage is a second voltage greater than the first voltage, the sensing unit generates a second mode selection signal, so that the power mode selection unit sets the power mode to the second power level according to the second mode selection signal. The voltage conversion rate corresponding to the second power level is greater than the voltage conversion rate corresponding to the first power level.
在本發明一實施例中，驅動狀態為顯示面板的充放電期間。 In an embodiment of the invention, the driving state is a charging and discharging period of the display panel.
在本發明一實施例中，感測單元包括充放電期間取樣電 路以及訊號產生電路。充放電期間取樣電路依據關聯於充放電期間的時序控制訊號而致能，並據以產生期間指示訊號。訊號產生電路耦接充放電期間取樣電路，用以依據指示充放電期間長度的期間指示訊號產生對應於不同功率模式的模式選擇訊號。 In an embodiment of the invention, the sensing unit includes sampling power during charging and discharging Road and signal generation circuit. During the charging and discharging period, the sampling circuit is enabled according to the timing control signal associated with the charging and discharging period, and accordingly generates a period indication signal. The signal generating circuit is coupled to the charging and discharging period sampling circuit for generating a mode selection signal corresponding to different power modes according to the period indication signal indicating the length of the charging and discharging period.
在本發明一實施例中，當感測單元偵測到充放電期間為第一期間時，感測單元產生第一模式選擇訊號，使得功率模式選擇單元依據第一模式選擇訊號設定功率模式為第一功率位階。當感測單元偵測到充放電期間為大於第一期間的第二期間時，感測單元產生第二模式選擇訊號，使得功率模式選擇單元依據第二模式選擇訊號設定功率模式為第二功率位階。第二功率位階所對應的電壓轉換速率小於第一功率位階所對應的電壓轉換速率。 In an embodiment of the invention, when the sensing unit detects that the charging and discharging period is the first period, the sensing unit generates the first mode selection signal, so that the power mode selection unit sets the power mode according to the first mode selection signal. A power level. When the sensing unit detects that the charging and discharging period is greater than the second period of the first period, the sensing unit generates the second mode selection signal, so that the power mode selecting unit sets the power mode to the second power level according to the second mode selection signal. . The voltage conversion rate corresponding to the second power level is smaller than the voltage conversion rate corresponding to the first power level.
在本發明一實施例中，驅動狀態為所述多個畫素驅動訊號至少其中之一的電流大小。 In an embodiment of the invention, the driving state is a current magnitude of at least one of the plurality of pixel driving signals.
在本發明一實施例中，感測單元包括電流取樣電路以及訊號產生電路。電流取樣電路用以取樣至少其中之一畫素驅動訊號的電流以作為參考輸出電流，並且依據參考輸出電流產生電流指示訊號。訊號產生電路耦接電流取樣電路。訊號產生電路基於電流指示訊號取得參考輸出電流與臨界電流值之間的相對關係，並據以產生指示是否調整功率模式的模式選擇訊號。 In an embodiment of the invention, the sensing unit includes a current sampling circuit and a signal generating circuit. The current sampling circuit is configured to sample the current of at least one of the pixel driving signals as a reference output current, and generate a current indicating signal according to the reference output current. The signal generating circuit is coupled to the current sampling circuit. The signal generating circuit obtains a relative relationship between the reference output current and the critical current value based on the current indicating signal, and accordingly generates a mode selection signal indicating whether to adjust the power mode.
在本發明一實施例中，電流取樣電路取樣單一個畫素驅動訊號的電流作為參考輸出電流。 In an embodiment of the invention, the current sampling circuit samples the current of a single pixel drive signal as a reference output current.
在本發明一實施例中，電流取樣電路取樣多數個畫素驅 動訊號的電流，並且判斷各個取樣的畫素驅動訊號的電流是否符合驅動條件，再以符合驅動條件的畫素驅動訊號的電流作為參考輸出電流。 In an embodiment of the invention, the current sampling circuit samples a plurality of pixel drives The current of the motion signal, and whether the current of each of the sampled pixel driving signals meets the driving condition, and then the current of the pixel driving signal that meets the driving condition is used as a reference output current.
在本發明一實施例中，電流取樣電路比較各個畫素驅動訊號間的電流大小，並且判定所述多個畫素驅動訊號的電流中最小者符合驅動條件。 In an embodiment of the invention, the current sampling circuit compares the magnitude of the current between the respective pixel driving signals, and determines that the smallest of the plurality of pixel driving signals meets the driving condition.
在本發明一實施例中，訊號產生電路基於電流指示訊號判斷參考輸出電流是否小於等於臨界電流值。當訊號產生電路判斷參考輸出電流大於臨界電流值時，訊號產生電路產生致能模式選擇訊號，藉以指示功率模式選擇單元將功率模式提升單位功率位階，以及當訊號產生電路判斷參考輸出電流小於等於臨界電流值時，訊號產生電路產生禁能模式選擇訊號，藉以指示功率模式選擇單元將功率模式維持在現有功率位階。 In an embodiment of the invention, the signal generating circuit determines whether the reference output current is less than or equal to the critical current value based on the current indicating signal. When the signal generating circuit determines that the reference output current is greater than the critical current value, the signal generating circuit generates an enable mode selection signal, thereby instructing the power mode selecting unit to increase the power mode by the unit power level, and when the signal generating circuit determines that the reference output current is less than or equal to the critical value At the current value, the signal generation circuit generates a disable mode selection signal to instruct the power mode selection unit to maintain the power mode at the existing power level.
在本發明一實施例中，功率模式選擇單元將功率模式預設為起始功率位階，並且功率模式選擇單元基於接收到的致能模式選擇訊號從起始功率位階步進地調整功率模式，直至功率模式選擇單元接收到指示參考輸出電流大於臨界電流值的禁能模式選擇訊號。 In an embodiment of the invention, the power mode selection unit presets the power mode as the starting power level, and the power mode selection unit adjusts the power mode stepwise from the starting power level based on the received enabling mode selection signal until The power mode selection unit receives the disable mode selection signal indicating that the reference output current is greater than the critical current value.
在本發明一實施例中，各個驅動通道於空白期間內接收對應於測試圖樣的畫面資料，功率模式選擇單元依據關聯於測試圖樣的驅動訊號的電流大小設定終止功率位階。 In an embodiment of the invention, each driving channel receives the picture data corresponding to the test pattern during the blank period, and the power mode selection unit sets the termination power level according to the current magnitude of the driving signal associated with the test pattern.
本發明的顯示驅動電路適於驅動顯示面板。所述顯示驅 動電路包括閘極驅動器、源極驅動器、時序控制器、感測單元以及功率模式選擇單元。閘極驅動器用以序列地開啟顯示面板上的每一列畫素。源極驅動器具有多個驅動通道，其中所述多個驅動通道接收畫面資料，並且各個驅動通道依據畫面資料產生畫素驅動訊號以提供給顯示面板。時序控制器耦接閘極驅動器與源極驅動器，用以控制閘極驅動器與源極驅動器的運作時序。感測單元用以感測顯示面板的驅動狀態，並且依據驅動狀態產生模式選擇訊號。功率模式選擇單元耦接所述多個驅動通道與感測單元，並且依據關聯於顯示面板的驅動狀態的模式選擇訊號來設定各個驅動通道的功率模式，從而令所述多個驅動通道基於被設定的功率模式以對應的電壓轉換速率來產生所述多個畫素驅動訊號。 The display driving circuit of the present invention is adapted to drive a display panel. Display drive The dynamic circuit includes a gate driver, a source driver, a timing controller, a sensing unit, and a power mode selection unit. The gate driver is used to sequentially turn on each column of pixels on the display panel. The source driver has a plurality of driving channels, wherein the plurality of driving channels receive picture data, and each driving channel generates a pixel driving signal according to the picture material to provide to the display panel. The timing controller is coupled to the gate driver and the source driver for controlling the operation timing of the gate driver and the source driver. The sensing unit is configured to sense a driving state of the display panel, and generate a mode selection signal according to the driving state. The power mode selection unit is coupled to the plurality of driving channels and the sensing unit, and sets a power mode of each driving channel according to a mode selection signal associated with a driving state of the display panel, so that the plurality of driving channels are set based on The power mode generates the plurality of pixel drive signals at a corresponding voltage conversion rate.
在本發明一實施例中，感測單元與功率模式選擇單元設置於源極驅動器中。 In an embodiment of the invention, the sensing unit and the power mode selection unit are disposed in the source driver.
本發明的顯示裝置包括顯示面板以及顯示驅動電路。顯示面板具有多個以陣列排列的畫素。顯示驅動電路用以驅動顯示面板，其中顯示驅動電路包括閘極驅動器、源極驅動器、時序控制器、感測單元以及功率模式選擇單元。閘極驅動器用以序列地開啟顯示面板上的每一列畫素。源極驅動器具有多個驅動通道，其中所述多個驅動通道接收畫面資料，並且各個驅動通道依據畫面資料產生畫素驅動訊號以提供給顯示面板。時序控制器耦接閘極驅動器與源極驅動器，用以控制閘極驅動器與源極驅動器的運作時序。感測單元用以感測顯示面板的驅動狀態，並且依據驅動 狀態產生模式選擇訊號。功率模式選擇單元耦接所述多個驅動通道與感測單元，並且依據關聯於顯示面板的驅動狀態的模式選擇訊號來設定各個驅動通道的功率模式，從而令所述多個驅動通道基於被設定的功率模式以對應的電壓轉換速率來產生所述多個畫素驅動訊號。 The display device of the present invention includes a display panel and a display driving circuit. The display panel has a plurality of pixels arranged in an array. The display driving circuit is configured to drive the display panel, wherein the display driving circuit comprises a gate driver, a source driver, a timing controller, a sensing unit, and a power mode selection unit. The gate driver is used to sequentially turn on each column of pixels on the display panel. The source driver has a plurality of driving channels, wherein the plurality of driving channels receive picture data, and each driving channel generates a pixel driving signal according to the picture material to provide to the display panel. The timing controller is coupled to the gate driver and the source driver for controlling the operation timing of the gate driver and the source driver. The sensing unit is configured to sense a driving state of the display panel, and is driven according to the driving The status generation mode selects a signal. The power mode selection unit is coupled to the plurality of driving channels and the sensing unit, and sets a power mode of each driving channel according to a mode selection signal associated with a driving state of the display panel, so that the plurality of driving channels are set based on The power mode generates the plurality of pixel drive signals at a corresponding voltage conversion rate.
基於上述，本發明實施例提出一種源極驅動器、顯示驅動電路及顯示裝置，其可偵測顯示面板的驅動狀態並據以動態地調整各驅動通道的輸出能力/電壓轉換速率。藉此，無論本發明實施例的源極驅動器與顯示驅動電路應用在何種規格的顯示面板中，其皆可根據顯示面板的應用環境而自動地以最為合適的電壓轉換速率來進行源極驅動。 Based on the above, the embodiment of the present invention provides a source driver, a display driving circuit, and a display device, which can detect the driving state of the display panel and dynamically adjust the output capability/voltage conversion rate of each driving channel. Therefore, no matter what kind of display panel is used in the source driver and the display driving circuit of the embodiment of the present invention, the source driving can be automatically performed at the most suitable voltage conversion rate according to the application environment of the display panel. .
為讓本發明的上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。 The above described features and advantages of the invention will be apparent from the following description.
10‧‧‧顯示裝置 10‧‧‧ display device
20‧‧‧時序控制器 20‧‧‧Sequence Controller
60‧‧‧閘極驅動器 60‧‧‧gate driver
100、200、800‧‧‧源極驅動器 100, 200, 800‧‧‧ source drivers
110、210、310、410、610、810、910‧‧‧感測單元 110, 210, 310, 410, 610, 810, 910 ‧ ‧ sensing unit
120、220、320、420、620、820‧‧‧功率模式選擇單元 120, 220, 320, 420, 620, 820‧‧‧ power mode selection unit
130_1~130_n、230_1~230_n、830_1~830_n、830_y、830_z‧‧‧驅動通道 130_1~130_n, 230_1~230_n, 830_1~830_n, 830_y, 830_z‧‧‧ drive channel
312、412‧‧‧電壓取樣電路 312, 412‧‧‧ voltage sampling circuit
314、414、614、814、914‧‧‧訊號產生電路 314, 414, 614, 814, 914‧‧‧ signal generation circuit
322、422、622‧‧‧可調整電源產生電路 322, 422, 622‧‧‧ adjustable power generation circuit
324、424、624‧‧‧電源控制電路 324, 424, 624‧‧‧ power control circuit
612‧‧‧充放電期間取樣電路 612‧‧‧Sampling circuit during charging and discharging
812、912‧‧‧電流取樣電路 812, 912‧‧‧ current sampling circuit
C‧‧‧電容 C‧‧‧ capacitor
COMP、COMP1~COMPa、CUy~CUz、CDy~CDz‧‧‧比較器 COMP, COMP1~COMPa, CUy~CUz, CDy~CDz‧‧‧ comparator
CT‧‧‧計數器 CT‧‧‧ counter
DAC1~DACn‧‧‧數位類比轉換器 DAC1~DACn‧‧‧Digital Analog Converter
DCC1~DCCn、DCCy、DCCz‧‧‧資料轉換電路 DCC1~DCCn, DCCy, DCCz‧‧‧ data conversion circuit
DDC‧‧‧顯示驅動電路 DDC‧‧‧ display drive circuit
DP‧‧‧顯示面板 DP‧‧‧ display panel
DS、DS’、DS1~DSn、DSy、DSz‧‧‧畫素驅動訊號 DS, DS', DS1~DSn, DSy, DSz‧‧‧ pixel drive signals
DST‧‧‧驅動狀態 DST‧‧‧Drive status
FSM‧‧‧狀態機 FSM‧‧‧ state machine
GND‧‧‧接地端 GND‧‧‧ ground terminal
GS1~GSm‧‧‧掃描訊號 GS1~GSm‧‧‧ scan signal
Iop_REF‧‧‧參考電源 Iop_REF‧‧‧reference power supply
IREF‧‧‧參考電流 IREF‧‧‧reference current
LA1~LAn‧‧‧資料鎖存器 LA1~LAn‧‧‧ data latch
LGD、LGU‧‧‧邏輯閘 LGD, LGU‧‧‧ logic gate
LV1~LVa、VC、Vy_source~Vz_source、Vy_sink~Vz_sink‧‧‧電 壓訊號 LV1~LVa, VC, Vy_source~Vz_source, Vy_sink~Vz_sink‧‧‧ Pressure signal
Mp1~Mpb、Mn1、Mn2‧‧‧電晶體 Mp1~Mpb, Mn1, Mn2‧‧‧O crystal
MUX‧‧‧多工器 MUX‧‧‧Multiplexer
OP1~OPn、OPy、OPz‧‧‧運算放大器 OP1~OPn, OPy, OPz‧‧‧Operational Amplifier
R、R1、R2‧‧‧電阻 R, R1, R2‧‧‧ resistance
REG1~REGa‧‧‧暫存器 REG1~REGa‧‧‧ register
SR1~SRn‧‧‧位移暫存器 SR1~SRn‧‧‧ Displacement Register
slew1、slew2、slew3、slew4‧‧‧電壓轉換速率 Slew1, slew2, slew3, slew4‧‧‧ voltage conversion rate
S_slew‧‧‧模式選擇訊號 S_slew‧‧‧ mode selection signal
SW1、SW2‧‧‧開關 SW1, SW2‧‧‧ switch
SWM‧‧‧開關模組 SWM‧‧‧ switch module
VCC‧‧‧偏壓電壓 VCC‧‧‧ bias voltage
VDATA‧‧‧畫面資料 VDATA‧‧‧ screen material
VDD、VDD1、VDD2‧‧‧系統電壓 VDD, VDD1, VDD2‧‧‧ system voltage
VREF、VREF1~VREFa、VREF_source、VREF_sink‧‧‧參考電壓 VREF, VREF1~VREFa, VREF_source, VREF_sink‧‧‧ reference voltage
T、T1、T2‧‧‧充放電期間 T, T1, T2‧‧‧ charge and discharge period
TSg、TSs‧‧‧時序控制訊號 TSg, TSs‧‧‧ timing control signals
圖1為本發明一實施例之顯示裝置的架構示意圖。 FIG. 1 is a schematic structural diagram of a display device according to an embodiment of the invention.
圖2為本發明一實施例之源極驅動器的架構示意圖。 2 is a schematic structural diagram of a source driver according to an embodiment of the present invention.
圖3為本發明一實施例之藉感測系統電壓調整功率模式的源極驅動器的電路示意圖。 FIG. 3 is a schematic circuit diagram of a source driver of a voltage adjustment power mode by a sensing system according to an embodiment of the invention.
圖4為本發明另一實施例之藉感測系統電壓調整功率模式的源極驅動器的電路示意圖。 4 is a circuit diagram of a source driver of a voltage adjustment power mode by a sensing system according to another embodiment of the present invention.
圖5為本發明一實施例之源極驅動器的訊號波形示意圖。 FIG. 5 is a schematic diagram of signal waveforms of a source driver according to an embodiment of the invention.
圖6為本發明一實施例之藉感測顯示面板的充放電期間調整功率模式的源極驅動器的電路示意圖。 6 is a circuit diagram of a source driver for adjusting a power mode during charge and discharge of a sensing display panel according to an embodiment of the invention.
圖7為本發明另一實施例之源極驅動器的訊號波形示意圖。 FIG. 7 is a schematic diagram of signal waveforms of a source driver according to another embodiment of the present invention.
圖8為本發明一實施例之藉感測畫素驅動訊號的電流大小調整功率模式的源極驅動器的架構示意圖。 FIG. 8 is a schematic structural diagram of a source driver of a current size adjustment power mode by a sensing pixel driving signal according to an embodiment of the invention.
圖9A與圖9B為依照圖8之一實施例的源極驅動器的電路示意圖。 9A and 9B are circuit diagrams of a source driver in accordance with an embodiment of FIG. 8.
為了使本揭露之內容可以被更容易明瞭，以下特舉實施例做為本揭露確實能夠據以實施的範例。另外，凡可能之處，在圖式及實施方式中使用相同標號的元件/構件/步驟，係代表相同或類似部件。 In order to make the disclosure of the present disclosure easier to understand, the following specific embodiments are examples of the disclosure that can be implemented. In addition, wherever possible, the same elements, components, and steps in the drawings and embodiments are used to represent the same or similar components.
圖1為本發明一實施例之顯示裝置的架構示意圖。請參照圖1，顯示裝置10包括顯示面板DP以及用以驅動顯示面板DP的顯示驅動電路DDC。於此，顯示面板DP例如包括以m×n陣列排列的畫素(故以“m×n顯示面板”表示之)，其中所述m、n為正整數，且可由顯示面板DP的尺寸及顯示解析度所決定。此外，顯示面板DP中還配置有多條掃描線(未繪示)與多條資料線(未繪示)，其中每一列(row)畫素分別耦接一條對應的掃描線，藉以經由掃描線從顯示驅動電路DDC接收對應的掃描訊號 GS1~GSm。另外，每一行(column)畫素分別耦接一條對應的資料線，藉以經由資料線從顯示驅動電路DDC接收對應的畫素驅動訊號DS1~DSn。 FIG. 1 is a schematic structural diagram of a display device according to an embodiment of the invention. Referring to FIG. 1 , the display device 10 includes a display panel DP and a display driving circuit DDC for driving the display panel DP. Herein, the display panel DP includes, for example, pixels arranged in an m×n array (thus represented by “m×n display panel”), wherein the m and n are positive integers, and may be sized and displayed by the display panel DP. Determined by the resolution. In addition, the display panel DP is further configured with a plurality of scan lines (not shown) and a plurality of data lines (not shown), wherein each of the row pixels is respectively coupled to a corresponding scan line, thereby passing the scan line. Receiving corresponding scanning signals from the display driving circuit DDC GS1~GSm. In addition, each column pixel is respectively coupled to a corresponding data line, so that the corresponding pixel driving signals DS1~DSn are received from the display driving circuit DDC via the data line.
顯示驅動電路DDC耦接顯示面板DP，並且用以根據從前端的影像處理電路(未繪示)所接收的影像訊號來驅動顯示面板DP，以使得顯示面板DP顯示相應的畫面。在本實施例中，顯示驅動電路DDC包括時序控制器(timing controller，T-con)20、閘極驅動器(gate driver)60、源極驅動器(source driver)100、感測單元110及功率模式選擇單元120。 The display driving circuit DDC is coupled to the display panel DP, and is configured to drive the display panel DP according to the image signal received from the image processing circuit (not shown) of the front end, so that the display panel DP displays the corresponding picture. In this embodiment, the display driving circuit DDC includes a timing controller (T-con) 20, a gate driver 60, a source driver 100, a sensing unit 110, and a power mode selection. Unit 120.
時序控制器20可用以提供多個預設的時序控制訊號TSg、TSs(例如起始訊號(STV signal)、水平同步訊號(HSYNC signal)及垂直同步訊號(VSYNC signal)、多個操作所需的時脈訊號(clock signals)，但並不限制於此)以控制閘極驅動器60以及源極驅動器100的運作時序。此外，時序控制器20還可依據所接收到的影像訊號產生畫面資料VDATA，並且將畫面資料VDATA提供給源極驅動器100。 The timing controller 20 can be used to provide a plurality of preset timing control signals TSg, TSs (such as a start signal (STV signal), a horizontal synchronization signal (HSYNC signal), and a vertical synchronization signal (VSYNC signal), and multiple operations required. Clock signals, but not limited thereto, are used to control the timing of operation of the gate driver 60 and the source driver 100. In addition, the timing controller 20 can also generate the picture material VDATA according to the received image signal, and provide the picture material VDATA to the source driver 100.
閘極驅動器60會受控於時序控制器20所提供的時序控制訊號而提供掃描訊號GS1~GSm來依序開啟/掃描顯示面板DP上的每一列畫素。 The gate driver 60 is controlled by the timing control signal provided by the timing controller 20 to provide the scanning signals GS1 GS GSm to sequentially turn on/scan each column of pixels on the display panel DP.
源極驅動器100具有多個驅動通道130_1~130_n，其中驅動通道130_1~130_n會接收時序控制器20所提供的畫面資料VDATA以及時序控制訊號TSs，藉以協同於每一列畫素的開啟時 序而將畫面資料VDATA轉換為畫素驅動訊號DS1~DSn以提供給顯示面板DP。 The source driver 100 has a plurality of driving channels 130_1~130_n, wherein the driving channels 130_1~130_n receive the picture data VDATA and the timing control signal TSs provided by the timing controller 20, thereby cooperating with the opening of each column of pixels. The picture material VDATA is sequentially converted into the pixel drive signals DS1 to DSn to be supplied to the display panel DP.
感測單元110用以感測顯示面板DP的驅動狀態DST(例如顯示面板DP的系統電壓、顯示面板DP的充放電期間長度以及顯示面板DP所接收的電流大小(即，各驅動通道所輸出的電流)，後續實施例會進一步說明)，並且依據所感測到的驅動狀態DP而產生對應的模式選擇訊號S_slew。 The sensing unit 110 is configured to sense the driving state DST of the display panel DP (for example, the system voltage of the display panel DP, the length of the charging and discharging period of the display panel DP, and the magnitude of the current received by the display panel DP (ie, the output of each driving channel) Current), as further described in the following embodiments, and corresponding mode selection signal S_slew is generated in accordance with the sensed drive state DP.
功率模式選擇單元120耦接感測單元110以及驅動通道130_1~130_n。其中，功率模式選擇單元120會依據關聯於顯示面板的驅動狀態DST的模式選擇訊號S_slew來設定各驅動通道130_1~130_n的功率模式，從而令各驅動通道130_1~130_n基於被設定的功率模式以對應的電壓轉換速率(slew rate)來產生畫素驅動訊號DS1~DSn。 The power mode selection unit 120 is coupled to the sensing unit 110 and the driving channels 130_1~130_n. The power mode selection unit 120 sets the power mode of each of the driving channels 130_1~130_n according to the mode selection signal S_slew associated with the driving state DST of the display panel, so that the driving channels 130_1~130_n are corresponding to the set power mode. The voltage slew rate is used to generate the pixel drive signals DS1~DSn.
於此值得一提的是，本實施例的感測單元110與功率模式選擇單元120雖是設置於源極驅動器100中為例，但本發明不僅限於此。所述感測單元110與功率模式選擇單元120也可獨立地設置於源極驅動器100之外，並且透過特定的介面與源極驅動器相互連接，藉以調控源極驅動器100的運作。 It is to be noted that the sensing unit 110 and the power mode selecting unit 120 of the present embodiment are provided in the source driver 100 as an example, but the present invention is not limited thereto. The sensing unit 110 and the power mode selection unit 120 can also be independently disposed outside the source driver 100 and connected to the source driver through a specific interface, thereby regulating the operation of the source driver 100.
底下搭配圖2來說明本案的源極驅動器的架構。其中，圖2為本發明一實施例之源極驅動器的架構示意圖。請參照圖2，在本實施例中，源極驅動器200包括感測單元210、功率模式選擇單元220以及驅動通道230_1~230_n。 The structure of the source driver of this case will be described below with FIG. 2 is a schematic structural diagram of a source driver according to an embodiment of the present invention. Referring to FIG. 2, in the embodiment, the source driver 200 includes a sensing unit 210, a power mode selecting unit 220, and driving channels 230_1~230_n.
驅動通道230_1~230_n分別包括資料轉換電路DCC1~DCCn以及運算放大器OP1~OPn。資料轉換電路DCC1用以接收時序控制訊號TSs與畫面資料VDATA，用以依據時序控制訊號TSs鎖存畫面資料VDATA，並且將被鎖存的畫面資料VDATA轉換為輸出電壓。運算放大器OP1~OPn耦接對應的資料轉換電路DCC1~DCCn。運算放大器OP1~OPn會基於功率模式選擇單元220所提供的參考電源Iop_REF將輸出電壓轉換為對應的畫素驅動訊號DS1~DSn。其中，本實施例的資料轉換電路DCC1~DCCn可分別利用由位移暫存器(shift register)SR1~SRn、資料鎖存器(data latch)LA1~LAn以及數位類比轉換器DAC1~DACn所組成的電路架構來實現，但本發明不僅限於此。另外，所述之時序控制訊號TSs可例如為水平同步訊號，但本發明同樣不僅限於此。 The drive channels 230_1~230_n include data conversion circuits DCC1~DCCn and operational amplifiers OP1~OPn, respectively. The data conversion circuit DCC1 is configured to receive the timing control signal TSs and the picture data VDATA for latching the picture material VDATA according to the timing control signal TSs, and converting the latched picture data VDATA into an output voltage. The operational amplifiers OP1~OPn are coupled to corresponding data conversion circuits DCC1~DCCn. The operational amplifiers OP1~OPn convert the output voltage into corresponding pixel drive signals DS1~DSn based on the reference power supply Iop_REF provided by the power mode selection unit 220. The data conversion circuits DCC1~DCCn of the embodiment can be respectively composed of a shift register SR1~SRn, a data latch LA1~LAn, and a digital analog converter DAC1~DACn. The circuit architecture is implemented, but the present invention is not limited to this. In addition, the timing control signal TSs may be, for example, a horizontal synchronization signal, but the present invention is also not limited thereto.
更具體地說，在本實施例中，感測單元210會根據所感測到的顯示面板的驅動狀態DST產生對應的模式選擇訊號S_slew。而功率模式選擇單元220則會反應於所接收到的模式選擇訊號S_slew而調整所產生的參考電源Iop_REF的大小。其中，由於參考電源Iop_REF的大小會關聯於各運算放大器OP1~OPn的輸出能力，因此藉由調控參考電源Iop_REF的方式即可實現調整畫素驅動訊號DS1~DSn的電壓轉換速率的功能。 More specifically, in the embodiment, the sensing unit 210 generates a corresponding mode selection signal S_slew according to the sensed driving state DST of the display panel. The power mode selection unit 220 adjusts the size of the generated reference power source Iop_REF in response to the received mode selection signal S_slew. Wherein, since the size of the reference power source Iop_REF is related to the output capability of each of the operational amplifiers OP1 to OPn, the function of adjusting the voltage conversion rate of the pixel driving signals DS1 to DSn can be realized by adjusting the reference power source Iop_REF.
舉例來說，當功率模式選擇單元220反應於模式選擇訊號S_slew所提供的參考電源Iop_REF越大時，運算放大器OP1~OPn會因較大的參考電源Iop_REF而具有較強的輸出能力。 反之，當功率模式選擇單元220所提供的參考電源Iop_REF越小時，各運算放大器OP1~OPn的輸出能力則相對較低，但卻較為省電。 For example, when the power mode selection unit 220 responds to the reference power supply Iop_REF provided by the mode selection signal S_slew, the operational amplifiers OP1 to OPn have strong output capability due to the larger reference power supply Iop_REF. Conversely, when the reference power supply Iop_REF provided by the power mode selection unit 220 is smaller, the output capacities of the operational amplifiers OP1 to OPn are relatively low, but are relatively power-saving.
源極驅動器200的各驅動通道230_1~230_n的輸出能力基本上須符合ISIC>CPanel×VDD/T的關係，才能夠滿足顯示面板所需的驅動需求，從而令顯示面板正常地顯示畫面。其中，ISIC為畫素驅動訊號的電流大小，CPanel為顯示面板的等效電容，VDD為顯示面板的系統電壓，並且T為顯示面板的充放電期間。 The output capability of each of the driving channels 230_1~230_n of the source driver 200 must basically conform to the relationship of I SIC > C Panel × VDD / T to meet the driving requirements required for the display panel, so that the display panel can normally display the picture. Wherein, I SIC is the current of the pixel driving signal, C Panel is the equivalent capacitance of the display panel, VDD is the system voltage of the display panel, and T is the charging and discharging period of the display panel.
由上述公式可知，不同規格的顯示面板會有不一樣的輸出能力需求。舉例來說，若系統電壓VS越大或顯示面板的等效電容CPanel越高(即，顯示面板尺寸越大)，則運算放大器會需要較高的輸出能力才能使得對應的畫素能夠在預定的充放電期間內充至目標的電壓值，亦即，必須有較高的電壓轉換速率。另一方面，若充放電期間越短，則運算放大器同樣也需要較高的電壓轉換速率/輸出能力。 According to the above formula, display panels of different specifications may have different output capability requirements. For example, if the system voltage V S is larger or the equivalent capacitance C Panel of the display panel is higher (ie, the display panel size is larger), the operational amplifier will require a higher output capability to enable the corresponding pixel to be The voltage value charged to the target during the predetermined charge and discharge period, that is, a higher voltage conversion rate must be obtained. On the other hand, if the charge and discharge period is shorter, the operational amplifier also requires a higher voltage slew rate/output capability.
藉由本發明實施例的源極驅動方式，源極驅動器200及應用其之顯示驅動電路(如DDC)在搭配不同規格的顯示面板時，可以根據顯示面板的規格/應用環境等條件，動態的調整各驅動通道230_1~230_n的功率模式，藉以令各驅動通道230_1~230_n利用較適合的電壓轉換速率來產生畫素驅動訊號DS1~DSn，從而兼顧省電與顯示畫面品質的需求。更進一步地說，由於本實施例的源極驅動器200可以自動的偵測顯示面板的驅動狀態DST，並且 自動的產生最適合的模式選擇訊號S_slew去調整各驅動通道230_1~230_n的功率模式，因此可以不需要再由工程人員於組裝時，視顯示面板的規格再對源極驅動器200的功率模式進行手動的調整，更有利於裝配流程的進行及模組化的設計。 According to the source driving method of the embodiment of the present invention, the source driver 200 and the display driving circuit (such as DDC) using the same can dynamically adjust according to the specifications of the display panel/application environment when the display panel of different specifications is matched with the display panel of different specifications. The power modes of the driving channels 230_1~230_n are such that the driving channels 230_1~230_n generate the pixel driving signals DS1~DSn by using a suitable voltage conversion rate, thereby achieving both power saving and display picture quality. Further, since the source driver 200 of the present embodiment can automatically detect the driving state DST of the display panel, and Automatically generating the most suitable mode selection signal S_slew to adjust the power mode of each of the driving channels 230_1~230_n, so that it is no longer necessary for the engineering personnel to manually perform the power mode of the source driver 200 according to the specifications of the display panel. The adjustment is more conducive to the assembly process and modular design.
為了更清楚的解釋如何藉由偵測顯示面板的驅動狀態來動態調整各驅動通道的功率模式，底下分別列舉如圖3至圖9B之實施範例來進行說明。 In order to explain more clearly how to dynamically adjust the power mode of each driving channel by detecting the driving state of the display panel, the following is an example of the embodiment shown in FIGS. 3 to 9B.
請先參照圖3，圖3為本發明一實施例之藉感測系統電壓調整功率模式的源極驅動器的電路示意圖。在本實施例中，所述感測單元310是藉由偵測顯示面板的系統電壓VDD來產生對應的模式選擇訊號S_slew，藉以指示不同功率位階的功率模式。亦即，所述驅動狀態為顯示面板的系統電壓VDD。 Please refer to FIG. 3 first. FIG. 3 is a schematic circuit diagram of a source driver of a voltage adjustment power mode by a sensing system according to an embodiment of the present invention. In this embodiment, the sensing unit 310 generates a corresponding mode selection signal S_slew by detecting the system voltage VDD of the display panel, thereby indicating power modes of different power levels. That is, the driving state is the system voltage VDD of the display panel.
具體而言，感測單元310包括電壓取樣電路312以及訊號產生電路314。在本實施例中，電壓取樣電路312會對顯示面板的系統電壓VDD進行取樣，並且據以產生電壓指示訊號(如LV1~LVa)。訊號產生電路314耦接電壓取樣電路312，其可用以依據指示系統電壓VDD大小的電壓指示訊號而產生對應於不同功率模式的模式選擇訊號S_slew。 Specifically, the sensing unit 310 includes a voltage sampling circuit 312 and a signal generating circuit 314. In this embodiment, the voltage sampling circuit 312 samples the system voltage VDD of the display panel and generates a voltage indicating signal (such as LV1~LVa). The signal generating circuit 314 is coupled to the voltage sampling circuit 312, which can be used to generate the mode selection signal S_slew corresponding to different power modes according to the voltage indicating signal indicating the magnitude of the system voltage VDD.
在本實施例中，電壓取樣電路312可例如以多個電阻R所組成之電組串來實現(但本發明不僅限於此)。於此架構下，電壓取樣電路312所產生的電壓指示訊號例如為電阻串之每一分壓點上的電壓訊號LV1~LVa，其中a為正整數且與電阻R的數量有 關。另一方面，訊號產生電路314可利用比較器COMP1~COMPa與暫存器REG1~REGa所組成的電路架構來實現。各比較器COMP1~COMPa的一輸入端耦接至電阻串的各分壓點以接收電壓訊號LV1~LVa，並且各比較器COMP1~COMPa的另一輸入端則接收一參考電壓VREF。而暫存器REG1~REGa則分別耦接對應的比較器COMP1~COMPa的輸出端，藉以根據參考電壓VREF與各電壓訊號LV1~LVa的比較結果來產生模式選擇訊號S_slew。 In the present embodiment, the voltage sampling circuit 312 can be implemented, for example, with a plurality of resistor strings R (but the invention is not limited thereto). In this architecture, the voltage indicating signal generated by the voltage sampling circuit 312 is, for example, the voltage signals LV1 LVVA at each voltage dividing point of the resistor string, where a is a positive integer and the number of resistors R is turn off. On the other hand, the signal generating circuit 314 can be realized by using a circuit structure composed of the comparators COMP1 to COMPa and the registers REG1 to REGa. An input end of each comparator COMP1~COMPa is coupled to each voltage dividing point of the resistor string to receive the voltage signals LV1~LVa, and the other input end of each comparator COMP1~COMPa receives a reference voltage VREF. The registers REG1~REGa are respectively coupled to the output terminals of the corresponding comparators COMP1~COMPa, so as to generate the mode selection signal S_slew according to the comparison result of the reference voltage VREF and the voltage signals LV1~LVa.
功率模式選擇單元320包括可調整(adjustable)電源產生電路322以及電源控制電路324。可調整電源產生電路322用以依據模式選擇訊號S_slew產生電源訊號。電源控制電路324用以基於所述電源訊號而產生用以控制運算放大器(如OP1~OPn)的輸出能力的參考電源Iop_REF。 The power mode selection unit 320 includes an adjustable power generation circuit 322 and a power control circuit 324. The adjustable power generating circuit 322 is configured to generate a power signal according to the mode selection signal S_slew. The power control circuit 324 is configured to generate a reference power source Iop_REF for controlling the output capability of the operational amplifiers (eg, OP1~OPn) based on the power signal.
在本實施例中，可調整電源產生電路322可例如用電晶體Mp1~Mpb(b為正整數)所組成的電流鏡(current mirror)電路以及開關模組SWM的電路架構來實現，其中電晶體Mp1~Mpb例如為p型電晶體，本發明不以此為限。開關模組SWM可例如包括多個開關，所述多個開關分別串接在電晶體Mp2~Mpb的電流路徑上。其中，開關模組SWM中之各開關的導通狀態係基於模式選擇訊號S_slew來決定。電晶體Mp2~Mpb所對應的開關導通時，電晶體Mp2~Mpb的電流路徑會對應的導通。因此，電晶體Mp1所接收的參考電流IREF會被映射至導通的電流路徑上，並且彙整為電源訊號提供給電源控制電路324。換言之，不同的模式選擇訊 號S_slew會將開關模組SWM設定至不同的開關組態，從而實現依據模式選擇訊號S_slew提供不同的電源訊號給電源控制電路324的功能。 In this embodiment, the adjustable power generating circuit 322 can be implemented, for example, by a current mirror circuit composed of transistors Mp1 Mpb (b is a positive integer) and a circuit structure of the switch module SWM, wherein the transistor Mp1~Mpb is, for example, a p-type transistor, and the invention is not limited thereto. The switch module SWM may, for example, comprise a plurality of switches that are respectively connected in series in the current path of the transistors Mp2 to Mpb. The conduction state of each switch in the switch module SWM is determined based on the mode selection signal S_slew. When the switches corresponding to the transistors Mp2 to Mpb are turned on, the current paths of the transistors Mp2 to Mpb are turned on correspondingly. Therefore, the reference current IREF received by the transistor Mp1 is mapped to the turned-on current path, and is integrated into the power supply control circuit 324 for the power signal. In other words, different mode selection messages The number S_slew sets the switch module SWM to a different switch configuration, thereby implementing the function of providing different power signals to the power control circuit 324 according to the mode selection signal S_slew.
電源控制電路324的電路架構可例如用電晶體Mn1與Mn2所組成的電流鏡電路來實現。其中，電晶體Mn1會從可調整電源產生電路322接收電源訊號，並且以所述電源訊號作為參考電流，將其映射至電晶體Mn2的電流路徑上。被映射至電晶體Mn2的電流路徑上的電流即為用以控制運算放大器的參考電源Iop_REF。 The circuit architecture of the power control circuit 324 can be implemented, for example, by a current mirror circuit composed of transistors Mn1 and Mn2. The transistor Mn1 receives the power signal from the adjustable power generating circuit 322, and maps the power signal to the current path of the transistor Mn2. The current that is mapped to the current path of the transistor Mn2 is the reference power source Iop_REF used to control the operational amplifier.
請接著參照圖4，圖4為本發明另一實施例之藉感測系統電壓調整功率模式的源極驅動器的電路示意圖。圖4的架構與圖3大致相同。兩者間的差異在於圖4實施例的訊號產生電路414是以計數器CT、多工器MUX、比較器COMP以及狀態機(state machine)FSM的電路組合來實現依據電壓訊號LV1~LVa產生模式選擇訊號S_slew的功能。而其餘部分之電路，如感測單元410中的電壓取樣電路412以及功率模式選擇單元420中的可調整電源產生電路422與電源控制電路424皆可參酌上述圖3實施例的描述，於此不再贅述。 Please refer to FIG. 4. FIG. 4 is a schematic circuit diagram of a source driver of a voltage adjustment power mode by a sensing system according to another embodiment of the present invention. The architecture of Figure 4 is substantially the same as Figure 3. The difference between the two is that the signal generating circuit 414 of the embodiment of FIG. 4 implements the mode selection according to the voltage signal LV1~LVa by the circuit combination of the counter CT, the multiplexer MUX, the comparator COMP, and the state machine FSM. The function of the signal S_slew. The remaining part of the circuit, such as the voltage sampling circuit 412 in the sensing unit 410 and the adjustable power generating circuit 422 and the power control circuit 424 in the power mode selecting unit 420, may refer to the description of the embodiment of FIG. 3 above. Let me repeat.
基於上述圖3或圖4所示的感測單元310/410與功率模式選擇單元320/420的電路架構，本發明實施例的源極驅動器的訊號波形可如圖5所示。在本實施例中，當感測單元310/410偵測到系統電壓VDD為第一電壓VDD1時(例如為10V，但不僅限於此)， 感測單元410會產生第一模式選擇訊號，使得功率模式選擇單元320/420依據第一模式選擇訊號設定功率模式為第一功率位階(對應電壓轉換速率slew1)。此時，各驅動通道會以電壓轉換速率slew1的畫素驅動訊號DS來驅動對應的畫素。 Based on the circuit architecture of the sensing unit 310/410 and the power mode selection unit 320/420 shown in FIG. 3 or FIG. 4 above, the signal waveform of the source driver of the embodiment of the present invention may be as shown in FIG. 5. In this embodiment, when the sensing unit 310/410 detects that the system voltage VDD is the first voltage VDD1 (for example, 10V, but is not limited thereto), The sensing unit 410 generates a first mode selection signal, so that the power mode selection unit 320/420 sets the power mode to the first power level (corresponding to the voltage conversion rate slew1) according to the first mode selection signal. At this time, each driving channel drives the corresponding pixel with the pixel driving signal DS of the voltage conversion rate slew1.
當感測單元310/410偵測到系統電壓為大於第一電壓VDD的第二電壓VDD2時(例如為20V，但不僅限於此)，感測單元310/410會產生第二模式選擇訊號，使得功率模式選擇單元320/420依據第二模式選擇訊號設定功率模式為第二功率位階(對應電壓轉換速率slew2)。此時，各驅動通道會以電壓轉換速率slew2的畫素驅動訊號DS’來驅動對應的畫素，其中第二功率位階所對應的電壓轉換速率slew2會大於第一功率位階所對應的電壓轉換速率slew1。 When the sensing unit 310/410 detects that the system voltage is the second voltage VDD2 that is greater than the first voltage VDD (eg, 20V, but is not limited thereto), the sensing unit 310/410 generates a second mode selection signal, such that The power mode selection unit 320/420 sets the power mode to the second power level (corresponding to the voltage conversion rate slew2) according to the second mode selection signal. At this time, each driving channel drives the corresponding pixel with the pixel driving signal DS' of the voltage conversion rate slew2, wherein the voltage conversion rate slew2 corresponding to the second power level is greater than the voltage conversion rate corresponding to the first power level. Slew1.
換言之，當感測單元310/410偵測到系統電壓VDD的設定值較低時，感測單元會對應的產生指示較低之功率位階的模式選擇訊號，從而令功率模式選擇單元320/420反應於模式選擇訊號S_slew而將各驅動通道的功率模式設定至較低的功率位階，藉以降低源極驅動的功率消耗。反之，當感測單元310/410偵測到系統電壓VDD的設定值較高時，感測單元310/410會對應的產生指示較高之功率位階的模式選擇訊號，從而令功率模式選擇單元320/420反應於模式選擇訊號S_slew而將各驅動通道的功率模式設定至較高的功率位階，藉以符合源極驅動的輸出能力需求。 In other words, when the sensing unit 310/410 detects that the set value of the system voltage VDD is low, the sensing unit correspondingly generates a mode selection signal indicating a lower power level, thereby causing the power mode selection unit 320/420 to react. The power mode of each driving channel is set to a lower power level in the mode selection signal S_slew, thereby reducing the power consumption of the source driving. On the other hand, when the sensing unit 310/410 detects that the set value of the system voltage VDD is high, the sensing unit 310/410 correspondingly generates a mode selection signal indicating a higher power level, thereby causing the power mode selection unit 320. /420 reacts to the mode selection signal S_slew to set the power mode of each drive channel to a higher power level, thereby meeting the output capability requirements of the source drive.
圖6為本發明一實施例之藉感測顯示面板的充放電期間 調整功率模式的源極驅動器的電路示意圖。在本實施例中，感測單元610是藉由偵測顯示面板的充放電期間來產生對應的模式選擇訊號S_slew，藉以指示不同功率位階的功率模式。亦即，所述驅動狀態為顯示面板的充放電期間。 6 is a charging and discharging period of a sensing display panel according to an embodiment of the present invention; A circuit diagram of a source driver that adjusts the power mode. In this embodiment, the sensing unit 610 generates a corresponding mode selection signal S_slew by detecting a charging and discharging period of the display panel, thereby indicating power modes of different power levels. That is, the driving state is a charging and discharging period of the display panel.
感測單元610包括充放電期間取樣電路612以及訊號產生電路614。充放電期間取樣電路612依據關聯於充放電期間的時序控制訊號TSs而致能，並據以產生期間指示訊號(如VC)。訊號產生電路614耦接充放電期間取樣電路612。訊號產生電路614用以依據指示充放電期間長度的期間指示訊號產生對應於不同功率模式的模式選擇訊號S_slew。 The sensing unit 610 includes a charging and discharging period sampling circuit 612 and a signal generating circuit 614. The charge and discharge period sampling circuit 612 is enabled in accordance with the timing control signal TSs associated with the charge and discharge period, and accordingly generates a period indication signal (e.g., VC). The signal generating circuit 614 is coupled to the charging and discharging period sampling circuit 612. The signal generating circuit 614 is configured to generate a mode selection signal S_slew corresponding to different power modes according to a period indication signal indicating a length of the charging and discharging period.
具體而言，本實施例的充放電期間取樣電路612可例如用電晶體Mp1與Mp2、開關SW1與SW2以及電容C所組成的電路架構來實現，其中電晶體Mp1與Mp2例如為p型電晶體，但本發明不僅限於此。開關SW1耦接在電晶體Mp1與Mp2的閘極之間，並且受控於時序控制訊號TSs而導通或截止。當開關SW1在充放電期間T內導通時，電晶體Mp2會反應於流經電晶體Mp1的參考電流IREF而對耦接於電晶體Mp2與接地端GND之間的電容C充電，使得電容C上的電壓訊號VC隨著充放電期間T逐漸增加，其可以VC=I×T/C表示之。換言之，電壓訊號VC的準位高低即可指示充放電期間T的長度。另外，開關SW2可經控制而使電容C放電至接地端GND，藉以重置充放電期間取樣電路612。 Specifically, the charging and discharging period sampling circuit 612 of the present embodiment can be realized by, for example, a circuit structure composed of transistors Mp1 and Mp2, switches SW1 and SW2, and a capacitor C, wherein the transistors Mp1 and Mp2 are, for example, p-type transistors. However, the invention is not limited to this. The switch SW1 is coupled between the gates of the transistors Mp1 and Mp2, and is turned on or off by being controlled by the timing control signal TSs. When the switch SW1 is turned on during the charging and discharging period T, the transistor Mp2 reacts with the reference current IREF flowing through the transistor Mp1 to charge the capacitor C coupled between the transistor Mp2 and the ground GND, so that the capacitor C is charged. The voltage signal VC gradually increases with the charge and discharge period T, which can be expressed by VC = I × T / C. In other words, the level of the voltage signal VC can indicate the length of the charge and discharge period T. In addition, the switch SW2 can be controlled to discharge the capacitor C to the ground GND, thereby resetting the sampling circuit 612 during charging and discharging.
電壓訊號VC於此會作為充放電期間指示訊號提供給訊 號產生電路614。本實施例的訊號產生電路614可例如用比較器COMP1~COMPa以及暫存器REG1~REGa所組成的電路架構來實現。其中比較器COMP1~COMPa的一輸入端接收電壓訊號VC，而各比較器COMP1~COMPa的另一輸入端則分別接收一對應的參考電壓VREF1~VREFa。暫存器REG1~REGa分別耦接比較器COMP1~COMPa的輸出端，藉以根據電壓訊號和參考電壓VREF1~VREFa的比較結果來產生模式選擇訊號S_slew。 The voltage signal VC will be provided as a signal during the charging and discharging period. Number generation circuit 614. The signal generating circuit 614 of this embodiment can be implemented, for example, by a circuit structure composed of comparators COMP1 to COMPa and registers REG1 to REGa. One input terminal of the comparators COMP1~COMPa receives the voltage signal VC, and the other input terminals of the comparators COMP1~COMPa respectively receive a corresponding reference voltage VREF1~VREFa. The register REG1~REGa are respectively coupled to the output ends of the comparators COMP1~COMPa, so as to generate the mode selection signal S_slew according to the comparison result of the voltage signal and the reference voltages VREF1~VREFa.
另一方面，本實施例的功率模式選擇單元620同樣包括可調整源產生電路622以及電源控制電路624，其運作及電路架構與前述圖3或圖4實施例大致相同，故於此不再贅述。 On the other hand, the power mode selection unit 620 of the present embodiment also includes an adjustable source generation circuit 622 and a power supply control circuit 624. The operation and circuit structure of the power mode selection unit 620 are substantially the same as those of the foregoing embodiment of FIG. 3 or FIG. 4, and thus will not be described herein. .
基於上述圖6所示的感測單元610與功率模式選擇單元620的電路架構，本發明實施例的源極驅動器的訊號波形可如圖7所示。當感測單元610偵測到充放電期間T為較期間長度較短的第一期間T1時，感測單元610會產生第一模式選擇訊號，使得功率模式選擇單元620依據第一模式選擇訊號設定各驅動通道的功率模式為第一功率位階(對應電壓轉換速率slew3)。此時，各驅動通道會以電壓轉換速率slew3的畫素驅動訊號DS來驅動對應的畫素。 Based on the circuit architecture of the sensing unit 610 and the power mode selection unit 620 shown in FIG. 6, the signal waveform of the source driver of the embodiment of the present invention may be as shown in FIG. 7. When the sensing unit 610 detects that the charging/discharging period T is the first period T1 that is shorter than the period length, the sensing unit 610 generates a first mode selection signal, so that the power mode selecting unit 620 selects the signal setting according to the first mode. The power mode of each driving channel is the first power level (corresponding to the voltage conversion rate slew3). At this time, each driving channel drives the corresponding pixel with the pixel driving signal DS of the voltage conversion rate slew3.
當感測單元610偵測到充放電期間T為期間長度長於第一期間T1的第二期間T2時，感測單元610會產生第二模式選擇訊號，使得功率模式選擇單元620依據第二模式選擇訊號設定各驅動通道的功率模式為第二功率位階(對應電壓轉換速率slew4) 此時，各驅動通道會以電壓轉換速率slew4的畫素驅動訊號DS’來驅動對應的畫素，其中第二功率位階所對應的電壓轉換速率slew4小於第一功率位階所對應的電壓轉換速率slew3。 When the sensing unit 610 detects that the charging/discharging period T is the second period T2 in which the period length is longer than the first period T1, the sensing unit 610 generates a second mode selection signal, so that the power mode selecting unit 620 selects according to the second mode. The signal sets the power mode of each driving channel to the second power level (corresponding to the voltage conversion rate slew4) At this time, each driving channel drives the corresponding pixel with the pixel driving signal DS' of the voltage conversion rate slew4, wherein the voltage conversion rate slew4 corresponding to the second power level is smaller than the voltage conversion rate slew3 corresponding to the first power level. .
換言之，當感測單元610偵測到充放電期間較短時(表示畫面更新率較高，例如120fps)，感測單元610會對應的產生指示較高之功率位階的模式選擇訊號S_slew，從而令功率模式選擇單元620反應於模式選擇訊號S_slew而將各驅動通道的功率模式設定至較高的功率位階，藉以符合源極驅動的輸出能力需求。反之，當感測單元610偵測到充放電期間較長時(表示畫面更新率較低，例如30fps)，感測單元610會對應的產生指示較低之功率位階的模式選擇訊號S_slew，從而令功率模式選擇單元620反應於模式選擇訊號S_slew而將各驅動通道的功率模式設定至較低的功率位階，藉以降低源極驅動的功率消耗。 In other words, when the sensing unit 610 detects that the charging/discharging period is short (indicating that the screen update rate is high, for example, 120 fps), the sensing unit 610 correspondingly generates a mode selection signal S_slew indicating a higher power level, thereby The power mode selection unit 620 sets the power mode of each drive channel to a higher power level in response to the mode selection signal S_slew, thereby meeting the output capability requirements of the source drive. On the other hand, when the sensing unit 610 detects that the charging and discharging period is long (indicating that the screen update rate is low, for example, 30 fps), the sensing unit 610 correspondingly generates a mode selection signal S_slew indicating a lower power level, thereby The power mode selection unit 620 sets the power mode of each drive channel to a lower power level in response to the mode selection signal S_slew, thereby reducing the power consumption of the source drive.
圖8為本發明一實施例之藉感測畫素驅動訊號的電流大小調整功率模式的源極驅動器的架構示意圖。在本實施例中，感測單元810是藉由偵測部分或全部的驅動通道830_1~830_n所輸出的畫素驅動訊號DS1~DSn的電流大小來產生對應的模式選擇訊號，藉以指示不同功率位階的功率模式。亦即，所述驅動狀態為畫素驅動訊號DS1~DSn至少其中之一的電流大小。 FIG. 8 is a schematic structural diagram of a source driver of a current size adjustment power mode by a sensing pixel driving signal according to an embodiment of the invention. In this embodiment, the sensing unit 810 generates a corresponding mode selection signal by detecting the current magnitude of the pixel driving signals DS1~DSn outputted by some or all of the driving channels 830_1~830_n, thereby indicating different power levels. Power mode. That is, the driving state is a current magnitude of at least one of the pixel driving signals DS1 to DSn.
請參照圖8，本實施例的感測單元是以設置為取樣第y個至第z個驅動通道830_y~830_z所輸出的畫素驅動訊號DSy~DSz為例，其中y、z為介於1到n的任意正整數。 Referring to FIG. 8 , the sensing unit of the embodiment is an example of a pixel driving signal DSy~DSz outputted by sampling the yth to zth driving channels 830_y~830_z, wherein y and z are between 1 Any positive integer to n.
在本實施例中，感測單元810包括電流取樣電路812以及訊號產生電路814。電流取樣電路812可用以取樣畫素驅動訊號DSy~DSz的電流以作為參考輸出電流，並且依據參考輸出電流產生電流指示訊號。訊號產生電路814耦接電流取樣電路812。訊號產生電路814會基於所接收的電流指示訊號取得參考輸出電流與臨界電流值之間的相對關係，並據以產生指示是否調整功率模式的模式選擇訊號S_slew。 In the embodiment, the sensing unit 810 includes a current sampling circuit 812 and a signal generating circuit 814. The current sampling circuit 812 can be used to sample the current of the pixel driving signals DSy~DSz as a reference output current, and generate a current indicating signal according to the reference output current. The signal generating circuit 814 is coupled to the current sampling circuit 812. The signal generating circuit 814 obtains a relative relationship between the reference output current and the critical current value based on the received current indicating signal, and accordingly generates a mode selection signal S_slew indicating whether to adjust the power mode.
其中，電流取樣電路812可僅針對單一個驅動通道830_y~830_z(y=z)所輸出的畫素驅動訊號DSy~DSz進行取樣，也可針對多數個驅動通道830_y~830_z(y<z)所輸出的畫素驅動訊號DSy~DSz進行取樣，本發明並不對此加以限制。舉例來說，在一範例實施例中，電流取樣電路812可取樣單一個畫素驅動訊號DSy~DSz的電流作為參考輸出電流，並據以產生電流指示訊號。此時，訊號產生電路814會僅依據關聯於所述單一個畫素驅動訊號DSy~DSz的電流大小來產生對應的模式選擇訊號S_slew。在另一範例實施例中，電流取樣電路812可取樣多數個畫素驅動訊號DSy~DSz的電流，並且判斷各取樣的畫素驅動訊號DSy~DSz的電流是否符合驅動條件，再以符合驅動條件的畫素驅動訊號DSy~DSz的電流作為參考輸出電流。此時，訊號產生電路814則會依據所述多數個畫素驅動訊號DSy~DSz中的電流大小符合所設定之驅動條件者來產生對應的模式選擇訊號S_slew。 The current sampling circuit 812 can sample only the pixel driving signals DSy~DSz outputted by a single driving channel 830_y~830_z (y=z), or can be used for a plurality of driving channels 830_y~830_z (y<z). The output pixel drive signals DSy~DSz are sampled, and the present invention is not limited thereto. For example, in an exemplary embodiment, current sampling circuit 812 can sample the current of a single pixel drive signal DSy~DSz as a reference output current and generate a current indication signal accordingly. At this time, the signal generating circuit 814 generates the corresponding mode selection signal S_slew based only on the magnitude of the current associated with the single pixel driving signals DSy~DSz. In another exemplary embodiment, the current sampling circuit 812 can sample the currents of the plurality of pixel driving signals DSy~DSz, and determine whether the current of each of the sampled pixel driving signals DSy~DSz meets the driving condition, and then meets the driving condition. The pixel drive signal DSy~DSz current is used as the reference output current. At this time, the signal generating circuit 814 generates a corresponding mode selection signal S_slew according to the magnitude of the current in the plurality of pixel driving signals DSy~DSz according to the set driving condition.
具體而言，在取樣多數個畫素驅動訊號DSy~DSz的電流 的實施範例中，所述驅動條件可例如為選取所取樣的各畫素驅動訊號DSy~DSz中的最小電流作為參考輸出電流。換言之，在本範例實施例中，電流取樣電路812可比較各個畫素驅動訊號DSy~DSz間的電流大小，並且判定畫素驅動訊號DSy~DSz的電流中最小者符合驅動條件。應注意的是，上述驅動條件的設置僅為一範例，實際上之驅動條件可基於設計者之設計考量而有所調整，本發明不以此為限。 Specifically, the current of a plurality of pixel drive signals DSy~DSz is sampled. In an implementation example, the driving condition may be, for example, selecting a minimum current in each pixel driving signal DSy~DSz sampled as a reference output current. In other words, in the present exemplary embodiment, the current sampling circuit 812 can compare the current between the pixel driving signals DSy~DSz, and determine that the smallest of the currents of the pixel driving signals DSy~DSz meet the driving condition. It should be noted that the setting of the above driving conditions is only an example, and the driving conditions may be adjusted based on the designer's design considerations, and the invention is not limited thereto.
如此一來，訊號產生電路814即會依據關聯於最小電流的電流指示訊號產生對應的模式選擇訊號S_slew來控制各驅動通道830_1~830_n的功率模式。更進一步地說，由於調整功率模式的依據是以具最小電流的畫素驅動訊號DSy~DSz為基準(即，輸出能力最低的驅動通道)，因此可確保調整後的功率模式可適用於各驅動通道830_1~830_n，而不會造成某些驅動通道830_1~830_n的輸出能力不足。 In this way, the signal generating circuit 814 generates a corresponding mode selection signal S_slew according to the current indicating signal associated with the minimum current to control the power modes of the driving channels 830_1 ～ 830_n. Furthermore, since the power mode is adjusted based on the pixel drive signal DSy~DSz with the minimum current (ie, the drive channel with the lowest output capability), the adjusted power mode can be applied to each drive. Channels 830_1~830_n do not cause insufficient output capability of some of the drive channels 830_1~830_n.
更具體地說，由於在源極驅動器800每個充放電期間內，各驅動通道830_1~830_n提供給顯示面板的充電電流大小會隨著時間而遞減。當顯示面板已充電至接近目標電壓時，源極驅動器800對顯示面板的充電電流會趨近於0。基於此特性下，只要畫素驅動訊號DS1~DSn在每個充放電期間結束前的電流大小小於一特定的臨界值(可藉由實驗得知)，即表示此時各驅動通道830_1~830_n的功率模式設定對此顯示面板而言是足夠的。 More specifically, since the charge current supplied to the display panel by each of the drive channels 830_1 830 830_n is decremented over time during each charge and discharge period of the source driver 800. When the display panel has been charged to near the target voltage, the charging current of the source driver 800 to the display panel will approach zero. Based on this characteristic, as long as the current of the pixel drive signals DS1~DSn before the end of each charge and discharge period is less than a specific threshold (which can be known by experiments), it means that the drive channels 830_1~830_n at this time The power mode setting is sufficient for this display panel.
藉由上述判斷方式，本實施例的訊號產生電路814會基 於電流指示訊號判斷參考輸出電流是否小於等於臨界電流值。當訊號產生電路814判斷參考輸出電流大於臨界電流值時，訊號產生電路814會產生致能模式選擇訊號，藉以指示功率模式選擇單元820將功率模式提升一個單位功率位階。另一方面，當訊號產生電路814判斷參考輸出電流小於等於臨界電流值時，訊號產生電路814則會產生禁能模式選擇訊號，藉以指示功率模式選擇單元820將功率模式維持在現有功率位階。 The signal generation circuit 814 of the present embodiment is based on the above judgment manner. The current indication signal determines whether the reference output current is less than or equal to the critical current value. When the signal generation circuit 814 determines that the reference output current is greater than the critical current value, the signal generation circuit 814 generates an enable mode selection signal, thereby instructing the power mode selection unit 820 to increase the power mode by one unit power level. On the other hand, when the signal generating circuit 814 determines that the reference output current is less than or equal to the critical current value, the signal generating circuit 814 generates a disable mode selection signal, thereby instructing the power mode selecting unit 820 to maintain the power mode at the existing power level.
舉例來說，功率模式選擇單元820會將各驅動通道的功率模式預設為起始功率位階，並且功率模式選擇單元820會基於接收到的致能模式選擇訊號從起始功率位階步進地調整功率模式，直至功率模式選擇單元820接收到指示參考輸出電流大於臨界電流值的禁能模式選擇訊號。 For example, the power mode selection unit 820 presets the power mode of each driving channel as the starting power level, and the power mode selecting unit 820 adjusts the stepping signal from the starting power level stepwise based on the received enabling mode. The power mode until the power mode selection unit 820 receives the disable mode selection signal indicating that the reference output current is greater than the critical current value.
換言之，在利用源極驅動器800驅動顯示面板的過程中，源極驅動器800會動態地隨著畫面資料的內容(造成畫素驅動訊號的電流大小改變)，調整各驅動通道的輸出能力/電壓轉換速率。其中，只要每一次感測單元810判斷出畫素驅動訊號DSy~DSz的電流大於臨界電流值時，功率模式選擇單元820就會反應於所接收的模式選擇訊號S_slew而將功率模式提高一個功率位階，藉以提高源極驅動器800對顯示面板的充放電電流。而此偵測動作會在畫面顯示的期間內持續地進行，因此源極驅動器800最終就可動態地達到不影響畫面品質且最省電的功率模式，藉以同時兼顧省電與顯示品質的需求。 In other words, in the process of driving the display panel by the source driver 800, the source driver 800 dynamically adjusts the output capability/voltage conversion of each driving channel according to the content of the screen material (the magnitude of the current of the pixel driving signal is changed). rate. Wherein, each time the sensing unit 810 determines that the current of the pixel driving signals DSy~DSz is greater than the critical current value, the power mode selecting unit 820 increases the power mode by one power level in response to the received mode selection signal S_slew. In order to increase the charge and discharge current of the source driver 800 to the display panel. Since the detection operation is continuously performed during the display period of the screen, the source driver 800 can finally dynamically achieve the power mode that does not affect the picture quality and the most power-saving, thereby simultaneously meeting the requirements of power saving and display quality.
另一方面，在一範例實施例中，所述源極驅動器800還可藉由在不顯示畫面的空白期間(blanking period)內傳送對應於測試圖樣的畫面資料給各驅動通道830_1~830_n，藉以令功率模式選擇單元820可依據關聯於測試圖樣的畫素驅動訊號DSy~DSz的電流大小來設定功率模式的終止功率位階，也就是可調整的上限功率位階。 On the other hand, in an exemplary embodiment, the source driver 800 can also transmit the picture data corresponding to the test pattern to the driving channels 830_1 ～ 830_n by using a blanking period in which no picture is displayed. The power mode selection unit 820 can set the termination power level of the power mode, that is, the adjustable upper power level, according to the current magnitude of the pixel drive signals DSy~DSz associated with the test pattern.
舉例來說，所述測試圖樣可例如為一常白(normally white)畫面，其中常白畫面所對應的電壓範圍為0V至20V的區間。此時，感測單元810會根據對應常白畫面的畫素驅動訊號DSy~DSz產生相應的模式選擇訊號S_slew，使得功率模式選擇單元820逐步地將功率模式調整至可符合從0V充電至20V之需求的功率位階。其後，功率模式選擇單元即會將該功率位階設定為功率模式的終止功率位階。 For example, the test pattern can be, for example, a normally white picture, wherein the constant white picture corresponds to a voltage range of 0V to 20V. At this time, the sensing unit 810 generates a corresponding mode selection signal S_slew according to the pixel driving signals DSy~DSz corresponding to the normally white screen, so that the power mode selecting unit 820 gradually adjusts the power mode to be compatible from 0V to 20V. The power level of the demand. Thereafter, the power mode selection unit sets the power level to the termination power level of the power mode.
經過上述終止功率位階的設定後，即便是同一源極驅動器800拿去應用在設定為常黑畫面模式的顯示面板上，由於常黑畫面所對應的電壓範圍為9V至11V的區間，因此原先所設定的終止功率位階也可符合常黑畫面模式的顯示面板的應用，而不需要重新設定。 After the termination of the power level setting, even if the same source driver 800 is applied to the display panel set to the normal black screen mode, since the voltage range corresponding to the normally black screen is in the range of 9V to 11V, the original The set termination power level can also be applied to the display panel of the normal black screen mode without resetting.
底下以圖9A與圖9B來說明上述感測單元的具體實施範例。其中，圖9A為依照圖8之一實施例的運算放大器的輸出級部分的電路示意圖，圖9B為依照圖8之一實施例的感測單元的電路示意圖。 A specific implementation example of the above sensing unit will be described below with reference to FIGS. 9A and 9B. 9A is a circuit diagram of an output stage portion of an operational amplifier in accordance with an embodiment of FIG. 8, and FIG. 9B is a circuit diagram of a sensing unit in accordance with an embodiment of FIG.
請同時參照圖9A與圖9B，於此係以運算放大器OPy來作為範例進行說明。在本實施例中，運算放大器OPy的輸出級部分可利用電晶體Mp1、Mp2、Mn1及Mn2以及電阻R所組成的電路架構來實現，其中電晶體Mp1與Mp2例如為p型電晶體，而電晶體Mn1與Mn2例如為n型電晶體，但本發明不僅限於此。電晶體Mp1與Mn1相互疊接(cascode)，並且電晶體Mp2與Mn2相互疊接。電晶體Mp1與Mp2的閘極作為運算放大器OPy的一輸入端，而電晶體Mn1與Mn2的閘極則作為運算放大器OPy的另一輸入端。電晶體Mp1、Mp2、Mn1及Mn2的汲極耦接在一起並且作為運算放大器OPy的輸出端。在運算放大器OPy中，電阻R1與電晶體Mp2的共節點上的電壓訊號Vy_source以及電阻R2與電晶體Mn2的共節點上的電壓訊號Vy_sink可用以指示畫素驅動訊號DSy的電流大小。 Referring to FIG. 9A and FIG. 9B simultaneously, the operational amplifier OPy will be described as an example. In this embodiment, the output stage portion of the operational amplifier OPy can be realized by a circuit structure composed of transistors Mp1, Mp2, Mn1 and Mn2 and a resistor R, wherein the transistors Mp1 and Mp2 are, for example, p-type transistors, and the electric The crystals Mn1 and Mn2 are, for example, n-type transistors, but the present invention is not limited thereto. The transistors Mp1 and Mn1 are cascoded, and the transistors Mp2 and Mn2 are overlapped with each other. The gates of the transistors Mp1 and Mp2 serve as an input terminal of the operational amplifier OPy, and the gates of the transistors Mn1 and Mn2 serve as the other input terminal of the operational amplifier OPy. The drains of the transistors Mp1, Mp2, Mn1 and Mn2 are coupled together and serve as the output of the operational amplifier OPy. In the operational amplifier OPy, the voltage signal Vy_source at the common node of the resistor R1 and the transistor Mp2 and the voltage signal Vy_sink at the common node of the resistor R2 and the transistor Mn2 can be used to indicate the magnitude of the current of the pixel driving signal DSy.
在感測單元910中，其包括電流取樣電路912以及訊號產生電路914。電流取樣電路912於此可利用比較器CUy~CUz、CDy~CDz以及邏輯閘LGU、LGD所組成的電路架構來實現。比較器CUy~CUz的一輸入端接收一參考電壓VREF_source，並且各比較器CUy~CUz的另一輸入端分別接收電壓訊號Vy_source~Vz_source。比較器CDy~CDz的一輸入端接收一參考電壓VREF_sink，並且各比較器CDy~CDz的另一輸入端分別接收電壓訊號Vy_sink~Vz_sink。邏輯閘LGU耦接比較器CUy~CUz的輸出端，並且邏輯閘LGD耦接比較器CDy~CDz的輸出端。邏輯閘 LGU與LGD分別根據參考電壓VREF_source與電壓訊號Vy_source~Vz_source的比較結果以及參考電壓VREF_sink與電壓訊號Vy_sink~Vz_sink進行邏輯運算，以篩選出特定的電流作為參考輸出電流，再以之產生電流指示訊號提供給訊號產生電路914。 In the sensing unit 910, it includes a current sampling circuit 912 and a signal generating circuit 914. The current sampling circuit 912 can be implemented by using a circuit structure composed of comparators CUy~CUz, CDy~CDz, and logic gates LGU, LGD. An input terminal of the comparators CUy~CUz receives a reference voltage VREF_source, and the other input terminals of the comparators CUy~CUz respectively receive the voltage signals Vy_source~Vz_source. An input terminal of the comparator CDy~CDz receives a reference voltage VREF_sink, and the other input terminals of the comparators CDy~CDz respectively receive the voltage signals Vy_sink~Vz_sink. The logic gate LGU is coupled to the output of the comparators CUy~CUz, and the logic gate LGD is coupled to the output of the comparators CDy~CDz. Logic gate LGU and LGD respectively perform logic operations on the comparison result of the reference voltage VREF_source and the voltage signal Vy_source~Vz_source and the reference voltage VREF_sink and the voltage signal Vy_sink~Vz_sink to select a specific current as a reference output current, and then generate a current indication signal. Signal generation circuit 914 is provided.
訊號產生電路914可例如以計數器CT與狀態機FSM所組成的電路架構來實現，其可依據邏輯閘LGU與LGD的邏輯運算結果而產生對應的模式選擇訊號S_slew，並提供給後級的功率模式選擇單元。藉此，根據畫素驅動訊號DSy~DSz的電流大小來調控各驅動通道的功率模式的控制機制即可被實現。 The signal generating circuit 914 can be implemented, for example, by a circuit architecture composed of a counter CT and a state machine FSM, which can generate a corresponding mode selection signal S_slew according to the logical operation result of the logic gates LGU and LGD, and provide the power mode to the subsequent stage. Select the unit. Thereby, the control mechanism for controlling the power mode of each driving channel according to the current magnitude of the pixel driving signals DSy~DSz can be realized.
於此應注意的是，圖3、圖4、圖6及圖9B之電路架構僅係為示意本發明實施例的感測顯示面板的驅動狀態及控制各驅動通道的功率模式可據以實施之範例，本發明實施例所教示的感測單元與功率模式選擇單元並非限定以上述實施例的電路架構來實現。任何可藉由感測顯示面板的驅動狀態而產生指示功率模式的模式選擇訊號的電路架構皆不脫離本發明實施例所述之感測單元的範疇，而任何可基於模式選擇訊號控制各驅動通道的功率模式，以動態地調整各驅動通道所輸出的畫素驅動訊號的電壓轉換速率的電路架構亦皆不脫離本發明實施例所述之功率模式選擇單元的範疇，於此合先敘明。 It should be noted that the circuit architectures of FIG. 3, FIG. 4, FIG. 6, and FIG. 9B are only for illustrating the driving state of the sensing display panel and controlling the power mode of each driving channel according to the embodiment of the present invention. For example, the sensing unit and the power mode selecting unit taught by the embodiments of the present invention are not limited to be implemented by the circuit architecture of the above embodiment. Any circuit configuration that can generate a mode selection signal indicating a power mode by sensing the driving state of the display panel does not deviate from the scope of the sensing unit described in the embodiment of the present invention, and any driving channel can be controlled based on the mode selection signal. The power mode of the power mode to dynamically adjust the voltage conversion rate of the pixel driving signals outputted by the driving channels does not deviate from the scope of the power mode selecting unit according to the embodiment of the present invention.
綜上所述，本發明實施例提出一種源極驅動器、顯示驅動電路及顯示裝置，其可偵測顯示面板的驅動狀態並據以動態地調整各驅動通道的輸出能力/電壓轉換速率。藉此，無論本發明實 施例的源極驅動器與顯示驅動電路應用在何種規格的顯示面板中，其皆可根據顯示面板的應用環境而自動地以最為合適的電壓轉換速率來進行源極驅動，從而令顯示品質與省電需求之間可藉此取得較佳的平衡。而且，由於不需要由工程人員於組裝時視顯示面板的規格再對源極驅動器的功率模式進行手動的調整，人力與時間的成本也得以被有效地節省。 In summary, the embodiment of the present invention provides a source driver, a display driving circuit, and a display device, which can detect the driving state of the display panel and dynamically adjust the output capability/voltage conversion rate of each driving channel. Thereby, regardless of the present invention In the display panel of the specification of the source driver and the display driving circuit, the source driving can be automatically performed at the most suitable voltage conversion rate according to the application environment of the display panel, thereby making the display quality and the display quality A better balance can be achieved between power saving requirements. Moreover, since it is not necessary for the engineer to manually adjust the power mode of the source driver depending on the specifications of the display panel during assembly, the cost of labor and time can be effectively saved.
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明的精神和範圍內，當可作些許的更動與潤飾，故本發明的保護範圍當視後附的申請專利範圍所界定者為準。 Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art can make some changes and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims.
10‧‧‧顯示裝置 10‧‧‧ display device
20‧‧‧時序控制器 20‧‧‧Sequence Controller
60‧‧‧閘極驅動器 60‧‧‧gate driver
100‧‧‧源極驅動器 100‧‧‧Source Driver
110‧‧‧感測單元 110‧‧‧Sensor unit
120‧‧‧功率模式選擇單元 120‧‧‧Power mode selection unit
130_1~130_n‧‧‧驅動通道 130_1~130_n‧‧‧ drive channel
DDC‧‧‧顯示驅動電路 DDC‧‧‧ display drive circuit
DP‧‧‧顯示面板 DP‧‧‧ display panel
DS1~DSn‧‧‧畫素驅動訊號 DS1~DSn‧‧‧ pixel drive signal
DST‧‧‧驅動狀態 DST‧‧‧Drive status
GS1~GSm‧‧‧掃描訊號 GS1~GSm‧‧‧ scan signal
S_slew‧‧‧模式選擇訊號 S_slew‧‧‧ mode selection signal
VDATA‧‧‧畫面資料 VDATA‧‧‧ screen material
TSg、TSs‧‧‧時序控制訊號 TSg, TSs‧‧‧ timing control signals
Claims (16)
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| US10817044B2 (en) * | 2018-03-28 | 2020-10-27 | Raydium Semiconductor Corporation | Power saving control apparatus and power saving control method applied to display driving circuit |
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